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Search results for: High-k gate dielectrics

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</div> </div> <h1 class="mt-3 mb-3 text-center" style="font-size:1.6rem;">Search results for: High-k gate dielectrics</h1> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">175</span> Trap Assisted Tunneling Model for Gate Current in Nano Scale MOSFET with High-K Gate Dielectrics</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Ashwani%20K.%20Rana">Ashwani K. Rana</a>, <a href="https://publications.waset.org/search?q=Narottam%20Chand"> Narottam Chand</a>, <a href="https://publications.waset.org/search?q=Vinod%20Kapoor"> Vinod Kapoor</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper presents a new compact analytical model of the gate leakage current in high-k based nano scale MOSFET by assuming a two-step inelastic trap-assisted tunneling (ITAT) process as the conduction mechanism. This model is based on an inelastic trap-assisted tunneling (ITAT) mechanism combined with a semiempirical gate leakage current formulation in the BSIM 4 model. The gate tunneling currents have been calculated as a function of gate voltage for different gate dielectrics structures such as HfO2, Al2O3 and Si3N4 with EOT (equivalent oxide thickness) of 1.0 nm. The proposed model is compared and contrasted with santaurus simulation results to verify the accuracy of the model and excellent agreement is found between the analytical and simulated data. It is observed that proposed analytical model is suitable for different highk gate dielectrics simply by adjusting two fitting parameters. It was also shown that gate leakages reduced with the introduction of high-k gate dielectric in place of SiO2. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Analytical%20model" title="Analytical model">Analytical model</a>, <a href="https://publications.waset.org/search?q=High-k%20gate%20dielectrics" title=" High-k gate dielectrics"> High-k gate dielectrics</a>, <a href="https://publications.waset.org/search?q=inelastic%0Atrap%20assisted%20tunneling" title=" inelastic trap assisted tunneling"> inelastic trap assisted tunneling</a>, <a href="https://publications.waset.org/search?q=metal%E2%80%93oxide%E2%80%93semiconductor%20%28MOS%29%20devices." title=" metal鈥搊xide鈥搒emiconductor (MOS) devices."> metal鈥搊xide鈥搒emiconductor (MOS) devices.</a> </p> <a href="https://publications.waset.org/15954/trap-assisted-tunneling-model-for-gate-current-in-nano-scale-mosfet-with-high-k-gate-dielectrics" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/15954/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/15954/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/15954/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/15954/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/15954/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/15954/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/15954/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/15954/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/15954/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/15954/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/15954.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">3307</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">174</span> Performance Analysis of BPJLT with Different Gate and Spacer Materials</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Porag%20Jyoti%20Ligira">Porag Jyoti Ligira</a>, <a href="https://publications.waset.org/search?q=Gargi%20Khanna"> Gargi Khanna</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The paper presents a simulation study of the electrical characteristic of Bulk Planar Junctionless Transistor (BPJLT) using spacer. The BPJLT is a transistor without any PN junctions in the vertical direction. It is a gate controlled variable resistor. The characteristics of BPJLT are analyzed by varying the oxide material under the gate. It can be shown from the simulation that an ideal subthreshold slope of ~60 mV/decade can be achieved by using highk dielectric. The effects of variation of spacer length and material on the electrical characteristic of BPJLT are also investigated in the paper. The ION / IOFF ratio improvement is of the order of 107 and the OFF current reduction of 10-4 is obtained by using gate dielectric of HfO2 instead of SiO2. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=BPJLT" title="BPJLT">BPJLT</a>, <a href="https://publications.waset.org/search?q=double%20gate" title=" double gate"> double gate</a>, <a href="https://publications.waset.org/search?q=high-k" title=" high-k"> high-k</a>, <a href="https://publications.waset.org/search?q=spacer." title=" spacer."> spacer.</a> </p> <a href="https://publications.waset.org/10003715/performance-analysis-of-bpjlt-with-different-gate-and-spacer-materials" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10003715/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10003715/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10003715/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10003715/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10003715/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10003715/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10003715/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10003715/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10003715/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10003715/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10003715.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1784</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">173</span> Improvement of Short Channel Effects in Cylindrical Strained Silicon Nanowire Transistor</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Fatemeh%20Karimi">Fatemeh Karimi</a>, <a href="https://publications.waset.org/search?q=Morteza%20Fathipour"> Morteza Fathipour</a>, <a href="https://publications.waset.org/search?q=Hamdam%20Ghanatian"> Hamdam Ghanatian</a>, <a href="https://publications.waset.org/search?q=Vala%20Fathipour"> Vala Fathipour</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silicon-germanium (SiGe) wire and gate dielectric. Indeed the effect of high-魏 dielectric on Field Induced Barrier Lowering (FIBL) has been studied. Due to the higher electron mobility in tensile strained silicon, the n-type FETs with strained silicon channel have better drain current compare with the pure Si one. In this structure gate dielectric divided in two parts, we have used high-魏 dielectric near the source and low-魏 dielectric near the drain to reduce the short channel effects. By this structure short channel effects such as FIBL will be reduced indeed by increasing the RSiGe, ID-VD characteristics will be improved. The leakage current and transfer characteristics, the threshold-voltage (Vt), the drain induced barrier height lowering (DIBL), are estimated with respect to, gate bias (VG), RSiGe and different gate dielectrics. For short channel effects, such as DIBL, gate all around strained silicon nanowire FET have similar characteristics with the pure Si one while dual dielectrics can improve short channel effects in this structure. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=SNWT%20%28silicon%20nanowire%20transistor%29" title="SNWT (silicon nanowire transistor)">SNWT (silicon nanowire transistor)</a>, <a href="https://publications.waset.org/search?q=Tensile%20Strain" title=" Tensile Strain"> Tensile Strain</a>, <a href="https://publications.waset.org/search?q=high-%CE%BA%20dielectric" title="high-魏 dielectric">high-魏 dielectric</a>, <a href="https://publications.waset.org/search?q=Field%20Induced%20Barrier%20Lowering%20%28FIBL%29" title=" Field Induced Barrier Lowering (FIBL)"> Field Induced Barrier Lowering (FIBL)</a>, <a href="https://publications.waset.org/search?q=cylindricalnano%20wire%20%28CW%29" title=" cylindricalnano wire (CW)"> cylindricalnano wire (CW)</a>, <a href="https://publications.waset.org/search?q=drain%20induced%20barrier%20lowering%20%28DIBL%29." title=" drain induced barrier lowering (DIBL)."> drain induced barrier lowering (DIBL).</a> </p> <a href="https://publications.waset.org/3125/improvement-of-short-channel-effects-in-cylindrical-strained-silicon-nanowire-transistor" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/3125/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/3125/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/3125/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/3125/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/3125/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/3125/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/3125/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/3125/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/3125/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/3125/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/3125.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2008</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">172</span> A Novel Source/Drain-to-Gate Non-overlap MOSFET to Reduce Gate Leakage Current in Nano Regime</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Ashwani%20K.%20Rana">Ashwani K. Rana</a>, <a href="https://publications.waset.org/search?q=Narottam%20Chand"> Narottam Chand</a>, <a href="https://publications.waset.org/search?q=Vinod%20Kapoor"> Vinod Kapoor</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, gate leakage current has been mitigated by the use of novel nanoscale MOSFET with Source/Drain-to-Gate Non-overlapped and high-k spacer structure for the first time. A compact analytical model has been developed to study the gate leakage behaviour of proposed MOSFET structure. The result obtained has found good agreement with the Sentaurus Simulation. Fringing gate electric field through the dielectric spacer induces inversion layer in the non-overlap region to act as extended S/D region. It is found that optimal Source/Drain-to-Gate Non-overlapped and high-k spacer structure has reduced the gate leakage current to great extent as compared to those of an overlapped structure. Further, the proposed structure had improved off current, subthreshold slope and DIBL characteristic. It is concluded that this structure solves the problem of high leakage current without introducing the extra series resistance. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Gate%20tunneling%20current" title="Gate tunneling current">Gate tunneling current</a>, <a href="https://publications.waset.org/search?q=analytical%20model" title=" analytical model"> analytical model</a>, <a href="https://publications.waset.org/search?q=spacer%0Adielectrics" title=" spacer dielectrics"> spacer dielectrics</a>, <a href="https://publications.waset.org/search?q=DIBL" title=" DIBL"> DIBL</a>, <a href="https://publications.waset.org/search?q=subthreshold%20slope." title=" subthreshold slope."> subthreshold slope.</a> </p> <a href="https://publications.waset.org/3314/a-novel-sourcedrain-to-gate-non-overlap-mosfet-to-reduce-gate-leakage-current-in-nano-regime" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/3314/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/3314/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/3314/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/3314/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/3314/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/3314/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/3314/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/3314/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/3314/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/3314/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/3314.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2605</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">171</span> Gate Tunnel Current Calculation for NMOSFET Based on Deep Sub-Micron Effects</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Ashwani%20K.%20Rana">Ashwani K. Rana</a>, <a href="https://publications.waset.org/search?q=Narottam%20Chand"> Narottam Chand</a>, <a href="https://publications.waset.org/search?q=Vinod%20Kapoor"> Vinod Kapoor</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>Aggressive scaling of MOS devices requires use of ultra-thin gate oxides to maintain a reasonable short channel effect and to take the advantage of higher density, high speed, lower cost etc. Such thin oxides give rise to high electric fields, resulting in considerable gate tunneling current through gate oxide in nano regime. Consequently, accurate analysis of gate tunneling current is very important especially in context of low power application. In this paper, a simple and efficient analytical model has been developed for channel and source/drain overlap region gate tunneling current through ultra thin gate oxide n-channel MOSFET with inevitable deep submicron effect (DSME).The results obtained have been verified with simulated and reported experimental results for the purpose of validation. It is shown that the calculated tunnel current is well fitted to the measured one over the entire oxide thickness range. The proposed model is suitable enough to be used in circuit simulator due to its simplicity. It is observed that neglecting deep sub-micron effect may lead to large error in the calculated gate tunneling current. It is found that temperature has almost negligible effect on gate tunneling current. It is also reported that gate tunneling current reduces with the increase of gate oxide thickness. The impact of source/drain overlap length is also assessed on gate tunneling current.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Gate%20tunneling%20current" title="Gate tunneling current">Gate tunneling current</a>, <a href="https://publications.waset.org/search?q=analytical%20model" title=" analytical model"> analytical model</a>, <a href="https://publications.waset.org/search?q=gate%20dielectrics" title=" gate dielectrics"> gate dielectrics</a>, <a href="https://publications.waset.org/search?q=non%20uniform%20poly%20gate%20doping" title=" non uniform poly gate doping"> non uniform poly gate doping</a>, <a href="https://publications.waset.org/search?q=MOSFET" title=" MOSFET"> MOSFET</a>, <a href="https://publications.waset.org/search?q=fringing%20field%20effect%20and%20image%20charges." title=" fringing field effect and image charges."> fringing field effect and image charges.</a> </p> <a href="https://publications.waset.org/14468/gate-tunnel-current-calculation-for-nmosfet-based-on-deep-sub-micron-effects" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/14468/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/14468/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/14468/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/14468/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/14468/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/14468/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/14468/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/14468/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/14468/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/14468/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/14468.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1733</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">170</span> Two-dimensional Analytical Drain Current Model for Multilayered-Gate Material Engineered Trapezoidal Recessed Channel(MLGME-TRC) MOSFET: a Novel Design</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Priyanka%20Malik%20A">Priyanka Malik A</a>, <a href="https://publications.waset.org/search?q=Rishu%20Chaujar%20B"> Rishu Chaujar B</a>, <a href="https://publications.waset.org/search?q=Mridula%20Gupta%20C"> Mridula Gupta C</a>, <a href="https://publications.waset.org/search?q=R.S.%20Gupta%20D"> R.S. Gupta D</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, for the first time, a two-dimensional (2D) analytical drain current model for sub-100 nm multi-layered gate material engineered trapezoidal recessed channel (MLGMETRC) MOSFET: a novel design is presented and investigated using ATLAS and DEVEDIT device simulators, to mitigate the large gate leakages and increased standby power consumption that arise due to continued scaling of SiO2-based gate dielectrics. The twodimensional (2D) analytical model based on solution of Poisson-s equation in cylindrical coordinates, utilizing the cylindrical approximation, has been developed which evaluate the surface potential, electric field, drain current, switching metric: ION/IOFF ratio and transconductance for the proposed design. A good agreement between the model predictions and device simulation results is obtained, verifying the accuracy of the proposed analytical model. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=ATLAS" title="ATLAS">ATLAS</a>, <a href="https://publications.waset.org/search?q=DEVEDIT" title=" DEVEDIT"> DEVEDIT</a>, <a href="https://publications.waset.org/search?q=NJD" title=" NJD"> NJD</a>, <a href="https://publications.waset.org/search?q=MLGME-%20TRCMOSFET." title=" MLGME- TRCMOSFET."> MLGME- TRCMOSFET.</a> </p> <a href="https://publications.waset.org/6264/two-dimensional-analytical-drain-current-model-for-multilayered-gate-material-engineered-trapezoidal-recessed-channelmlgme-trc-mosfet-a-novel-design" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/6264/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/6264/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/6264/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/6264/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/6264/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/6264/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/6264/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/6264/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/6264/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/6264/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/6264.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1692</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">169</span> Investigation of Multiple Material Gate Impact on Short Channel Effects and Reliability of Nanoscale SOI MOSFETs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Paniz%20Tafakori">Paniz Tafakori</a>, <a href="https://publications.waset.org/search?q=Ali%20A.%20Orouji"> Ali A. Orouji</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper the features of multiple material gate silicon-on-insulator MOSFETs are presented and compared with single material gate silicon-on-insulator MOSFET structures. The results indicate that the multiple material gate structures reduce short channel effects such as drain induce barrier lowering, hot electron effect and better current characteristics in comparison with single material structures <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Short-channel%20effects%20%28SCEs%29" title="Short-channel effects (SCEs)">Short-channel effects (SCEs)</a>, <a href="https://publications.waset.org/search?q=Dual%20material%20gate%0A%28DMG%29" title=" Dual material gate (DMG)"> Dual material gate (DMG)</a>, <a href="https://publications.waset.org/search?q=Triple%20material%20gate%20%28TMG%29" title=" Triple material gate (TMG)"> Triple material gate (TMG)</a>, <a href="https://publications.waset.org/search?q=Pentamerous%20material%20gate%0A%28PMG%29." title=" Pentamerous material gate (PMG)."> Pentamerous material gate (PMG).</a> </p> <a href="https://publications.waset.org/11808/investigation-of-multiple-material-gate-impact-on-short-channel-effects-and-reliability-of-nanoscale-soi-mosfets" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/11808/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/11808/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/11808/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/11808/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/11808/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/11808/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/11808/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/11808/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/11808/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/11808/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/11808.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2006</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">168</span> A Simulation Model for the H-gate PDSOI MOSFET</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Bu%20Jianhui">Bu Jianhui</a>, <a href="https://publications.waset.org/search?q=Bi%20Jinshun"> Bi Jinshun</a>, <a href="https://publications.waset.org/search?q=Liu%20Mengxin"> Liu Mengxin</a>, <a href="https://publications.waset.org/search?q=Luo%20Jiajun"> Luo Jiajun</a>, <a href="https://publications.waset.org/search?q=Han%20Zhengsheng"> Han Zhengsheng</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The floating body effect is a serious problem for the PDSOI MOSFET, and the H-gate layout is frequently used as the body contact to eliminate this effect. Unfortunately, most of the standard commercial SOI MOSFET model is for the device with finger gate, the necessity of the new models for the H-gate device arises. A simulation model for the H-gate PDSOI MOSFET is proposed based on the 0.35渭m PDSOI process developed by the Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS), and then the model is well verified by the ring-oscillator. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=PDSOI%20H-gate%20Device%20model%20Body%20contact." title="PDSOI H-gate Device model Body contact.">PDSOI H-gate Device model Body contact.</a> </p> <a href="https://publications.waset.org/8199/a-simulation-model-for-the-h-gate-pdsoi-mosfet" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/8199/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/8199/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/8199/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/8199/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/8199/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/8199/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/8199/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/8199/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/8199/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/8199/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/8199.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2242</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">167</span> Spin-Dependent Transport Signatures of Bound States: From Finger to Top Gates</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Yun-Hsuan%20Yu">Yun-Hsuan Yu</a>, <a href="https://publications.waset.org/search?q=Chi-Shung%20Tang"> Chi-Shung Tang</a>, <a href="https://publications.waset.org/search?q=Nzar%20Rauf%20Abdullah"> Nzar Rauf Abdullah</a>, <a href="https://publications.waset.org/search?q=Vidar%20Gudmundsson"> Vidar Gudmundsson</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Spin-orbit gap feature in energy dispersion of one-dimensional devices is revealed via strong spin-orbit interaction (SOI) effects under Zeeman field. We describe the utilization of a finger-gate or a top-gate to control the spin-dependent transport characteristics in the SOI-Zeeman influenced split-gate devices by means of a generalized spin-mixed propagation matrix method. For the finger-gate system, we find a bound state in continuum for incident electrons within the ultra-low energy regime. For the top-gate system, we observe more bound-state features in conductance associated with the formation of spin-associated hole-like or electron-like quasi-bound states around band thresholds, as well as hole bound states around the reverse point of the energy dispersion. We demonstrate that the spin-dependent transport behavior of a top-gate system is similar to that of a finger-gate system only if the top-gate length is less than the effective Fermi wavelength. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Spin-orbit" title="Spin-orbit">Spin-orbit</a>, <a href="https://publications.waset.org/search?q=Zeeman" title=" Zeeman"> Zeeman</a>, <a href="https://publications.waset.org/search?q=top-gate" title=" top-gate"> top-gate</a>, <a href="https://publications.waset.org/search?q=finger-gate" title=" finger-gate"> finger-gate</a>, <a href="https://publications.waset.org/search?q=bound%20state." title=" bound state."> bound state.</a> </p> <a href="https://publications.waset.org/10008608/spin-dependent-transport-signatures-of-bound-states-from-finger-to-top-gates" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10008608/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10008608/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10008608/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10008608/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10008608/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10008608/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10008608/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10008608/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10008608/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10008608/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10008608.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">949</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">166</span> Capacitance Models of AlGaN/GaN High Electron Mobility Transistors</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=A.%20Douara">A. Douara</a>, <a href="https://publications.waset.org/search?q=N.%20Kermas"> N. Kermas</a>, <a href="https://publications.waset.org/search?q=B.%20Djellouli"> B. Djellouli</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this study, we report calculations of gate capacitance of AlGaN/GaN HEMTs with nextnano device simulation software. We have used a physical gate capacitance model for III-V FETs that incorporates quantum capacitance and centroid capacitance in the channel. These simulations explore various device structures with different values of barrier thickness and channel thickness. A detailed understanding of the impact of gate capacitance in HEMTs will allow us to determine their role in future 10 nm physical gate length node.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=AlGaN%2FGaN" title="AlGaN/GaN">AlGaN/GaN</a>, <a href="https://publications.waset.org/search?q=centroid%20capacitance" title=" centroid capacitance"> centroid capacitance</a>, <a href="https://publications.waset.org/search?q=gate%20capacitance" title=" gate capacitance"> gate capacitance</a>, <a href="https://publications.waset.org/search?q=HEMT" title=" HEMT"> HEMT</a>, <a href="https://publications.waset.org/search?q=quantum%20capacitance." title=" quantum capacitance."> quantum capacitance.</a> </p> <a href="https://publications.waset.org/10004147/capacitance-models-of-algangan-high-electron-mobility-transistors" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10004147/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10004147/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10004147/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10004147/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10004147/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10004147/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10004147/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10004147/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10004147/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10004147/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10004147.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1898</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">165</span> 3D Quantum Numerical Simulation of Horizontal Rectangular Dual Metal Gate\Gate All Around MOSFETs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=M.%20Khaouani">M. Khaouani</a>, <a href="https://publications.waset.org/search?q=A.%20Guen-Bouazza"> A. Guen-Bouazza</a>, <a href="https://publications.waset.org/search?q=B.%20Bouazza"> B. Bouazza</a>, <a href="https://publications.waset.org/search?q=Z.%20Kourdi"> Z. Kourdi</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>The integrity and issues related to electrostatic performance associated with scaling Si MOSFET bulk sub 10nm channel length promotes research in new device architectures such as SOI, double gate and GAA MOSFET. In this paper, we present some novel characteristic of horizontal rectangular gate\gate all around MOSFETs with dual metal of gate we obtained using SILVACO TCAD tools. We will also exhibit some simulation results we obtained relating to the influence of some parameters variation on our structure, that having a direct impact on their threshold voltage and drain current. In addition, our TFET showed reasonable I<sub>ON</sub>/I<sub>OFF</sub> ratio of (10<sup>4</sup>) and low drain induced barrier lowering (DIBL) of 39 mV/V.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=GAA" title="GAA">GAA</a>, <a href="https://publications.waset.org/search?q=SILVACO" title=" SILVACO"> SILVACO</a>, <a href="https://publications.waset.org/search?q=QUANTUM" title=" QUANTUM"> QUANTUM</a>, <a href="https://publications.waset.org/search?q=MOSFETs." title=" MOSFETs."> MOSFETs.</a> </p> <a href="https://publications.waset.org/9999402/3d-quantum-numerical-simulation-of-horizontal-rectangular-dual-metal-gategate-all-around-mosfets" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9999402/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9999402/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9999402/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9999402/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9999402/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9999402/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9999402/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9999402/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9999402/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9999402/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9999402.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2904</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">164</span> A Comparison Study of Electrical Characteristics in Conventional Multiple-gate Silicon Nanowire Transistors</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Fatemeh%20Karimi">Fatemeh Karimi</a>, <a href="https://publications.waset.org/search?q=Morteza%20Fathipour"> Morteza Fathipour</a>, <a href="https://publications.waset.org/search?q=Hamdam%20Ghanatian"> Hamdam Ghanatian</a>, <a href="https://publications.waset.org/search?q=Vala%20Fathipour"> Vala Fathipour</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper electrical characteristics of various kinds of multiple-gate silicon nanowire transistors (SNWT) with the channel length equal to 7 nm are compared. A fully ballistic quantum mechanical transport approach based on NEGF was employed to analyses electrical characteristics of rectangular and cylindrical silicon nanowire transistors as well as a Double gate MOS FET. A double gate, triple gate, and gate all around nano wires were studied to investigate the impact of increasing the number of gates on the control of the short channel effect which is important in nanoscale devices. Also in the case of triple gate rectangular SNWT inserting extra gates on the bottom of device can improve the application of device. The results indicate that by using gate all around structures short channel effects such as DIBL, subthreshold swing and delay reduces. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=SNWT%20%28silicon%20nanowire%20transistor%29" title="SNWT (silicon nanowire transistor)">SNWT (silicon nanowire transistor)</a>, <a href="https://publications.waset.org/search?q=non%20equilibriumGreen%27s%20function%20%28NEGF%29" title=" non equilibriumGreen&#039;s function (NEGF)"> non equilibriumGreen&#039;s function (NEGF)</a>, <a href="https://publications.waset.org/search?q=double%20gate%20%28DG%29" title=" double gate (DG)"> double gate (DG)</a>, <a href="https://publications.waset.org/search?q=triple%20gate%20%28TG%29" title=" triple gate (TG)"> triple gate (TG)</a>, <a href="https://publications.waset.org/search?q=multiple%20gate" title="multiple gate">multiple gate</a>, <a href="https://publications.waset.org/search?q=cylindrical%20nano%20wire%20%28CW%29" title=" cylindrical nano wire (CW)"> cylindrical nano wire (CW)</a>, <a href="https://publications.waset.org/search?q=rectangular%20nano%20wire%28RW%29" title=" rectangular nano wire(RW)"> rectangular nano wire(RW)</a>, <a href="https://publications.waset.org/search?q=Poisson_%20Schr%C3%B6dinger%20solver" title=" Poisson_ Schr枚dinger solver"> Poisson_ Schr枚dinger solver</a>, <a href="https://publications.waset.org/search?q=drain%20induced%20barrier%20lowering%28DIBL%29." title=" drain induced barrier lowering(DIBL)."> drain induced barrier lowering(DIBL).</a> </p> <a href="https://publications.waset.org/497/a-comparison-study-of-electrical-characteristics-in-conventional-multiple-gate-silicon-nanowire-transistors" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/497/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/497/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/497/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/497/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/497/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/497/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/497/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/497/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/497/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/497/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/497.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2081</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">163</span> Analytical Modeling of Channel Noise for Gate Material Engineered Surrounded/Cylindrical Gate (SGT/CGT) MOSFET</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Pujarini%20Ghosh%20A">Pujarini Ghosh A</a>, <a href="https://publications.waset.org/search?q=Rishu%20Chaujar%20B"> Rishu Chaujar B</a>, <a href="https://publications.waset.org/search?q=Subhasis%20Haldar%20C"> Subhasis Haldar C</a>, <a href="https://publications.waset.org/search?q=R.S%20Gupta%20D"> R.S Gupta D</a>, <a href="https://publications.waset.org/search?q=Mridula%20Gupta%20E"> Mridula Gupta E</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, an analytical modeling is presentated to describe the channel noise in GME SGT/CGT MOSFET, based on explicit functions of MOSFETs geometry and biasing conditions for all channel length down to deep submicron and is verified with the experimental data. Results shows the impact of various parameters such as gate bias, drain bias, channel length ,device diameter and gate material work function difference on drain current noise spectral density of the device reflecting its applicability for circuit design applications. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Cylindrical%2FSurrounded%20gate%20%28SGT%2FCGT%29%20MOSFET" title="Cylindrical/Surrounded gate (SGT/CGT) MOSFET">Cylindrical/Surrounded gate (SGT/CGT) MOSFET</a>, <a href="https://publications.waset.org/search?q=Gate%20Material%20Engineering%20%28GME%29" title="Gate Material Engineering (GME)">Gate Material Engineering (GME)</a>, <a href="https://publications.waset.org/search?q=Spectral%20Noise%20and%20short%20channeleffect%20%28SCE%29." title=" Spectral Noise and short channeleffect (SCE)."> Spectral Noise and short channeleffect (SCE).</a> </p> <a href="https://publications.waset.org/677/analytical-modeling-of-channel-noise-for-gate-material-engineered-surroundedcylindrical-gate-sgtcgt-mosfet" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/677/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/677/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/677/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/677/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/677/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/677/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/677/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/677/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/677/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/677/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/677.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1980</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">162</span> Transient Analysis &amp; Performance Estimation of Gate Inside Junctionless Transistor (GI-JLT)</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Sangeeta%20Singh">Sangeeta Singh</a>, <a href="https://publications.waset.org/search?q=Pankaj%20Kumar"> Pankaj Kumar</a>, <a href="https://publications.waset.org/search?q=P.%20N.%20Kondekar"> P. N. Kondekar</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper, the transient device performance analysis of n-type Gate Inside JunctionLess Transistor (GI-JLT) has been evaluated. 3-D Bohm Quantum Potential (BQP) transport device simulation has been used to evaluate the delay and power dissipation performance. GI-JLT has a number of desirable device parameters such as reduced propagation delay, dynamic power dissipation, power and delay product, intrinsic gate delay and energy delay product as compared to Gate-all-around transistors GAA-JLT. In addition to this, various other device performance parameters namely, on/off current ratio, short channel effects (SCE), transconductance Generation Factor (TGF) and unity gain cut-off frequency (fT ) and subthreshold slope (SS) of the GI-JLT and GAA-JLT have been analyzed and compared. GI-JLT shows better device performance characteristics than GAA-JLT for low power and high frequency applications, because of its larger gate electrostatic control on the device operation.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Gate-inside%20junctionless%20transistor%20GI-JLT" title="Gate-inside junctionless transistor GI-JLT">Gate-inside junctionless transistor GI-JLT</a>, <a href="https://publications.waset.org/search?q=Gate-all-around%20junctionless%20transistor%20GAA-JLT" title=" Gate-all-around junctionless transistor GAA-JLT"> Gate-all-around junctionless transistor GAA-JLT</a>, <a href="https://publications.waset.org/search?q=propagation%20delay" title=" propagation delay"> propagation delay</a>, <a href="https://publications.waset.org/search?q=power%20delay%20product." title=" power delay product."> power delay product.</a> </p> <a href="https://publications.waset.org/10000386/transient-analysis-performance-estimation-of-gate-inside-junctionless-transistor-gi-jlt" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10000386/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10000386/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10000386/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10000386/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10000386/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10000386/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10000386/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10000386/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10000386/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10000386/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10000386.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2436</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">161</span> Practical Simulation Model of Floating-Gate MOS Transistor in Sub 100nm Technologies</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Zina%20Saheb">Zina Saheb</a>, <a href="https://publications.waset.org/search?q=Ezz%20El-Masry"> Ezz El-Masry</a> </p> <p class="card-text"><strong>Abstract:</strong></p> As the Silicon oxide scaled down in MOSFET technology to few nanometers, gate Direct Tunneling (DT) in Floating gate (FGMOSFET) devices has become a major concern for analog designers. FGMOSFET has been used in many low-voltage and low-power applications, however, there is no accurate model that account for DT gate leakage in nano-scale. This paper studied and analyzed different simulation models for FGMOSFET using TSMC 90-nm technology. The simulation results for FGMOSFET cascade current mirror shows the impact of DT on circuit performance in terms of current and voltage without the need for fabrication. This works shows the significance of using an accurate model for FGMOSFET in nan-scale technologies. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=CMOS%20transistor" title="CMOS transistor">CMOS transistor</a>, <a href="https://publications.waset.org/search?q=direct-tunneling%20current" title=" direct-tunneling current"> direct-tunneling current</a>, <a href="https://publications.waset.org/search?q=floatinggate" title=" floatinggate"> floatinggate</a>, <a href="https://publications.waset.org/search?q=gate-leakage%20current" title=" gate-leakage current"> gate-leakage current</a>, <a href="https://publications.waset.org/search?q=simulation%20model." title=" simulation model."> simulation model.</a> </p> <a href="https://publications.waset.org/10002183/practical-simulation-model-of-floating-gate-mos-transistor-in-sub-100nm-technologies" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10002183/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10002183/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10002183/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10002183/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10002183/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10002183/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10002183/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10002183/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10002183/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10002183/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10002183.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2990</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">160</span> Gate Voltage Controlled Humidity Sensing Using MOSFET of VO2 Particles</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=A.%20A.%20Akande">A. A. Akande</a>, <a href="https://publications.waset.org/search?q=B.%20P.%20Dhonge"> B. P. Dhonge</a>, <a href="https://publications.waset.org/search?q=B.%20W.%20Mwakikunga"> B. W. Mwakikunga</a>, <a href="https://publications.waset.org/search?q=A.%20G.%20J.%20Machatine"> A. G. J. Machatine</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>This article presents gate-voltage controlled humidity sensing performance of vanadium dioxide nanoparticles prepared from NH<sub>4</sub>VO<sub>3</sub> precursor using microwave irradiation technique. The X-ray diffraction, transmission electron diffraction, and Raman analyses reveal the formation of VO<sub>2</sub> (B) with V<sub>2</sub>O<sub>5 </sub>and an amorphous phase. The BET surface area is found to be 67.67 m<sup>2</sup>/g. The humidity sensing measurements using the patented lateral-gate MOSFET configuration was carried out. The results show the optimum response at 5 V up to 8 V of gate voltages for 10 to 80% of relative humidity. The dose-response equation reveals the enhanced resilience of the gated VO<sub>2</sub> sensor which may saturate above 272% humidity. The response and recovery times are remarkably much faster (about 60 s) than in non-gated VO<sub>2</sub> sensors which normally show response and recovery times of the order of 5 minutes (300 s).</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=VO2" title="VO2">VO2</a>, <a href="https://publications.waset.org/search?q=VO2%20%28B%29" title=" VO2 (B)"> VO2 (B)</a>, <a href="https://publications.waset.org/search?q=V2O5" title=" V2O5"> V2O5</a>, <a href="https://publications.waset.org/search?q=MOSFET" title=" MOSFET"> MOSFET</a>, <a href="https://publications.waset.org/search?q=gate%20voltage" title=" gate voltage"> gate voltage</a>, <a href="https://publications.waset.org/search?q=humidity%20sensor." title=" humidity sensor."> humidity sensor.</a> </p> <a href="https://publications.waset.org/10006366/gate-voltage-controlled-humidity-sensing-using-mosfet-of-vo2-particles" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10006366/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10006366/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10006366/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10006366/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10006366/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10006366/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10006366/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10006366/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10006366/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10006366/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10006366.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1138</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">159</span> Proposal for a Ultra Low Voltage NAND gate to withstand Power Analysis Attacks</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Omid%20Mirmotahari">Omid Mirmotahari</a>, <a href="https://publications.waset.org/search?q=Yngvar%20Berg"> Yngvar Berg</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper we promote the Ultra Low Voltage (ULV) NAND gate to replace either partly or entirely the encryption block of a design to withstand power analysis attack.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Differential%20Power%20Analysis%20%28DPA%29" title="Differential Power Analysis (DPA)">Differential Power Analysis (DPA)</a>, <a href="https://publications.waset.org/search?q=Low%20Voltage%20%28LV%29" title=" Low Voltage (LV)"> Low Voltage (LV)</a>, <a href="https://publications.waset.org/search?q=Ultra%20Low%20Voltage%20%28ULV%29" title=" Ultra Low Voltage (ULV)"> Ultra Low Voltage (ULV)</a>, <a href="https://publications.waset.org/search?q=Floating-Gate%20%28FG%29" title=" Floating-Gate (FG)"> Floating-Gate (FG)</a>, <a href="https://publications.waset.org/search?q=supply%20current%20analysis." title=" supply current analysis."> supply current analysis.</a> </p> <a href="https://publications.waset.org/8724/proposal-for-a-ultra-low-voltage-nand-gate-to-withstand-power-analysis-attacks" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/8724/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/8724/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/8724/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/8724/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/8724/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/8724/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/8724/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/8724/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/8724/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/8724/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/8724.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1954</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">158</span> Low Frequency Noise Behavior of Independent Gate Junctionless FinFET</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=A.%20Kamath">A. Kamath</a>, <a href="https://publications.waset.org/search?q=Z.%20X.%20Chen"> Z. X. Chen</a>, <a href="https://publications.waset.org/search?q=C.%20J.%20Gu"> C. J. Gu</a>, <a href="https://publications.waset.org/search?q=F.%20Zheng"> F. Zheng</a>, <a href="https://publications.waset.org/search?q=X.%20P.%20Wang"> X. P. Wang</a>, <a href="https://publications.waset.org/search?q=N.%20Singh"> N. Singh</a>, <a href="https://publications.waset.org/search?q=G-Q.%20Lo"> G-Q. Lo</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper we use low frequency noise analysis to understand and map the current conduction path in a multi gate junctionless FinFET.&nbsp; The device used in this study behaves as a gated resistor and shows excellent short channel effect suppression due to its multi gate structure. Generally for a bulk conduction device like the junctionless device studied in this work, the low frequency noise can be modelled using the mobility fluctuation model; however for this device we can also see the effect of carrier fluctuations on the LFN characteristic. The noise characteristic at different gate bias and also the possible location of the traps is explained.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=LFN%20analysis" title="LFN analysis">LFN analysis</a>, <a href="https://publications.waset.org/search?q=junctionless" title=" junctionless"> junctionless</a>, <a href="https://publications.waset.org/search?q=Current%20conduction%20path" title=" Current conduction path"> Current conduction path</a>, <a href="https://publications.waset.org/search?q=FinFET." title=" FinFET. "> FinFET. </a> </p> <a href="https://publications.waset.org/16637/low-frequency-noise-behavior-of-independent-gate-junctionless-finfet" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/16637/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/16637/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/16637/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/16637/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/16637/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/16637/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/16637/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/16637/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/16637/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/16637/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/16637.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2117</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">157</span> Ambipolar Effect Free Double Gate PN Diode Based Tunnel FET</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Hardik%20Vaghela">Hardik Vaghela</a>, <a href="https://publications.waset.org/search?q=Mamta%20Khosla"> Mamta Khosla</a>, <a href="https://publications.waset.org/search?q=Balwindar%20Raj"> Balwindar Raj</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper, we present and investigate a double gate PN diode based tunnel field effect transistor (DGPNTFET). The importance of proposed structure is that the formation of different drain doping is not required and ambipolar effect in OFF state is completely removed for this structure. Validation of this structure to behave like a Tunnel Field Effect Transistor (TFET) is carried out through energy band diagrams and transfer characteristics. Simulated result shows point subthreshold slope (SS) of 19.14 mV/decade and ON to OFF current ratio (I<sub>ON</sub> / I<sub>OFF</sub>) of 2.66 &times; 10<sup>14</sup> (I<sub>ON</sub> at V<sub>GS</sub>=1.5V, V<sub>DS</sub>=1V and I<sub>OFF</sub> at V<sub>GS</sub>=0V, V<sub>DS</sub>=1V) for gate length of 20nm and HfO<sub>2</sub> as gate oxide at room temperature. Which indicate that the DGPNTFET is a promising candidate for nano-scale, ambipolar free switch.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Ambipolar%20effect" title="Ambipolar effect">Ambipolar effect</a>, <a href="https://publications.waset.org/search?q=double%20gate%20PN%20diode%20based%20tunnel%20field%20effect%20transistor" title=" double gate PN diode based tunnel field effect transistor"> double gate PN diode based tunnel field effect transistor</a>, <a href="https://publications.waset.org/search?q=high-%CE%BA%20dielectric%20material" title=" high-魏 dielectric material"> high-魏 dielectric material</a>, <a href="https://publications.waset.org/search?q=subthreshold%20slope" title=" subthreshold slope"> subthreshold slope</a>, <a href="https://publications.waset.org/search?q=tunnel%20field%20effect%20transistor." title=" tunnel field effect transistor."> tunnel field effect transistor.</a> </p> <a href="https://publications.waset.org/10004862/ambipolar-effect-free-double-gate-pn-diode-based-tunnel-fet" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10004862/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10004862/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10004862/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10004862/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10004862/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10004862/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10004862/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10004862/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10004862/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10004862/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10004862.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1004</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">156</span> Digital Filter for Cochlear Implant Implemented on a Field- Programmable Gate Array</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Rekha%20V.%20Dundur">Rekha V. Dundur </a>, <a href="https://publications.waset.org/search?q=M.V.Latte">M.V.Latte</a>, <a href="https://publications.waset.org/search?q=S.Y.%20Kulkarni"> S.Y. Kulkarni</a>, <a href="https://publications.waset.org/search?q=M.K.Venkatesha">M.K.Venkatesha</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The advent of multi-million gate Field Programmable Gate Arrays (FPGAs) with hardware support for multiplication opens an opportunity to recreate a significant portion of the front end of a human cochlea using this technology. In this paper we describe the implementation of the cochlear filter and show that it is entirely suited to a single device XC3S500 FPGA implementation .The filter gave a good fit to real time data with efficiency of hardware usage. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Cochlea" title="Cochlea">Cochlea</a>, <a href="https://publications.waset.org/search?q=FPGA" title=" FPGA"> FPGA</a>, <a href="https://publications.waset.org/search?q=IIR%20%28Infinite%20Impulse%20Response%29" title=" IIR (Infinite Impulse Response)"> IIR (Infinite Impulse Response)</a>, <a href="https://publications.waset.org/search?q=Multiplier." title=" Multiplier."> Multiplier.</a> </p> <a href="https://publications.waset.org/4946/digital-filter-for-cochlear-implant-implemented-on-a-field-programmable-gate-array" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/4946/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/4946/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/4946/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/4946/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/4946/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/4946/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/4946/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/4946/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/4946/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/4946/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/4946.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2322</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">155</span> Comparative Study of Al2O3 and HfO2 as Gate Dielectric on AlGaN/GaN MOSHEMTs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=K.%20Karami">K. Karami</a>, <a href="https://publications.waset.org/search?q=S.%20Hassan"> S. Hassan</a>, <a href="https://publications.waset.org/search?q=S.%20Taking"> S. Taking</a>, <a href="https://publications.waset.org/search?q=A.%20Ofiare"> A. Ofiare</a>, <a href="https://publications.waset.org/search?q=A.%20Dhongde"> A. Dhongde</a>, <a href="https://publications.waset.org/search?q=A.%20Al-Khalidi"> A. Al-Khalidi</a>, <a href="https://publications.waset.org/search?q=E.%20Wasige"> E. Wasige</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>We have made a comparative study on the influence of Al2O3 and HfO2 grown using Atomic Layer Deposition (ALD) technique as dielectric in the AlGaN/GaN metal oxide semiconductor high electron mobility transistor (MOS-HEMT) structure. Five samples consisting of 20 nm and 10 nm each of A2lO3 and HfO2 respectively and a Schottky gate HEMT, were fabricated and measured. The threshold voltage shifts towards negative by 0.1 V and 1.8 V for 10 nm thick HfO2 and 10 nm thick Al2O3 gate dielectric layers, respectively. The negative shift for the 20 nm HfO2 and 20 nm Al2O3 were 1.2 V and 4.9 V, respectively. Higher gm/IDS (transconductance to drain current) ratio was also obtained in HfO2 than Al2O3. With both materials as dielectric, a significant reduction in the gate leakage current in the order of 104 was obtained compared to the sample without the dielectric material.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=AlGaN%2FGaN%20HEMTs" title="AlGaN/GaN HEMTs">AlGaN/GaN HEMTs</a>, <a href="https://publications.waset.org/search?q=Al2O3" title=" Al2O3"> Al2O3</a>, <a href="https://publications.waset.org/search?q=HfO2" title=" HfO2"> HfO2</a>, <a href="https://publications.waset.org/search?q=MOSHEMTs." title=" MOSHEMTs."> MOSHEMTs.</a> </p> <a href="https://publications.waset.org/10012945/comparative-study-of-al2o3-and-hfo2-as-gate-dielectric-on-algangan-moshemts" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10012945/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10012945/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10012945/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10012945/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10012945/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10012945/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10012945/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10012945/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10012945/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10012945/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10012945.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">408</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">154</span> Very High Speed Data Driven Dynamic NAND Gate at 22nm High K Metal Gate Strained Silicon Technology Node</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Shobha%20Sharma">Shobha Sharma</a>, <a href="https://publications.waset.org/search?q=Amita%20Dev"> Amita Dev</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand&rsquo;s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Data%20driven%20nand%20gate" title="Data driven nand gate">Data driven nand gate</a>, <a href="https://publications.waset.org/search?q=dynamic%20substrate%20biasing" title=" dynamic substrate biasing"> dynamic substrate biasing</a>, <a href="https://publications.waset.org/search?q=nand%20gate" title=" nand gate"> nand gate</a>, <a href="https://publications.waset.org/search?q=static%20substrate%20biasing." title=" static substrate biasing. "> static substrate biasing. </a> </p> <a href="https://publications.waset.org/10003936/very-high-speed-data-driven-dynamic-nand-gate-at-22nm-high-k-metal-gate-strained-silicon-technology-node" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10003936/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10003936/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10003936/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10003936/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10003936/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10003936/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10003936/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10003936/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10003936/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10003936/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10003936.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1616</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">153</span> Suppressing Ambipolar Conduction Using Dual Material Gate in Tunnel-FETs Having Heavily Doped Drain</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Dawit%20Burusie%20Abdi">Dawit Burusie Abdi</a>, <a href="https://publications.waset.org/search?q=Mamidala%20Jagadesh%20Kumar"> Mamidala Jagadesh Kumar</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper, using 2D TCAD simulations, the application of a dual material gate (DMG) for suppressing ambipolar conduction in a tunnel field effect transistor (TFET) is demonstrated. Using the proposed DMG concept, the ambipolar conduction can be effectively suppressed even if the drain doping is as high as that of the source doping. Achieving this symmetrical doping, without the ambipolar conduction in TFETs, gives the advantage of realizing both n-type and p-type devices with the same doping sequences. Furthermore, the output characteristics of the DMG TFET exhibit a good saturation when compared to that of the gate-drain underlap approach. This improved behavior of the DMG TFET makes it a good candidate for inverter based logic circuits.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Dual%20material%20gate" title="Dual material gate">Dual material gate</a>, <a href="https://publications.waset.org/search?q=suppressing%20ambipolar%20current" title=" suppressing ambipolar current"> suppressing ambipolar current</a>, <a href="https://publications.waset.org/search?q=symmetrically%20doped%20TFET" title=" symmetrically doped TFET"> symmetrically doped TFET</a>, <a href="https://publications.waset.org/search?q=tunnel%20FETs" title=" tunnel FETs"> tunnel FETs</a>, <a href="https://publications.waset.org/search?q=PNPN%20TFET." title=" PNPN TFET."> PNPN TFET.</a> </p> <a href="https://publications.waset.org/10004299/suppressing-ambipolar-conduction-using-dual-material-gate-in-tunnel-fets-having-heavily-doped-drain" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10004299/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10004299/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10004299/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10004299/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10004299/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10004299/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10004299/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10004299/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10004299/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10004299/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10004299.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2199</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">152</span> Impact of Gate Insulation Material and Thickness on Pocket Implanted MOS Device</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Muhibul%20Haque%20Bhuyan">Muhibul Haque Bhuyan</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper reports on the impact study with the variation of the gate insulation material and thickness on different models of pocket implanted sub-100 nm n-MOS device. The gate materials used here are silicon dioxide (SiO<sub>2</sub>), aluminum silicate (Al<sub>2</sub>SiO<sub>5</sub>), silicon nitride (Si<sub>3</sub>N<sub>4</sub>), alumina (Al<sub>2</sub>O<sub>3</sub>), hafnium silicate (HfSiO<sub>4</sub>), tantalum pentoxide (Ta<sub>2</sub>O<sub>5</sub>), hafnium dioxide (HfO<sub>2</sub>), zirconium dioxide (ZrO<sub>2</sub>), and lanthanum oxide (La<sub>2</sub>O<sub>3</sub>) upon a p-type silicon substrate material. The gate insulation thickness was varied from 2.0 nm to 3.5 nm for a 50 nm channel length pocket implanted n-MOSFET. There are several models available for this device. We have studied and simulated threshold voltage model incorporating drain and substrate bias effects, surface potential, inversion layer charge, pinch-off voltage, effective electric field, inversion layer mobility, and subthreshold drain current models based on two linear symmetric pocket doping profiles. We have changed the values of the two parameters, viz. gate insulation material and thickness gradually fixing the other parameter at their typical values. Then we compared and analyzed the simulation results. This study would be helpful for the nano-scaled MOS device designers for various applications to predict the device behavior. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Linear%20symmetric%20pocket%20profile" title="Linear symmetric pocket profile">Linear symmetric pocket profile</a>, <a href="https://publications.waset.org/search?q=pocket%20implanted%20n-MOS%20Device" title=" pocket implanted n-MOS Device"> pocket implanted n-MOS Device</a>, <a href="https://publications.waset.org/search?q=model" title=" model"> model</a>, <a href="https://publications.waset.org/search?q=impact%20of%20gate%20material" title=" impact of gate material"> impact of gate material</a>, <a href="https://publications.waset.org/search?q=insulator%20thickness." title=" insulator thickness. "> insulator thickness. </a> </p> <a href="https://publications.waset.org/10011953/impact-of-gate-insulation-material-and-thickness-on-pocket-implanted-mos-device" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10011953/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10011953/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10011953/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10011953/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10011953/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10011953/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10011953/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10011953/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10011953/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10011953/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10011953.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">387</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">151</span> Design and Implementation of Quantum Cellular Automata Based Novel Adder Circuits</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Santanu%20Santra">Santanu Santra</a>, <a href="https://publications.waset.org/search?q=Utpal%20Roy"> Utpal Roy</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>The most important mathematical operation for any computing system is addition. An efficient adder can be of greater assistance in designing of any arithmetic circuits. Quantum-dot Cellular Automata (QCA) is a promising nanotechnology to create electronic circuits for computing devices and suitable candidate for next generation of computing systems. The article presents a modest approach to implement a novel XOR gate. The gate is simple in structure and powerful in terms of implementing digital circuits. By applying the XOR gate, the hardware requirement for a QCA circuit can be decrease and circuits can be simpler in level, clock phase and cell count. In order to verify the functionality of the proposed device some implementation of Half Adder (HA) and Full Adder (FA) is checked by means of computer simulations using QCA-Designer tool. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Clock" title="Clock">Clock</a>, <a href="https://publications.waset.org/search?q=Computing%20system" title=" Computing system"> Computing system</a>, <a href="https://publications.waset.org/search?q=Majority%20gate" title=" Majority gate"> Majority gate</a>, <a href="https://publications.waset.org/search?q=QCA" title=" QCA"> QCA</a>, <a href="https://publications.waset.org/search?q=QCA%20Designer." title=" QCA Designer."> QCA Designer.</a> </p> <a href="https://publications.waset.org/9997605/design-and-implementation-of-quantum-cellular-automata-based-novel-adder-circuits" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9997605/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9997605/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9997605/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9997605/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9997605/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9997605/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9997605/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9997605/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9997605/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9997605/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9997605.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">4453</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">150</span> Vertical Silicon Nanowire MOSFET With A Fully-Silicided (FUSI) NiSi2 Gate</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Z.%20X.%20Chen">Z. X. Chen</a>, <a href="https://publications.waset.org/search?q=N.%20Singh"> N. Singh</a>, <a href="https://publications.waset.org/search?q=D.-L.%20Kwong"> D.-L. Kwong</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>This paper presents a vertical silicon nanowire n- MOSFET integrated with a CMOS-compatible fully-silicided (FUSI) NiSi2 gate. Devices with nanowire diameter of 50nm show good electrical performance (SS &lt; 70mV/dec, DIBL &lt; 30mV/V, Ion/Ioff &gt; 107). Most significantly, threshold voltage tunability of about 0.2V is shown. Although threshold voltage remains low for the 50nm diameter device, it is expected to become more positive as nanowire diameter reduces.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=NiSi" title="NiSi ">NiSi </a>, <a href="https://publications.waset.org/search?q=fully-silicided%20%28FUSI%29%20gate" title=" fully-silicided (FUSI) gate"> fully-silicided (FUSI) gate</a>, <a href="https://publications.waset.org/search?q=vertical%20siliconnanowire%20%28SiNW%29" title=" vertical siliconnanowire (SiNW)"> vertical siliconnanowire (SiNW)</a>, <a href="https://publications.waset.org/search?q=CMOS%20compatible." title=" CMOS compatible."> CMOS compatible.</a> </p> <a href="https://publications.waset.org/14024/vertical-silicon-nanowire-mosfet-with-a-fully-silicided-fusi-nisi2-gate" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/14024/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/14024/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/14024/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/14024/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/14024/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/14024/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/14024/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/14024/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/14024/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/14024/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/14024.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1884</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">149</span> Low Voltage Squarer Using Floating Gate MOSFETs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Rishikesh%20Pandey">Rishikesh Pandey</a>, <a href="https://publications.waset.org/search?q=Maneesha%20Gupta"> Maneesha Gupta</a> </p> <p class="card-text"><strong>Abstract:</strong></p> A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25渭m CMOS technology. The squarer is operated at the supply voltages of 卤0.75V . The total harmonic distortion (THD) for the input signal 0.75Vpp at 25 KHz, and maximum power consumption were found to be less than 1% and 319渭W respectively. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Analog%20signal%20processing" title="Analog signal processing">Analog signal processing</a>, <a href="https://publications.waset.org/search?q=floating%20gate%20MOSFETs" title=" floating gate MOSFETs"> floating gate MOSFETs</a>, <a href="https://publications.waset.org/search?q=low-voltage" title=" low-voltage"> low-voltage</a>, <a href="https://publications.waset.org/search?q=Spice" title=" Spice"> Spice</a>, <a href="https://publications.waset.org/search?q=squarer." title=" squarer."> squarer.</a> </p> <a href="https://publications.waset.org/8485/low-voltage-squarer-using-floating-gate-mosfets" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/8485/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/8485/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/8485/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/8485/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/8485/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/8485/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/8485/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/8485/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/8485/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/8485/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/8485.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1987</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">148</span> Simulation Study of Lateral Trench Gate Power MOSFET on 4H-SiC </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Yashvir%20Singh">Yashvir Singh</a>, <a href="https://publications.waset.org/search?q=Mayank%20Joshi"> Mayank Joshi</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>A lateral trench-gate power metal-oxide-semiconductor on 4H-SiC is proposed. The device consists of two separate trenches in which two gates are placed on both sides of P-body region resulting two parallel channels. Enhanced current conduction and reduced-surface-field effect in the structure provide substantial improvement in the device performance. Using two dimensional simulations, the performance of proposed device is evaluated and compare of with that of the conventional device for same cell pitch. It is demonstrated that the proposed structure provides two times higher output current, 11% decrease in threshold voltage, 70% improvement in transconductance, 70% reduction in specific ON-resistance, 52% increase in breakdown voltage, and nearly eight time improvement in figure-of-merit over the conventional device.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=4H-SiC" title="4H-SiC">4H-SiC</a>, <a href="https://publications.waset.org/search?q=lateral" title=" lateral"> lateral</a>, <a href="https://publications.waset.org/search?q=trench-gate" title=" trench-gate"> trench-gate</a>, <a href="https://publications.waset.org/search?q=power%20MOSFET." title=" power MOSFET. "> power MOSFET. </a> </p> <a href="https://publications.waset.org/9997887/simulation-study-of-lateral-trench-gate-power-mosfet-on-4h-sic" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9997887/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9997887/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9997887/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9997887/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9997887/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9997887/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9997887/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9997887/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9997887/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9997887/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9997887.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2139</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">147</span> Structural Monitoring and Control During Support System Replacement of a Historical Gate</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Ahmet%20Turer">Ahmet Turer</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Middle-gate is located in Hasankeyf, Batman dating back to 1800 BC and is one of the important historical structures in Turkey. The ancient structure has suffered major structural cracks due to aging as well as lateral pressure of a cracked rock which is predicted to be about 100 tons. The existing support system was found to be inadequate to support the load especially after a recent rock fall in the close vicinity. Concerns were increased since the existing support system that is integral with a damaged and cracked gate wall needed to be replaced by a new support system. The replacement process must be carefully monitored by crackmeters and control mechanisms should be integrated to prevent cracks to expand while the same crack width needs to be maintained after the operation. The control system and actions taken during the intervention are explained in this paper. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=structural%20control" title="structural control">structural control</a>, <a href="https://publications.waset.org/search?q=crack%20width" title=" crack width"> crack width</a>, <a href="https://publications.waset.org/search?q=replacement" title=" replacement"> replacement</a>, <a href="https://publications.waset.org/search?q=support" title=" support"> support</a> </p> <a href="https://publications.waset.org/12957/structural-monitoring-and-control-during-support-system-replacement-of-a-historical-gate" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/12957/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/12957/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/12957/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/12957/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/12957/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/12957/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/12957/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/12957/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/12957/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/12957/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/12957.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1274</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">146</span> Design and Analysis of Low-Power, High Speed and Area Efficient 2-Bit Digital Magnitude Comparator in 90nm CMOS Technology Using Gate Diffusion Input</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Fasil%20Endalamaw">Fasil Endalamaw</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>Digital magnitude comparators based on Gate Diffusion Input (GDI) implementation technique are high speed and area-efficient, and they consume less power as compared to other implementation techniques. However, they are less efficient for some logic gates and have no full voltage swing. In this paper, we made a performance comparison between the GDI implementation technique and other implementation methods, such as Static CMOS, Pass Transistor Logic (PTL), and Transmission Gate (TG) in 90 nm, 120 nm, and 180 nm CMOS technologies using BSIM4 MOS model. We proposed a methodology (hybrid implementation) of implementing digital magnitude comparators which significantly improved the power, speed, area, and voltage swing requirements. Simulation results revealed that the hybrid implementation of digital magnitude comparators show a 10.84% (power dissipation), 41.6% (propagation delay), 47.95% (power-delay product (PDP)) improvement compared to the usual GDI implementation method. We used Microwind &amp; Dsch Version 3.5 as well as the Tanner EDA 16.0 tools for simulation purposes.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Efficient" title="Efficient">Efficient</a>, <a href="https://publications.waset.org/search?q=gate%20diffusion%20input" title=" gate diffusion input"> gate diffusion input</a>, <a href="https://publications.waset.org/search?q=high%20speed" title=" high speed"> high speed</a>, <a href="https://publications.waset.org/search?q=low%20power" title=" low power"> low power</a>, <a href="https://publications.waset.org/search?q=CMOS." title=" CMOS."> CMOS.</a> </p> <a href="https://publications.waset.org/10012573/design-and-analysis-of-low-power-high-speed-and-area-efficient-2-bit-digital-magnitude-comparator-in-90nm-cmos-technology-using-gate-diffusion-input" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10012573/apa" target="_blank" rel="nofollow" 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