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Search results for: gate voltage
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voltage</h1> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1040</span> Proposal for a Ultra Low Voltage NAND gate to withstand Power Analysis Attacks</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Omid%20Mirmotahari">Omid Mirmotahari</a>, <a href="https://publications.waset.org/search?q=Yngvar%20Berg"> Yngvar Berg</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper we promote the Ultra Low Voltage (ULV) NAND gate to replace either partly or entirely the encryption block of a design to withstand power analysis attack.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Differential%20Power%20Analysis%20%28DPA%29" title="Differential Power Analysis (DPA)">Differential Power Analysis (DPA)</a>, <a href="https://publications.waset.org/search?q=Low%20Voltage%20%28LV%29" title=" Low Voltage (LV)"> Low Voltage (LV)</a>, <a href="https://publications.waset.org/search?q=Ultra%20Low%20Voltage%20%28ULV%29" title=" Ultra Low Voltage (ULV)"> Ultra Low Voltage (ULV)</a>, <a href="https://publications.waset.org/search?q=Floating-Gate%20%28FG%29" title=" Floating-Gate (FG)"> Floating-Gate (FG)</a>, <a href="https://publications.waset.org/search?q=supply%20current%20analysis." title=" supply current analysis."> supply current analysis.</a> </p> <a href="https://publications.waset.org/8724/proposal-for-a-ultra-low-voltage-nand-gate-to-withstand-power-analysis-attacks" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/8724/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/8724/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/8724/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/8724/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/8724/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/8724/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/8724/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/8724/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/8724/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/8724/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/8724.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1955</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1039</span> Gate Voltage Controlled Humidity Sensing Using MOSFET of VO2 Particles</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=A.%20A.%20Akande">A. A. Akande</a>, <a href="https://publications.waset.org/search?q=B.%20P.%20Dhonge"> B. P. Dhonge</a>, <a href="https://publications.waset.org/search?q=B.%20W.%20Mwakikunga"> B. W. Mwakikunga</a>, <a href="https://publications.waset.org/search?q=A.%20G.%20J.%20Machatine"> A. G. J. Machatine</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>This article presents gate-voltage controlled humidity sensing performance of vanadium dioxide nanoparticles prepared from NH<sub>4</sub>VO<sub>3</sub> precursor using microwave irradiation technique. The X-ray diffraction, transmission electron diffraction, and Raman analyses reveal the formation of VO<sub>2</sub> (B) with V<sub>2</sub>O<sub>5 </sub>and an amorphous phase. The BET surface area is found to be 67.67 m<sup>2</sup>/g. The humidity sensing measurements using the patented lateral-gate MOSFET configuration was carried out. The results show the optimum response at 5 V up to 8 V of gate voltages for 10 to 80% of relative humidity. The dose-response equation reveals the enhanced resilience of the gated VO<sub>2</sub> sensor which may saturate above 272% humidity. The response and recovery times are remarkably much faster (about 60 s) than in non-gated VO<sub>2</sub> sensors which normally show response and recovery times of the order of 5 minutes (300 s).</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=VO2" title="VO2">VO2</a>, <a href="https://publications.waset.org/search?q=VO2%20%28B%29" title=" VO2 (B)"> VO2 (B)</a>, <a href="https://publications.waset.org/search?q=V2O5" title=" V2O5"> V2O5</a>, <a href="https://publications.waset.org/search?q=MOSFET" title=" MOSFET"> MOSFET</a>, <a href="https://publications.waset.org/search?q=gate%20voltage" title=" gate voltage"> gate voltage</a>, <a href="https://publications.waset.org/search?q=humidity%20sensor." title=" humidity sensor."> humidity sensor.</a> </p> <a href="https://publications.waset.org/10006366/gate-voltage-controlled-humidity-sensing-using-mosfet-of-vo2-particles" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10006366/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10006366/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10006366/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10006366/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10006366/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10006366/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10006366/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10006366/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10006366/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10006366/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10006366.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1139</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1038</span> Fast High Voltage Solid State Switch Using Insulated Gate Bipolar Transistor for Discharge-Pumped Lasers</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Nur%20Syarafina%20Binti%20Othman">Nur Syarafina Binti Othman</a>, <a href="https://publications.waset.org/search?q=Tsubasa%20Jindo"> Tsubasa Jindo</a>, <a href="https://publications.waset.org/search?q=Makato%20Yamada"> Makato Yamada</a>, <a href="https://publications.waset.org/search?q=Miho%20Tsuyama"> Miho Tsuyama</a>, <a href="https://publications.waset.org/search?q=Hitoshi%20Nakano"> Hitoshi Nakano</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=High%20voltage" title="High voltage">High voltage</a>, <a href="https://publications.waset.org/search?q=IGBT" title=" IGBT"> IGBT</a>, <a href="https://publications.waset.org/search?q=Solid%20states%20switch." title=" Solid states switch."> Solid states switch.</a> </p> <a href="https://publications.waset.org/9999918/fast-high-voltage-solid-state-switch-using-insulated-gate-bipolar-transistor-for-discharge-pumped-lasers" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9999918/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9999918/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9999918/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9999918/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9999918/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9999918/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9999918/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9999918/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9999918/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9999918/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9999918.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">5912</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1037</span> A Very High Speed, High Resolution Current Comparator Design</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Neeraj%20K.%20Chasta">Neeraj K. Chasta</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>This paper presents an idea for analog current comparison which compares input signal and reference currents with high speed and accuracy. Proposed circuit utilizes amplification properties of common gate configuration, where voltage variations of input current are amplified and a compared output voltage is developed. Cascaded inverter stages are used to generate final CMOS compatible output voltage. Power consumption of circuit can be controlled by the applied gate bias voltage. The comparator is designed and studied at 180nm CMOS process technology for a supply voltage of 3V.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Current%20Mode" title="Current Mode">Current Mode</a>, <a href="https://publications.waset.org/search?q=Comparator" title=" Comparator"> Comparator</a>, <a href="https://publications.waset.org/search?q=High%20Resolution" title=" High Resolution"> High Resolution</a>, <a href="https://publications.waset.org/search?q=High%20Speed." title=" High Speed."> High Speed.</a> </p> <a href="https://publications.waset.org/9997371/a-very-high-speed-high-resolution-current-comparator-design" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9997371/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9997371/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9997371/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9997371/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9997371/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9997371/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9997371/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9997371/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9997371/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9997371/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9997371.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">4707</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1036</span> Practical Simulation Model of Floating-Gate MOS Transistor in Sub 100nm Technologies</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Zina%20Saheb">Zina Saheb</a>, <a href="https://publications.waset.org/search?q=Ezz%20El-Masry"> Ezz El-Masry</a> </p> <p class="card-text"><strong>Abstract:</strong></p> As the Silicon oxide scaled down in MOSFET technology to few nanometers, gate Direct Tunneling (DT) in Floating gate (FGMOSFET) devices has become a major concern for analog designers. FGMOSFET has been used in many low-voltage and low-power applications, however, there is no accurate model that account for DT gate leakage in nano-scale. This paper studied and analyzed different simulation models for FGMOSFET using TSMC 90-nm technology. The simulation results for FGMOSFET cascade current mirror shows the impact of DT on circuit performance in terms of current and voltage without the need for fabrication. This works shows the significance of using an accurate model for FGMOSFET in nan-scale technologies. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=CMOS%20transistor" title="CMOS transistor">CMOS transistor</a>, <a href="https://publications.waset.org/search?q=direct-tunneling%20current" title=" direct-tunneling current"> direct-tunneling current</a>, <a href="https://publications.waset.org/search?q=floatinggate" title=" floatinggate"> floatinggate</a>, <a href="https://publications.waset.org/search?q=gate-leakage%20current" title=" gate-leakage current"> gate-leakage current</a>, <a href="https://publications.waset.org/search?q=simulation%20model." title=" simulation model."> simulation model.</a> </p> <a href="https://publications.waset.org/10002183/practical-simulation-model-of-floating-gate-mos-transistor-in-sub-100nm-technologies" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10002183/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10002183/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10002183/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10002183/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10002183/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10002183/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10002183/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10002183/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10002183/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10002183/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10002183.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2990</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1035</span> Novel Linear Autozeroing Floating-gate Amplifier for Ultra Low-voltage Applications</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Yngvar%20Berg">Yngvar Berg</a>, <a href="https://publications.waset.org/search?q=Mehdi%20Azadmehr"> Mehdi Azadmehr</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper we present a linear autozeroing ultra lowvoltage amplifier. The autozeroing performed by all ULV circuits is important to reduce the impact of noise and especially avoid power supply noise in mixed signal low-voltage CMOS circuits. The simulated data presented is relevant for a 90nm TSMC CMOS process.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Low-voltage" title="Low-voltage">Low-voltage</a>, <a href="https://publications.waset.org/search?q=trans%20conductance%20amplifier" title=" trans conductance amplifier"> trans conductance amplifier</a>, <a href="https://publications.waset.org/search?q=linearity" title=" linearity"> linearity</a>, <a href="https://publications.waset.org/search?q=floating-gate." title=" floating-gate."> floating-gate.</a> </p> <a href="https://publications.waset.org/8741/novel-linear-autozeroing-floating-gate-amplifier-for-ultra-low-voltage-applications" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/8741/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/8741/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/8741/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/8741/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/8741/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/8741/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/8741/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/8741/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/8741/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/8741/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/8741.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1384</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1034</span> Low Voltage Squarer Using Floating Gate MOSFETs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Rishikesh%20Pandey">Rishikesh Pandey</a>, <a href="https://publications.waset.org/search?q=Maneesha%20Gupta"> Maneesha Gupta</a> </p> <p class="card-text"><strong>Abstract:</strong></p> A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25μm CMOS technology. The squarer is operated at the supply voltages of ±0.75V . The total harmonic distortion (THD) for the input signal 0.75Vpp at 25 KHz, and maximum power consumption were found to be less than 1% and 319μW respectively. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Analog%20signal%20processing" title="Analog signal processing">Analog signal processing</a>, <a href="https://publications.waset.org/search?q=floating%20gate%20MOSFETs" title=" floating gate MOSFETs"> floating gate MOSFETs</a>, <a href="https://publications.waset.org/search?q=low-voltage" title=" low-voltage"> low-voltage</a>, <a href="https://publications.waset.org/search?q=Spice" title=" Spice"> Spice</a>, <a href="https://publications.waset.org/search?q=squarer." title=" squarer."> squarer.</a> </p> <a href="https://publications.waset.org/8485/low-voltage-squarer-using-floating-gate-mosfets" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/8485/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/8485/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/8485/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/8485/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/8485/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/8485/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/8485/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/8485/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/8485/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/8485/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/8485.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1987</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1033</span> 3D Quantum Numerical Simulation of Horizontal Rectangular Dual Metal Gate\Gate All Around MOSFETs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=M.%20Khaouani">M. Khaouani</a>, <a href="https://publications.waset.org/search?q=A.%20Guen-Bouazza"> A. Guen-Bouazza</a>, <a href="https://publications.waset.org/search?q=B.%20Bouazza"> B. Bouazza</a>, <a href="https://publications.waset.org/search?q=Z.%20Kourdi"> Z. Kourdi</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>The integrity and issues related to electrostatic performance associated with scaling Si MOSFET bulk sub 10nm channel length promotes research in new device architectures such as SOI, double gate and GAA MOSFET. In this paper, we present some novel characteristic of horizontal rectangular gate\gate all around MOSFETs with dual metal of gate we obtained using SILVACO TCAD tools. We will also exhibit some simulation results we obtained relating to the influence of some parameters variation on our structure, that having a direct impact on their threshold voltage and drain current. In addition, our TFET showed reasonable I<sub>ON</sub>/I<sub>OFF</sub> ratio of (10<sup>4</sup>) and low drain induced barrier lowering (DIBL) of 39 mV/V.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=GAA" title="GAA">GAA</a>, <a href="https://publications.waset.org/search?q=SILVACO" title=" SILVACO"> SILVACO</a>, <a href="https://publications.waset.org/search?q=QUANTUM" title=" QUANTUM"> QUANTUM</a>, <a href="https://publications.waset.org/search?q=MOSFETs." title=" MOSFETs."> MOSFETs.</a> </p> <a href="https://publications.waset.org/9999402/3d-quantum-numerical-simulation-of-horizontal-rectangular-dual-metal-gategate-all-around-mosfets" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9999402/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9999402/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9999402/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9999402/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9999402/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9999402/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9999402/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9999402/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9999402/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9999402/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9999402.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2905</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1032</span> A Floating Gate MOSFET Based Novel Programmable Current Reference</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=V.%20Suresh%20Babu">V. Suresh Babu</a>, <a href="https://publications.waset.org/search?q=Haseena%20P.%20S."> Haseena P. S.</a>, <a href="https://publications.waset.org/search?q=Varun%20P.%20Gopi"> Varun P. Gopi</a>, <a href="https://publications.waset.org/search?q=M.%20R.%20Baiju"> M. R. Baiju</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Floating%20Gate%20MOSFET" title="Floating Gate MOSFET">Floating Gate MOSFET</a>, <a href="https://publications.waset.org/search?q=current%20reference" title=" current reference"> current reference</a>, <a href="https://publications.waset.org/search?q=self%0D%0Abias%20scheme" title=" self bias scheme"> self bias scheme</a>, <a href="https://publications.waset.org/search?q=temperature%20independency" title=" temperature independency"> temperature independency</a>, <a href="https://publications.waset.org/search?q=supply%20voltage%0D%0Aindependency." title=" supply voltage independency."> supply voltage independency.</a> </p> <a href="https://publications.waset.org/9999857/a-floating-gate-mosfet-based-novel-programmable-current-reference" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9999857/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9999857/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9999857/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9999857/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9999857/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9999857/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9999857/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9999857/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9999857/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9999857/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9999857.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1801</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1031</span> Trap Assisted Tunneling Model for Gate Current in Nano Scale MOSFET with High-K Gate Dielectrics</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Ashwani%20K.%20Rana">Ashwani K. Rana</a>, <a href="https://publications.waset.org/search?q=Narottam%20Chand"> Narottam Chand</a>, <a href="https://publications.waset.org/search?q=Vinod%20Kapoor"> Vinod Kapoor</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper presents a new compact analytical model of the gate leakage current in high-k based nano scale MOSFET by assuming a two-step inelastic trap-assisted tunneling (ITAT) process as the conduction mechanism. This model is based on an inelastic trap-assisted tunneling (ITAT) mechanism combined with a semiempirical gate leakage current formulation in the BSIM 4 model. The gate tunneling currents have been calculated as a function of gate voltage for different gate dielectrics structures such as HfO2, Al2O3 and Si3N4 with EOT (equivalent oxide thickness) of 1.0 nm. The proposed model is compared and contrasted with santaurus simulation results to verify the accuracy of the model and excellent agreement is found between the analytical and simulated data. It is observed that proposed analytical model is suitable for different highk gate dielectrics simply by adjusting two fitting parameters. It was also shown that gate leakages reduced with the introduction of high-k gate dielectric in place of SiO2. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Analytical%20model" title="Analytical model">Analytical model</a>, <a href="https://publications.waset.org/search?q=High-k%20gate%20dielectrics" title=" High-k gate dielectrics"> High-k gate dielectrics</a>, <a href="https://publications.waset.org/search?q=inelastic%0Atrap%20assisted%20tunneling" title=" inelastic trap assisted tunneling"> inelastic trap assisted tunneling</a>, <a href="https://publications.waset.org/search?q=metal%E2%80%93oxide%E2%80%93semiconductor%20%28MOS%29%20devices." title=" metal–oxide–semiconductor (MOS) devices."> metal–oxide–semiconductor (MOS) devices.</a> </p> <a href="https://publications.waset.org/15954/trap-assisted-tunneling-model-for-gate-current-in-nano-scale-mosfet-with-high-k-gate-dielectrics" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/15954/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/15954/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/15954/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/15954/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/15954/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/15954/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/15954/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/15954/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/15954/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/15954/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/15954.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">3307</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1030</span> Vertical Silicon Nanowire MOSFET With A Fully-Silicided (FUSI) NiSi2 Gate</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Z.%20X.%20Chen">Z. X. Chen</a>, <a href="https://publications.waset.org/search?q=N.%20Singh"> N. Singh</a>, <a href="https://publications.waset.org/search?q=D.-L.%20Kwong"> D.-L. Kwong</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>This paper presents a vertical silicon nanowire n- MOSFET integrated with a CMOS-compatible fully-silicided (FUSI) NiSi2 gate. Devices with nanowire diameter of 50nm show good electrical performance (SS < 70mV/dec, DIBL < 30mV/V, Ion/Ioff > 107). Most significantly, threshold voltage tunability of about 0.2V is shown. Although threshold voltage remains low for the 50nm diameter device, it is expected to become more positive as nanowire diameter reduces.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=NiSi" title="NiSi ">NiSi </a>, <a href="https://publications.waset.org/search?q=fully-silicided%20%28FUSI%29%20gate" title=" fully-silicided (FUSI) gate"> fully-silicided (FUSI) gate</a>, <a href="https://publications.waset.org/search?q=vertical%20siliconnanowire%20%28SiNW%29" title=" vertical siliconnanowire (SiNW)"> vertical siliconnanowire (SiNW)</a>, <a href="https://publications.waset.org/search?q=CMOS%20compatible." title=" CMOS compatible."> CMOS compatible.</a> </p> <a href="https://publications.waset.org/14024/vertical-silicon-nanowire-mosfet-with-a-fully-silicided-fusi-nisi2-gate" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/14024/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/14024/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/14024/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/14024/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/14024/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/14024/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/14024/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/14024/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/14024/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/14024/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/14024.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1885</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1029</span> The Design of PFM Mode DC-DC Converter with DT-CMOS Switch</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Jae-Chang%20Kwak">Jae-Chang Kwak</a>, <a href="https://publications.waset.org/search?q=Yong-Seo%20Koo"> Yong-Seo Koo</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=DT-CMOS" title="DT-CMOS">DT-CMOS</a>, <a href="https://publications.waset.org/search?q=PMIC" title=" PMIC"> PMIC</a>, <a href="https://publications.waset.org/search?q=PFM" title=" PFM"> PFM</a>, <a href="https://publications.waset.org/search?q=DC-DC%20converter." title=" DC-DC converter."> DC-DC converter.</a> </p> <a href="https://publications.waset.org/9999074/the-design-of-pfm-mode-dc-dc-converter-with-dt-cmos-switch" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9999074/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9999074/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9999074/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9999074/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9999074/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9999074/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9999074/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9999074/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9999074/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9999074/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9999074.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">3203</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1028</span> Comprehensive Nonlinearity Simulation of Different Types and Modes of HEMTs with Respect to Biasing Conditions</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=M.%20M.%20Karkhanehchi">M. M. Karkhanehchi</a>, <a href="https://publications.waset.org/search?q=A.%20Ammani"> A. Ammani</a> </p> <p class="card-text"><strong>Abstract:</strong></p> A simple analytical model has been developed to optimize biasing conditions for obtaining maximum linearity among lattice-matched, pseudomorphic and metamorphic HEMT types as well as enhancement and depletion HEMT modes. A nonlinear current-voltage model has been simulated based on extracted data to study and select the most appropriate type and mode of HEMT in terms of a given gate-source biasing voltage within the device so as to employ the circuit for the highest possible output current or voltage linear swing. Simulation results can be used as a basis for the selection of optimum gate-source biasing voltage for a given type and mode of HEMT with regard to a circuit design. The consequences can also be a criterion for choosing the optimum type or mode of HEMT for a predetermined biasing condition. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Biasing" title="Biasing">Biasing</a>, <a href="https://publications.waset.org/search?q=characteristic" title=" characteristic"> characteristic</a>, <a href="https://publications.waset.org/search?q=linearity" title=" linearity"> linearity</a>, <a href="https://publications.waset.org/search?q=simulation." title=" simulation."> simulation.</a> </p> <a href="https://publications.waset.org/10806/comprehensive-nonlinearity-simulation-of-different-types-and-modes-of-hemts-with-respect-to-biasing-conditions" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10806/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10806/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10806/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10806/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10806/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10806/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10806/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10806/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10806/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10806/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10806.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1502</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1027</span> Simulation Study of Lateral Trench Gate Power MOSFET on 4H-SiC </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Yashvir%20Singh">Yashvir Singh</a>, <a href="https://publications.waset.org/search?q=Mayank%20Joshi"> Mayank Joshi</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>A lateral trench-gate power metal-oxide-semiconductor on 4H-SiC is proposed. The device consists of two separate trenches in which two gates are placed on both sides of P-body region resulting two parallel channels. Enhanced current conduction and reduced-surface-field effect in the structure provide substantial improvement in the device performance. Using two dimensional simulations, the performance of proposed device is evaluated and compare of with that of the conventional device for same cell pitch. It is demonstrated that the proposed structure provides two times higher output current, 11% decrease in threshold voltage, 70% improvement in transconductance, 70% reduction in specific ON-resistance, 52% increase in breakdown voltage, and nearly eight time improvement in figure-of-merit over the conventional device.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=4H-SiC" title="4H-SiC">4H-SiC</a>, <a href="https://publications.waset.org/search?q=lateral" title=" lateral"> lateral</a>, <a href="https://publications.waset.org/search?q=trench-gate" title=" trench-gate"> trench-gate</a>, <a href="https://publications.waset.org/search?q=power%20MOSFET." title=" power MOSFET. "> power MOSFET. </a> </p> <a href="https://publications.waset.org/9997887/simulation-study-of-lateral-trench-gate-power-mosfet-on-4h-sic" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9997887/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9997887/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9997887/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9997887/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9997887/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9997887/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9997887/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9997887/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9997887/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9997887/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9997887.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2139</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1026</span> Impact of Gate Insulation Material and Thickness on Pocket Implanted MOS Device</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Muhibul%20Haque%20Bhuyan">Muhibul Haque Bhuyan</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper reports on the impact study with the variation of the gate insulation material and thickness on different models of pocket implanted sub-100 nm n-MOS device. The gate materials used here are silicon dioxide (SiO<sub>2</sub>), aluminum silicate (Al<sub>2</sub>SiO<sub>5</sub>), silicon nitride (Si<sub>3</sub>N<sub>4</sub>), alumina (Al<sub>2</sub>O<sub>3</sub>), hafnium silicate (HfSiO<sub>4</sub>), tantalum pentoxide (Ta<sub>2</sub>O<sub>5</sub>), hafnium dioxide (HfO<sub>2</sub>), zirconium dioxide (ZrO<sub>2</sub>), and lanthanum oxide (La<sub>2</sub>O<sub>3</sub>) upon a p-type silicon substrate material. The gate insulation thickness was varied from 2.0 nm to 3.5 nm for a 50 nm channel length pocket implanted n-MOSFET. There are several models available for this device. We have studied and simulated threshold voltage model incorporating drain and substrate bias effects, surface potential, inversion layer charge, pinch-off voltage, effective electric field, inversion layer mobility, and subthreshold drain current models based on two linear symmetric pocket doping profiles. We have changed the values of the two parameters, viz. gate insulation material and thickness gradually fixing the other parameter at their typical values. Then we compared and analyzed the simulation results. This study would be helpful for the nano-scaled MOS device designers for various applications to predict the device behavior. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Linear%20symmetric%20pocket%20profile" title="Linear symmetric pocket profile">Linear symmetric pocket profile</a>, <a href="https://publications.waset.org/search?q=pocket%20implanted%20n-MOS%20Device" title=" pocket implanted n-MOS Device"> pocket implanted n-MOS Device</a>, <a href="https://publications.waset.org/search?q=model" title=" model"> model</a>, <a href="https://publications.waset.org/search?q=impact%20of%20gate%20material" title=" impact of gate material"> impact of gate material</a>, <a href="https://publications.waset.org/search?q=insulator%20thickness." title=" insulator thickness. "> insulator thickness. </a> </p> <a href="https://publications.waset.org/10011953/impact-of-gate-insulation-material-and-thickness-on-pocket-implanted-mos-device" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10011953/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10011953/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10011953/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10011953/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10011953/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10011953/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10011953/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10011953/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10011953/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10011953/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10011953.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">387</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1025</span> High Speed and Ultra Low-voltage CMOS NAND and NOR Domino Gates</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Yngvar%20Berg">Yngvar Berg</a>, <a href="https://publications.waset.org/search?q=Omid%20Mirmotahari"> Omid Mirmotahari</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this paper we ultra low-voltage and high speed CMOS domino logic. For supply voltages below 500mV the delay for a ultra low-voltage NAND2 gate is aproximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch is much less than for conventional CMOS. Differential domino gates for AND/NAND and OR/NOR operation are presented.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Low-voltage" title="Low-voltage">Low-voltage</a>, <a href="https://publications.waset.org/search?q=high-speed" title=" high-speed"> high-speed</a>, <a href="https://publications.waset.org/search?q=NAND" title=" NAND"> NAND</a>, <a href="https://publications.waset.org/search?q=NOR" title=" NOR"> NOR</a>, <a href="https://publications.waset.org/search?q=CMOS." title=" CMOS."> CMOS.</a> </p> <a href="https://publications.waset.org/852/high-speed-and-ultra-low-voltage-cmos-nand-and-nor-domino-gates" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/852/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/852/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/852/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/852/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/852/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/852/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/852/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/852/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/852/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/852/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/852.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2553</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1024</span> Investigation of Threshold Voltage Shift in Gamma Irradiated N-Channel and P-Channel MOS Transistors of CD4007</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=S.%20Boorboor">S. Boorboor</a>, <a href="https://publications.waset.org/search?q=S.%20A.%20H.%20Feghhi"> S. A. H. Feghhi</a>, <a href="https://publications.waset.org/search?q=H.%20Jafari"> H. Jafari</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>The ionizing radiations cause different kinds of damages in electronic components. MOSFETs, most common transistors in today’s digital and analog circuits, are severely sensitive to TID damage. In this work, the threshold voltage shift of CD4007 device, which is an integrated circuit including P-channel and N-channel MOS transistors, was investigated for low dose gamma irradiation under different gate bias voltages. We used linear extrapolation method to extract threshold voltage from I<sub>D</sub>-V<sub>G</sub> characteristic curve. The results showed that the threshold voltage shift was approximately 27.5 mV/Gy for N-channel and 3.5 mV/Gy for P-channel transistors at the gate bias of |9 V| after irradiation by Co-60 gamma ray source. Although the sensitivity of the devices under test were strongly dependent to biasing condition and transistor type, the threshold voltage shifted linearly versus accumulated dose in all cases. The overall results show that the application of CD4007 as an electronic buffer in a radiation therapy system is limited by TID damage. However, this integrated circuit can be used as a cheap and sensitive radiation dosimeter for accumulated dose measurement in radiation therapy systems.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Threshold%20voltage%20shift" title="Threshold voltage shift">Threshold voltage shift</a>, <a href="https://publications.waset.org/search?q=MOS%20transistor" title=" MOS transistor"> MOS transistor</a>, <a href="https://publications.waset.org/search?q=linear%20extrapolation" title=" linear extrapolation"> linear extrapolation</a>, <a href="https://publications.waset.org/search?q=gamma%20irradiation." title=" gamma irradiation."> gamma irradiation.</a> </p> <a href="https://publications.waset.org/10007002/investigation-of-threshold-voltage-shift-in-gamma-irradiated-n-channel-and-p-channel-mos-transistors-of-cd4007" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10007002/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10007002/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10007002/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10007002/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10007002/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10007002/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10007002/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10007002/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10007002/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10007002/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10007002.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1380</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1023</span> Investigation of Multiple Material Gate Impact on Short Channel Effects and Reliability of Nanoscale SOI MOSFETs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Paniz%20Tafakori">Paniz Tafakori</a>, <a href="https://publications.waset.org/search?q=Ali%20A.%20Orouji"> Ali A. Orouji</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper the features of multiple material gate silicon-on-insulator MOSFETs are presented and compared with single material gate silicon-on-insulator MOSFET structures. The results indicate that the multiple material gate structures reduce short channel effects such as drain induce barrier lowering, hot electron effect and better current characteristics in comparison with single material structures <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Short-channel%20effects%20%28SCEs%29" title="Short-channel effects (SCEs)">Short-channel effects (SCEs)</a>, <a href="https://publications.waset.org/search?q=Dual%20material%20gate%0A%28DMG%29" title=" Dual material gate (DMG)"> Dual material gate (DMG)</a>, <a href="https://publications.waset.org/search?q=Triple%20material%20gate%20%28TMG%29" title=" Triple material gate (TMG)"> Triple material gate (TMG)</a>, <a href="https://publications.waset.org/search?q=Pentamerous%20material%20gate%0A%28PMG%29." title=" Pentamerous material gate (PMG)."> Pentamerous material gate (PMG).</a> </p> <a href="https://publications.waset.org/11808/investigation-of-multiple-material-gate-impact-on-short-channel-effects-and-reliability-of-nanoscale-soi-mosfets" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/11808/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/11808/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/11808/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/11808/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/11808/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/11808/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/11808/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/11808/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/11808/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/11808/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/11808.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2006</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1022</span> Modification of Electrical and Switching Characteristics of a Non Punch-Through Insulated Gate Bipolar Transistor by Gamma Irradiation</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Hani%20Baek">Hani Baek</a>, <a href="https://publications.waset.org/search?q=Gwang%20Min%20Sun"> Gwang Min Sun</a>, <a href="https://publications.waset.org/search?q=Chansun%20Shin"> Chansun Shin</a>, <a href="https://publications.waset.org/search?q=Sung%20Ho%20Ahn"> Sung Ho Ahn</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Fast neutron irradiation using nuclear reactors is an effective method to improve switching loss and short circuit durability of power semiconductor (insulated gate bipolar transistors (IGBT) and insulated gate transistors (IGT), etc.). However, not only fast neutrons but also thermal neutrons, epithermal neutrons and gamma exist in the nuclear reactor. And the electrical properties of the IGBT may be deteriorated by the irradiation of gamma. Gamma irradiation damages are known to be caused by Total Ionizing Dose (TID) effect and Single Event Effect (SEE), Displacement Damage. Especially, the TID effect deteriorated the electrical properties such as leakage current and threshold voltage of a power semiconductor. This work can confirm the effect of the gamma irradiation on the electrical properties of 600 V NPT-IGBT. Irradiation of gamma forms lattice defects in the gate oxide and Si-SiO<sub>2</sub> interface of the IGBT. It was confirmed that this lattice defect acts on the center of the trap and affects the threshold voltage, thereby negatively shifted the threshold voltage according to TID. In addition to the change in the carrier mobility, the conductivity modulation decreases in the n-drift region, indicating a negative influence that the forward voltage drop decreases. The turn-off delay time of the device before irradiation was 212 ns. Those of 2.5, 10, 30, 70 and 100 kRad(Si) were 225, 258, 311, 328, and 350 ns, respectively. The gamma irradiation increased the turn-off delay time of the IGBT by approximately 65%, and the switching characteristics deteriorated. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=NPT-IGBT" title="NPT-IGBT">NPT-IGBT</a>, <a href="https://publications.waset.org/search?q=gamma%20irradiation" title=" gamma irradiation"> gamma irradiation</a>, <a href="https://publications.waset.org/search?q=switching" title=" switching"> switching</a>, <a href="https://publications.waset.org/search?q=turn-off%20delay%20time" title=" turn-off delay time"> turn-off delay time</a>, <a href="https://publications.waset.org/search?q=recombination" title=" recombination"> recombination</a>, <a href="https://publications.waset.org/search?q=trap%20center." title=" trap center."> trap center.</a> </p> <a href="https://publications.waset.org/10009223/modification-of-electrical-and-switching-characteristics-of-a-non-punch-through-insulated-gate-bipolar-transistor-by-gamma-irradiation" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10009223/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10009223/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10009223/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10009223/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10009223/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10009223/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10009223/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10009223/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10009223/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10009223/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10009223.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">871</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1021</span> Design and Analysis of Low-Power, High Speed and Area Efficient 2-Bit Digital Magnitude Comparator in 90nm CMOS Technology Using Gate Diffusion Input</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Fasil%20Endalamaw">Fasil Endalamaw</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>Digital magnitude comparators based on Gate Diffusion Input (GDI) implementation technique are high speed and area-efficient, and they consume less power as compared to other implementation techniques. However, they are less efficient for some logic gates and have no full voltage swing. In this paper, we made a performance comparison between the GDI implementation technique and other implementation methods, such as Static CMOS, Pass Transistor Logic (PTL), and Transmission Gate (TG) in 90 nm, 120 nm, and 180 nm CMOS technologies using BSIM4 MOS model. We proposed a methodology (hybrid implementation) of implementing digital magnitude comparators which significantly improved the power, speed, area, and voltage swing requirements. Simulation results revealed that the hybrid implementation of digital magnitude comparators show a 10.84% (power dissipation), 41.6% (propagation delay), 47.95% (power-delay product (PDP)) improvement compared to the usual GDI implementation method. We used Microwind & Dsch Version 3.5 as well as the Tanner EDA 16.0 tools for simulation purposes.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Efficient" title="Efficient">Efficient</a>, <a href="https://publications.waset.org/search?q=gate%20diffusion%20input" title=" gate diffusion input"> gate diffusion input</a>, <a href="https://publications.waset.org/search?q=high%20speed" title=" high speed"> high speed</a>, <a href="https://publications.waset.org/search?q=low%20power" title=" low power"> low power</a>, <a href="https://publications.waset.org/search?q=CMOS." title=" CMOS."> CMOS.</a> </p> <a href="https://publications.waset.org/10012573/design-and-analysis-of-low-power-high-speed-and-area-efficient-2-bit-digital-magnitude-comparator-in-90nm-cmos-technology-using-gate-diffusion-input" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10012573/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10012573/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10012573/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10012573/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10012573/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10012573/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10012573/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10012573/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10012573/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10012573/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10012573.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">445</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1020</span> Static and Dynamic Characteristics of an Appropriated and Recessed n-GaN/AlGaN/GaN HEMT</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=A.%20Hamdoune">A. Hamdoune</a>, <a href="https://publications.waset.org/search?q=M.%20Abdelmoumene"> M. Abdelmoumene</a>, <a href="https://publications.waset.org/search?q=A.%20Hamroun"> A. Hamroun</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>The objective of this paper is to simulate static I-V and dynamic characteristics of an appropriated and recessed n-GaN/AlxGa1-xN/GaN high electron mobility (HEMT). Using SILVACO TCAD device simulation, and optimized technological parameters; we calculate the drain-source current (lDS) as a function of the drain-source voltage (VDS) for different values of the gate-source voltage (VGS), and the drain-source current <span style="line-height: 20.7999992370605px;">(lDS)</span> depending on the gate-source voltage <span style="line-height: 20.7999992370605px;">(VGS) </span>for a drain-source voltage <span style="line-height: 20.7999992370605px;">(VDS)</span> of 20 V, for various temperatures. Then, we calculate the cut-off frequency and the maximum oscillation frequency for different temperatures.</p> <p>We obtain a high drain-current equal to 60 mA, a low knee voltage (Vknee) of 2 V, a high pinch-off voltage (<span style="line-height: 20.7999992370605px;">VGS0</span>) of 53.5 V, a transconductance greater than 600 mS/mm, a cut-off frequency (f<sub>T</sub>) of about 330 GHz, and a maximum oscillation frequency (fmax) of about 1 THz.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=n-GaN%2FAlGaN%2FGaN%20HEMT" title="n-GaN/AlGaN/GaN HEMT">n-GaN/AlGaN/GaN HEMT</a>, <a href="https://publications.waset.org/search?q=drain-source%20current%20%28IDS%29" title=" drain-source current (IDS)"> drain-source current (IDS)</a>, <a href="https://publications.waset.org/search?q=transconductance%20%28gm%29" title=" transconductance (gm)"> transconductance (gm)</a>, <a href="https://publications.waset.org/search?q=cut-off%20frequency%20%28fT%29" title=" cut-off frequency (fT)"> cut-off frequency (fT)</a>, <a href="https://publications.waset.org/search?q=maximum%20oscillation%20frequency%20%28fmax%29." title=" maximum oscillation frequency (fmax)."> maximum oscillation frequency (fmax).</a> </p> <a href="https://publications.waset.org/9996851/static-and-dynamic-characteristics-of-an-appropriated-and-recessed-n-ganalgangan-hemt" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/9996851/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/9996851/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/9996851/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/9996851/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/9996851/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/9996851/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/9996851/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/9996851/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/9996851/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/9996851/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/9996851.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2368</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1019</span> Characterization of Responsivity, Sensitivity and Spectral Response in Thin Film SOI photo-BJMOS -FET Compatible with CMOS Technology</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Hai-Qing%20Xie">Hai-Qing Xie</a>, <a href="https://publications.waset.org/search?q=Yun%20Zeng"> Yun Zeng</a>, <a href="https://publications.waset.org/search?q=Yong-Hong%20Yan"> Yong-Hong Yan</a>, <a href="https://publications.waset.org/search?q=Jian-Ping%20Zeng"> Jian-Ping Zeng</a>, <a href="https://publications.waset.org/search?q=Tai-Hong%20Wang"> Tai-Hong Wang</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Photo-BJMOSFET (Bipolar Junction Metal-Oxide- Semiconductor Field Effect Transistor) fabricated on SOI film was proposed. ITO film is adopted in the device as gate electrode to reduce light absorption. Depletion region but not inversion region is formed in film by applying gate voltage (but low reverse voltage) to achieve high photo-to-dark-current ratio. Comparisons of photoelectriccharacteristics executed among VGK=0V, 0.3V, 0.6V, 0.9V and 1.0V (reverse voltage VAK is equal to 1.0V for total area of 10×10μm2). The results indicate that the greatest improvement in photo-to-dark-current ratio is achieved up to 2.38 at VGK=0.6V. In addition, photo-BJMOSFET is compatible with CMOS integration due to big input resistance <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Photo-BJMOSFET" title="Photo-BJMOSFET">Photo-BJMOSFET</a>, <a href="https://publications.waset.org/search?q=Responsivity" title=" Responsivity"> Responsivity</a>, <a href="https://publications.waset.org/search?q=Sensitivity" title=" Sensitivity"> Sensitivity</a>, <a href="https://publications.waset.org/search?q=Spectral%20response." title=" Spectral response."> Spectral response.</a> </p> <a href="https://publications.waset.org/14819/characterization-of-responsivity-sensitivity-and-spectral-response-in-thin-film-soi-photo-bjmos-fet-compatible-with-cmos-technology" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/14819/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/14819/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/14819/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/14819/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/14819/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/14819/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/14819/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/14819/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/14819/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/14819/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/14819.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1539</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1018</span> Comparative Study of Al2O3 and HfO2 as Gate Dielectric on AlGaN/GaN MOSHEMTs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=K.%20Karami">K. Karami</a>, <a href="https://publications.waset.org/search?q=S.%20Hassan"> S. Hassan</a>, <a href="https://publications.waset.org/search?q=S.%20Taking"> S. Taking</a>, <a href="https://publications.waset.org/search?q=A.%20Ofiare"> A. Ofiare</a>, <a href="https://publications.waset.org/search?q=A.%20Dhongde"> A. Dhongde</a>, <a href="https://publications.waset.org/search?q=A.%20Al-Khalidi"> A. Al-Khalidi</a>, <a href="https://publications.waset.org/search?q=E.%20Wasige"> E. Wasige</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>We have made a comparative study on the influence of Al2O3 and HfO2 grown using Atomic Layer Deposition (ALD) technique as dielectric in the AlGaN/GaN metal oxide semiconductor high electron mobility transistor (MOS-HEMT) structure. Five samples consisting of 20 nm and 10 nm each of A2lO3 and HfO2 respectively and a Schottky gate HEMT, were fabricated and measured. The threshold voltage shifts towards negative by 0.1 V and 1.8 V for 10 nm thick HfO2 and 10 nm thick Al2O3 gate dielectric layers, respectively. The negative shift for the 20 nm HfO2 and 20 nm Al2O3 were 1.2 V and 4.9 V, respectively. Higher gm/IDS (transconductance to drain current) ratio was also obtained in HfO2 than Al2O3. With both materials as dielectric, a significant reduction in the gate leakage current in the order of 104 was obtained compared to the sample without the dielectric material.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=AlGaN%2FGaN%20HEMTs" title="AlGaN/GaN HEMTs">AlGaN/GaN HEMTs</a>, <a href="https://publications.waset.org/search?q=Al2O3" title=" Al2O3"> Al2O3</a>, <a href="https://publications.waset.org/search?q=HfO2" title=" HfO2"> HfO2</a>, <a href="https://publications.waset.org/search?q=MOSHEMTs." title=" MOSHEMTs."> MOSHEMTs.</a> </p> <a href="https://publications.waset.org/10012945/comparative-study-of-al2o3-and-hfo2-as-gate-dielectric-on-algangan-moshemts" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10012945/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10012945/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10012945/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10012945/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10012945/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10012945/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10012945/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10012945/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10012945/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10012945/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10012945.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">408</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1017</span> A Simulation Model for the H-gate PDSOI MOSFET</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Bu%20Jianhui">Bu Jianhui</a>, <a href="https://publications.waset.org/search?q=Bi%20Jinshun"> Bi Jinshun</a>, <a href="https://publications.waset.org/search?q=Liu%20Mengxin"> Liu Mengxin</a>, <a href="https://publications.waset.org/search?q=Luo%20Jiajun"> Luo Jiajun</a>, <a href="https://publications.waset.org/search?q=Han%20Zhengsheng"> Han Zhengsheng</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The floating body effect is a serious problem for the PDSOI MOSFET, and the H-gate layout is frequently used as the body contact to eliminate this effect. Unfortunately, most of the standard commercial SOI MOSFET model is for the device with finger gate, the necessity of the new models for the H-gate device arises. A simulation model for the H-gate PDSOI MOSFET is proposed based on the 0.35μm PDSOI process developed by the Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS), and then the model is well verified by the ring-oscillator. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=PDSOI%20H-gate%20Device%20model%20Body%20contact." title="PDSOI H-gate Device model Body contact.">PDSOI H-gate Device model Body contact.</a> </p> <a href="https://publications.waset.org/8199/a-simulation-model-for-the-h-gate-pdsoi-mosfet" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/8199/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/8199/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/8199/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/8199/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/8199/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/8199/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/8199/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/8199/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/8199/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/8199/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/8199.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2243</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1016</span> Spin-Dependent Transport Signatures of Bound States: From Finger to Top Gates</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Yun-Hsuan%20Yu">Yun-Hsuan Yu</a>, <a href="https://publications.waset.org/search?q=Chi-Shung%20Tang"> Chi-Shung Tang</a>, <a href="https://publications.waset.org/search?q=Nzar%20Rauf%20Abdullah"> Nzar Rauf Abdullah</a>, <a href="https://publications.waset.org/search?q=Vidar%20Gudmundsson"> Vidar Gudmundsson</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Spin-orbit gap feature in energy dispersion of one-dimensional devices is revealed via strong spin-orbit interaction (SOI) effects under Zeeman field. We describe the utilization of a finger-gate or a top-gate to control the spin-dependent transport characteristics in the SOI-Zeeman influenced split-gate devices by means of a generalized spin-mixed propagation matrix method. For the finger-gate system, we find a bound state in continuum for incident electrons within the ultra-low energy regime. For the top-gate system, we observe more bound-state features in conductance associated with the formation of spin-associated hole-like or electron-like quasi-bound states around band thresholds, as well as hole bound states around the reverse point of the energy dispersion. We demonstrate that the spin-dependent transport behavior of a top-gate system is similar to that of a finger-gate system only if the top-gate length is less than the effective Fermi wavelength. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Spin-orbit" title="Spin-orbit">Spin-orbit</a>, <a href="https://publications.waset.org/search?q=Zeeman" title=" Zeeman"> Zeeman</a>, <a href="https://publications.waset.org/search?q=top-gate" title=" top-gate"> top-gate</a>, <a href="https://publications.waset.org/search?q=finger-gate" title=" finger-gate"> finger-gate</a>, <a href="https://publications.waset.org/search?q=bound%20state." title=" bound state."> bound state.</a> </p> <a href="https://publications.waset.org/10008608/spin-dependent-transport-signatures-of-bound-states-from-finger-to-top-gates" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10008608/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10008608/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10008608/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10008608/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10008608/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10008608/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10008608/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10008608/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10008608/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10008608/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10008608.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">951</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1015</span> Capacitance Models of AlGaN/GaN High Electron Mobility Transistors</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=A.%20Douara">A. Douara</a>, <a href="https://publications.waset.org/search?q=N.%20Kermas"> N. Kermas</a>, <a href="https://publications.waset.org/search?q=B.%20Djellouli"> B. Djellouli</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>In this study, we report calculations of gate capacitance of AlGaN/GaN HEMTs with nextnano device simulation software. We have used a physical gate capacitance model for III-V FETs that incorporates quantum capacitance and centroid capacitance in the channel. These simulations explore various device structures with different values of barrier thickness and channel thickness. A detailed understanding of the impact of gate capacitance in HEMTs will allow us to determine their role in future 10 nm physical gate length node.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=AlGaN%2FGaN" title="AlGaN/GaN">AlGaN/GaN</a>, <a href="https://publications.waset.org/search?q=centroid%20capacitance" title=" centroid capacitance"> centroid capacitance</a>, <a href="https://publications.waset.org/search?q=gate%20capacitance" title=" gate capacitance"> gate capacitance</a>, <a href="https://publications.waset.org/search?q=HEMT" title=" HEMT"> HEMT</a>, <a href="https://publications.waset.org/search?q=quantum%20capacitance." title=" quantum capacitance."> quantum capacitance.</a> </p> <a href="https://publications.waset.org/10004147/capacitance-models-of-algangan-high-electron-mobility-transistors" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10004147/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10004147/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10004147/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10004147/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10004147/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10004147/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10004147/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10004147/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10004147/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10004147/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10004147.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">1899</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1014</span> CMOS Positive and Negative Resistors Based on Complementary Regulated Cascode Topology with Cross-Coupled Regulated Transistors</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Kittipong%20Tripetch">Kittipong Tripetch</a>, <a href="https://publications.waset.org/search?q=Nobuhiko%20Nakano"> Nobuhiko Nakano</a> </p> <p class="card-text"><strong>Abstract:</strong></p> <p>Two types of floating active resistors based on a complementary regulated cascode topology with cross-coupled regulated transistors are presented in this paper. The first topology is a high swing complementary regulated cascode active resistor. The second topology is a complementary common gate with a regulated cross coupled transistor. The small-signal input resistances of the floating resistors are derived. Three graphs of the input current versus the input voltage for different aspect ratios are designed and plotted using the Cadence Spectre 0.18-µm Rohm Semiconductor process. The total harmonic distortion graphs are plotted for three different aspect ratios with different input-voltage amplitudes and different input frequencies. From the simulation results, it is observed that a resistance of approximately 8.52 MΩ can be obtained from supply voltage at ±0.9 V.</p> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Complementary%20common%20gate" title="Complementary common gate">Complementary common gate</a>, <a href="https://publications.waset.org/search?q=complementary%20regulated%20cascode" title=" complementary regulated cascode"> complementary regulated cascode</a>, <a href="https://publications.waset.org/search?q=current%20mirror" title=" current mirror"> current mirror</a>, <a href="https://publications.waset.org/search?q=floating%20active%20resistors." title=" floating active resistors."> floating active resistors.</a> </p> <a href="https://publications.waset.org/10008536/cmos-positive-and-negative-resistors-based-on-complementary-regulated-cascode-topology-with-cross-coupled-regulated-transistors" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/10008536/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/10008536/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/10008536/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/10008536/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/10008536/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/10008536/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/10008536/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/10008536/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/10008536/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/10008536/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/10008536.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">957</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1013</span> Precision Control of Single-Phase PWM Inverter Using M68HC11E Microcontroller</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Khaled%20A.%20Madi">Khaled A. Madi</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Induction motors are being used in greater numbers throughout a wide variety of industrial and commercial applications because it provides many benefits and reliable device to convert the electrical energy into mechanical motion. In some application it-s desired to control the speed of the induction motor. Because of the physics of the induction motor the preferred method of controlling its speed is to vary the frequency of the AC voltage driving the motor. In recent years, with the microcontroller incorporated into an appliance it becomes possible to use it to generate the variable frequency AC voltage to control the speed of the induction motor. This study investigates the microcontroller based variable frequency power inverter. the microcontroller is provide the variable frequency pulse width modulation (PWM) signal that control the applied voltage on the gate drive, which is provides the required PWM frequency with less harmonics at the output of the power inverter. The fully controlled bridge voltage source inverter has been implemented with semiconductors power devices isolated gate bipolar transistor (IGBT), and the PWM technique has been employed in this inverter to supply the motor with AC voltage. The proposed drive system for three & single phase power inverter is simulated using Matlab/Simulink. The Matlab Simulation Results for the proposed system were achieved with different SPWM. From the result a stable variable frequency inverter over wide range has been obtained and a good agreement has been found between the simulation and hardware of a microcontroller based single phase inverter. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Power" title="Power">Power</a>, <a href="https://publications.waset.org/search?q=inverter" title=" inverter"> inverter</a>, <a href="https://publications.waset.org/search?q=PWM" title=" PWM"> PWM</a>, <a href="https://publications.waset.org/search?q=microcontroller." title=" microcontroller."> microcontroller.</a> </p> <a href="https://publications.waset.org/6698/precision-control-of-single-phase-pwm-inverter-using-m68hc11e-microcontroller" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/6698/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/6698/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/6698/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/6698/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/6698/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/6698/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/6698/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/6698/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/6698/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/6698/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/6698.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">4436</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1012</span> A Comparison Study of Electrical Characteristics in Conventional Multiple-gate Silicon Nanowire Transistors</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Fatemeh%20Karimi">Fatemeh Karimi</a>, <a href="https://publications.waset.org/search?q=Morteza%20Fathipour"> Morteza Fathipour</a>, <a href="https://publications.waset.org/search?q=Hamdam%20Ghanatian"> Hamdam Ghanatian</a>, <a href="https://publications.waset.org/search?q=Vala%20Fathipour"> Vala Fathipour</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper electrical characteristics of various kinds of multiple-gate silicon nanowire transistors (SNWT) with the channel length equal to 7 nm are compared. A fully ballistic quantum mechanical transport approach based on NEGF was employed to analyses electrical characteristics of rectangular and cylindrical silicon nanowire transistors as well as a Double gate MOS FET. A double gate, triple gate, and gate all around nano wires were studied to investigate the impact of increasing the number of gates on the control of the short channel effect which is important in nanoscale devices. Also in the case of triple gate rectangular SNWT inserting extra gates on the bottom of device can improve the application of device. The results indicate that by using gate all around structures short channel effects such as DIBL, subthreshold swing and delay reduces. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=SNWT%20%28silicon%20nanowire%20transistor%29" title="SNWT (silicon nanowire transistor)">SNWT (silicon nanowire transistor)</a>, <a href="https://publications.waset.org/search?q=non%20equilibriumGreen%27s%20function%20%28NEGF%29" title=" non equilibriumGreen's function (NEGF)"> non equilibriumGreen's function (NEGF)</a>, <a href="https://publications.waset.org/search?q=double%20gate%20%28DG%29" title=" double gate (DG)"> double gate (DG)</a>, <a href="https://publications.waset.org/search?q=triple%20gate%20%28TG%29" title=" triple gate (TG)"> triple gate (TG)</a>, <a href="https://publications.waset.org/search?q=multiple%20gate" title="multiple gate">multiple gate</a>, <a href="https://publications.waset.org/search?q=cylindrical%20nano%20wire%20%28CW%29" title=" cylindrical nano wire (CW)"> cylindrical nano wire (CW)</a>, <a href="https://publications.waset.org/search?q=rectangular%20nano%20wire%28RW%29" title=" rectangular nano wire(RW)"> rectangular nano wire(RW)</a>, <a href="https://publications.waset.org/search?q=Poisson_%20Schr%C3%B6dinger%20solver" title=" Poisson_ Schrödinger solver"> Poisson_ Schrödinger solver</a>, <a href="https://publications.waset.org/search?q=drain%20induced%20barrier%20lowering%28DIBL%29." title=" drain induced barrier lowering(DIBL)."> drain induced barrier lowering(DIBL).</a> </p> <a href="https://publications.waset.org/497/a-comparison-study-of-electrical-characteristics-in-conventional-multiple-gate-silicon-nanowire-transistors" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/497/apa" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">APA</a> <a href="https://publications.waset.org/497/bibtex" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">BibTeX</a> <a href="https://publications.waset.org/497/chicago" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Chicago</a> <a href="https://publications.waset.org/497/endnote" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">EndNote</a> <a href="https://publications.waset.org/497/harvard" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">Harvard</a> <a href="https://publications.waset.org/497/json" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">JSON</a> <a href="https://publications.waset.org/497/mla" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">MLA</a> <a href="https://publications.waset.org/497/ris" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">RIS</a> <a href="https://publications.waset.org/497/xml" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">XML</a> <a href="https://publications.waset.org/497/iso690" target="_blank" rel="nofollow" class="btn btn-primary btn-sm">ISO 690</a> <a href="https://publications.waset.org/497.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">2081</span> </span> </div> </div> <div class="card publication-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">1011</span> A Novel Source/Drain-to-Gate Non-overlap MOSFET to Reduce Gate Leakage Current in Nano Regime</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/search?q=Ashwani%20K.%20Rana">Ashwani K. Rana</a>, <a href="https://publications.waset.org/search?q=Narottam%20Chand"> Narottam Chand</a>, <a href="https://publications.waset.org/search?q=Vinod%20Kapoor"> Vinod Kapoor</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, gate leakage current has been mitigated by the use of novel nanoscale MOSFET with Source/Drain-to-Gate Non-overlapped and high-k spacer structure for the first time. A compact analytical model has been developed to study the gate leakage behaviour of proposed MOSFET structure. The result obtained has found good agreement with the Sentaurus Simulation. Fringing gate electric field through the dielectric spacer induces inversion layer in the non-overlap region to act as extended S/D region. It is found that optimal Source/Drain-to-Gate Non-overlapped and high-k spacer structure has reduced the gate leakage current to great extent as compared to those of an overlapped structure. Further, the proposed structure had improved off current, subthreshold slope and DIBL characteristic. It is concluded that this structure solves the problem of high leakage current without introducing the extra series resistance. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/search?q=Gate%20tunneling%20current" title="Gate tunneling current">Gate tunneling current</a>, <a href="https://publications.waset.org/search?q=analytical%20model" title=" analytical model"> analytical model</a>, <a href="https://publications.waset.org/search?q=spacer%0Adielectrics" title=" spacer dielectrics"> spacer dielectrics</a>, <a href="https://publications.waset.org/search?q=DIBL" title=" DIBL"> DIBL</a>, <a href="https://publications.waset.org/search?q=subthreshold%20slope." title=" subthreshold slope."> subthreshold slope.</a> </p> <a href="https://publications.waset.org/3314/a-novel-sourcedrain-to-gate-non-overlap-mosfet-to-reduce-gate-leakage-current-in-nano-regime" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/3314/apa" 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