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Athlon - Wikipedia

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id="toc-Brand_history-sublist" class="vector-toc-list"> <li id="toc-K7_design_and_development" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#K7_design_and_development"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1</span> <span>K7 design and development</span> </div> </a> <ul id="toc-K7_design_and_development-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Original_release" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Original_release"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2</span> <span>Original release</span> </div> </a> <ul id="toc-Original_release-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Later_Athlon_iterations" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Later_Athlon_iterations"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.3</span> <span>Later Athlon iterations</span> </div> </a> <ul id="toc-Later_Athlon_iterations-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Generations" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Generations"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Generations</span> </div> </a> <button aria-controls="toc-Generations-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Generations subsection</span> </button> <ul id="toc-Generations-sublist" class="vector-toc-list"> <li id="toc-Athlon_Classic_(1999)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_Classic_(1999)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>Athlon Classic (1999)</span> </div> </a> <ul id="toc-Athlon_Classic_(1999)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Athlon_Thunderbird_(2000–2001)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_Thunderbird_(2000–2001)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2</span> <span>Athlon Thunderbird (2000–2001)</span> </div> </a> <ul id="toc-Athlon_Thunderbird_(2000–2001)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Athlon_XP_(2001–2003)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_XP_(2001–2003)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3</span> <span>Athlon XP (2001–2003)</span> </div> </a> <ul id="toc-Athlon_XP_(2001–2003)-sublist" class="vector-toc-list"> <li id="toc-Palomino" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Palomino"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3.1</span> <span><i>Palomino</i></span> </div> </a> <ul id="toc-Palomino-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Thoroughbred" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Thoroughbred"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3.2</span> <span><i>Thoroughbred</i></span> </div> </a> <ul id="toc-Thoroughbred-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Barton_/_Thorton" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Barton_/_Thorton"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3.3</span> <span><i>Barton</i> / <i>Thorton</i></span> </div> </a> <ul id="toc-Barton_/_Thorton-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Mobile_Athlon_XP" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Mobile_Athlon_XP"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3.4</span> <span>Mobile Athlon XP</span> </div> </a> <ul id="toc-Mobile_Athlon_XP-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Athlon_64_(2003–2009)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_64_(2003–2009)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.4</span> <span>Athlon 64 (2003–2009)</span> </div> </a> <ul id="toc-Athlon_64_(2003–2009)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Athlon_64_X2_(2005–2009)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_64_X2_(2005–2009)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.5</span> <span>Athlon 64 X2 (2005–2009)</span> </div> </a> <ul id="toc-Athlon_64_X2_(2005–2009)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Athlon_II_(2009–2012)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_II_(2009–2012)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.6</span> <span>Athlon II (2009–2012)</span> </div> </a> <ul id="toc-Athlon_II_(2009–2012)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Piledriver_and_Steamroller-based_Athlon_X4_(2013–2016)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Piledriver_and_Steamroller-based_Athlon_X4_(2013–2016)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.7</span> <span>Piledriver and Steamroller-based Athlon X4 (2013–2016)</span> </div> </a> <ul id="toc-Piledriver_and_Steamroller-based_Athlon_X4_(2013–2016)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Excavator-based_Athlon_X4_(2017)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Excavator-based_Athlon_X4_(2017)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.8</span> <span>Excavator-based Athlon X4 (2017)</span> </div> </a> <ul id="toc-Excavator-based_Athlon_X4_(2017)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Zen-based_Athlon_(2018–present)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Zen-based_Athlon_(2018–present)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.9</span> <span>Zen-based Athlon (2018–present)</span> </div> </a> <ul id="toc-Zen-based_Athlon_(2018–present)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Supercomputers" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Supercomputers"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Supercomputers</span> </div> </a> <ul id="toc-Supercomputers-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > 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Available in 26 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-26" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">26 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-bs mw-list-item"><a href="https://bs.wikipedia.org/wiki/Athlon" title="Athlon – Bosnian" lang="bs" hreflang="bs" data-title="Athlon" data-language-autonym="Bosanski" data-language-local-name="Bosnian" class="interlanguage-link-target"><span>Bosanski</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Athlon" title="Athlon – Catalan" lang="ca" hreflang="ca" data-title="Athlon" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/AMD_Athlon" title="AMD Athlon – Czech" lang="cs" hreflang="cs" data-title="AMD Athlon" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-da mw-list-item"><a href="https://da.wikipedia.org/wiki/Athlon" title="Athlon – Danish" lang="da" hreflang="da" data-title="Athlon" data-language-autonym="Dansk" data-language-local-name="Danish" class="interlanguage-link-target"><span>Dansk</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/AMD_Athlon" title="AMD Athlon – German" lang="de" hreflang="de" data-title="AMD Athlon" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/AMD_Athlon" title="AMD Athlon – Spanish" lang="es" hreflang="es" data-title="AMD Athlon" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Athlon" title="Athlon – French" lang="fr" hreflang="fr" data-title="Athlon" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EC%95%A0%EC%8A%AC%EB%A1%A0" title="애슬론 – Korean" lang="ko" hreflang="ko" data-title="애슬론" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-id mw-list-item"><a href="https://id.wikipedia.org/wiki/Athlon" title="Athlon – Indonesian" lang="id" hreflang="id" data-title="Athlon" data-language-autonym="Bahasa Indonesia" data-language-local-name="Indonesian" class="interlanguage-link-target"><span>Bahasa Indonesia</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Athlon" title="Athlon – Italian" lang="it" hreflang="it" data-title="Athlon" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-he mw-list-item"><a href="https://he.wikipedia.org/wiki/Athlon" title="Athlon – Hebrew" lang="he" hreflang="he" data-title="Athlon" data-language-autonym="עברית" data-language-local-name="Hebrew" class="interlanguage-link-target"><span>עברית</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/Athlon" title="Athlon – Hungarian" lang="hu" hreflang="hu" data-title="Athlon" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-ml mw-list-item"><a href="https://ml.wikipedia.org/wiki/%E0%B4%85%E0%B4%A4%E0%B5%8D%E0%B4%B2%E0%B5%8B%E0%B5%BA" title="അത്ലോൺ – Malayalam" lang="ml" hreflang="ml" data-title="അത്ലോൺ" data-language-autonym="മലയാളം" data-language-local-name="Malayalam" class="interlanguage-link-target"><span>മലയാളം</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Athlon" title="Athlon – Dutch" lang="nl" hreflang="nl" data-title="Athlon" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Athlon" title="Athlon – Japanese" lang="ja" hreflang="ja" data-title="Athlon" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/Athlon" title="Athlon – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="Athlon" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/AMD_Athlon" title="AMD Athlon – Polish" lang="pl" hreflang="pl" data-title="AMD Athlon" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Athlon" title="Athlon – Portuguese" lang="pt" hreflang="pt" data-title="Athlon" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Athlon" title="Athlon – Russian" lang="ru" hreflang="ru" data-title="Athlon" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Athlon" title="Athlon – Slovak" lang="sk" hreflang="sk" data-title="Athlon" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/AMD_Athlon" title="AMD Athlon – Finnish" lang="fi" hreflang="fi" data-title="AMD Athlon" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Athlon" title="Athlon – Swedish" lang="sv" hreflang="sv" data-title="Athlon" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-ta mw-list-item"><a href="https://ta.wikipedia.org/wiki/%E0%AE%85%E0%AE%A4%E0%AF%8D%E0%AE%B2%E0%AF%8B%E0%AE%A9%E0%AF%8D" title="அத்லோன் – Tamil" lang="ta" hreflang="ta" data-title="அத்லோன்" data-language-autonym="தமிழ்" data-language-local-name="Tamil" class="interlanguage-link-target"><span>தமிழ்</span></a></li><li class="interlanguage-link interwiki-tr mw-list-item"><a href="https://tr.wikipedia.org/wiki/Athlon" title="Athlon – Turkish" lang="tr" hreflang="tr" data-title="Athlon" data-language-autonym="Türkçe" data-language-local-name="Turkish" class="interlanguage-link-target"><span>Türkçe</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/Athlon" title="Athlon – Ukrainian" lang="uk" hreflang="uk" data-title="Athlon" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/AMD_Athlon" title="AMD Athlon – Chinese" lang="zh" hreflang="zh" data-title="AMD Athlon" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a href="https://www.wikidata.org/wiki/Special:EntityPage/Q390562#sitelinks-wikipedia" title="Edit interlanguage links" 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data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">This article is about the microprocessors. For the sports magazine, see <a href="/wiki/Athlon_Sports" class="mw-redirect" title="Athlon Sports">Athlon Sports</a>. For the 2016 Marsheaux album, see <a href="/wiki/Ath.Lon" title="Ath.Lon">Ath.Lon</a>.</div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">Not to be confused with <a href="/wiki/Athlone" title="Athlone">Athlone</a>.</div> <p class="mw-empty-elt"> </p> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:AMD-Athlon-Processor-Logo.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/AMD-Athlon-Processor-Logo.svg/220px-AMD-Athlon-Processor-Logo.svg.png" decoding="async" width="220" height="221" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/AMD-Athlon-Processor-Logo.svg/330px-AMD-Athlon-Processor-Logo.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/83/AMD-Athlon-Processor-Logo.svg/440px-AMD-Athlon-Processor-Logo.svg.png 2x" data-file-width="659" data-file-height="663" /></a><figcaption>Original AMD Athlon logo</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Athlon_logo.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/en/thumb/f/f1/Athlon_logo.png/250px-Athlon_logo.png" decoding="async" width="220" height="123" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/f/f1/Athlon_logo.png/330px-Athlon_logo.png 1.5x, //upload.wikimedia.org/wikipedia/en/f/f1/Athlon_logo.png 2x" data-file-width="422" data-file-height="236" /></a><figcaption>Logo used since 2018 for Zen-based Athlon processors</figcaption></figure> <p><b>AMD Athlon</b> is the brand name applied to a series of <a href="/wiki/X86" title="X86">x86-compatible</a> <a href="/wiki/Microprocessor" title="Microprocessor">microprocessors</a> designed and manufactured by <a href="/wiki/AMD" title="AMD">Advanced Micro Devices</a>. The original Athlon (now called Athlon Classic) was the first seventh-generation x86 processor and the first desktop processor to reach speeds of one gigahertz (GHz). It made its debut as AMD's high-end processor brand on June&#160;23, 1999.<sup id="cite_ref-A_1-0" class="reference"><a href="#cite_note-A-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> Over the years AMD has used the Athlon name with the 64-bit <a href="/wiki/Athlon_64" title="Athlon 64">Athlon&#160;64</a> architecture, the <a href="/wiki/Athlon_II" title="Athlon II">Athlon II</a>, and <a href="/wiki/Accelerated_Processing_Unit" class="mw-redirect" title="Accelerated Processing Unit">Accelerated Processing Unit</a> (APU) chips targeting the <a href="/wiki/Socket_AM1" title="Socket AM1">Socket AM1</a> desktop <a href="/wiki/System_on_a_chip" title="System on a chip">SoC</a> architecture, and <a href="/wiki/Socket_AM4" title="Socket AM4">Socket&#160;AM4</a> <a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen (microarchitecture)</a>.<sup id="cite_ref-anandtech-20180906_2-0" class="reference"><a href="#cite_note-anandtech-20180906-2"><span class="cite-bracket">&#91;</span>2<span class="cite-bracket">&#93;</span></a></sup> The modern Zen-based Athlon with a <a href="/wiki/Radeon" title="Radeon">Radeon Graphics</a> processor was introduced in 2019 as AMD's highest-performance entry-level processor.<sup id="cite_ref-F_3-0" class="reference"><a href="#cite_note-F-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-C_4-0" class="reference"><a href="#cite_note-C-4"><span class="cite-bracket">&#91;</span>4<span class="cite-bracket">&#93;</span></a></sup> </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Brand_history">Brand history</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=1" title="Edit section: Brand history"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="K7_design_and_development">K7 design and development</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=2" title="Edit section: K7 design and development"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The first Athlon processor was a result of AMD's development of K7 processors in the 1990s. AMD founder and then-CEO <a href="/wiki/Jerry_Sanders_(businessman)" title="Jerry Sanders (businessman)">Jerry Sanders</a><sup id="cite_ref-HPCwire:_1998_5-0" class="reference"><a href="#cite_note-HPCwire:_1998-5"><span class="cite-bracket">&#91;</span>5<span class="cite-bracket">&#93;</span></a></sup> aggressively pursued strategic partnerships and engineering talent in the late 1990s, working to build on earlier successes in the PC market with the <a href="/wiki/AMD_K6" title="AMD K6">AMD K6</a> processor line.<sup id="cite_ref-Sanders_promotes:_1998_6-0" class="reference"><a href="#cite_note-Sanders_promotes:_1998-6"><span class="cite-bracket">&#91;</span>6<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-WSJ_by_Brammer:_2002_7-0" class="reference"><a href="#cite_note-WSJ_by_Brammer:_2002-7"><span class="cite-bracket">&#91;</span>7<span class="cite-bracket">&#93;</span></a></sup> One major partnership announced in 1998 paired AMD with semiconductor giant <a href="/wiki/Motorola" title="Motorola">Motorola</a><sup id="cite_ref-HPCwire:_1998_5-1" class="reference"><a href="#cite_note-HPCwire:_1998-5"><span class="cite-bracket">&#91;</span>5<span class="cite-bracket">&#93;</span></a></sup> to co-develop <a href="/wiki/Copper-based_chips" class="mw-redirect" title="Copper-based chips">copper-based semiconductor technology</a>, resulting in the K7 project being the first commercial processor to utilize copper <a href="/wiki/Semiconductor_device_fabrication#Back-end-of-line_.28BEOL.29_processing" title="Semiconductor device fabrication">fabrication technology</a>. In the announcement, Sanders referred to the partnership as creating a "virtual gorilla" that would enable AMD to compete with <a href="/wiki/Intel" title="Intel">Intel</a> on fabrication capacity while limiting AMD's financial outlay for new facilities.<sup id="cite_ref-HPCwire:_1998_5-2" class="reference"><a href="#cite_note-HPCwire:_1998-5"><span class="cite-bracket">&#91;</span>5<span class="cite-bracket">&#93;</span></a></sup> The K7 design team was led by <a href="/wiki/Dirk_Meyer" title="Dirk Meyer">Dirk Meyer</a>, who had previously worked as a lead engineer at <a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">DEC</a> on multiple <a href="/wiki/DEC_Alpha" title="DEC Alpha">Alpha</a> microprocessors. When DEC was sold to <a href="/wiki/Compaq" title="Compaq">Compaq</a> in 1998 and discontinued Alpha processor development, Sanders brought most of the Alpha design team to the K7 project.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (August 2020)">citation needed</span></a></i>&#93;</sup> This added to the previously acquired <a href="/wiki/NexGen" title="NexGen">NexGen</a> K6 team, which already included engineers such as <a href="/wiki/Vinod_Dham" title="Vinod Dham">Vinod Dham</a>.<sup id="cite_ref-TechSpot_and_Overview_8-0" class="reference"><a href="#cite_note-TechSpot_and_Overview-8"><span class="cite-bracket">&#91;</span>8<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Original_release">Original release</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=3" title="Edit section: Original release"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The AMD Athlon processor launched on June 23, 1999, with general availability by August 1999. Subsequently, from August 1999 until January 2002, this initial K7 processor was the fastest x86 chip in the world.<sup id="cite_ref-A_1-1" class="reference"><a href="#cite_note-A-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> Wrote the <i><a href="/wiki/Los_Angeles_Times" title="Los Angeles Times">Los Angeles Times</a></i> on October&#160;5, 1999: "AMD has historically trailed Intel’s fastest processors, but has overtaken the industry leader with the new Athlon. Analysts say the Athlon, which will be used by <a href="/wiki/Compaq" title="Compaq">Compaq</a>, <a href="/wiki/IBM" title="IBM">IBM</a> and other manufacturers in their most powerful PCs, is significantly faster than Intel’s flagship <a href="/wiki/Pentium_III" title="Pentium III">Pentium&#160;III</a>, which runs at a top speed of 600MHz."<sup id="cite_ref-LA_Times:_1999_9-0" class="reference"><a href="#cite_note-LA_Times:_1999-9"><span class="cite-bracket">&#91;</span>9<span class="cite-bracket">&#93;</span></a></sup> A number of features helped the chips compete with Intel. By working with Motorola, AMD had been able to refine copper interconnect manufacturing about one year before Intel, with the revised process permitting <a href="/wiki/180_nm" class="mw-redirect" title="180 nm">180-nanometer</a> processor production. The accompanying die-shrink resulted in lower power consumption, permitting AMD to increase Athlon clock speeds to the 1&#160;GHz range.<sup id="cite_ref-AMD_by_Press_Release:_2000_10-0" class="reference"><a href="#cite_note-AMD_by_Press_Release:_2000-10"><span class="cite-bracket">&#91;</span>10<span class="cite-bracket">&#93;</span></a></sup> The Athlon architecture also used the <a href="/wiki/Alpha_21264#External_interface" title="Alpha 21264">EV6</a> bus licensed from DEC as its main system bus, allowing AMD to develop its own products without needing to license Intel's <a href="/wiki/Gunning_transceiver_logic" title="Gunning transceiver logic">GTL+</a> bus.<sup id="cite_ref-Buses:_Mile_Beebee_11-0" class="reference"><a href="#cite_note-Buses:_Mile_Beebee-11"><span class="cite-bracket">&#91;</span>11<span class="cite-bracket">&#93;</span></a></sup> By the summer of 2000, AMD was shipping Athlons at high volume, and the chips were being used in systems by <a href="/wiki/Gateway,_Inc." title="Gateway, Inc.">Gateway</a>, <a href="/wiki/Hewlett-Packard" title="Hewlett-Packard">Hewlett-Packard</a>, and <a href="/wiki/Fujitsu_Siemens_Computers" title="Fujitsu Siemens Computers">Fujitsu Siemens Computers</a> among others.<sup id="cite_ref-Voume:_2000_12-0" class="reference"><a href="#cite_note-Voume:_2000-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Later_Athlon_iterations">Later Athlon iterations</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=4" title="Edit section: Later Athlon iterations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The second-generation Athlon, the Thunderbird, debuted in 2000. AMD released the Athlon&#160;XP the following year,<sup id="cite_ref-A_1-2" class="reference"><a href="#cite_note-A-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> and the Athlon&#160;XP's immediate successor, the <a href="/wiki/Athlon_64" title="Athlon 64">Athlon&#160;64</a>, was an AMD64-architecture microprocessor released in 2003.<sup id="cite_ref-AMD_Press:_2003_13-0" class="reference"><a href="#cite_note-AMD_Press:_2003-13"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup> After the 2007 launch of the <a href="/wiki/AMD_Phenom" title="AMD Phenom">Phenom</a> processors, the Athlon name was also used for mid-range processors, positioned above brands such as <a href="/wiki/Sempron" title="Sempron">Sempron</a>.<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">&#91;</span>14<span class="cite-bracket">&#93;</span></a></sup> The <a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">Athlon&#160;64&#160;X2</a> was released in 2005 as the first native dual-core desktop CPU designed by AMD,<sup id="cite_ref-The_Register_for_Athlon_54:_003_15-0" class="reference"><a href="#cite_note-The_Register_for_Athlon_54:_003-15"><span class="cite-bracket">&#91;</span>15<span class="cite-bracket">&#93;</span></a></sup> and the <a href="/wiki/Athlon_X2" class="mw-redirect" title="Athlon X2">Athlon&#160;X2</a> was a subsequent family based on the Athlon&#160;64&#160;X2.<sup id="cite_ref-HotHardware_16-0" class="reference"><a href="#cite_note-HotHardware-16"><span class="cite-bracket">&#91;</span>16<span class="cite-bracket">&#93;</span></a></sup> Introduced in 2009, <a href="/wiki/Athlon_II" title="Athlon II">Athlon&#160;II</a> was a dual-core family of Athlon chips.<sup id="cite_ref-Regor:_2009_17-0" class="reference"><a href="#cite_note-Regor:_2009-17"><span class="cite-bracket">&#91;</span>17<span class="cite-bracket">&#93;</span></a></sup> </p><p>A USD$55 low-power Athlon 200GE with a <a href="/wiki/Radeon" title="Radeon">Radeon</a> graphics processor was introduced in September 2018, sitting under the <a href="/wiki/Ryzen_3" class="mw-redirect" title="Ryzen 3">Ryzen&#160;3</a> 2200G.<sup id="cite_ref-anandtech-20180906_2-1" class="reference"><a href="#cite_note-anandtech-20180906-2"><span class="cite-bracket">&#91;</span>2<span class="cite-bracket">&#93;</span></a></sup> This iteration of Athlon used AMD's Zen-based <i>Raven Ridge</i> core, which in turn had debuted in Ryzen with Radeon graphics processors.<sup id="cite_ref-Again_for_Anadtech:_2018_18-0" class="reference"><a href="#cite_note-Again_for_Anadtech:_2018-18"><span class="cite-bracket">&#91;</span>18<span class="cite-bracket">&#93;</span></a></sup> With the release, AMD began using the Athlon brand name to refer to "low-cost, high-volume products", in a situation similar to both Intel's <a href="/wiki/Celeron" title="Celeron">Celeron</a> and Pentium Gold.<sup id="cite_ref-anandtech-20180906_2-2" class="reference"><a href="#cite_note-anandtech-20180906-2"><span class="cite-bracket">&#91;</span>2<span class="cite-bracket">&#93;</span></a></sup> The modern Athlon 3000G was introduced in 2019 and was positioned as AMD's highest-performance entry-level processor.<sup id="cite_ref-F_3-1" class="reference"><a href="#cite_note-F-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup> AMD positions the Athlon against its rival, the <a href="/wiki/Intel_Pentium" class="mw-redirect" title="Intel Pentium">Intel Pentium</a>. While CPU processing performance is in the same ballpark,<sup id="cite_ref-Tom&#39;s_Hardware_and_Carbotte:_2019_19-0" class="reference"><a href="#cite_note-Tom&#39;s_Hardware_and_Carbotte:_2019-19"><span class="cite-bracket">&#91;</span>19<span class="cite-bracket">&#93;</span></a></sup> the Athlon 3000G uses <a href="/wiki/Radeon_RX_Vega_series" title="Radeon RX Vega series">Radeon Vega</a> graphics,<sup id="cite_ref-F_3-2" class="reference"><a href="#cite_note-F-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup> which are rated as more powerful than the Pentium's <a href="/wiki/Intel_UHD_Graphics" class="mw-redirect" title="Intel UHD Graphics">Intel UHD Graphics</a>.<sup id="cite_ref-Tom&#39;s_Hardware_and_Carbotte:_2019_19-1" class="reference"><a href="#cite_note-Tom&#39;s_Hardware_and_Carbotte:_2019-19"><span class="cite-bracket">&#91;</span>19<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Generations">Generations</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=5" title="Edit section: Generations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/List_of_AMD_Athlon_processors" title="List of AMD Athlon processors">List of AMD&#160;Athlon&#160;processors</a></div> <div class="mw-heading mw-heading3"><h3 id="Athlon_Classic_(1999)"><span id="Athlon_Classic_.281999.29"></span>Athlon&#160;Classic (1999)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=6" title="Edit section: Athlon&#160;Classic (1999)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title">&#160;Athlon&#160;Classic</caption><tbody><tr><td colspan="2" class="infobox-image"><span class="mw-default-size" typeof="mw:File/Frameless"><a href="/wiki/File:AMD-Athlon-Processor-Logo.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/AMD-Athlon-Processor-Logo.svg/220px-AMD-Athlon-Processor-Logo.svg.png" decoding="async" width="220" height="221" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/AMD-Athlon-Processor-Logo.svg/330px-AMD-Athlon-Processor-Logo.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/83/AMD-Athlon-Processor-Logo.svg/440px-AMD-Athlon-Processor-Logo.svg.png 2x" data-file-width="659" data-file-height="663" /></a></span><div class="infobox-caption">The logo of the&#160;Athlon&#160;"Classic"</div></td></tr><tr><th colspan="2" class="infobox-header">General information</th></tr><tr><th scope="row" class="infobox-label">Launched</th><td class="infobox-data">June 23, 1999</td></tr><tr><th scope="row" class="infobox-label">Common manufacturer</th><td class="infobox-data"><style data-mw-deduplicate="TemplateStyles:r1126788409">.mw-parser-output .plainlist ol,.mw-parser-output .plainlist ul{line-height:inherit;list-style:none;margin:0;padding:0}.mw-parser-output .plainlist ol li,.mw-parser-output .plainlist ul li{margin-bottom:0}</style><div class="plainlist"><ul><li>AMD &#160; &#160;</li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Performance</th></tr><tr><th scope="row" class="infobox-label">Max. <a href="/wiki/Central_processing_unit" title="Central processing unit">CPU</a> <a href="/wiki/Clock_rate" title="Clock rate">clock rate</a></th><td class="infobox-data">500&#160;MHz to 1400&#160;MHz</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Front-side_bus" title="Front-side bus">FSB</a> speeds</th><td class="infobox-data">100&#160;Mhz to 133&#160;Mhz</td></tr><tr><th colspan="2" class="infobox-header">Architecture and classification</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Technology_node" class="mw-redirect" title="Technology node">Technology&#160;node</a></th><td class="infobox-data">250 nm to 180 nm</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction&#160;set</a></th><td class="infobox-data"><a href="/wiki/X86" title="X86">x86</a></td></tr><tr><th colspan="2" class="infobox-header">Physical specifications</th></tr><tr><th scope="row" class="infobox-label">Sockets</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409" /><div class="plainlist"><ul><li><a href="/wiki/Slot_A" title="Slot A">Slot A</a></li><li><a href="/wiki/Socket_A" title="Socket A">Socket A</a></li><li><a href="/wiki/Socket_563" title="Socket 563">Socket 563</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Products, models, variants</th></tr><tr><th scope="row" class="infobox-label">Core&#160;names</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409" /><div class="plainlist"><ul><li>Argon (K7)</li><li>Pluto/Orion (K75)</li><li>Thunderbird</li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">History</th></tr><tr><th scope="row" class="infobox-label">Predecessor</th><td class="infobox-data"><a href="/wiki/AMD_K6-III" title="AMD K6-III">K6-III</a></td></tr><tr><th scope="row" class="infobox-label">Successor</th><td class="infobox-data"><a href="/wiki/Athlon_XP" class="mw-redirect" title="Athlon XP">Athlon&#160;XP</a></td></tr></tbody></table> <p>The AMD&#160;Athlon&#160;processor launched on June 23, 1999, with general availability by August 1999. Subsequently, from August 1999 until January 2002, this initial K7 processor was the fastest x86 chip in the world.<sup id="cite_ref-A_1-3" class="reference"><a href="#cite_note-A-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> At launch it was, on average, 10% faster than the Pentium&#160;III at the same clock for business applications and 20% faster for gaming workloads.<sup id="cite_ref-Shimpy_for_AnadTech:_1999_20-0" class="reference"><a href="#cite_note-Shimpy_for_AnadTech:_1999-20"><span class="cite-bracket">&#91;</span>20<span class="cite-bracket">&#93;</span></a></sup> In commercial terms, the Athlon "Classic" was an enormous success.<sup id="cite_ref-Anandtech_Heaven:_2001_21-0" class="reference"><a href="#cite_note-Anandtech_Heaven:_2001-21"><span class="cite-bracket">&#91;</span>21<span class="cite-bracket">&#93;</span></a></sup> </p> <dl><dt>Features</dt></dl> <figure class="mw-default-size mw-halign-left" typeof="mw:File/Thumb"><a href="/wiki/File:Amd_athlon_classic.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/c/c3/Amd_athlon_classic.jpg/220px-Amd_athlon_classic.jpg" decoding="async" width="220" height="131" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/c/c3/Amd_athlon_classic.jpg/330px-Amd_athlon_classic.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/c/c3/Amd_athlon_classic.jpg/440px-Amd_athlon_classic.jpg 2x" data-file-width="1825" data-file-height="1086" /></a><figcaption>Logo on Slot A&#160;Athlon&#160;cartridge</figcaption></figure> <p>The&#160;Athlon&#160;Classic is a cartridge-based processor, named <a href="/wiki/Slot_A" title="Slot A">Slot&#160;A</a> and similar to Intel's cartridge <a href="/wiki/Slot_1" title="Slot 1">Slot&#160;1</a> used for Pentium&#160;II and Pentium&#160;III. It used the same, commonly available, physical 242-pin connector used by Intel Slot&#160;1 processors but rotated by 180&#160;degrees to connect the processor to the <a href="/wiki/Motherboard" title="Motherboard">motherboard</a>. The cartridge assembly allowed the use of higher-speed cache memory modules than could be put on (or reasonably bundled with) motherboards at the time. Similar to the Pentium&#160;II and the Katmai-based Pentium&#160;III, the&#160;Athlon&#160;Classic contained 512&#160;KB of L2 cache. This high-speed <a href="/wiki/Static_random-access_memory" title="Static random-access memory">SRAM</a> cache was run at a divisor of the processor clock and was accessed via its own 64-bit <a href="/wiki/Back-side_bus" title="Back-side bus">back-side bus</a>, allowing the processor to service both <a href="/wiki/Front-side_bus" title="Front-side bus">front-side bus</a> requests and cache accesses simultaneously, as compared to pushing everything through the front-side bus.<sup id="cite_ref-Aces_Hrdware_by_Gels:_1999_22-0" class="reference"><a href="#cite_note-Aces_Hrdware_by_Gels:_1999-22"><span class="cite-bracket">&#91;</span>22<span class="cite-bracket">&#93;</span></a></sup> </p><p>The Argon-based&#160;Athlon&#160;contained 22 million transistors and measured 184&#160;mm<sup>2</sup>. It was fabricated by AMD in a version of their CS44E process, a 250&#160;nm <a href="/wiki/Complementary_metal%E2%80%93oxide%E2%80%93semiconductor" class="mw-redirect" title="Complementary metal–oxide–semiconductor">complementary metal–oxide–semiconductor</a> (CMOS) process with six levels of <a href="/wiki/Aluminium_interconnect" class="mw-redirect" title="Aluminium interconnect">aluminium interconnect</a>.<sup id="cite_ref-JSSC-1999-11-11_23-0" class="reference"><a href="#cite_note-JSSC-1999-11-11-23"><span class="cite-bracket">&#91;</span>23<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-MPR-1998-10-26_24-0" class="reference"><a href="#cite_note-MPR-1998-10-26-24"><span class="cite-bracket">&#91;</span>24<span class="cite-bracket">&#93;</span></a></sup> "Pluto" and "Orion" Athlons were fabricated in a 180&#160;nm process.<sup id="cite_ref-PC_Hardware_in_a_Nuthshell_25-0" class="reference"><a href="#cite_note-PC_Hardware_in_a_Nuthshell-25"><span class="cite-bracket">&#91;</span>25<span class="cite-bracket">&#93;</span></a></sup> </p> <figure class="mw-halign-left" typeof="mw:File/Thumb"><a href="/wiki/File:Athlon_arch.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/6a/Athlon_arch.png/350px-Athlon_arch.png" decoding="async" width="350" height="250" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/6a/Athlon_arch.png/525px-Athlon_arch.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/6a/Athlon_arch.png/700px-Athlon_arch.png 2x" data-file-width="1348" data-file-height="963" /></a><figcaption>Athlon&#160;architecture</figcaption></figure> <figure typeof="mw:File/Thumb"><a href="/wiki/File:Slot-A_Athlon.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/e7/Slot-A_Athlon.jpg/250px-Slot-A_Athlon.jpg" decoding="async" width="250" height="115" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/e7/Slot-A_Athlon.jpg/375px-Slot-A_Athlon.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/e7/Slot-A_Athlon.jpg/500px-Slot-A_Athlon.jpg 2x" data-file-width="1286" data-file-height="592" /></a><figcaption>An open Slot A cartridge. MPU die is in the center.</figcaption></figure> <figure typeof="mw:File/Thumb"><a href="/wiki/File:Argonathlon.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/3a/Argonathlon.jpg/250px-Argonathlon.jpg" decoding="async" width="250" height="153" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/3a/Argonathlon.jpg/375px-Argonathlon.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/3a/Argonathlon.jpg/500px-Argonathlon.jpg 2x" data-file-width="800" data-file-height="490" /></a><figcaption>Athlon&#160;Slot A cartridge. Note heat sink and cooling fan assembly on rear side.</figcaption></figure> <p>The Athlon's <a href="/wiki/CPU_cache" title="CPU cache">CPU cache</a> consisted of the typical two levels. Athlon was the first x86 processor with a 128&#160;<a href="/wiki/Kilobyte" title="Kilobyte">KB</a><sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">&#91;</span>26<span class="cite-bracket">&#93;</span></a></sup> split level-1 cache; a <a href="/wiki/CPU_cache" title="CPU cache">2-way associative</a> cache separated into 2×64&#160;KB for data and instructions (a concept from <a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard architecture</a>).<sup id="cite_ref-PaulHsieh_27-0" class="reference"><a href="#cite_note-PaulHsieh-27"><span class="cite-bracket">&#91;</span>27<span class="cite-bracket">&#93;</span></a></sup> SRAM cache designs at the time were incapable of keeping up with the&#160;Athlon's clock scalability, resulting in compromised CPU performance in some computers.<sup id="cite_ref-Anandtech_again:_2000_28-0" class="reference"><a href="#cite_note-Anandtech_again:_2000-28"><span class="cite-bracket">&#91;</span>28<span class="cite-bracket">&#93;</span></a></sup> With later&#160;Athlon&#160;models, AMD would integrate the L2 cache onto the processor itself, removing dependence on external cache chips.<sup id="cite_ref-PC_Hardware_in_a_Nuthshell_25-1" class="reference"><a href="#cite_note-PC_Hardware_in_a_Nuthshell-25"><span class="cite-bracket">&#91;</span>25<span class="cite-bracket">&#93;</span></a></sup> The Slot-A&#160;Athlons&#160;were the first multiplier-locked CPUs from AMD, preventing users from setting their own desired clock speed. This was done by AMD in part to hinder CPU remarking and overclocking by resellers, which could result in inconsistent performance. Eventually a product called the "Goldfingers device" was created that could unlock the CPU.<sup id="cite_ref-Overclockers:_2000_29-0" class="reference"><a href="#cite_note-Overclockers:_2000-29"><span class="cite-bracket">&#91;</span>29<span class="cite-bracket">&#93;</span></a></sup> </p><p>AMD designed the CPU with more robust x86 instruction decoding capabilities than that of K6, to enhance its ability to keep more data in-flight at once.<sup id="cite_ref-PaulHsieh_27-1" class="reference"><a href="#cite_note-PaulHsieh-27"><span class="cite-bracket">&#91;</span>27<span class="cite-bracket">&#93;</span></a></sup> The critical branch-predictor unit was enhanced compared to the K6. Deeper pipelining with more stages allowed higher clock speeds to be attained.<sup id="cite_ref-De_Gelas:_2001_30-0" class="reference"><a href="#cite_note-De_Gelas:_2001-30"><span class="cite-bracket">&#91;</span>30<span class="cite-bracket">&#93;</span></a></sup> Like the AMD K5 and K6, the&#160;Athlon&#160;dynamically buffered internal micro-instructions at runtime resulting from parallel x86 instruction decoding. The CPU is an <a href="/wiki/Out-of-order_execution" title="Out-of-order execution">out-of-order</a> design, again like previous post-5x86 AMD CPUs. The&#160;Athlon&#160;utilizes the <a href="/wiki/Alpha_21264" title="Alpha 21264">Alpha 21264</a>'s EV6 bus architecture with <a href="/wiki/Double_data_rate" title="Double data rate">double data rate</a> (DDR) technology.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (August 2020)">citation needed</span></a></i>&#93;</sup> </p><p>AMD ended its long-time handicap with <a href="/wiki/Floating_point" class="mw-redirect" title="Floating point">floating point</a> <a href="/wiki/X87" title="X87">x87</a> performance by designing a super-<a href="/wiki/Pipeline_(computing)" title="Pipeline (computing)">pipelined</a>, out-of-order, triple-issue <a href="/wiki/Floating-point_unit" title="Floating-point unit">floating-point unit</a> (FPU).<sup id="cite_ref-PaulHsieh_27-2" class="reference"><a href="#cite_note-PaulHsieh-27"><span class="cite-bracket">&#91;</span>27<span class="cite-bracket">&#93;</span></a></sup> Each of its three units could independently calculate an optimal type of instructions with some redundancy, making it possible to operate on more than one floating-point instruction at once.<sup id="cite_ref-PaulHsieh_27-3" class="reference"><a href="#cite_note-PaulHsieh-27"><span class="cite-bracket">&#91;</span>27<span class="cite-bracket">&#93;</span></a></sup> This FPU was a huge step forward for AMD, helping compete with Intel's <a href="/wiki/P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a> FPU.<sup id="cite_ref-Pabst_for_Toms:_1999_31-0" class="reference"><a href="#cite_note-Pabst_for_Toms:_1999-31"><span class="cite-bracket">&#91;</span>31<span class="cite-bracket">&#93;</span></a></sup> The <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a> floating-point <a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> technology, again present, received some revisions and was renamed "Enhanced 3DNow!" Additions included <a href="/wiki/Digital_signal_processing" title="Digital signal processing">DSP</a> instructions and the <a href="/wiki/Extended_MMX" title="Extended MMX">extended MMX</a> subset of <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">Intel&#160;SSE</a>.<sup id="cite_ref-Womack_for_Womack:_2012_32-0" class="reference"><a href="#cite_note-Womack_for_Womack:_2012-32"><span class="cite-bracket">&#91;</span>32<span class="cite-bracket">&#93;</span></a></sup> </p> <dl><dt>Specifications</dt></dl> <ul><li>L1-cache: 64 + 64&#160;KB (data + instructions)</li> <li>L2-cache: 512&#160;KB, external chips on CPU module with 50%, 40% or 33% of CPU speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a></li> <li><a href="/wiki/Slot_A" title="Slot A">Slot A</a> (EV6)</li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a>:100&#160;MHz (200MT/s)</li> <li>Vcore: 1.6&#160;V (K7), 1.6–1.8&#160;V (K75)</li> <li>First release: June 23, 1999 (K7), November 29, 1999 (K75)</li> <li>Clock-rate: 500–700&#160;MHz (K7), 550–1000&#160;MHz (K75)</li></ul> <div class="mw-heading mw-heading3"><h3 id="Athlon_Thunderbird_(2000–2001)"><span id="Athlon_Thunderbird_.282000.E2.80.932001.29"></span>Athlon&#160;Thunderbird (2000–2001)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=7" title="Edit section: Athlon&#160;Thunderbird (2000–2001)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:KL_AMD_Athlon_XP_Thunderbird.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/df/KL_AMD_Athlon_XP_Thunderbird.jpg/150px-KL_AMD_Athlon_XP_Thunderbird.jpg" decoding="async" width="150" height="149" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/df/KL_AMD_Athlon_XP_Thunderbird.jpg/225px-KL_AMD_Athlon_XP_Thunderbird.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/df/KL_AMD_Athlon_XP_Thunderbird.jpg/300px-KL_AMD_Athlon_XP_Thunderbird.jpg 2x" data-file-width="1200" data-file-height="1194" /></a><figcaption>Athlon "Thunderbird"</figcaption></figure> <p>The second-generation&#160;Athlon, the <b>Thunderbird</b> or <b>T-Bird</b>, debuted on June&#160;4, 2000.<sup id="cite_ref-A_1-4" class="reference"><a href="#cite_note-A-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> This version of the&#160;Athlon&#160;was available in a traditional <a href="/wiki/Pin_grid_array" title="Pin grid array">pin-grid array</a> (PGA) format that plugged into a socket ("<a href="/wiki/Socket_A" title="Socket A">Socket&#160;A</a>") on the motherboard, or packaged as a Slot&#160;A cartridge. The major difference between it and the&#160;Athlon&#160;Classic was cache design, with AMD adding in 256&#160;KB of on-chip, full-speed exclusive cache.<sup id="cite_ref-SandpileK7_33-0" class="reference"><a href="#cite_note-SandpileK7-33"><span class="cite-bracket">&#91;</span>33<span class="cite-bracket">&#93;</span></a></sup> In moving to an <a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">exclusive cache design</a>, the L1 cache's contents were not duplicated in the L2, increasing total cache size and functionally creating a large L1 cache with a slower region (the L2) and a fast region (the L1),<sup id="cite_ref-Ares_for_Ares_Technica:_2005_34-0" class="reference"><a href="#cite_note-Ares_for_Ares_Technica:_2005-34"><span class="cite-bracket">&#91;</span>34<span class="cite-bracket">&#93;</span></a></sup> making the L2 cache into basically a <a href="/wiki/CPU_cache#Victim_cache" title="CPU cache">victim cache</a>. With the new cache design, need for high L2 performance and size was lessened, and the simpler L2 cache was less likely to cause clock scaling and yield issues. Thunderbird also moved to a <a href="/wiki/CPU_cache#Associativity" title="CPU cache">16-way associative</a> layout.<sup id="cite_ref-SandpileK7_33-1" class="reference"><a href="#cite_note-SandpileK7-33"><span class="cite-bracket">&#91;</span>33<span class="cite-bracket">&#93;</span></a></sup> </p><p>The Thunderbird was "cherished by many for its overclockability" and proved commercially successful,<sup id="cite_ref-TechSpot_and_Overview_8-1" class="reference"><a href="#cite_note-TechSpot_and_Overview-8"><span class="cite-bracket">&#91;</span>8<span class="cite-bracket">&#93;</span></a></sup> as AMD's most successful product since the <a href="/wiki/Am386" title="Am386">Am386DX-40</a> ten years earlier.<sup id="cite_ref-35" class="reference"><a href="#cite_note-35"><span class="cite-bracket">&#91;</span>35<span class="cite-bracket">&#93;</span></a></sup> AMD's new <a href="/wiki/Semiconductor_fabrication_plant" title="Semiconductor fabrication plant">fab</a> facility in <a href="/wiki/Dresden" title="Dresden">Dresden</a> increased production for AMD overall and put out Thunderbirds at a fast rate, with the process technology improved by a switch to copper interconnects.<sup id="cite_ref-EEtimes_and_Robertson:_in_2000_36-0" class="reference"><a href="#cite_note-EEtimes_and_Robertson:_in_2000-36"><span class="cite-bracket">&#91;</span>36<span class="cite-bracket">&#93;</span></a></sup> After several versions were released in 2000 and 2001 of the Thunderbird, the last&#160;Athlon&#160;processor using the Thunderbird core was released in 2001 in the summer, at which point speeds were at 1.4&#160;GHz.<sup id="cite_ref-A_1-5" class="reference"><a href="#cite_note-A-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> </p> <figure class="mw-halign-left" typeof="mw:File/Thumb"><a href="/wiki/File:Athlon_Tbird_900_slot_A.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/4/4e/Athlon_Tbird_900_slot_A.jpg/250px-Athlon_Tbird_900_slot_A.jpg" decoding="async" width="250" height="116" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/4/4e/Athlon_Tbird_900_slot_A.jpg/375px-Athlon_Tbird_900_slot_A.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/4/4e/Athlon_Tbird_900_slot_A.jpg/500px-Athlon_Tbird_900_slot_A.jpg 2x" data-file-width="529" data-file-height="245" /></a><figcaption>Open Athlon Thunderbird Slot&#160;A cartridge</figcaption></figure> <dl><dt>Specifications</dt></dl> <ul><li>L1-cache: 64 + 64&#160;KB (data + instructions)</li> <li>L2-cache: 256&#160;KB, full speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a></li> <li><a href="/wiki/Slot_A" title="Slot A">Slot A</a> &amp; <a href="/wiki/Socket_A" title="Socket A">Socket A</a> (EV6)</li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a>: 100&#160;MHz (Slot-A, B-models), 133&#160;MHz (C-models) (200&#160;MT/s, 266&#160;MT/s)</li> <li>Vcore: 1.70–1.75&#160;V</li> <li>First release: June 4, 2000</li> <li>Transistor count: 37 million</li> <li>Manufacturing process: /180&#160;nm</li> <li>Clock rate: <ul><li><a href="/wiki/Slot_A" title="Slot A">Slot A</a>: 650–1000&#160;MHz</li> <li><a href="/wiki/Socket_A" title="Socket A">Socket A</a>, 100&#160;MHz FSB (B-models): 600–1400&#160;MHz</li> <li><a href="/wiki/Socket_A" title="Socket A">Socket A</a>, 133&#160;MHz FSB (C-models): 1000–1400&#160;MHz</li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Athlon_XP_(2001–2003)"><span id="Athlon_XP_.282001.E2.80.932003.29"></span><span id="Athlon_XP/MP"></span>Athlon&#160;XP (2001–2003)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=8" title="Edit section: Athlon&#160;XP (2001–2003)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/List_of_AMD_Athlon_XP_processors" title="List of AMD Athlon XP processors">List of AMD&#160;Athlon&#160;XP processors</a></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1257001546" /><table class="infobox"><caption class="infobox-title">AMD Athon XP</caption><tbody><tr><td colspan="2" class="infobox-image"><span class="mw-default-size" typeof="mw:File/Frameless"><a href="/wiki/File:AMD_Athlon_XP_Logo.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/4/45/AMD_Athlon_XP_Logo.jpg/250px-AMD_Athlon_XP_Logo.jpg" decoding="async" width="220" height="220" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/4/45/AMD_Athlon_XP_Logo.jpg 1.5x" data-file-width="290" data-file-height="290" /></a></span><div class="infobox-caption">AMD&#160;Athlon&#160;logo used for Athlon XP</div></td></tr><tr><th colspan="2" class="infobox-header">General information</th></tr><tr><th scope="row" class="infobox-label">Launched</th><td class="infobox-data">October 9, 2001</td></tr><tr><th scope="row" class="infobox-label">Marketed by</th><td class="infobox-data">AMD</td></tr><tr><th scope="row" class="infobox-label">Designed by</th><td class="infobox-data">AMD</td></tr><tr><th scope="row" class="infobox-label">Common manufacturer</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409" /><div class="plainlist"><ul><li>AMD</li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Performance</th></tr><tr><th scope="row" class="infobox-label">Max. <a href="/wiki/Central_processing_unit" title="Central processing unit">CPU</a> <a href="/wiki/Clock_rate" title="Clock rate">clock rate</a></th><td class="infobox-data">850&#160;MHz to 2333&#160;Mhz</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Front-side_bus" title="Front-side bus">FSB</a> speeds</th><td class="infobox-data">266&#160;MT/s to 400&#160;MT/s</td></tr><tr><th colspan="2" class="infobox-header">Architecture and classification</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Technology_node" class="mw-redirect" title="Technology node">Technology&#160;node</a></th><td class="infobox-data">180 nm to 130 nm</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></th><td class="infobox-data">K7</td></tr><tr><th colspan="2" class="infobox-header">Physical specifications</th></tr><tr><th scope="row" class="infobox-label">Socket</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409" /><div class="plainlist"><ul><li>Socket A</li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Products, models, variants</th></tr><tr><th scope="row" class="infobox-label">Core&#160;name</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409" /><div class="plainlist"><ul><li><i>Palomino</i><br /><i>Thoroughbred</i><br /><i>Thorton</i><br /><i>Barton</i><br /><i>Corvette</i><br /><i>Dublin</i></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">History</th></tr><tr><th scope="row" class="infobox-label">Predecessor</th><td class="infobox-data">Athlon Thunderbird</td></tr><tr><th scope="row" class="infobox-label">Successor</th><td class="infobox-data"><a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a></td></tr></tbody></table> <p>Overall, there are four main variants of the&#160;Athlon&#160;XP desktop CPU: the <i>Palomino</i>, the <i>Thoroughbred</i>, the <i>Thorton</i>, and the <i>Barton</i>. A number of mobile processors were also released, including the <i>Corvette</i> models, and the <i>Dublin</i> model among others. </p> <div class="mw-heading mw-heading4"><h4 id="Palomino"><i>Palomino</i></h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=9" title="Edit section: Palomino"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-left" typeof="mw:File/Thumb"><a href="/wiki/File:KL_AMD_Athlon_XP_Palomino.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/7/7c/KL_AMD_Athlon_XP_Palomino.jpg/250px-KL_AMD_Athlon_XP_Palomino.jpg" decoding="async" width="150" height="151" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/7/7c/KL_AMD_Athlon_XP_Palomino.jpg/330px-KL_AMD_Athlon_XP_Palomino.jpg 2x" data-file-width="1497" data-file-height="1503" /></a><figcaption>Athlon&#160;XP "Palomino" 2000+</figcaption></figure> <p>On May 14, 2001, AMD released the <b>Athlon&#160;XP</b> processor. It debuted as the <b>Mobile&#160;Athlon&#160;4</b>, a mobile version codenamed <i>Corvette</i>, with the desktop&#160;Athlon&#160;XP released in the fall.<sup id="cite_ref-A_1-6" class="reference"><a href="#cite_note-A-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> The third-generation&#160;Athlon, code-named <i>Palomino</i>, came out on October&#160;9, 2001, as the&#160;Athlon&#160;XP, with the suffix signifying <i>extreme performance</i> and unofficially referencing <a href="/wiki/Windows_XP" title="Windows XP">Windows&#160;XP</a>.<sup id="cite_ref-AMD_for_AMD:_2007_37-0" class="reference"><a href="#cite_note-AMD_for_AMD:_2007-37"><span class="cite-bracket">&#91;</span>37<span class="cite-bracket">&#93;</span></a></sup> <i>Palomino's</i> design used 180&#160;nm fabrication process size.<sup id="cite_ref-PC_Hardware_in_a_Nuthshell_25-2" class="reference"><a href="#cite_note-PC_Hardware_in_a_Nuthshell-25"><span class="cite-bracket">&#91;</span>25<span class="cite-bracket">&#93;</span></a></sup> The&#160;Athlon&#160;XP was marketed using a <a href="/wiki/Performance_Rating" title="Performance Rating">performance rating</a> (PR) system comparing it to the Thunderbird predecessor core.<sup id="cite_ref-Wasson_for_Tech_Report:_2001_38-0" class="reference"><a href="#cite_note-Wasson_for_Tech_Report:_2001-38"><span class="cite-bracket">&#91;</span>38<span class="cite-bracket">&#93;</span></a></sup> Among other changes, <i>Palomino</i> consumed 20% less power than the Thunderbird, comparatively reducing heat output,<sup id="cite_ref-Wasson_for_Tech_Report_Again:_2001_39-0" class="reference"><a href="#cite_note-Wasson_for_Tech_Report_Again:_2001-39"><span class="cite-bracket">&#91;</span>39<span class="cite-bracket">&#93;</span></a></sup> and was roughly 10% faster than Thunderbird. <i>Palomino</i> also had enhanced K7's <a href="/wiki/Translation_lookaside_buffer" title="Translation lookaside buffer">TLB</a> architecture and included a hardware data <a href="/wiki/Instruction_prefetch" class="mw-redirect" title="Instruction prefetch">prefetch</a> mechanism to take better advantage of memory bandwidth. <i>Palomino</i> was the first K7 core to include the full <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a> instruction set from the Intel Pentium&#160;III, as well as AMD's <a href="/wiki/3DNow!" title="3DNow!">3DNow! Professional</a>.<sup id="cite_ref-Athlon4Anand_40-0" class="reference"><a href="#cite_note-Athlon4Anand-40"><span class="cite-bracket">&#91;</span>40<span class="cite-bracket">&#93;</span></a></sup> <i>Palomino</i> was also the first socketed&#160;Athlon&#160;officially supporting dual processing, with chips certified for that purpose branded as the <b>Athlon&#160;MP</b> (multi processing),<sup id="cite_ref-Anandtech_Heaven:_2001_21-1" class="reference"><a href="#cite_note-Anandtech_Heaven:_2001-21"><span class="cite-bracket">&#91;</span>21<span class="cite-bracket">&#93;</span></a></sup> which had different specifications.<sup id="cite_ref-AMD_KY:_Year_2005?_41-0" class="reference"><a href="#cite_note-AMD_KY:_Year_2005?-41"><span class="cite-bracket">&#91;</span>41<span class="cite-bracket">&#93;</span></a></sup> According to <a href="/wiki/HardwareZone" title="HardwareZone">HardwareZone</a>, it was possible to modify the&#160;Athlon&#160;XP to function as an MP.<sup id="cite_ref-HW_Zone:_Modding_42-0" class="reference"><a href="#cite_note-HW_Zone:_Modding-42"><span class="cite-bracket">&#91;</span>42<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-HW_Zone_2:_Modding_Barton_43-0" class="reference"><a href="#cite_note-HW_Zone_2:_Modding_Barton-43"><span class="cite-bracket">&#91;</span>43<span class="cite-bracket">&#93;</span></a></sup> </p> <dl><dt>Specifications</dt></dl> <ul><li>L1-cache: 64 + 64&#160;KB (data + instructions)</li> <li>L2-cache: 256&#160;KB, full speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a></li> <li><a href="/wiki/Socket_A" title="Socket A">Socket A</a> (EV6)</li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a>: 133&#160;MHz (266&#160;MT/s)</li> <li>Vcore: 1.50 to 1.75&#160;V</li> <li>Power consumption: 68&#160;W</li> <li>First release: October 9, 2001</li> <li>Clock-rate: <ul><li>Athlon 4: 850–1400&#160;MHz</li> <li>Athlon XP: 1333–1733&#160;MHz (1500+ to 2100+)</li> <li>Athlon MP: 1000–1733&#160;MHz</li></ul></li></ul> <div class="mw-heading mw-heading4"><h4 id="Thoroughbred"><i>Thoroughbred</i></h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=10" title="Edit section: Thoroughbred"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:KL_AMD_Athlon_XP_Thoroughbred.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/dc/KL_AMD_Athlon_XP_Thoroughbred.jpg/250px-KL_AMD_Athlon_XP_Thoroughbred.jpg" decoding="async" width="150" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/dc/KL_AMD_Athlon_XP_Thoroughbred.jpg/330px-KL_AMD_Athlon_XP_Thoroughbred.jpg 2x" data-file-width="1500" data-file-height="1500" /></a><figcaption>Athlon XP "Thoroughbred B" 2400+</figcaption></figure> <p>The fourth-generation of&#160;Athlon&#160;was introduced with the <i>Thoroughbred</i> core, or <i>T-Bred</i>, on April&#160;17, 2002.<sup id="cite_ref-TbredCoreStep_44-0" class="reference"><a href="#cite_note-TbredCoreStep-44"><span class="cite-bracket">&#91;</span>44<span class="cite-bracket">&#93;</span></a></sup> The <i>Thoroughbred</i> core marked AMD's first production 130&#160;nm silicon, with smaller die size than its predecessor.<sup id="cite_ref-PC_Hardware_in_a_Nuthshell_25-3" class="reference"><a href="#cite_note-PC_Hardware_in_a_Nuthshell-25"><span class="cite-bracket">&#91;</span>25<span class="cite-bracket">&#93;</span></a></sup> There came to be two <a href="/wiki/Stepping_level" title="Stepping level">steppings</a> (revisions) of this core commonly referred to as <i>Tbred-A</i> and <i>Tbred-B</i>.<sup id="cite_ref-TbredCoreStep_44-1" class="reference"><a href="#cite_note-TbredCoreStep-44"><span class="cite-bracket">&#91;</span>44<span class="cite-bracket">&#93;</span></a></sup> Introduced in June 2002, the initial A&#160;version was mostly a direct <a href="/wiki/Die_shrink" title="Die shrink">die shrink</a> of the preceding <i>Palomino</i> core, but did not significantly increase clock speeds over the <i>Palomino</i>.<sup id="cite_ref-PC_Hardware_in_a_Nuthshell_25-4" class="reference"><a href="#cite_note-PC_Hardware_in_a_Nuthshell-25"><span class="cite-bracket">&#91;</span>25<span class="cite-bracket">&#93;</span></a></sup> A revised <i>Thoroughbred</i> core, <i>Thoroughbred-B</i>, added a ninth "metal layer" to the eight-layered <i>Thoroughbred-A</i>, offering improvement in headroom over the A and making it popular for overclocking.<sup id="cite_ref-AnandTbredB_45-0" class="reference"><a href="#cite_note-AnandTbredB-45"><span class="cite-bracket">&#91;</span>45<span class="cite-bracket">&#93;</span></a></sup> </p> <dl><dt>Specifications</dt></dl> <ul><li>L1-cache: 64 + 64&#160;KB (data + instructions)</li> <li>L2-cache: 256&#160;KB, full speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a></li> <li><a href="/wiki/Socket_A" title="Socket A">Socket A</a> (EV6)</li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a>: 133/166&#160;MHz (266/333&#160;MT/s)</li> <li>Vcore: 1.50–1.65&#160;V</li> <li>First release: June 10, 2002 (A), August 21, 2002 (B)</li> <li>Clock-rate: <ul><li>Thoroughbred "A": 1400–1800&#160;MHz (1600+ to 2200+)</li> <li>Thoroughbred "B": 1400–2250&#160;MHz (1600+ to 2800+)</li> <li>133&#160;MHz FSB: 1400–2133&#160;MHz (1600+ to 2600+)</li> <li>166&#160;MHz FSB: 2083–2250&#160;MHz (2600+ to 2800+)</li></ul></li></ul> <div class="mw-heading mw-heading4"><h4 id="Barton_/_Thorton"><span id="Barton_.2F_Thorton"></span><i>Barton</i> / <i>Thorton</i></h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=11" title="Edit section: Barton / Thorton"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:KL_AMD_Athlon_XP_Barton.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/de/KL_AMD_Athlon_XP_Barton.jpg/150px-KL_AMD_Athlon_XP_Barton.jpg" decoding="async" width="150" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/de/KL_AMD_Athlon_XP_Barton.jpg/225px-KL_AMD_Athlon_XP_Barton.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/de/KL_AMD_Athlon_XP_Barton.jpg/300px-KL_AMD_Athlon_XP_Barton.jpg 2x" data-file-width="1497" data-file-height="1497" /></a><figcaption>Athlon XP "Barton" 2500+</figcaption></figure> <p>Fifth-generation Athlon <i>Barton</i>-core processors were released in early 2003. While not operating at higher clock rates than <i>Thoroughbred</i>-core processors, they featured an increased L2 cache, and later models had an increased 200&#160;MHz (400&#160;MT/s) front side bus.<sup id="cite_ref-AceBarton_46-0" class="reference"><a href="#cite_note-AceBarton-46"><span class="cite-bracket">&#91;</span>46<span class="cite-bracket">&#93;</span></a></sup> The <i>Thorton</i> core, a blend of <i>Thoroughbred</i> and <i>Barton</i>, was a later variant of the <i>Barton</i> with half of the L2 cache disabled.<sup id="cite_ref-47" class="reference"><a href="#cite_note-47"><span class="cite-bracket">&#91;</span>47<span class="cite-bracket">&#93;</span></a></sup> The <i>Barton</i> was used to officially introduce a higher 400&#160;MT/s bus clock for the Socket&#160;A platform, which was used to gain some <i>Barton</i> models more efficiency.<sup id="cite_ref-AceBarton_46-1" class="reference"><a href="#cite_note-AceBarton-46"><span class="cite-bracket">&#91;</span>46<span class="cite-bracket">&#93;</span></a></sup> By this point with the <i>Barton</i>, the four-year-old Athlon EV6&#160;bus architecture had scaled to its limit and required a redesign to exceed the performance of newer Intel processors.<sup id="cite_ref-AceBarton_46-2" class="reference"><a href="#cite_note-AceBarton-46"><span class="cite-bracket">&#91;</span>46<span class="cite-bracket">&#93;</span></a></sup> By 2003, the <a href="/wiki/Pentium_4" title="Pentium 4">Pentium&#160;4</a> had become more than competitive with AMD's processors,<sup id="cite_ref-BartonAnand_48-0" class="reference"><a href="#cite_note-BartonAnand-48"><span class="cite-bracket">&#91;</span>48<span class="cite-bracket">&#93;</span></a></sup> and <i>Barton</i> only saw a small performance increase over the <i>Thoroughbred-B</i> it derived from,<sup id="cite_ref-AceBarton_46-3" class="reference"><a href="#cite_note-AceBarton-46"><span class="cite-bracket">&#91;</span>46<span class="cite-bracket">&#93;</span></a></sup> insufficient to outperform the Pentium&#160;4.<sup id="cite_ref-BartonAnand_48-1" class="reference"><a href="#cite_note-BartonAnand-48"><span class="cite-bracket">&#91;</span>48<span class="cite-bracket">&#93;</span></a></sup> The K7-derived Athlons such as <i>Barton</i> were replaced in September 2003 by the <a href="/wiki/AMD_K8" title="AMD K8">Athlon&#160;64</a> family, which featured an <a href="/wiki/Memory_controller" title="Memory controller">on-chip memory controller</a> and a new <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> bus.<sup id="cite_ref-Wasson_for_Tech_Report_again_I_think:_2020_49-0" class="reference"><a href="#cite_note-Wasson_for_Tech_Report_again_I_think:_2020-49"><span class="cite-bracket">&#91;</span>49<span class="cite-bracket">&#93;</span></a></sup> </p><p>Notably, the 2500+ Barton with 11× multiplier was effectively identical to the 3200+ part other than the FSB speed it was binned for, meaning that seamless overclocking was possible more often than not. Early Thortons could be restored to the full Barton specification with the enabling of the other half of the L2 cache from a slight CPU surface modification, but the result was not always reliable. </p> <dl><dt>Specifications</dt> <dd></dd></dl> <p><i>Barton (130&#160;nm)</i> </p> <ul><li>L1-cache: 64 + 64&#160;KB (data + instructions)</li> <li>L2-cache: 512&#160;KB, full speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a></li> <li><a href="/wiki/Socket_A" title="Socket A">Socket A</a> (EV6)</li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a>: 166/200&#160;MHz (333/400&#160;MT/s)</li> <li>Vcore: 1.65&#160;V</li> <li>First release: February 10, 2003</li> <li>Clock rate: 1833–2333&#160;MHz (2500+ to 3200+) <ul><li>133&#160;MHz FSB: 1867–2133&#160;MHz (2500+ to 2800+); uncommon</li> <li>166&#160;MHz FSB: 1833–2333&#160;MHz (2500+ to 3200+)</li> <li>200&#160;MHz FSB: 2100, 2200&#160;MHz (3000+, 3200+)</li></ul></li></ul> <p><i>Thorton (130&#160;nm)</i> </p> <ul><li>L1-cache: 64 + 64&#160;KB (Data + Instructions)</li> <li>L2-cache: 256&#160;KB, full speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a></li> <li><a href="/wiki/Socket_A" title="Socket A">Socket A</a> (EV6)</li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a>: 133/166/200&#160;MHz (266/333/400&#160;MT/s)</li> <li>Vcore: 1.50–1.65&#160;V</li> <li>First release: September 2003</li> <li>Clock rate: 1667–2200&#160;MHz (2000+ to 3100+) <ul><li>133&#160;MHz FSB: 1600–2133&#160;MHz (2000+ to 2600+)</li> <li>166&#160;MHz FSB: 2083&#160;MHz (2600+)</li> <li>200&#160;MHz FSB: 2200&#160;MHz (3100+)</li></ul></li></ul> <div class="mw-heading mw-heading4"><h4 id="Mobile_Athlon_XP">Mobile Athlon XP</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=12" title="Edit section: Mobile Athlon XP"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:Athlon_XPM_2400l.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/6c/Athlon_XPM_2400l.jpg/250px-Athlon_XPM_2400l.jpg" decoding="async" width="225" height="203" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/6c/Athlon_XPM_2400l.jpg/500px-Athlon_XPM_2400l.jpg 1.5x" data-file-width="890" data-file-height="801" /></a><figcaption>Athlon&#160;XP Mobile "Barton" 2400+</figcaption></figure> <p>The <i>Palomino</i> core debuted in the mobile market before the PC market in May 2001, where it was branded as <b>Mobile&#160;Athlon&#160;4</b> with the codename "Corvette". It distinctively used a <a href="/wiki/Pin_grid_array" title="Pin grid array">ceramic</a> <a href="/wiki/Interposer" title="Interposer">interposer</a> much like the <i>Thunderbird</i> instead of the <a href="/wiki/Organic_pin_grid_array" class="mw-redirect" title="Organic pin grid array">organic pin grid array</a> package used on all later <i>Palomino</i> processors.<sup id="cite_ref-Athlon4Anand_40-1" class="reference"><a href="#cite_note-Athlon4Anand-40"><span class="cite-bracket">&#91;</span>40<span class="cite-bracket">&#93;</span></a></sup> In November 2001, AMD released a 1.2&#160;GHz&#160;Athlon&#160;4 and a 950&#160;MHz Duron.<sup id="cite_ref-ZAdnet_and_Broersma:_2001_50-0" class="reference"><a href="#cite_note-ZAdnet_and_Broersma:_2001-50"><span class="cite-bracket">&#91;</span>50<span class="cite-bracket">&#93;</span></a></sup> The Mobile&#160;Athlon&#160;4 processors included the <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a> function, which controlled a laptop's "level of processor performance by dynamically adjusting its operating frequency and voltage according to the task at hand",<sup id="cite_ref-Newowin_and_Parker:_2001_51-0" class="reference"><a href="#cite_note-Newowin_and_Parker:_2001-51"><span class="cite-bracket">&#91;</span>51<span class="cite-bracket">&#93;</span></a></sup> thus extending "battery life by reducing processor power when it isn't needed by applications". Duron chips also included PowerNow!<sup id="cite_ref-ZAdnet_and_Broersma:_2001_50-1" class="reference"><a href="#cite_note-ZAdnet_and_Broersma:_2001-50"><span class="cite-bracket">&#91;</span>50<span class="cite-bracket">&#93;</span></a></sup> In 2002, AMD released a version of PowerNow! called <a href="/wiki/Cool%27n%27Quiet" title="Cool&#39;n&#39;Quiet">Cool'n'Quiet</a>, implemented on the&#160;Athlon&#160;XP but only adjusting clock speed instead of voltage.<sup id="cite_ref-Extremetech_by_Hachmann_in:_2002_52-0" class="reference"><a href="#cite_note-Extremetech_by_Hachmann_in:_2002-52"><span class="cite-bracket">&#91;</span>52<span class="cite-bracket">&#93;</span></a></sup> </p><p>In 2002 the <b>Athlon&#160;XP-M</b> (Mobile&#160;Athlon&#160;XP) replaced the Mobile&#160;Athlon&#160;4 using the newer <i>Thoroughbred</i> core,<sup id="cite_ref-Extremetech_this_time:_2002_53-0" class="reference"><a href="#cite_note-Extremetech_this_time:_2002-53"><span class="cite-bracket">&#91;</span>53<span class="cite-bracket">&#93;</span></a></sup> with <i>Barton</i> cores for full-size notebooks. The&#160;Athlon&#160;XP-M was also offered in a compact microPGA <a href="/wiki/Socket_563" title="Socket 563">socket&#160;563</a> version.<sup id="cite_ref-ExtremeTech_again:_2003_54-0" class="reference"><a href="#cite_note-ExtremeTech_again:_2003-54"><span class="cite-bracket">&#91;</span>54<span class="cite-bracket">&#93;</span></a></sup> Mobile XPs were not <a href="/wiki/CPU_multiplier" title="CPU multiplier">multiplier</a>-locked, making them popular with desktop <a href="/wiki/Overclocking" title="Overclocking">overclockers</a>.<sup id="cite_ref-Toms_again:_2013_this_time_55-0" class="reference"><a href="#cite_note-Toms_again:_2013_this_time-55"><span class="cite-bracket">&#91;</span>55<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Athlon_64_(2003–2009)"><span id="Athlon_64_.282003.E2.80.932009.29"></span>Athlon&#160;64 (2003–2009)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=13" title="Edit section: Athlon&#160;64 (2003–2009)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/List_of_AMD_Athlon_64_processors" title="List of AMD Athlon 64 processors">List of AMD&#160;Athlon&#160;64 processors</a></div> <p>The immediate successor to the&#160;Athlon&#160;XP, the <a href="/wiki/Athlon_64" title="Athlon 64">Athlon&#160;64</a> is an AMD64-architecture microprocessor produced by AMD, released on September&#160;23, 2003.<sup id="cite_ref-AMD_Press:_2003_13-1" class="reference"><a href="#cite_note-AMD_Press:_2003-13"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup> A number of variations, all named after cities, were released with 90&#160;nm architecture in 2004 and 2005. Versions <a href="/wiki/List_of_AMD_Athlon_64_processors" title="List of AMD Athlon 64 processors">released in 2007 and 2009</a> utilized 65&#160;nm architecture. </p> <div class="mw-heading mw-heading3"><h3 id="Athlon_64_X2_(2005–2009)"><span id="Athlon_64_X2_.282005.E2.80.932009.29"></span>Athlon&#160;64 X2 (2005–2009)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=14" title="Edit section: Athlon&#160;64 X2 (2005–2009)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/List_of_AMD_Athlon_X2_processors" title="List of AMD Athlon X2 processors">List of AMD&#160;Athlon&#160;X2 processors</a></div> <p>The <a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">Athlon&#160;64 X2</a> was released in 2005 as the first native dual-core desktop CPU designed by AMD using an&#160;Athlon&#160;64.<sup id="cite_ref-The_Register_for_Athlon_54:_003_15-1" class="reference"><a href="#cite_note-The_Register_for_Athlon_54:_003-15"><span class="cite-bracket">&#91;</span>15<span class="cite-bracket">&#93;</span></a></sup> The <a href="/wiki/Athlon_X2" class="mw-redirect" title="Athlon X2">Athlon&#160;X2</a> was a subsequent family of microprocessors based on the&#160;Athlon&#160;64&#160;X2. The original <i>Brisbane</i>&#160;Athlon&#160;X2 models used 65&#160;nm architecture and were released in 2007.<sup id="cite_ref-HotHardware_16-1" class="reference"><a href="#cite_note-HotHardware-16"><span class="cite-bracket">&#91;</span>16<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Athlon_II_(2009–2012)"><span id="Athlon_II_.282009.E2.80.932012.29"></span>Athlon&#160;II (2009–2012)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=15" title="Edit section: Athlon&#160;II (2009–2012)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/List_of_AMD_Athlon_II_processors" title="List of AMD Athlon II processors">List of AMD Athlon II processors</a></div> <p><a href="/wiki/Athlon_II" title="Athlon II">Athlon&#160;II</a> is a family of central processing units. Initially a dual-core version of the&#160;Athlon&#160;II, the <a href="/wiki/AMD_10h" title="AMD 10h">K-10</a>-based <i><a href="/wiki/Athlon_II#Regor_(45_nm_SOI_with_immersion_lithography)" title="Athlon II">Regor</a></i> was released in June 2009 with 45-nanometer architecture. This was followed by a single-core version <i>Sargas</i>,<sup id="cite_ref-Regor:_2009_17-1" class="reference"><a href="#cite_note-Regor:_2009-17"><span class="cite-bracket">&#91;</span>17<span class="cite-bracket">&#93;</span></a></sup> followed by the quad-core <i>Propus</i>, the triple-core <i>Rana</i> in November 2009,<sup id="cite_ref-Tom_again:_2009_56-0" class="reference"><a href="#cite_note-Tom_again:_2009-56"><span class="cite-bracket">&#91;</span>56<span class="cite-bracket">&#93;</span></a></sup> and the <i>Llano</i> 32&#160;nm version released in 2011.<sup id="cite_ref-Tom&#39;s_Hardware_Llano:_2012_57-0" class="reference"><a href="#cite_note-Tom&#39;s_Hardware_Llano:_2012-57"><span class="cite-bracket">&#91;</span>57<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Piledriver_and_Steamroller-based_Athlon_X4_(2013–2016)"><span id="Piledriver_and_Steamroller-based_Athlon_X4_.282013.E2.80.932016.29"></span>Piledriver and Steamroller-based Athlon X4 (2013–2016)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=16" title="Edit section: Piledriver and Steamroller-based Athlon X4 (2013–2016)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Athlon_X4#&quot;Kaveri&quot;_(2014,_28_nm)" title="Athlon X4">Athlon X4 §&#160;"Kaveri" (2014, 28 nm)</a></div> <p>Various Steamroller-based Athlon X4 and X2 FM2+ socketed processors were released in 2014 and the years after. The preceding Piledriver-based Athlon X4 and X2 processors were released before 2014, and are socket compatible with both FM2+ and FM2 mainboards. </p> <div class="mw-heading mw-heading3"><h3 id="Excavator-based_Athlon_X4_(2017)"><span id="Excavator-based_Athlon_X4_.282017.29"></span>Excavator-based Athlon X4 (2017)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=17" title="Edit section: Excavator-based Athlon X4 (2017)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951" /><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Athlon_X4#&quot;Bristol_Ridge&quot;_(2017,_28_nm)" title="Athlon X4">Athlon X4 §&#160;"Bristol Ridge" (2017, 28 nm)</a></div> <p>The <i>Bristol Ridge</i> Athlon X4 lineup was released in 2017. It is based on the <a href="/wiki/Excavator_microarchitecture" class="mw-redirect" title="Excavator microarchitecture">Excavator microarchitecture</a> and uses 2 Excavator modules totalling 4 cores. It has a dual-channel <a href="/wiki/DDR4" class="mw-redirect" title="DDR4">DDR4</a>-2400 memory controller with clock speeds up to 4.0&#160;GHz. It runs on the new <a href="/wiki/Socket_AM4" title="Socket AM4">Socket AM4</a> platform that was later used for Zen 1 to Zen 3 CPUs. </p> <div class="mw-heading mw-heading3"><h3 id="Zen-based_Athlon_(2018–present)"><span id="Zen-based_Athlon_.282018.E2.80.93present.29"></span>Zen-based Athlon (2018–present)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=18" title="Edit section: Zen-based Athlon (2018–present)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1257001546" /><table class="infobox"><caption class="infobox-title">Zen based Athon</caption><tbody><tr><td colspan="2" class="infobox-image"><span class="mw-default-size" typeof="mw:File/Frameless"><a href="/wiki/File:Athlon_logo.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/en/thumb/f/f1/Athlon_logo.png/250px-Athlon_logo.png" decoding="async" width="220" height="123" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/f/f1/Athlon_logo.png/330px-Athlon_logo.png 1.5x, //upload.wikimedia.org/wikipedia/en/f/f1/Athlon_logo.png 2x" data-file-width="422" data-file-height="236" /></a></span><div class="infobox-caption">AMD&#160;Athlon&#160;logo used for Zen-based models</div></td></tr><tr><th colspan="2" class="infobox-header">General information</th></tr><tr><th scope="row" class="infobox-label">Launched</th><td class="infobox-data">September 6, 2018</td></tr><tr><th scope="row" class="infobox-label">Common manufacturer</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409" /><div class="plainlist"><ul><li><a href="/wiki/AMD" title="AMD">AMD</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Performance</th></tr><tr><th scope="row" class="infobox-label">Max. <a href="/wiki/Central_processing_unit" title="Central processing unit">CPU</a> <a href="/wiki/Clock_rate" title="Clock rate">clock rate</a></th><td class="infobox-data">&#160;&#160; to 3.5&#160;GHz</td></tr><tr><th colspan="2" class="infobox-header">Architecture and classification</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Technology_node" class="mw-redirect" title="Technology node">Technology&#160;node</a></th><td class="infobox-data">14 nm to 6 nm</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></th><td class="infobox-data"><a href="/wiki/Zen_(first_generation)" title="Zen (first generation)">Zen</a> (with <a href="/wiki/Radeon" title="Radeon">Radeon</a> Graphics)<br /><a href="/wiki/Zen%2B" title="Zen+">Zen+</a> (with Radeon Graphics)<br /><a href="/wiki/Zen_2" title="Zen 2">Zen 2</a> (with Radeon Graphics)</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction&#160;set</a></th><td class="infobox-data"><a href="/wiki/X86-64" title="X86-64">x86-64</a></td></tr><tr><th colspan="2" class="infobox-header">Products, models, variants</th></tr><tr><th scope="row" class="infobox-label">Core&#160;names</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409" /><div class="plainlist"><ul><li>&#160;<i>Raven Ridge</i></li><li>&#160;<i>Picasso</i></li><li><i>Mendocino</i></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">History</th></tr><tr><th scope="row" class="infobox-label">Predecessors</th><td class="infobox-data">Athlon&#160;Classic<br />Athlon&#160;Thunderbird<br />Athlon&#160;XP/MP<br /><a href="/wiki/Athlon_64" title="Athlon 64">Athlon&#160;64</a><br /><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">Athlon&#160;64 X2</a><br /><a href="/wiki/Athlon_X2" class="mw-redirect" title="Athlon X2">Athlon&#160;X2</a><br /><a href="/wiki/Athlon_II" title="Athlon II">Athlon&#160;II</a><br /><a href="/wiki/AMD_APU" title="AMD APU">AMD APU</a></td></tr></tbody></table> <p>The <a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a>-based Athlon with <a href="/wiki/Radeon" title="Radeon">Radeon</a> graphics processors was launched in September 2018 with the Athlon&#160;200GE.<sup id="cite_ref-A_Shilove_for_Anadtech:_2018_58-0" class="reference"><a href="#cite_note-A_Shilove_for_Anadtech:_2018-58"><span class="cite-bracket">&#91;</span>58<span class="cite-bracket">&#93;</span></a></sup> Based on AMD's <i>Raven Ridge</i> core previously used in variants of the <a href="/wiki/Ryzen_3" class="mw-redirect" title="Ryzen 3">Ryzen&#160;3</a> and <a href="/wiki/Ryzen_5" class="mw-redirect" title="Ryzen 5">Ryzen&#160;5</a>,<sup id="cite_ref-Again_for_Anadtech:_2018_18-1" class="reference"><a href="#cite_note-Again_for_Anadtech:_2018-18"><span class="cite-bracket">&#91;</span>18<span class="cite-bracket">&#93;</span></a></sup> the Athlon&#160;200GE had half of the cores but left <a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">SMT</a> enabled. It also kept the same 4&#160;MiB <a href="/wiki/L3_cache" class="mw-redirect" title="L3 cache">L3 cache</a>,<sup id="cite_ref-A_Shilove_for_Anadtech:_2018_58-1" class="reference"><a href="#cite_note-A_Shilove_for_Anadtech:_2018-58"><span class="cite-bracket">&#91;</span>58<span class="cite-bracket">&#93;</span></a></sup> but the <a href="/wiki/L2_cache" class="mw-redirect" title="L2 cache">L2 cache</a> was halved to 1&#160;MiB.<sup id="cite_ref-CNET:_2018_59-0" class="reference"><a href="#cite_note-CNET:_2018-59"><span class="cite-bracket">&#91;</span>59<span class="cite-bracket">&#93;</span></a></sup> </p><p>In addition, the number of graphics compute units was limited to 3 in the Athlon&#160;200GE,<sup id="cite_ref-AMD_Press_release:2018_60-0" class="reference"><a href="#cite_note-AMD_Press_release:2018-60"><span class="cite-bracket">&#91;</span>60<span class="cite-bracket">&#93;</span></a></sup> and the chip was multiplier-locked.<sup id="cite_ref-Guru_Hegaedoom:_2018_61-0" class="reference"><a href="#cite_note-Guru_Hegaedoom:_2018-61"><span class="cite-bracket">&#91;</span>61<span class="cite-bracket">&#93;</span></a></sup> Despite its limitations, the Athlon&#160;200GE performed competitively against<sup id="cite_ref-TechSPot_Budget:_2018_62-0" class="reference"><a href="#cite_note-TechSPot_Budget:_2018-62"><span class="cite-bracket">&#91;</span>62<span class="cite-bracket">&#93;</span></a></sup> the 5000-series Intel Pentium-G, displaying similar CPU performance but an advantage in GPU performance.<sup id="cite_ref-Toms_and_Tom_and_Author:_2018_63-0" class="reference"><a href="#cite_note-Toms_and_Tom_and_Author:_2018-63"><span class="cite-bracket">&#91;</span>63<span class="cite-bracket">&#93;</span></a></sup> </p><p>On November 19, 2019, AMD released the Athlon 3000G, with a higher 3.5&#160;GHz core clock and 1100&#160;MHz graphics clock compared to the Athlon&#160;200GE,<sup id="cite_ref-F_3-3" class="reference"><a href="#cite_note-F-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup> also with two cores.<sup id="cite_ref-C_4-1" class="reference"><a href="#cite_note-C-4"><span class="cite-bracket">&#91;</span>4<span class="cite-bracket">&#93;</span></a></sup> The main functional difference between the 200GE was the Athlon 3000G's unlocked multiplier,<sup id="cite_ref-F_3-4" class="reference"><a href="#cite_note-F-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup> allowing the latter to be overclocked on <a href="/wiki/B450" class="mw-redirect" title="B450">B450</a> and <a href="/wiki/X470" class="mw-redirect" title="X470">X470</a> motherboards.<sup id="cite_ref-Overclocking:_2019_64-0" class="reference"><a href="#cite_note-Overclocking:_2019-64"><span class="cite-bracket">&#91;</span>64<span class="cite-bracket">&#93;</span></a></sup> </p><p>Zen 2-based Athlon with Radeon Graphics processors, codenamed "Mendocino", were released on September 20, 2022, for the entry-level laptop market, alongside the more powerful quad-core <a href="/wiki/Ryzen#Mobile_6" title="Ryzen">Ryzen 7020</a> mobile series under the same codename.<sup id="cite_ref-65" class="reference"><a href="#cite_note-65"><span class="cite-bracket">&#91;</span>65<span class="cite-bracket">&#93;</span></a></sup> Featuring two processing cores, with two threads on Athlon Silver and four threads on Athlon Gold models, Athlon 7020 series mobile processors are equipped with two compute units (CUs) of RDNA&#160;2 graphics. These 7020U series models were followed by the release of Ryzen/Athlon 7020C series for Chromebooks on May 23, 2023.<sup id="cite_ref-66" class="reference"><a href="#cite_note-66"><span class="cite-bracket">&#91;</span>66<span class="cite-bracket">&#93;</span></a></sup> Unlike prior Athlon generations, AMD has not released desktop variants of Mendocino. </p> <dl><dt>Specifications</dt></dl> <p><i>Raven Ridge</i> (14&#160;nm), <i>Picasso</i> (12&#160;nm) <i>(see <a href="/wiki/List_of_AMD_Athlon_processors#Athlon_(Zen-based)" title="List of AMD Athlon processors">the list article</a> for more details)</i><sup id="cite_ref-CNET:_2018_59-1" class="reference"><a href="#cite_note-CNET:_2018-59"><span class="cite-bracket">&#91;</span>59<span class="cite-bracket">&#93;</span></a></sup> </p> <ul><li>L1 cache: 192&#160;KiB (2×64&#160;KiB + 2×32&#160;KiB)</li> <li>L2 cache: 1&#160;MiB (2×512&#160;KiB)</li> <li>L3 cache: 4&#160;MiB</li> <li>Memory: dual-channel DDR4-2666, 64&#160;GiB max.</li> <li>Socket AM4</li> <li>TDP: 35&#160;W</li> <li>First release: September&#160;6, 2018</li> <li>CPU clock rate: 3.2 to 3.5&#160;GHz</li> <li>GPU clock rate: 1000 to 1100&#160;MHz</li></ul> <p><i>Mendocino</i> (6&#160;nm) <i>(see <a href="/wiki/List_of_AMD_Athlon_processors#Athlon_(Zen_2_based)" title="List of AMD Athlon processors">the list article</a> for more details)</i> </p> <ul><li>L1 cache: 128&#160;KiB (2×32&#160;KiB + 2×32&#160;KiB)</li> <li>L2 cache: 1&#160;MiB (2×512&#160;KiB)</li> <li>L3 cache: 4&#160;MiB</li> <li>Memory: dual-channel LPDDR5-5500, 16&#160;GiB max.</li> <li>TDP: 15&#160;W</li> <li>First release: September&#160;20, 2022</li> <li>CPU clock rate: 2.4&#160;GHz</li> <li>GPU clock rate: 1900&#160;MHz</li></ul> <div class="mw-heading mw-heading2"><h2 id="Supercomputers">Supercomputers</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=19" title="Edit section: Supercomputers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A number of <a href="/wiki/Supercomputer" title="Supercomputer">supercomputers</a> have been built using&#160;Athlon&#160;chips, largely at universities. Among them: </p> <ul><li>In 2000, several American students claimed to have built the world's least expensive supercomputer by clustering 64 AMD&#160;Athlon&#160;chips together, also marking the first time&#160;Athlons&#160;had been clustered in a supercomputer.<sup id="cite_ref-Computing:_2000_67-0" class="reference"><a href="#cite_note-Computing:_2000-67"><span class="cite-bracket">&#91;</span>67<span class="cite-bracket">&#93;</span></a></sup></li> <li>The PRESTO III, a <a href="/wiki/Beowulf_cluster" title="Beowulf cluster">Beowulf cluster</a> of 78 AMD&#160;Athlon&#160;processors, was built in 2001 by the <a href="/wiki/Tokyo_Institute_of_Technology" title="Tokyo Institute of Technology">Tokyo Institute of Technology</a>. That year it ranked 439 on the <a href="/wiki/TOP500" title="TOP500">TOP500</a> list of supercomputers.<sup id="cite_ref-The_Register:_2001_68-0" class="reference"><a href="#cite_note-The_Register:_2001-68"><span class="cite-bracket">&#91;</span>68<span class="cite-bracket">&#93;</span></a></sup></li> <li>In 2002, a "128-Node 256-Processor AMD&#160;Athlon&#160;Supercomputer Cluster" was installed at the <a href="/wiki/Ohio_Supercomputer_Center" title="Ohio Supercomputer Center">Ohio Supercomputer Center</a> at the <a href="/wiki/University_of_Toledo" title="University of Toledo">University of Toledo</a>.<sup id="cite_ref-OSC:_2002_69-0" class="reference"><a href="#cite_note-OSC:_2002-69"><span class="cite-bracket">&#91;</span>69<span class="cite-bracket">&#93;</span></a></sup></li> <li><a href="/wiki/Rutgers_University" title="Rutgers University">Rutgers University</a>, Department of Physics &amp; Astronomy. Machine: NOW Cluster—AMD Athlon. CPU: 512 AthlonMP (1.65&#160;GHz). Rmax: 794&#160;<a href="/wiki/Gigaflops" class="mw-redirect" title="Gigaflops">GFLOPS</a>.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (August 2020)">citation needed</span></a></i>&#93;</sup></li></ul> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=20" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/List_of_AMD_Athlon_processors" title="List of AMD Athlon processors">List of AMD Athlon processors</a></li> <li><a href="/wiki/List_of_AMD_Duron_processors" title="List of AMD Duron processors">List of AMD Duron processors</a></li> <li><a href="/wiki/List_of_AMD_Phenom_processors" title="List of AMD Phenom processors">List of AMD Phenom processors</a></li> <li><a href="/wiki/List_of_AMD_Opteron_processors" title="List of AMD Opteron processors">List of AMD Opteron processors</a></li> <li><a href="/wiki/List_of_AMD_Sempron_processors" title="List of AMD Sempron processors">List of AMD Sempron processors</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=21" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output 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data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.cpu-collection.de/?l0=co&amp;l1=amd&amp;l2=athlon">"amd athlon"</a>. <i>cpu-collection.de</i><span class="reference-accessdate">. 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Retrieved <span class="nowrap">August 2,</span> 2020</span>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=The+Register&amp;rft.atitle=AMD+cluster+sneaks+in+Supercomputer+top+500+list&amp;rft.date=2001-07-02&amp;rft.au=Drew+Cullen&amp;rft_id=https%3A%2F%2Fwww.theregister.co.uk%2F2001%2F07%2F02%2Famd_cluster_sneaks_in_supercomputer%2F&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AAthlon" class="Z3988"></span></span> </li> <li id="cite_note-OSC:_2002-69"><span class="mw-cite-backlink"><b><a href="#cite_ref-OSC:_2002_69-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite class="citation news cs1"><a rel="nofollow" class="external text" href="https://www.osc.edu/press/ohio_supercomputer_center_awards_cluster_to_university_of_toledo">"Ohio Supercomputer Center Awards Cluster to University of Toledo"</a>. <i>Ohio Supercomputer Center</i>. August 6, 2004<span class="reference-accessdate">. Retrieved <span class="nowrap">August 2,</span> 2020</span>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=Ohio+Supercomputer+Center&amp;rft.atitle=Ohio+Supercomputer+Center+Awards+Cluster+to+University+of+Toledo&amp;rft.date=2004-08-06&amp;rft_id=https%3A%2F%2Fwww.osc.edu%2Fpress%2Fohio_supercomputer_center_awards_cluster_to_university_of_toledo&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AAthlon" class="Z3988"></span></span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Athlon&amp;action=edit&amp;section=22" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1235681985">.mw-parser-output .side-box{margin:4px 0;box-sizing:border-box;border:1px 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processors">64</a></li> <li><a href="/wiki/List_of_AMD_Athlon_X2_processors" title="List of AMD Athlon X2 processors">X2</a></li> <li><a href="/wiki/List_of_AMD_Athlon_II_processors" title="List of AMD Athlon II processors">II</a></li></ul></li> <li><a href="/wiki/List_of_AMD_Phenom_processors" title="List of AMD Phenom processors">Phenom</a></li> <li><a href="/wiki/List_of_AMD_FX_processors" title="List of AMD FX processors">FX</a></li> <li><a href="/wiki/List_of_AMD_Ryzen_processors" title="List of AMD Ryzen processors">Ryzen</a></li> <li><a href="/wiki/List_of_AMD_Duron_processors" title="List of AMD Duron processors">Duron</a></li> <li><a href="/wiki/List_of_AMD_Sempron_processors" title="List of AMD Sempron processors">Sempron</a></li> <li><a href="/wiki/List_of_AMD_Turion_processors" title="List of AMD Turion processors">Turion</a></li> <li><a href="/wiki/List_of_AMD_Opteron_processors" title="List of AMD Opteron processors">Opteron</a></li> <li><a href="/wiki/List_of_AMD_Epyc_processors" class="mw-redirect" title="List of AMD Epyc processors">Epyc</a></li></ul></li> <li><a href="/wiki/List_of_AMD_processors_with_3D_graphics" title="List of AMD processors with 3D graphics">APUs</a></li> <li><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_AMD_chipsets" title="List of AMD chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a class="mw-selflink selflink">Athlon/K7</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 desktop</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K8" title="AMD K8">K8</a></li> <li><a href="/wiki/AMD_K9" title="AMD K9">K9</a></li> <li><a href="/wiki/AMD_10h" title="AMD 10h">K10 (aka 10h)</a></li> <li>15h <ul><li><a href="/wiki/Bulldozer_(microarchitecture)" title="Bulldozer (microarchitecture)">Bulldozer</a></li> <li><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver</a></li> <li><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller</a></li> <li><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a></li></ul></li> <li><a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a> <ul><li><a href="/wiki/Zen_(first_generation)" title="Zen (first generation)">1st gen</a></li> <li><a href="/wiki/Zen%2B" title="Zen+">Zen+</a></li> <li><a href="/wiki/Zen_2" title="Zen 2">Zen 2</a></li> <li><a href="/wiki/Zen_3" title="Zen 3">Zen 3</a></li> <li><a href="/wiki/Zen_3%2B" class="mw-redirect" title="Zen 3+">Zen 3+</a></li> <li><a href="/wiki/Zen_4" title="Zen 4">Zen 4</a></li> <li><a href="/wiki/Zen_5" title="Zen 5">Zen 5</a></li> <li><i><a href="/wiki/Zen_6" title="Zen 6">Zen 6</a></i></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 low-power</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bobcat_(microarchitecture)" title="Bobcat (microarchitecture)">Bobcat (aka 14h)</a></li> <li>16h <ul><li><a href="/wiki/Jaguar_(microarchitecture)" title="Jaguar (microarchitecture)">Jaguar</a></li> <li><a href="/wiki/Puma_(microarchitecture)" title="Puma (microarchitecture)">Puma</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/ARM_architecture_family#ARMv8-A" title="ARM architecture family">ARM64</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K12" title="AMD K12">K12 (aka 12h)</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)40" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a class="mw-selflink selflink">Athlon</a></li> <li><a href="/wiki/Ryzen" title="Ryzen">Ryzen</a></li> <li><a href="/wiki/Threadripper" title="Threadripper">Threadripper</a></li> <li><a href="/wiki/Epyc" title="Epyc">Epyc</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;background-color: #DDDDDD">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Early x86 (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am286" class="mw-redirect" title="Am286">Am286</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am386" title="Am386">Am386</a></li> <li><a href="/wiki/Am486" title="Am486">Am486</a></li> <li><a href="/wiki/Am5x86" title="Am5x86">Am5x86</a></li> <li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/AMD_K6-2" title="AMD K6-2">K6-2</a></li> <li><a href="/wiki/AMD_K6-III" title="AMD K6-III">K6-III</a></li> <li><a class="mw-selflink selflink">Athlon</a> <ul><li><a href="/wiki/Athlon_XP" class="mw-redirect" title="Athlon XP">XP</a></li> <li><a href="/wiki/Athlon_MP" class="mw-redirect" title="Athlon MP">MP</a></li></ul></li> <li><a href="/wiki/Duron" title="Duron">Duron</a></li> <li><a href="/wiki/Geode_(processor)" title="Geode (processor)">Geode</a></li> <li><a href="/wiki/AMD_%C3%89lan" title="AMD Élan">AMD Élan</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> <ul><li><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">X2</a></li> <li><a href="/wiki/Athlon_II" title="Athlon II">II</a></li></ul></li> <li><a href="/wiki/Sempron" title="Sempron">Sempron</a></li> <li><a href="/wiki/AMD_Turion" title="AMD Turion">Turion</a></li> <li><a href="/wiki/AMD_Phenom" title="AMD Phenom">Phenom</a> <ul><li><a href="/wiki/Phenom_II" title="Phenom II">II</a></li></ul></li> <li><a href="/wiki/AMD_FX" title="AMD FX">FX</a></li> <li><a href="/wiki/Opteron" title="Opteron">Opteron</a></li> <li><a href="/wiki/AMD_APU" title="AMD APU">A-series APUs</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Other</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_Am9080" title="AMD Am9080">Am9080</a></li> <li><a href="/wiki/AMD_Am2900" title="AMD Am2900">Am2900</a> <ul><li><a href="/wiki/List_of_AMD_Am2900_and_Am29000_families" title="List of AMD Am2900 and Am29000 families">list</a></li></ul></li> <li><a href="/wiki/AMD_Am29000" title="AMD Am29000">Am29000</a></li> <li><a href="/wiki/Alchemy_(microarchitecture)" class="mw-redirect" title="Alchemy (microarchitecture)">Alchemy</a> <ul><li><a href="/wiki/MIPS_architecture#MIPS32" title="MIPS architecture">MIPS32</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><i>Italics</i> indicates an upcoming architecture.</div></td></tr></tbody></table></div> <!-- NewPP limit report Parsed by mw‐web.eqiad.main‐8669bc5c8‐hhfhz Cached time: 20250318154738 Cache expiry: 2592000 Reduced expiry: false Complications: [vary‐revision‐sha1, show‐toc] CPU time usage: 1.125 seconds Real time usage: 1.354 seconds Preprocessor visited node count: 7520/1000000 Post‐expand include size: 164459/2097152 bytes Template argument size: 4691/2097152 bytes Highest expansion depth: 13/100 Expensive parser function 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