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<span>Toggle Xeon DP (later Xeon 5000 series) subsection</span> </button> <ul id="toc-Xeon_DP_(later_Xeon_5000_series)-sublist" class="vector-toc-list"> <li id="toc-"Foster"_(180_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Foster"_(180_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1</span> <span>"Foster" (180 nm)</span> </div> </a> <ul id="toc-"Foster"_(180_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Prestonia"_(130_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Prestonia"_(130_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2</span> <span>"Prestonia" (130 nm)</span> </div> </a> <ul id="toc-"Prestonia"_(130_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Gallatin"_(130_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Gallatin"_(130_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.3</span> <span>"Gallatin" (130 nm)</span> </div> </a> <ul id="toc-"Gallatin"_(130_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Nocona"_(90_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Nocona"_(90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.4</span> <span>"Nocona" (90 nm)</span> </div> </a> <ul id="toc-"Nocona"_(90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Irwindale"_(90_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Irwindale"_(90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.5</span> <span>"Irwindale" (90 nm)</span> </div> </a> <ul id="toc-"Irwindale"_(90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Paxville_DP"_(90_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Paxville_DP"_(90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.6</span> <span>"Paxville DP" (90 nm)</span> </div> </a> <ul id="toc-"Paxville_DP"_(90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Dempsey"_(65_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Dempsey"_(65_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.7</span> <span>"Dempsey" (65 nm)</span> </div> </a> <ul id="toc-"Dempsey"_(65_nm)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Xeon_MP_(later_Xeon_7000_series)" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Xeon_MP_(later_Xeon_7000_series)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Xeon MP (later Xeon 7000 series)</span> </div> </a> <button aria-controls="toc-Xeon_MP_(later_Xeon_7000_series)-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon 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<div class="vector-toc-text"> <span class="vector-toc-numb">2.3</span> <span>"Cranford" (90 nm)</span> </div> </a> <ul id="toc-"Cranford"_(90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Potomac"_(90_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Potomac"_(90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.4</span> <span>"Potomac" (90 nm)</span> </div> </a> <ul id="toc-"Potomac"_(90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Paxville_MP"_(90_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Paxville_MP"_(90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.5</span> <span>"Paxville MP" (90 nm)</span> </div> </a> <ul id="toc-"Paxville_MP"_(90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Tulsa"_(65_nm)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#"Tulsa"_(65_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.6</span> <span>"Tulsa" (65 nm)</span> </div> </a> <ul id="toc-"Tulsa"_(65_nm)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" 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<div id="contentSub"><div id="mw-content-subtitle"><span class="mw-redirectedfrom">(Redirected from <a href="/w/index.php?title=List_of_Intel_NetBurst-based_Xeon_microprocessors&redirect=no" class="mw-redirect" title="List of Intel NetBurst-based Xeon microprocessors">List of Intel NetBurst-based Xeon microprocessors</a>)</span></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><p class="mw-empty-elt"> </p> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/List_of_Intel_Xeon_processors" title="List of Intel Xeon processors">List of Intel Xeon processors</a></div> <p>This is a list of <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a>-based <a href="/wiki/Intel_Xeon" class="mw-redirect" title="Intel Xeon">Intel Xeon</a> processors. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Xeon_DP_(later_Xeon_5000_series)"><span id="Xeon_DP_.28later_Xeon_5000_series.29"></span>Xeon DP (later Xeon 5000 series)</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=1" title="Edit section: Xeon DP (later Xeon 5000 series)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id=""Foster"_(180_nm)"><span id=".22Foster.22_.28180_nm.29"></span>"<a href="/wiki/Xeon#Foster" title="Xeon">Foster</a>" (180 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=2" title="Edit section: "Foster" (180 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a></i></li> <li>All models support dual-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 241 mm²</li> <li><a href="/wiki/Stepping_level" title="Stepping level">Steppings</a>: C1, D0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th>Multiplier</th> <th>Voltage</th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (USD) </th></tr> <tr> <td><span class="anchor" id="27259"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27259">Xeon 1.4</a></td> <td>SL4WX (C1)<br />SL56G (C1)</td> <td>1400 MHz</td> <td rowspan="4">256 KB</td> <td rowspan="4">400 MT/s</td> <td>14×</td> <td rowspan="4">1.75 V</td> <td>56 W</td> <td rowspan="4"><a href="/wiki/Socket_603" title="Socket 603">Socket 603</a></td> <td>May 21, 2001</td> <td>RN80528KC017G0K</td> <td>$268<sup id="cite_ref-intel0105_1-0" class="reference"><a href="#cite_note-intel0105-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27260"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27260">Xeon 1.5</a></td> <td>SL4ZT (C1)<br />SL5U6 (D0)<br />SL4WY (C1)<br />SL5TD (D0)</td> <td>1500 MHz</td> <td>15×</td> <td>59.2 W</td> <td>May 21, 2001</td> <td>RN80528KC021G0K</td> <td>$309<sup id="cite_ref-intel0105_1-1" class="reference"><a href="#cite_note-intel0105-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27262"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27262">Xeon 1.7</a></td> <td>SL56N (C1)<br />SL5U7 (D0)<br />SL56H (C1)<br />SL5TE (D0)</td> <td>1700 MHz</td> <td>17×</td> <td>65.8 W</td> <td>May 21, 2001</td> <td>RN80528KC029G0K</td> <td>$406<sup id="cite_ref-intel0105_1-2" class="reference"><a href="#cite_note-intel0105-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27264"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27264">Xeon 2.0</a></td> <td>SL5U8 (D0)<br />SL5TH (D0)</td> <td>2000 MHz</td> <td>20×</td> <td>77.5 W</td> <td>September 25, 2001</td> <td>RN80528KC041G0K</td> <td>$615<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Prestonia"_(130_nm)"><span id=".22Prestonia.22_.28130_nm.29"></span>"<a href="/wiki/Xeon#Prestonia" title="Xeon">Prestonia</a>" (130 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=3" title="Edit section: "Prestonia" (130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a></i></li> <li>All models support dual-processor configurations</li> <li>Models with no suffix or the A suffix use Socket 603 and a 400 MT/s FSB while models with the B suffix use Socket 604 and a 533 MT/s FSB.</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 146 mm²</li> <li><a href="/wiki/Stepping_level" title="Stepping level">Steppings</a>: B0, C1, D1, M0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th>Multiplier</th> <th>Voltage</th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (USD) </th></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Standard voltage</b> </td></tr> <tr> <td><span class="anchor" id="27263"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27263">Xeon 1.8</a></td> <td>SL5Z8 (B0)<br />SL622 (B0)<br />SL6EL (C1)<br />SL6JX (C1)<br />SL6W3 (D1)<br />SL6YS (D1)</td> <td>1800 MHz</td> <td rowspan="12">512 KB</td> <td rowspan="2">400 MT/s</td> <td>18×</td> <td rowspan="10">1.5 V</td> <td>55 W</td> <td rowspan="2"><a href="/wiki/Socket_603" title="Socket 603">Socket 603</a></td> <td rowspan="2">February 25, 2002</td> <td>RN80532KC033512<br />BX80532KC1800D</td> <td>$251<sup id="cite_ref-intel0202_3-0" class="reference"><a href="#cite_note-intel0202-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27265"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27265">Xeon 2.0A</a></td> <td>SL5Z9 (B0)<br />SL623 (B0)<br />SL6EM (C1)<br />SL6JY (C1)<br />SL6W6 (D1)<br />SL6YT (D1)</td> <td>2000 MHz</td> <td>20×</td> <td rowspan="2">58 W</td> <td>RN80532KC041512<br />BX80532KC2000D</td> <td>$417<sup id="cite_ref-intel0202_3-1" class="reference"><a href="#cite_note-intel0202-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27266"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27266">Xeon 2.0B</a></td> <td>SL6NP (C1)<br />SL6RQ (C1)<br />SL6VK (D1)<br />SL6YM (D1)<br />SL72C (M0)<br />SL73K (M0)</td> <td>2000 MHz</td> <td>533 MT/s</td> <td>15×</td> <td><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td>November 18, 2002</td> <td>RK80532KE041512</td> <td>$198<sup id="cite_ref-intel0211_4-0" class="reference"><a href="#cite_note-intel0211-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27267"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27267">Xeon 2.2</a></td> <td>SL5ZA (B0)<br />SL624 (B0)<br />SL6EN (C1)<br />SL6JZ (C1)<br />SL6W7 (D1)<br />SL6YU (D1)</td> <td>2200 MHz</td> <td rowspan="2">400 MT/s</td> <td>22×</td> <td>61 W</td> <td rowspan="2">Socket 603</td> <td>February 25, 2002</td> <td>RN80532KC049512<br />BX80532KC2200D</td> <td>$615<sup id="cite_ref-intel0202_3-2" class="reference"><a href="#cite_note-intel0202-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27269"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27269">Xeon 2.4</a></td> <td>SL65T (B0)<br />SL687 (B0)<br />SL6EP (C1)<br />SL6K2 (C1)<br />SL6W8 (D1)<br />SL6YV (D1)</td> <td>2400 MHz</td> <td>24×</td> <td rowspan="2">65 W</td> <td>April 23, 2002</td> <td>RN80532KC056512<br />BX80532KC2400D</td> <td>$615<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27270"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27270">Xeon 2.4B</a></td> <td>SL6GD (C1)<br />SL6NQ (C1)<br />SL6VL (D1)<br />SL6YN (D1)<br />SL72D (M0)<br />SL73L (M0)</td> <td>2400 MHz</td> <td>533 MT/s</td> <td>18×</td> <td>Socket 604</td> <td>November 18, 2002</td> <td>RK80532KE056512</td> <td>$234<sup id="cite_ref-intel0211_4-1" class="reference"><a href="#cite_note-intel0211-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27271"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27271">Xeon 2.6</a></td> <td>SL6EQ (C1)<br />SL6K3 (C1)<br />SL6W9 (D1)<br />SL6YW (D1)</td> <td>2600 MHz</td> <td>400 MT/s</td> <td>26×</td> <td>60 W</td> <td>Socket 603</td> <td>September 11, 2002</td> <td>RN80532KC064512<br />BX80532KC2600D</td> <td>$433<sup id="cite_ref-intel0209_6-0" class="reference"><a href="#cite_note-intel0209-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27272"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27272">Xeon 2.66</a></td> <td>SL6GF (C1)<br />SL6NR (C1)<br />SL6VM (D1)<br />SL6YP (D1)<br />SL72E (M0)<br />SL73M (M0)</td> <td>2667 MHz</td> <td>533 MT/s</td> <td>20×</td> <td>72/77 W</td> <td>Socket 604</td> <td>November 18, 2002</td> <td>RK80532KE067512</td> <td>$337<sup id="cite_ref-intel0211_4-2" class="reference"><a href="#cite_note-intel0211-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27274"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27274">Xeon 2.8</a></td> <td>SL6M7 (C1)<br />SL6MS (C1)<br />SL6WA (D1)<br />SL6YX (D1)</td> <td>2800 MHz</td> <td>400 MT/s</td> <td>28×</td> <td>74 W</td> <td>Socket 603</td> <td>September 11, 2002</td> <td>RN80532KC072512<br />BX80532KC2800D</td> <td>$562<sup id="cite_ref-intel0209_6-1" class="reference"><a href="#cite_note-intel0209-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27275"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27275">Xeon 2.8B</a></td> <td>SL6GG (C1)<br />SL6NS (C1)<br />SL6VN (D1)<br />SL6YQ (D1)<br />SL72F (M0)<br />SL73N (M0)</td> <td>2800 MHz</td> <td>533 MT/s</td> <td>21×</td> <td>74 W</td> <td>Socket 604</td> <td>November 18, 2002</td> <td>RK80532KE072512</td> <td>$455<sup id="cite_ref-intel0211_4-3" class="reference"><a href="#cite_note-intel0211-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27276"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27276">Xeon 3.0</a></td> <td>SL6VW (C1)<br />SL6X4 (C1)<br />SL6WB (D1)<br />SL6YY (D1)</td> <td>3000 MHz</td> <td>400 MT/s</td> <td>30×</td> <td>1.525 V</td> <td rowspan="2">85 W</td> <td>Socket 603</td> <td rowspan="2">March 10, 2003</td> <td>RN80532KC080512</td> <td>$658<sup id="cite_ref-intel0303_7-0" class="reference"><a href="#cite_note-intel0303-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27278"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27278">Xeon 3.06</a></td> <td>SL6GH (C1)<br />SL6RR (C1)<br />SL6VP (D1)<br />SL6YR (D1)</td> <td>3066 MHz</td> <td>533 MT/s</td> <td>23×</td> <td>1.525 V</td> <td>Socket 604</td> <td>RK80532KE083512</td> <td>$722<sup id="cite_ref-intel0303_7-1" class="reference"><a href="#cite_note-intel0303-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Low voltage</b> </td></tr> <tr> <td><span class="anchor" id="27289"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27289">Xeon LV 1.6</a></td> <td>SL6XK (D1)</td> <td>1600 MHz</td> <td rowspan="3">512 KB</td> <td rowspan="2">400 MT/s</td> <td>16×</td> <td>1.187–1.274 V</td> <td>30 W</td> <td rowspan="3"><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td rowspan="3">September 2003</td> <td>RK80532EC025512</td> <td> </td></tr> <tr> <td><span class="anchor" id="Xeon_LV_2.0"></span><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/Intel-Low%20voltage%20Xeon%202%20GHz%20-%20RK80532EC041512.html">Xeon LV 2.0</a></td> <td>SL6XL (D1)</td> <td>2000 MHz</td> <td>20x</td> <td>1.179–1.27 V</td> <td>35 W</td> <td>RK80532EC041512</td> <td> </td></tr> <tr> <td><span class="anchor" id="27291"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27291">Xeon LV 2.4</a></td> <td>SL74T (D1)</td> <td>2400 MHz</td> <td>533 MT/s</td> <td>18×</td> <td>1.17–1.265 V</td> <td>40 W</td> <td>RK80532EE056512</td> <td> </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Gallatin"_(130_nm)"><span id=".22Gallatin.22_.28130_nm.29"></span>"<a href="/wiki/Xeon#Gallatin" title="Xeon">Gallatin</a>" (130 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=4" title="Edit section: "Gallatin" (130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support:</i> <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a></i></li> <li>All models support dual-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 226 mm²</li> <li><a href="/wiki/Stepping_level" title="Stepping level">Steppings</a>: M0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L3 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th>Multiplier</th> <th>Voltage</th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Part number(s)</th> <th>Release price </th></tr> <tr> <td><span class="anchor" id="27268"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27268">Xeon 2.4</a></td> <td>SL7D4 (M0)<br />SL7DF (M0)</td> <td>2400 MHz</td> <td rowspan="5">512 KB</td> <td rowspan="4">1024 KB</td> <td rowspan="5">533 MT/s</td> <td>18×</td> <td rowspan="5">1.525 V</td> <td rowspan="2">77 W</td> <td rowspan="5"><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td rowspan="2">February 2004</td> <td>RK80532KE0561M</td> <td> </td></tr> <tr> <td><span class="anchor" id="27273"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27273">Xeon 2.8</a></td> <td>SL7D5 (M0)<br />SL7DG (M0)</td> <td>2800 MHz</td> <td>21×</td> <td>RK80532KE0721M</td> <td> </td></tr> <tr> <td><span class="anchor" id="27277"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27277">Xeon 3.06</a></td> <td>SL72G (M0)<br />SL73P (M0)</td> <td>3066 MHz</td> <td>23×</td> <td>87 W</td> <td>July 14, 2003</td> <td>RK80532KE0831M</td> <td>$690<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27279"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27279">Xeon 3.2</a></td> <td>SL72Y (M0)<br />SL73Q (M0)</td> <td rowspan="2">3200 MHz</td> <td rowspan="2">24×</td> <td rowspan="2">92 W</td> <td>October 6, 2003</td> <td>RK80532KE0881M</td> <td>$851<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td><span class="anchor" id="27280"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27280">Xeon 3.2</a></td> <td>SL7AE (M0)<br /> SL7BW (M0)</td> <td>2048 KB</td> <td>February 2004<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup></td> <td>RK80532KE0882M</td> <td> </td></tr></tbody></table> <p><span class="anchor" id="Nocona"></span> </p> <div class="mw-heading mw-heading3"><h3 id=""Nocona"_(90_nm)"><span id=".22Nocona.22_.2890_nm.29"></span>"<a href="/wiki/Xeon#Nocona_and_Irwindale" title="Xeon">Nocona</a>" (90 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=5" title="Edit section: "Nocona" (90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a></i></li> <li>All models support dual-processor configurations</li> <li>2.8 GHz and 3.0 GHz models with no suffix are OEM models are tray processors while those with the D suffix are boxed one. All other are tray/boxed processors.</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 140 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: D0, E0, F1, G1</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th><a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Mult</a></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">Voltage</a></th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Standard voltage</b> </td></tr> <tr> <td><span class="anchor" id="27076"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27076">Xeon 2.8</a></td> <td>SL7DV (D0)<br />SL7HF (D0)<br />SL7TB (E0)<br /> SL84B (E0)</td> <td>2800 MHz</td> <td rowspan="7">1024 KB</td> <td rowspan="7">800 MT/s</td> <td>14×</td> <td rowspan="7">1.287–1.4 V</td> <td rowspan="7">103 W</td> <td rowspan="7"><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td rowspan="7">June 28, 2004</td> <td>NE80546KG0721M</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27077"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27077">Xeon 2.8D</a></td> <td>SL7PD (E0)<br />SL8KN (G1)</td> <td>2800 MHz</td> <td>14×</td> <td>B80546KG0721M</td> <td>$209 </td></tr> <tr> <td><span class="anchor" id="28014"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=28014">Xeon 3.0</a></td> <td>SL7DW (D0)<br />SL7HG (D0)<br />SL7TC (E0)</td> <td>3000 MHz</td> <td>15×</td> <td>RK80546KG0801M</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27093"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27093">Xeon 3.0D</a></td> <td>SL7PE (E0)<br />SL8KP (G1)</td> <td>3000 MHz</td> <td>15×</td> <td>NE80546KG0801M</td> <td>$316 </td></tr> <tr> <td><span class="anchor" id="28016"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=28016">Xeon 3.2</a></td> <td>SL7DX (D0)<br />SL7HH (D0)<br />SL7PF (E0)<br />SL7TD (E0)<br />SL8KQ (G1)</td> <td>3200 MHz</td> <td>16×</td> <td>RK80546KG0881M</td> <td>$455 </td></tr> <tr> <td><span class="anchor" id="27085"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27085">Xeon 3.4</a></td> <td>SL7DY (D0)<br />SL7HJ (D0)<br />SL7PG (E0)<br />SL7TE (E0)<br />SL8KR (G1)</td> <td>3400 MHz</td> <td>17×</td> <td>RK80546KG0961M</td> <td>$690 </td></tr> <tr> <td><span class="anchor" id="27088"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27088">Xeon 3.6</a></td> <td>SL7DZ (D0)<br />SL7HK (D0)<br />SL7PH (E0)<br />SL7VF (E0)<br />SL8KS (G1)</td> <td>3600 MHz</td> <td>18×</td> <td>RK80546KG1041M</td> <td>$851 </td></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Low voltage</b> </td></tr> <tr> <td><span class="anchor" id="27097"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27097">Xeon LV 2.8</a></td> <td>SL8RW (G0)</td> <td>2800 MHz</td> <td>1024 KB</td> <td>800 MT/s</td> <td>14x</td> <td>1.1125–1.2 V</td> <td>55 W</td> <td><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td>October 2004</td> <td>RK80546KG0721M</td> <td>$260 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Irwindale"_(90_nm)"><span id=".22Irwindale.22_.2890_nm.29"></span>"<a href="/wiki/Xeon#Nocona_and_Irwindale" title="Xeon">Irwindale</a>" (90 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=6" title="Edit section: "Irwindale" (90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/SpeedStep" title="SpeedStep">EIST</a>, <a href="/wiki/XD_bit" class="mw-redirect" title="XD bit">XD bit</a> (an <a href="/wiki/NX_bit" title="NX bit">NX bit</a> implementation)</i> and <i><a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a></i>.</li> <li>All models support dual-processor configurations</li> <li>Models with no suffix are tray processors with those with the E suffix are boxed processors.</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 135 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: N0, R0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th><a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Mult</a></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">Voltage</a></th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Standard voltage</b> </td></tr> <tr> <td><span class="anchor" id="33103"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=33103">Xeon 2.8</a></td> <td>SL7ZG (N0)<br />SL8ZR (N0)</td> <td rowspan="2">2800 MHz</td> <td rowspan="12">2048 KB</td> <td rowspan="12">800 MT/s</td> <td rowspan="2">14×</td> <td rowspan="3">1.25–1.388 V</td> <td rowspan="12">110 W</td> <td rowspan="12"><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td rowspan="2">September 26, 2005</td> <td>RK80546KG0722MM</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27078"></span><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/27078/64-bit-intel-xeon-processor-2-80e-ghz-2m-cache-800-mhz-fsb.html">Xeon 2.8E</a></td> <td>SL8P7 (R0)</td> <td>NE80546KG0722MM</td> <td>$209 </td></tr> <tr> <td><span class="anchor" id="28015"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=28015">Xeon 3.0</a><sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup></td> <td>SL8ZQ (N0)</td> <td rowspan="2">3000 MHz</td> <td rowspan="2">15x</td> <td rowspan="8">February 14, 2005</td> <td>RK80546KG0802MM</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27094"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27094">Xeon 3.0E</a></td> <td>SL7ZF (N0)<br />SL8P6 (R0)</td> <td>1.2875–1.3875 V</td> <td>NE80546JG0802MM</td> <td>$316 </td></tr> <tr> <td><span class="anchor" id="28017"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=28017">Xeon 3.2</a></td> <td>SL7ZE (N0)<br />SL8ZP (N0)</td> <td rowspan="2">3200 MHz</td> <td rowspan="2">16×</td> <td>1.25–1.388 V</td> <td>RK80546KG0882MM</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27083"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27083">Xeon 3.2E</a></td> <td>SL943 (N0)<br />SL8P5 (R0)</td> <td>1.2875–1.3875 V</td> <td>NE80546KG0882MM</td> <td>$455 </td></tr> <tr> <td><span class="anchor" id="28018"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=28018">Xeon 3.4</a></td> <td>SL7ZK (N0)<br />SL7ZD (N0)</td> <td rowspan="2">3400 MHz</td> <td rowspan="2">17×</td> <td>1.25–1.3875 V</td> <td>RK80546KG0962MM</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27086"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27086">Xeon 3.4E</a></td> <td>SL8P4 (R0)</td> <td>1.2875–1.3875 V</td> <td>NE80546KG0962MM</td> <td>$690 </td></tr> <tr> <td><span class="anchor" id="28019"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=28019">Xeon 3.6</a></td> <td>SL7ZC (N0) <br />SL7ZJ (N0)</td> <td rowspan="2">3600 MHz</td> <td rowspan="2">18×</td> <td>1.25–1.3875 V</td> <td>RK80546KG1042MM</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27089"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27089">Xeon 3.6E</a></td> <td>SL8P3 (R0)</td> <td rowspan="3">1.2875–1.3875 V</td> <td>NE80546KG1042MM</td> <td>$851 </td></tr> <tr> <td><span class="anchor" id="27091"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27091">Xeon 3.8</a></td> <td>SL8ZJ (N0)<br />SL7ZB (N0)</td> <td rowspan="2">3800 MHz</td> <td rowspan="2">19×</td> <td rowspan="2">September 26, 2005</td> <td>RK80546KG1122MM</td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27092"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27092">Xeon 3.8E</a></td> <td>SL93Z (N0)<br />SL8ZM (N0)<br />SL8ZN (N0)<br />SL8ZK (N0)<br />SL8P2 (R0)</td> <td>NE80546KG0722M</td> <td>$851 </td></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Medium voltage</b> </td></tr> <tr> <td><span class="anchor" id="Xeon_MV_3.2"></span><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/Intel-Mid%20voltage%20Xeon%203.2%20GHz%20-%20NE80546QG0882MM.html">Xeon MV 3.2</a></td> <td>SL8T3 (R0)</td> <td>3200 MHz</td> <td>2048 KB</td> <td>800 MT/s</td> <td>16×</td> <td>1.2125–1.3875 V</td> <td>90 W</td> <td>Socket 604</td> <td>September 26, 2005</td> <td>NE80546QG0882MM</td> <td>$487 </td></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Low voltage</b> </td></tr> <tr> <td><span class="anchor" id="28015"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=28015">Xeon LV 3.0</a><sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup></td> <td>SL8SV (R0)</td> <td>3000 MHz</td> <td>2048 KB</td> <td>800 MT/s</td> <td>15×</td> <td>1.05–1.20 V</td> <td>55 W</td> <td>Socket 604</td> <td>September 26, 2005</td> <td>NE80546JG0802MM</td> <td>$519 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Paxville_DP"_(90_nm)"><span id=".22Paxville_DP.22_.2890_nm.29"></span><a href="/wiki/Xeon#"Paxville_DP"" title="Xeon">"Paxville DP"</a> (90 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=7" title="Edit section: "Paxville DP" (90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a>, <a href="/wiki/XD_bit" class="mw-redirect" title="XD bit">XD bit</a> (an <a href="/wiki/NX_bit" title="NX bit">NX bit</a> implementation)</i></li> <li>All models support dual-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 206 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: A0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 Cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">FSB</a></th> <th>Mult</th> <th>Voltage</th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_Dollar" class="mw-redirect" title="United States Dollar">USD</a>) </th></tr> <tr> <td><span class="anchor" id="27202"></span><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/27202/intel-xeon-processor-2-80-ghz-4m-cache-800-mhz-fsb.html">Xeon 2.8</a></td> <td>SL8MA (A0)</td> <td>2800 MHz</td> <td>2× 2048 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a></td> <td>800 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT/s</a></td> <td>14×</td> <td>1.2875–1.4125 V</td> <td>135 W</td> <td><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td>October 10, 2005</td> <td>NE80551KG0724MM</td> <td>$1043 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Dempsey"_(65_nm)"><span id=".22Dempsey.22_.2865_nm.29"></span><a href="/wiki/Xeon#5000-series_"Dempsey"" title="Xeon">"Dempsey"</a> (65 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=8" title="Edit section: "Dempsey" (65 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup></li> <li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a>, <a href="/wiki/XD_bit" class="mw-redirect" title="XD bit">XD bit</a> (an <a href="/wiki/NX_bit" title="NX bit">NX bit</a> implementation), <a href="/wiki/Intel_VT-x" class="mw-redirect" title="Intel VT-x">Intel VT-x</a></i></li> <li>All models support dual-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die</a> size: 2× 81 mm²</li> <li>Demand Based Switching (Intel's Server <a href="/wiki/Speedstep" class="mw-redirect" title="Speedstep">EIST</a>): Supported by: All except 5060, 5063.</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 291 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: C1</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 Cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">FSB</a></th> <th>Mult</th> <th>Voltage</th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_Dollar" class="mw-redirect" title="United States Dollar">USD</a>) </th></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Standard voltage</b> </td></tr> <tr> <td><span class="anchor" id="Xeon_5020"></span><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/Intel-Xeon%205020%20-%20HH80555KF0604M%20(BX805555020A%20-%20BX805555020P).html">Xeon 5020</a></td> <td>SL96F (C1)</td> <td>2500 MHz</td> <td rowspan="7">2× 2048 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a></td> <td rowspan="4">667 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT/s</a></td> <td>15x</td> <td rowspan="7">1.075–1.35 V</td> <td rowspan="4">95 W</td> <td rowspan="7"><a href="/wiki/LGA_771" title="LGA 771">LGA 771</a></td> <td>2006</td> <td>HH80555KF0604M <p>BX805555020A BX805555020P || OEM </p> </td></tr> <tr> <td><span class="anchor" id="27208"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27208">Xeon 5030</a></td> <td>SL96E (C1)</td> <td>2667 MHz</td> <td>16×</td> <td>May 23, 2006</td> <td>HH80555KF0674M <p>BX805555030A BX805555030P || $156 </p> </td></tr> <tr> <td><span class="anchor" id="27209"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27209">Xeon 5040</a></td> <td>SL96D (C1)</td> <td>2833 MHz</td> <td>17×</td> <td>2006</td> <td>HH80555KF0734M <p>BX805555040A </p> </td> <td>OEM </td></tr> <tr> <td><span class="anchor" id="27210"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27210">Xeon 5050</a></td> <td>SL96C (C1)</td> <td>3000 MHz</td> <td>18×</td> <td>May 23, 2006</td> <td>HH80555KF0804M <p>BX805555050A BX805555050P || $177 </p> </td></tr> <tr> <td><span class="anchor" id="27211"></span><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/27211/intel-xeon-processor-5060-4m-cache-3-20-ghz-1066-mhz-fsb.html">Xeon 5060</a></td> <td>SL96A (C1)</td> <td>3200 MHz</td> <td rowspan="3">1066 MT/s</td> <td>12×</td> <td rowspan="3">130 W</td> <td>May 23, 2006</td> <td>HH80555KH0884M <p>BX805555060A BX805555060P || $316 </p> </td></tr> <tr> <td><span class="anchor" id="27212"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27212">Xeon 5070</a></td> <td>SL969 (C1)</td> <td>3467 MHz</td> <td>13×</td> <td>2006</td> <td>HH80555KH0994M <p>BX805555070A BX805555070P || OEM </p> </td></tr> <tr> <td><span class="anchor" id="27213"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27213">Xeon 5080</a></td> <td>SL968 (C1)</td> <td>3733 MHz</td> <td>14×</td> <td>May 23, 2006</td> <td>HH80555KH1094M <p>BX805555080A BX805555080P || $851 </p> </td></tr> <tr> <td colspan="12" style="text-align:left; background:#127cc1; color:white;"><b>Medium voltage</b> </td></tr> <tr> <td><span class="anchor" id="28020"></span><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/28020/intel-xeon-processor-5063-4m-cache-3-20-ghz-1066-mhz-fsb.html">Xeon 5063</a></td> <td>SL96B (C1)</td> <td>3200 MHz</td> <td>2× 2048 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a></td> <td>1066 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT/s</a></td> <td>12×</td> <td>1.075–1.35 V</td> <td>95 W</td> <td><a href="/wiki/LGA_771" title="LGA 771">LGA 771</a></td> <td>May 23, 2006</td> <td>HH80555QH0884M</td> <td>$369 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Xeon_MP_(later_Xeon_7000_series)"><span id="Xeon_MP_.28later_Xeon_7000_series.29"></span>Xeon MP (later Xeon 7000 series)</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=9" title="Edit section: Xeon MP (later Xeon 7000 series)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id=""Foster_MP"_(180_nm)"><span id=".22Foster_MP.22_.28180_nm.29"></span>"<a href="/wiki/Xeon#Foster" title="Xeon">Foster MP</a>" (180 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=10" title="Edit section: "Foster MP" (180 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a></i></li> <li>All models support quad-processor and octo-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 241 mm²</li> <li><a href="/wiki/Stepping_level" title="Stepping level">Steppings</a>: C0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th>L3 cache</th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th>Multiplier</th> <th>Voltage</th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td><span class="anchor" id="27293"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27293">Xeon MP 1.4</a></td> <td>SL5FZ (C0)<br />SL5RV (C0)</td> <td>1400 MHz</td> <td rowspan="3">256 KB</td> <td rowspan="2">512 KB</td> <td rowspan="3">400 MT/s</td> <td>14×</td> <td rowspan="3">1.75 V</td> <td>64 W</td> <td rowspan="3"><a href="/wiki/Socket_603" title="Socket 603">Socket 603</a></td> <td rowspan="3">March 12, 2002</td> <td>YF80528KC017512</td> <td>$1177 </td></tr> <tr> <td><span class="anchor" id="27295"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27295">Xeon MP 1.5</a></td> <td>SL5G2 (C0)<br />SL5RW (C0)</td> <td>1500 MHz</td> <td>15×</td> <td>68 W</td> <td>YF80528KC021512</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="27296"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27296">Xeon MP 1.6</a></td> <td>SL5G8 (C0)<br />SL5S4 (C0)</td> <td>1600 MHz</td> <td>1024 KB</td> <td>16×</td> <td>72 W</td> <td>YF80528KC0251M</td> <td>$3692 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Gallatin"_(130_nm)_2"><span id=".22Gallatin.22_.28130_nm.29_2"></span>"<a href="/wiki/Xeon#Gallatin" title="Xeon">Gallatin</a>" (130 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=11" title="Edit section: "Gallatin" (130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup></li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a></i></li> <li>All models support quad-processor and octo-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 226 mm²</li> <li><a href="/wiki/Stepping_level" title="Stepping level">Steppings</a>: A0, B1, C0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th>L3 cache</th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th>Multiplier</th> <th>Voltage</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td><span class="anchor" id="27294"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27294">Xeon MP 1.5</a></td> <td>SL6GZ (A0)<br />SL6KB (A0)</td> <td>1500 MHz</td> <td rowspan="9">512 KB</td> <td rowspan="3">1024 KB</td> <td rowspan="9">400 MT/s</td> <td>15×</td> <td rowspan="8">1.475 V</td> <td>48 W</td> <td><a href="/wiki/Socket_603" title="Socket 603">Socket 603</a></td> <td rowspan="2">November 4, 2002</td> <td>RN80532KC0211M BX80532KC1500E</td> <td>$1177 </td></tr> <tr> <td><span class="anchor" id="27297"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27297">Xeon MP 1.9</a></td> <td>SL6H2 (A0)<br />SL6KC (A0)</td> <td>1900 MHz</td> <td>19×</td> <td>55 W</td> <td>Socket 603</td> <td>RN80532KC0371M BX80532KC1900E</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="27298"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27298">Xeon MP 2.0</a></td> <td>SL6YJ (B1)<br />SL6Z6 (B1)</td> <td rowspan="2">2000 MHz</td> <td rowspan="2">20×</td> <td rowspan="2">57 W</td> <td>Socket 603</td> <td>June 30, 2003</td> <td>RN80532KC0411M BX80532KC2000E</td> <td>$856 </td></tr> <tr> <td><span class="anchor" id="27299"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27299">Xeon MP 2.0</a></td> <td>SL66Z (A0)<br />SL6KD (A0)</td> <td rowspan="2">2048 KB</td> <td>Socket 603</td> <td>November 4, 2002</td> <td>RN80532KC0412M BX80532KC2000F</td> <td>$3692 </td></tr> <tr> <td><span class="anchor" id="27300"></span><a rel="nofollow" class="external text" href="http://ark.intel.com/Product.aspx?id=27300https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27300">Xeon MP 2.2</a></td> <td>SL7A5 (C0)</td> <td>2200 MHz</td> <td>22×</td> <td>65 W</td> <td>Socket 603</td> <td>March 2, 2004</td> <td>RN80532KC0492M BX80532KC2200F</td> <td>$1177 </td></tr> <tr> <td><span class="anchor" id="27301"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27301">Xeon MP 2.5</a></td> <td>SL6Z2 (B1)<br />SL6Z7 (B1)</td> <td>2500 MHz</td> <td>1024 KB</td> <td>25×</td> <td>66 W</td> <td>Socket 603</td> <td>June 30, 2003</td> <td>RN80532KC0601M BX80532KC2500E</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="27302"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27302">Xeon MP 2.7</a></td> <td>SL79Z (C0)</td> <td>2700 MHz</td> <td rowspan="2">2048 KB</td> <td>27×</td> <td>80 W</td> <td>Socket 603</td> <td>March 2, 2004</td> <td>RN80532KC0682M BX80532KC2700F</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="27303"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27303">Xeon MP 2.8</a></td> <td>SL6YL (B1)<br />SL6Z8 (B1)</td> <td>2800 MHz</td> <td>28×</td> <td>72 W</td> <td>Socket 603</td> <td>June 30, 2003</td> <td>RN80532KC0722M BX80532KC2800F</td> <td>$3692 </td></tr> <tr> <td><span class="anchor" id="27304"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27304">Xeon MP 3.0</a></td> <td>SL79V (C0)</td> <td>3000 MHz</td> <td>4096 KB</td> <td>30×</td> <td>1.5 V</td> <td>85 W</td> <td>Socket 603</td> <td>March 2, 2004</td> <td>RN80532KC0804M BX80532KC3000H</td> <td>$3692 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Cranford"_(90_nm)"><span id=".22Cranford.22_.2890_nm.29"></span>"<a href="/wiki/Xeon#Cranford_and_Potomac" title="Xeon">Cranford</a>" (90 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=12" title="Edit section: "Cranford" (90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a>, <a href="/wiki/XD_bit" class="mw-redirect" title="XD bit">XD bit</a> (an <a href="/wiki/NX_bit" title="NX bit">NX bit</a> implementation)</i></li> <li>All models support quad-processor and octo-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 236 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: A0, B0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th><a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Mult</a></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">Voltage</a></th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td><span class="anchor" id="27101"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27101">Xeon MP 3.16</a></td> <td>SL84U (A0)<br /> SL8UM (B0)</td> <td>3166 MHz</td> <td rowspan="2">1024 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a></td> <td rowspan="2">667 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT/s</a></td> <td>19×</td> <td rowspan="2">1.2875V-1.4V</td> <td rowspan="2">110 W</td> <td rowspan="2"><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td>March 29, 2005</td> <td>RK80546KF0871M</td> <td>$722 </td></tr> <tr> <td><span class="anchor" id="27103"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27103">Xeon MP 3.66</a></td> <td>SL84W (A0)<br /> SL8UN (B0)</td> <td>3667 MHz</td> <td>22×</td> <td>March 29, 2005</td> <td>RK80546KF1071M</td> <td>$963 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Potomac"_(90_nm)"><span id=".22Potomac.22_.2890_nm.29"></span>"<a href="/wiki/Xeon#Cranford_and_Potomac" title="Xeon">Potomac</a>" (90 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=13" title="Edit section: "Potomac" (90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a>, <a href="/wiki/XD_bit" class="mw-redirect" title="XD bit">XD bit</a> (an <a href="/wiki/NX_bit" title="NX bit">NX bit</a> implementation)</i></li> <li>All models support quad-processor and octo-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 236 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: C0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L3 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th><a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Mult</a></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">Voltage</a></th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td><span class="anchor" id="27099"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110413033303/http://ark.intel.com/Product.aspx?id=27099">Xeon MP 2.83</a></td> <td>SL8ED (C0)</td> <td>2833 MHz</td> <td rowspan="3">1024 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a></td> <td>4096 KB</td> <td rowspan="3">667 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT/s</a></td> <td>17×</td> <td rowspan="3">1.25–1.4 V</td> <td rowspan="3">129 W</td> <td><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td>March 29, 2005</td> <td>RK80546KF0734M</td> <td>$1177 </td></tr> <tr> <td><span class="anchor" id="27100"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27100">Xeon MP 3.0</a></td> <td>SL8EW (C0)</td> <td>3000 MHz</td> <td rowspan="2">8192 KB</td> <td>18×</td> <td>Socket 604</td> <td>March 29, 2005</td> <td>RK80546KF0808M</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="27102"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110603064935/http://ark.intel.com/Product.aspx?id=27102">Xeon MP 3.33</a></td> <td>SL8EY (C0)</td> <td>3333 MHz</td> <td>20×</td> <td>Socket 604</td> <td>March 29, 2005</td> <td>RK80546KF0938M</td> <td>$3692 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Paxville_MP"_(90_nm)"><span id=".22Paxville_MP.22_.2890_nm.29"></span><a href="/wiki/Xeon#7000-series_"Paxville_MP"" title="Xeon">"Paxville MP"</a> (90 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=14" title="Edit section: "Paxville MP" (90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a>, <a href="/wiki/XD_bit" class="mw-redirect" title="XD bit">XD bit</a> (an <a href="/wiki/NX_bit" title="NX bit">NX bit</a> implementation), <a href="/wiki/Intel_VT-x" class="mw-redirect" title="Intel VT-x">Intel VT-x</a></i></li> <li>Demand Based Switching (Intel's Server <a href="/wiki/Speedstep" class="mw-redirect" title="Speedstep">EIST</a>): All except 7030.</li> <li>All models support quad-processor and octo-processor configurations</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die size</a>: 206 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: A0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th><a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Mult</a></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">Voltage</a></th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td><span class="anchor" id="27224"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305082335/http://ark.intel.com/Product.aspx?id=27224">Xeon 7020</a></td> <td>SL8UA (A0)</td> <td>2667 MHz</td> <td>2× 1024 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a></td> <td>667 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT/s</a></td> <td>16×</td> <td rowspan="4">1.2625–1.4125 V</td> <td rowspan="4">165 W</td> <td rowspan="4"><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td rowspan="4">November 1, 2005</td> <td>NE80560KF0672MH</td> <td>$1177 </td></tr> <tr> <td><span class="anchor" id="27225"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305082340/http://ark.intel.com/Product.aspx?id=27225">Xeon 7030</a></td> <td>SL8UB (A0)</td> <td>2800 MHz</td> <td>2× 1024 KB</td> <td>800 MT/s</td> <td>14×</td> <td>NE80560KG0722MH</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="27226"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085620/http://ark.intel.com/Product.aspx?id=27226">Xeon 7040</a></td> <td>SL8UC (A0)</td> <td rowspan="2">3000 MHz</td> <td rowspan="2">2× 2048 KB</td> <td>667 MT/s</td> <td>18×</td> <td>NE80560KF0804MH</td> <td>$3157 </td></tr> <tr> <td><span class="anchor" id="27227"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085625/http://ark.intel.com/Product.aspx?id=27227">Xeon 7041</a></td> <td>SL8UD (A0)</td> <td>800 MT/s</td> <td>15×</td> <td>NE80560KG0804MH</td> <td>$3157 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id=""Tulsa"_(65_nm)"><span id=".22Tulsa.22_.2865_nm.29"></span><a href="/wiki/Xeon#7100-series_"Tulsa"" title="Xeon">"Tulsa"</a> (65 nm)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=15" title="Edit section: "Tulsa" (65 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Intel_Xeon_7130M_Die-shot_(Tulsa).jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/5/58/Intel_Xeon_7130M_Die-shot_%28Tulsa%29.jpg/220px-Intel_Xeon_7130M_Die-shot_%28Tulsa%29.jpg" decoding="async" width="220" height="240" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/5/58/Intel_Xeon_7130M_Die-shot_%28Tulsa%29.jpg/330px-Intel_Xeon_7130M_Die-shot_%28Tulsa%29.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/5/58/Intel_Xeon_7130M_Die-shot_%28Tulsa%29.jpg/440px-Intel_Xeon_7130M_Die-shot_%28Tulsa%29.jpg 2x" data-file-width="13846" data-file-height="15125" /></a><figcaption>Intel Xeon 7130M Die-shot (Tulsa)</figcaption></figure> <ul><li>Based on <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a> microarchitecture</li> <li><i>All models support: <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/Hyper-Threading" class="mw-redirect" title="Hyper-Threading">Hyper-Threading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a>, <a href="/wiki/XD_bit" class="mw-redirect" title="XD bit">XD bit</a> (an <a href="/wiki/NX_bit" title="NX bit">NX bit</a> implementation), <a href="/wiki/Intel_VT-x" class="mw-redirect" title="Intel VT-x">Intel VT-x</a></i></li> <li>All models support quad-processor and octo-processor configurations</li> <li>Demand Based Switching (Intel's Server <a href="/wiki/Speedstep" class="mw-redirect" title="Speedstep">EIST</a>): Supported by: All except 7110M/N & 7120M/N.</li> <li>N models feature a 667 MT/s FSB while M models feature an 800 MT/s FSB</li> <li><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die</a> size: 435 mm²</li> <li><a href="/wiki/Stepping_(version_numbers)" class="mw-redirect" title="Stepping (version numbers)">Steppings</a>: B0</li></ul> <table class="wikitable sortable"> <tbody><tr> <th>Model number</th> <th>sSpec number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L3 cache</a></th> <th><a href="/wiki/Front_Side_Bus" class="mw-redirect" title="Front Side Bus">Front side bus</a></th> <th><a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Mult</a></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">Voltage</a></th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release price (<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <td><span class="anchor" id="27282"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085635/http://ark.intel.com/Product.aspx?id=27282">Xeon 7110N</a></td> <td>SL9QA (B0)</td> <td>2500 MHz</td> <td rowspan="9">2× 1024 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a></td> <td rowspan="4">4096 KB</td> <td>667 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT/s</a></td> <td>15×</td> <td rowspan="9">1.1–1.35 V</td> <td rowspan="4">95 W</td> <td rowspan="9"><a href="/wiki/Socket_604" title="Socket 604">Socket 604</a></td> <td rowspan="8">August 27, 2006</td> <td>LF80550KF0604M</td> <td>$856 </td></tr> <tr> <td><span class="anchor" id="27281"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085635/http://ark.intel.com/Product.aspx?id=27281">Xeon 7110M</a></td> <td>SL9Q9 (B0)</td> <td>2600 MHz</td> <td>800 MT/s</td> <td>13×</td> <td>LF80550KG0644M</td> <td>$856 </td></tr> <tr> <td><span class="anchor" id="27284"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085645/http://ark.intel.com/Product.aspx?id=27284">Xeon 7120N</a></td> <td>SL9HF (B0)</td> <td rowspan="2">3000 MHz</td> <td>667 MT/s</td> <td>18×</td> <td>LF80550KF0804M</td> <td>$1177 </td></tr> <tr> <td><span class="anchor" id="27283"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085640/http://ark.intel.com/Product.aspx?id=27283">Xeon 7120M</a></td> <td>SL9HC (B0)</td> <td>800 MT/s</td> <td>15x</td> <td>LF80550KG0804M</td> <td>$1177 </td></tr> <tr> <td><span class="anchor" id="27286"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305082350/http://ark.intel.com/Product.aspx?id=27286">Xeon 7130N</a></td> <td>SL9HE (B0)</td> <td>3166 MHz</td> <td rowspan="2">8192 KB</td> <td>667 MT/s</td> <td>19×</td> <td rowspan="4">150 W</td> <td>LF80550KF0878M</td> <td>$1391 </td></tr> <tr> <td><span class="anchor" id="27285"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085650/http://ark.intel.com/Product.aspx?id=27285">Xeon 7130M</a></td> <td>SL9HB (B0)</td> <td>3200 MHz</td> <td>800 MT/s</td> <td>16×</td> <td>LF80550KG0888M</td> <td>$1391 </td></tr> <tr> <td><span class="anchor" id="27288"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305085655/http://ark.intel.com/Product.aspx?id=27288">Xeon 7140N</a></td> <td>SL9HD (B0)</td> <td>3333 MHz</td> <td rowspan="3">16384 KB</td> <td>667 MT/s</td> <td>20×</td> <td>LF80550KF093007</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="27287"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305084032/http://ark.intel.com/Product.aspx?id=27287">Xeon 7140M</a></td> <td>SL9HA (B0)</td> <td>3400 MHz</td> <td>800 MT/s</td> <td>17×</td> <td>LF80550KG096007</td> <td>$1980 </td></tr> <tr> <td><span class="anchor" id="28029"></span><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110305082425/http://ark.intel.com/Product.aspx?id=28029">Xeon 7150N</a></td> <td>SL9YR (B0)</td> <td>3500 MHz</td> <td>667 MT/s</td> <td>21×</td> <td>150 W</td> <td>Q1 2007</td> <td>LF80550KF100007</td> <td>$2622 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&action=edit&section=16" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div 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center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2001/20010521comp_a.htm">"Intel Introduces The First Generation Of Intel Xeon Processors"</a>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=Intel+Introduces+The+First+Generation+Of+Intel+Xeon+Processors&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2001%2F20010521comp_a.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2001/20010925comp.htm">"Intel® Xeon™ Processors Reach 2 Gigahertz For Workstations"</a>. <i>Intel</i><span class="reference-accessdate">. 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Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=New+Intel%C2%AE+Xeon%E2%84%A2+Server+Processors+And+Chipset+Boost+System+Performance+Up+To+80+Percent&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2002%2F20020225comp.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-intel0211-4"><span class="mw-cite-backlink">^ <a href="#cite_ref-intel0211_4-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-intel0211_4-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-intel0211_4-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-intel0211_4-3"><sup><i><b>d</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2002/20021118comp.htm">"Intel Refreshes Intel® Xeon™ Processor Portfolio Lineup"</a>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=Intel+Refreshes+Intel%C2%AE+Xeon%E2%84%A2+Processor+Portfolio+Lineup&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2002%2F20021118comp.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2002/20020423comp_a.htm">"Intel® Xeon™ Processors For Dual Servers And Workstations Accelerate To 2.40 Gigahertz"</a>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=Intel%C2%AE+Xeon%E2%84%A2+Processors+For+Dual+Servers+And+Workstations+Accelerate+To+2.40+Gigahertz&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2002%2F20020423comp_a.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-intel0209-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-intel0209_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-intel0209_6-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2002/20020911comp.htm">"New Intel® Xeon™ Processors Ship For Dual Processing Systems At 2.8 And 2.6 Gigahertz"</a>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=New+Intel%C2%AE+Xeon%E2%84%A2+Processors+Ship+For+Dual+Processing+Systems+At+2.8+And+2.6+Gigahertz&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2002%2F20020911comp.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-intel0303-7"><span class="mw-cite-backlink">^ <a href="#cite_ref-intel0303_7-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-intel0303_7-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2003/20030310comp.htm">"Intel® Xeon™ Processors Speed Past 3 GHz"</a>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=Intel%C2%AE+Xeon%E2%84%A2+Processors+Speed+Past+3+GHz&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2003%2F20030310comp.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2003/20030714comp.htm">"New Intel® Xeon™ Processor Boosts Performance For Dual Processor Servers And Workstations"</a>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=New+Intel%C2%AE+Xeon%E2%84%A2+Processor+Boosts+Performance+For+Dual+Processor+Servers+And+Workstations&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2003%2F20030714comp.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/pressroom/archive/releases/2003/20031006comp.htm">"New Intel® Xeon™ Processor Provides High Performance For Dual Processor Server Needs"</a>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2022-08-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=New+Intel%C2%AE+Xeon%E2%84%A2+Processor+Provides+High+Performance+For+Dual+Processor+Server+Needs&rft_id=https%3A%2F%2Fwww.intel.com%2Fpressroom%2Farchive%2Freleases%2F2003%2F20031006comp.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://download.intel.com/support/processors/xeon/sb/249678.pdf">"Intel Xeon Processor Specification Update"</a> <span class="cs1-format">(PDF)</span>. p. 7<span class="reference-accessdate">. Retrieved <span class="nowrap">2008-05-21</span></span>. <q>-035  Added new Processor Intel Xeon Processor with 2-MB L3 Cache with Processor Signature=0F25H (M0 Stepping). February 2004</q></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Intel+Xeon+Processor+Specification+Update&rft.pages=7&rft_id=http%3A%2F%2Fdownload.intel.com%2Fsupport%2Fprocessors%2Fxeon%2Fsb%2F249678.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/Intel-Xeon%203%20GHz%20-%20RK80546KG0802MM%20-%20NE80546KG0802MM%20(BX80546KG3000FA).html">"standard voltage Xeon 3.0"</a><span class="reference-accessdate">. Retrieved <span class="nowrap">30 October</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=standard+voltage+Xeon+3.0&rft_id=http%3A%2F%2Fwww.cpu-world.com%2FCPUs%2FXeon%2FIntel-Xeon%25203%2520GHz%2520-%2520RK80546KG0802MM%2520-%2520NE80546KG0802MM%2520%28BX80546KG3000FA%29.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/Intel-Low%20voltage%20Xeon%203%20GHz%20-%20NE80546JG0802MM.html">"Low voltage Xeon 3 GHz"</a><span class="reference-accessdate">. Retrieved <span class="nowrap">30 October</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Low+voltage+Xeon+3+GHz&rft_id=http%3A%2F%2Fwww.cpu-world.com%2FCPUs%2FXeon%2FIntel-Low%2520voltage%2520Xeon%25203%2520GHz%2520-%2520NE80546JG0802MM.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/TYPE-Xeon%205000.html">"Intel Xeon 5000 microprocessor family"</a>. <i>cpu-world.com</i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=cpu-world.com&rft.atitle=Intel+Xeon+5000+microprocessor+family&rft_id=http%3A%2F%2Fwww.cpu-world.com%2FCPUs%2FXeon%2FTYPE-Xeon%25205000.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://ark.intel.com/products/codename/1927/Gallatin?q=gallatin">"Products (Formerly Gallatin)"</a>. <i>Intel ARK (Product Specs)</i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel+ARK+%28Product+Specs%29&rft.atitle=Products+%28Formerly+Gallatin%29&rft_id=http%3A%2F%2Fark.intel.com%2Fproducts%2Fcodename%2F1927%2FGallatin%3Fq%3Dgallatin&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> <li id="cite_note-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-15">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/TYPE-Xeon%20MP%20Gallatin.html">"Intel Xeon MP Gallatin microprocessor family"</a>. <i>cpu-world.com</i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=cpu-world.com&rft.atitle=Intel+Xeon+MP+Gallatin+microprocessor+family&rft_id=http%3A%2F%2Fwww.cpu-world.com%2FCPUs%2FXeon%2FTYPE-Xeon%2520MP%2520Gallatin.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+Intel+Xeon+processors+%28NetBurst-based%29" class="Z3988"></span></span> </li> </ol></div></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1&useformat=desktop" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&oldid=1237902349">https://en.wikipedia.org/w/index.php?title=List_of_Intel_Xeon_processors_(NetBurst-based)&oldid=1237902349</a>"</div></div> <div id="catlinks" class="catlinks" data-mw="interface"><div id="mw-normal-catlinks" class="mw-normal-catlinks"><a href="/wiki/Help:Category" title="Help:Category">Category</a>: <ul><li><a href="/wiki/Category:Lists_of_microprocessors" title="Category:Lists of microprocessors">Lists of microprocessors</a></li></ul></div><div id="mw-hidden-catlinks" class="mw-hidden-catlinks mw-hidden-cats-hidden">Hidden categories: <ul><li><a href="/wiki/Category:Articles_with_short_description" title="Category:Articles with short description">Articles with short description</a></li><li><a href="/wiki/Category:Short_description_is_different_from_Wikidata" title="Category:Short description is different from Wikidata">Short description is different from Wikidata</a></li></ul></div></div> </div> </main> </div> <div class="mw-footer-container"> <footer id="footer" class="mw-footer" > <ul id="footer-info"> <li id="footer-info-lastmod"> This page was last edited on 1 August 2024, at 02:13<span class="anonymous-show"> (UTC)</span>.</li> <li id="footer-info-copyright">Text is available under the <a href="/wiki/Wikipedia:Text_of_the_Creative_Commons_Attribution-ShareAlike_4.0_International_License" title="Wikipedia:Text of the Creative Commons Attribution-ShareAlike 4.0 International License">Creative Commons Attribution-ShareAlike 4.0 License</a>; additional terms may apply. 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