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subsection</span> </button> <ul id="toc-History_and_background-sublist" class="vector-toc-list"> <li id="toc-Silicon_gate" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Silicon_gate"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1</span> <span>Silicon gate</span> </div> </a> <ul id="toc-Silicon_gate-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-NMOS_and_back-gate_bias" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#NMOS_and_back-gate_bias"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2</span> <span>NMOS and back-gate bias</span> </div> </a> <ul id="toc-NMOS_and_back-gate_bias-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Depletion-mode_transistors" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Depletion-mode_transistors"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.3</span> <span>Depletion-mode transistors</span> </div> </a> <ul id="toc-Depletion-mode_transistors-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Intel_HMOS" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Intel_HMOS"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.4</span> <span>Intel HMOS</span> </div> </a> <ul id="toc-Intel_HMOS-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Further_development" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Further_development"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.5</span> <span>Further development</span> </div> </a> <ul id="toc-Further_development-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Compared_to_CMOS" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Compared_to_CMOS"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Compared to CMOS</span> </div> </a> <ul id="toc-Compared_to_CMOS-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Evolution_from_preceding_NMOS_types" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Evolution_from_preceding_NMOS_types"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Evolution from preceding NMOS types</span> </div> </a> <ul id="toc-Evolution_from_preceding_NMOS_types-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Static_power_consumption" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Static_power_consumption"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Static power consumption</span> </div> </a> <ul id="toc-Static_power_consumption-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Notes_and_references" class="vector-toc-list-item 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id="mw-content-subtitle"><span class="mw-redirectedfrom">(Redirected from <a href="/w/index.php?title=Depletion-load_NMOS&redirect=no" class="mw-redirect" title="Depletion-load NMOS">Depletion-load NMOS</a>)</span></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Form of digital logic family in integrated circuits</div> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Nmos_depletion_and.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/c/c4/Nmos_depletion_and.svg/220px-Nmos_depletion_and.svg.png" decoding="async" width="220" height="303" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/c/c4/Nmos_depletion_and.svg/330px-Nmos_depletion_and.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/c/c4/Nmos_depletion_and.svg/440px-Nmos_depletion_and.svg.png 2x" data-file-width="200" data-file-height="275" /></a><figcaption>A depletion-load NMOS <a href="/wiki/NAND_gate" title="NAND gate">NAND gate</a></figcaption></figure> <p>In <a href="/wiki/Integrated_circuit" title="Integrated circuit">integrated circuits</a>, <b>depletion-load NMOS</b> is a form of digital <a href="/wiki/Logic_family" title="Logic family">logic family</a> that uses only a single power supply voltage, unlike earlier <a href="/wiki/NMOS_logic" title="NMOS logic">NMOS</a> (n-type <a href="/wiki/Metal-oxide_semiconductor" class="mw-redirect" title="Metal-oxide semiconductor">metal-oxide semiconductor</a>) logic families that needed more than one different power supply voltage. Although manufacturing these integrated circuits required additional processing steps, improved switching speed and the elimination of the extra power supply made this logic family the preferred choice for many <a href="/wiki/Microprocessor" title="Microprocessor">microprocessors</a> and other logic elements. </p><p><a href="/wiki/Depletion_and_enhancement_modes" title="Depletion and enhancement modes">Depletion-mode</a> n-type <a href="/wiki/MOSFET" title="MOSFET">MOSFETs</a> as load transistors allow single voltage operation and achieve greater speed than possible with pure enhancement-load devices. This is partly because the depletion-mode MOSFETs can be a better <a href="/wiki/Current_source" title="Current source">current source</a> approximation than the simpler enhancement-mode transistor can, especially when no extra voltage is available (one of the reasons early PMOS and NMOS chips demanded several voltages). </p><p>The inclusion of depletion-mode NMOS transistors in the <a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">manufacturing process</a> demanded additional manufacturing steps compared to the simpler enhancement-load circuits; this is because depletion-load devices are formed by increasing the amount of <a href="/wiki/Dopant" title="Dopant">dopant</a> in the load transistors channel region, in order to adjust their <a href="/wiki/Threshold_voltage" title="Threshold voltage">threshold voltage</a>. This is normally performed using <a href="/wiki/Ion_implantation" title="Ion implantation">ion implantation</a>. </p><p>Although the <a href="/wiki/CMOS" title="CMOS">CMOS</a> process replaced most NMOS designs during the 1980s, some depletion-load NMOS designs are still produced, typically in parallel with newer CMOS counterparts. One example of this is the <a href="/wiki/Zilog_Z80" title="Zilog Z80">Z84015</a><sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> and Z84C15.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="History_and_background">History and background</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=1" title="Edit section: History and background"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/NMOS_logic#History" title="NMOS logic">NMOS logic § History</a></div> <p>The original two types of MOSFET logic gates, PMOS and <a href="/wiki/NMOS_logic" title="NMOS logic">NMOS</a>, were developed by Frosch and Derick in 1957 at Bell Labs.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> Following this research, <a href="/wiki/Mohamed_Atalla" class="mw-redirect" title="Mohamed Atalla">Atalla</a> and <a href="/wiki/Dawon_Kahng" title="Dawon Kahng">Kahng</a> proposed demonstrated a working MOS device with their Bell Labs team in 1960.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> Their team included E. E. LaBate and E. I. Povilonis who fabricated the device; M. O. Thurston, L. A. D’Asaro, and J. R. Ligenza who developed the diffusion processes, and H. K. Gummel and R. Lindner who characterized the device.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> However, the NMOS devices were impractical, and only the PMOS type were practical working devices.<sup id="cite_ref-Lojek_7-0" class="reference"><a href="#cite_note-Lojek-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p><p>In 1965, <a href="/wiki/Chih-Tang_Sah" title="Chih-Tang Sah">Chih-Tang Sah</a>, Otto Leistiko and <a href="/wiki/Andrew_Grove" title="Andrew Grove">A.S. Grove</a> at <a href="/wiki/Fairchild_Semiconductor" title="Fairchild Semiconductor">Fairchild Semiconductor</a> fabricated several NMOS devices with channel lengths between <a href="/wiki/10_%CE%BCm_process" class="mw-redirect" title="10 μm process">8<span class="nowrap"> </span>μm</a> and 65<span class="nowrap"> </span>μm.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> Dale L. Critchlow and <a href="/wiki/Robert_H._Dennard" title="Robert H. Dennard">Robert H. Dennard</a> at <a href="/wiki/IBM" title="IBM">IBM</a> also fabricated NMOS devices in the 1960s. The first IBM NMOS product was a <a href="/wiki/Memory_chip" class="mw-redirect" title="Memory chip">memory chip</a> with 1<span class="nowrap"> </span><a href="/wiki/Kibibit" class="mw-redirect" title="Kibibit">kb</a> data and 50–100 <a href="/wiki/Nanosecond" title="Nanosecond">ns</a> <a href="/wiki/Access_time" title="Access time">access time</a>, which entered large-scale manufacturing in the early 1970s. This led to MOS <a href="/wiki/Semiconductor_memory" title="Semiconductor memory">semiconductor memory</a> replacing earlier <a href="/wiki/Bipolar_junction_transistor" title="Bipolar junction transistor">bipolar</a> and <a href="/wiki/Ferrite-core_memory" class="mw-redirect" title="Ferrite-core memory">ferrite-core memory</a> technologies in the 1970s.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Silicon_gate">Silicon gate</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=2" title="Edit section: Silicon gate"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In the late 1960s, <a href="/wiki/Bipolar_junction_transistor" title="Bipolar junction transistor">bipolar junction transistors</a> were faster than (p-channel) MOS transistors then used and were more reliable, but they also consumed much more power, required more area, and demanded a more complicated manufacturing process. MOS ICs were considered interesting but inadequate for supplanting the fast bipolar circuits in anything but niche markets, such as low power applications. One of the reasons for the low speed was that MOS transistors had <a href="/wiki/Gate_(transistor)" class="mw-redirect" title="Gate (transistor)">gates</a> made of <a href="/wiki/Aluminum" class="mw-redirect" title="Aluminum">aluminum</a> which led to considerable <a href="/wiki/Parasitic_capacitance" title="Parasitic capacitance">parasitic capacitances</a> using the manufacturing processes of the time. The introduction of transistors with gates of <a href="/wiki/Polycrystalline_silicon" title="Polycrystalline silicon">polycrystalline silicon</a> (that became the <i>de facto</i> standard from the mid-1970s to early 2000s) was an important first step in order to reduce this handicap. This new <a href="/wiki/Self-aligned_gate" title="Self-aligned gate"><i>self-aligned silicon-gate</i></a> transistor was introduced by <a href="/wiki/Federico_Faggin" title="Federico Faggin">Federico Faggin</a> at <a href="/wiki/Fairchild_Semiconductor" title="Fairchild Semiconductor">Fairchild Semiconductor</a> in early 1968; it was a refinement (and the first working implementation) of ideas and work by John C. Sarace, Tom Klein and <a href="/wiki/Robert_W._Bower" title="Robert W. Bower">Robert W. Bower</a> (around 1966–67) for a transistor with lower parasitic capacitances that could be manufactured as part of an IC (and not only as a <a href="/wiki/Discrete_component" class="mw-redirect" title="Discrete component">discrete component</a>). This new type of pMOS transistor was 3–5 times as fast (per watt) as the aluminum-gate pMOS transistor, and it needed less area, had much lower leakage and higher reliability. The same year, Faggin also built the first IC using the new transistor type, the <i>Fairchild 3708</i> (8-bit <a href="/wiki/Analogue_electronics" title="Analogue electronics">analog</a> <a href="/wiki/Multiplexer" title="Multiplexer">multiplexer</a> with <a href="/wiki/Binary_decoder" title="Binary decoder">decoder</a>), which demonstrated a substantially improved performance over its metal-gate counterpart. In less than 10 years, the silicon gate MOS transistor replaced bipolar circuits as the main vehicle for complex digital ICs. </p> <div class="mw-heading mw-heading3"><h3 id="NMOS_and_back-gate_bias">NMOS and back-gate bias</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=3" title="Edit section: NMOS and back-gate bias"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>There are a couple of drawbacks associated with PMOS: The <a href="/wiki/Electron_hole" title="Electron hole">electron holes</a> that are the charge (current) carriers in PMOS transistors have lower mobility than the <a href="/wiki/Electron" title="Electron">electrons</a> that are the charge carriers in NMOS transistors (a ratio of approximately 2.5), furthermore PMOS circuits do not interface easily with low voltage positive logic such as <a href="/wiki/Diode%E2%80%93transistor_logic" title="Diode–transistor logic">DTL-logic</a> and <a href="/wiki/Transistor%E2%80%93transistor_logic" title="Transistor–transistor logic">TTL-logic</a> (the 7400-series). However, PMOS transistors are relatively easy to make and were therefore developed first — ionic contamination of the gate oxide from <a href="/wiki/Etching_(microfabrication)" title="Etching (microfabrication)">etching chemicals</a> and other sources can very easily prevent (the <a href="/wiki/Electron" title="Electron">electron</a> based) NMOS transistors from switching off, while the effect in (the <a href="/wiki/Electron-hole" class="mw-redirect" title="Electron-hole">electron-hole</a> based) PMOS transistors is much less severe. Fabrication of NMOS transistors therefore has to be many times cleaner than bipolar processing in order to produce working devices. </p><p>Early work on NMOS integrated circuit (IC) technology was presented in a brief <a href="/wiki/IBM" title="IBM">IBM</a> paper at <a href="/wiki/ISSCC" class="mw-redirect" title="ISSCC">ISSCC</a> in 1969. <a href="/wiki/Hewlett-Packard" title="Hewlett-Packard">Hewlett-Packard</a> then started to develop NMOS IC technology to get the promising speed and easy interfacing for its calculator business.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> Tom Haswell at HP eventually solved many problems by using purer raw materials (especially aluminum for interconnects) and by adding a bias voltage to make the <a href="/wiki/Threshold_voltage" title="Threshold voltage">gate threshold</a> large enough; this <i>back-gate bias</i> remained a <i>de facto</i> standard solution to (mainly) <a href="/wiki/Sodium" title="Sodium">sodium</a> contaminants in the gates until the development of <a href="/wiki/Ion_implantation" title="Ion implantation">ion implantation</a> (see below). Already by 1970, HP was making good enough nMOS ICs and had characterized it enough so that Dave Maitland was able to write an article about nMOS in the December, 1970 issue of Electronics magazine. However, NMOS remained uncommon in the rest of the semiconductor industry until 1973.<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </p><p>The production-ready NMOS process enabled HP to develop the industry’s first 4-kbit IC <a href="/wiki/Read-only_memory" title="Read-only memory">ROM</a>. <a href="/wiki/Motorola" title="Motorola">Motorola</a> eventually served as a second source for these products and so became one of the first commercial semiconductor vendors to master the NMOS process, thanks to Hewlett-Packard. A while later, the startup company <a href="/wiki/Intel" title="Intel">Intel</a> announced a 1-kbit pMOS DRAM, called <i>1102</i>, developed as a custom product for <a href="/wiki/Honeywell" title="Honeywell">Honeywell</a> (an attempt to replace magnetic <a href="/wiki/Core_memory" class="mw-redirect" title="Core memory">core memory</a> in their <a href="/wiki/Mainframe_computer" title="Mainframe computer">mainframe computers</a>). HP’s calculator engineers, who wanted a similar but more robust product for the <a href="/wiki/HP_9800_series" title="HP 9800 series">9800 series</a> calculators, contributed IC fabrication experience from their 4-kbit ROM project to help improve Intel DRAM’s reliability, operating-voltage, and temperature range. These efforts contributed to the heavily enhanced <a href="/wiki/Intel_1103" title="Intel 1103">Intel 1103</a> 1-kbit pMOS DRAM, which was the world’s first commercially available <a href="/wiki/Dynamic_random-access_memory" title="Dynamic random-access memory">DRAM</a> IC. It was formally introduced in October 1970, and became Intel’s first really successful product.<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Depletion-mode_transistors">Depletion-mode transistors</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=4" title="Edit section: Depletion-mode transistors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:MOSFET_depletion-mode_n-channel_en.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/ed/MOSFET_depletion-mode_n-channel_en.svg/330px-MOSFET_depletion-mode_n-channel_en.svg.png" decoding="async" width="330" height="144" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/ed/MOSFET_depletion-mode_n-channel_en.svg/495px-MOSFET_depletion-mode_n-channel_en.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/ed/MOSFET_depletion-mode_n-channel_en.svg/660px-MOSFET_depletion-mode_n-channel_en.svg.png 2x" data-file-width="800" data-file-height="350" /></a><figcaption>Characteristics of depletion-mode MOSFET</figcaption></figure> <p>Early MOS logic had one transistor type, which is <a href="/wiki/Enhancement_mode" class="mw-redirect" title="Enhancement mode">enhancement mode</a> so that it can act as a logic switch. Since suitable resistors were hard to make, the logic gates used saturated loads; that is, to make the one type of transistor act as a load resistor, the transistor had to be turned always on by tying its gate to the power supply (the more negative rail for <a href="/wiki/PMOS_logic" title="PMOS logic">PMOS logic</a>, or the more positive rail for <a href="/wiki/NMOS_logic" title="NMOS logic">NMOS logic</a>). Since the current in a device connected that way goes as the square of the voltage across the load, it provides poor pullup speed relative to its power consumption when pulled down. A resistor (with the current simply proportional to the voltage) would be better, and a current source (with the current fixed, independent of voltage) better yet. A <a href="/wiki/Depletion-mode" class="mw-redirect" title="Depletion-mode">depletion-mode</a> device with gate tied to the opposite supply rail is a much better load than an enhancement-mode device, acting somewhere between a resistor and a current source. </p><p>The first depletion-load NMOS circuits were pioneered and made by the <a href="/wiki/Dynamic_random-access_memory" title="Dynamic random-access memory">DRAM</a> manufacturer <a href="/wiki/Mostek" title="Mostek">Mostek</a>, which made depletion-mode transistors available for the design of the original <a href="/wiki/Zilog_Z80" title="Zilog Z80">Zilog Z80</a> in 1975–76.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> Mostek had the <a href="/wiki/Ion_implantation" title="Ion implantation">ion implantation</a> equipment needed to create a <a href="/wiki/Doping_(semiconductor)" title="Doping (semiconductor)">doping profile</a> more precise than possible with <a href="/wiki/Diffusion" title="Diffusion">diffusion</a> methods, so that the <a href="/wiki/Threshold_voltage" title="Threshold voltage">threshold voltage</a> of the load transistors could be adjusted reliably. At Intel, depletion load was introduced in 1974 by Federico Faggin, an ex-Fairchild engineer and later the founder of <a href="/wiki/Zilog" title="Zilog">Zilog</a>. Depletion-load was first employed for a redesign of one of Intel's most important products at the time, a +5V-only 1Kbit NMOS <a href="/wiki/Static_random-access_memory" title="Static random-access memory">SRAM</a> called the <i>2102</i> (using more than 6000 transistors<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup>). The result of this redesign was the significantly faster <i>2102A</i>, where the highest performing versions of the chip had access times of less than 100ns, taking MOS memories close to the speed of bipolar RAMs for the first time.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> </p><p>Depletion-load NMOS processes were also used by several other manufacturers to produce many incarnations of popular 8-bit, 16-bit, and 32-bit CPUs. Similarly to early PMOS and NMOS CPU designs using <a href="/wiki/Channel_(transistor)" class="mw-redirect" title="Channel (transistor)">enhancement mode</a> MOSFETs as loads, depletion-load nMOS designs typically employed various types of <a href="/wiki/Dynamic_logic_(digital_electronics)" title="Dynamic logic (digital electronics)">dynamic logic</a> (rather than just static gates) or <a href="/wiki/Pass_transistor_logic" title="Pass transistor logic">pass transistors</a> used as dynamic <a href="/wiki/Flip-flop_(electronics)" title="Flip-flop (electronics)">clocked latches</a>. These techniques can enhance the area-economy considerably although the effect on the speed is complex. Processors built with depletion-load NMOS circuitry include the <a href="/wiki/Motorola_6800" title="Motorola 6800">6800</a> (in later versions<sup id="cite_ref-M6800_redesign_16-0" class="reference"><a href="#cite_note-M6800_redesign-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup>), the <a href="/wiki/MOS_Technology_6502" title="MOS Technology 6502">6502</a>, <a href="/wiki/Signetics_2650" title="Signetics 2650">Signetics 2650</a>, <a href="/wiki/Intel_8085" title="Intel 8085">8085</a>, <a href="/wiki/Motorola_6809" title="Motorola 6809">6809</a>, <a href="/wiki/Intel_8086" title="Intel 8086">8086</a>, <a href="/wiki/Zilog_Z8000" title="Zilog Z8000">Z8000</a>, <a href="/wiki/NS32000" title="NS32000">NS32016</a>, and many others (whether or not the HMOS processors below are included, as special cases). </p><p>A large number of support and peripheral ICs were also implemented using (often static) depletion-load based circuitry. However, there were never any standardized <a href="/wiki/Logic_family" title="Logic family">logic families</a> in NMOS, such as the <a href="/wiki/Transistor-transistor_logic" class="mw-redirect" title="Transistor-transistor logic">bipolar</a> <a href="/wiki/7400_series" class="mw-redirect" title="7400 series">7400 series</a> and the <a href="/wiki/CMOS" title="CMOS">CMOS</a> <a href="/wiki/4000_series" class="mw-redirect" title="4000 series">4000 series</a>, although designs with several second source manufacturers often achieved something of a de facto standard component status. One example of this is the NMOS <a href="/wiki/Intel_8255" title="Intel 8255">8255 PIO</a> design, originally intended as an 8085 peripheral chip, that has been used in Z80 and x86 <a href="/wiki/Embedded_system" title="Embedded system">embedded systems</a> and many other contexts for several decades. Modern low power versions are available as CMOS or BiCMOS implementations, similar to the 7400-series. </p> <div class="mw-heading mw-heading3"><h3 id="Intel_HMOS">Intel HMOS</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=5" title="Edit section: Intel HMOS"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Intel's own depletion-load NMOS process was known as <b>HMOS</b>, for <i>High density, short channel MOS</i>. The first version was introduced in late 1976 and first used for their <a href="/wiki/Static_RAM" class="mw-redirect" title="Static RAM">static RAM</a> products,<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> it was soon being used for faster and/or less power hungry versions of the 8085, 8086, and other chips. </p><p>HMOS continued to be improved and went through four distinct generations. According to Intel, HMOS II (1979) provided twice the density and four times the speed/power product over other typical contemporary depletion-load NMOS processes.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> This version was widely licensed by 3rd parties, including (among others) <a href="/wiki/Motorola" title="Motorola">Motorola</a> who used it for their <a href="/wiki/Motorola_68000" title="Motorola 68000">Motorola 68000</a>, and <a href="/wiki/Commodore_Semiconductor_Group" class="mw-redirect" title="Commodore Semiconductor Group">Commodore Semiconductor Group</a>, who used it for their <a href="/wiki/MOS_Technology_8502" title="MOS Technology 8502">MOS Technology 8502</a> die-shrunk <a href="/wiki/MOS_6502" class="mw-redirect" title="MOS 6502">MOS 6502</a>. </p><p>The original HMOS process, later referred to as HMOS I, had a channel length of 3 microns, which was reduced to 2 for the HMOS II, and 1.5 for HMOS III. By the time HMOS III was introduced in 1982, Intel had begun a switch to their <a href="/wiki/CHMOS" title="CHMOS">CHMOS</a> process, a <a href="/wiki/CMOS" title="CMOS">CMOS</a> process using design elements of the HMOS lines. One final version of the system was released, HMOS-IV. A significant advantage to the HMOS line was that each generation was deliberately designed to allow existing layouts to die-shrink with no major changes. Various techniques were introduced to ensure the systems worked as the layout changed.<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> </p><p>HMOS, HMOS II, HMOS III, and HMOS IV were together used for many different kinds of processors; the <a href="/wiki/Intel_8085" title="Intel 8085">8085</a>, <a href="/wiki/Intel_MCS-48" title="Intel MCS-48">8048</a>, <a href="/wiki/Intel_8051" class="mw-redirect" title="Intel 8051">8051</a>, <a href="/wiki/Intel_8086" title="Intel 8086">8086</a>, <a href="/wiki/Intel_80186" title="Intel 80186">80186</a>, <a href="/wiki/Intel_80286" title="Intel 80286">80286</a>, and many others, but also for several generations of the same basic design, see <a href="/wiki/Datasheet" title="Datasheet">datasheets</a>. </p> <div class="mw-heading mw-heading3"><h3 id="Further_development">Further development</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=6" title="Edit section: Further development"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In the mid-1980s, faster CMOS variants, using similar HMOS process technology, such as Intel's CHMOS I, II, III, IV, etc. started to supplant n-channel HMOS for applications such as the <a href="/wiki/I386" title="I386">Intel 80386</a> and certain <a href="/wiki/Microcontroller" title="Microcontroller">microcontrollers</a>. A few years later, in the late 1980s, <a href="/wiki/BiCMOS" title="BiCMOS">BiCMOS</a> was introduced for high-performance microprocessors as well as for high speed <a href="/wiki/Analogue_electronics" title="Analogue electronics">analog circuits</a>. Today, most digital circuits, including the ubiquitous <a href="/wiki/7400_series" class="mw-redirect" title="7400 series">7400 series</a>, are manufactured using various CMOS processes with a range of different topologies employed. This means that, in order to enhance speed and save die area (transistors and wiring), high speed CMOS designs often employ other elements than just the <a href="https://en.wiktionary.org/wiki/complementary" class="extiw" title="wikt:complementary">complementary</a> <i><a href="/wiki/CMOS" title="CMOS">static</a></i> <a href="/wiki/Logic_gate" title="Logic gate">gates</a> and the <a href="/wiki/Transmission_gate" title="Transmission gate">transmission gates</a> of typical slow low-power CMOS circuits (the <i>only</i> CMOS type during the 1960s and 1970s). These methods use significant amounts of <a href="/wiki/Dynamic_logic_(digital_electronics)" title="Dynamic logic (digital electronics)">dynamic</a> circuitry in order to construct the larger building blocks on the chip, such as latches, decoders, multiplexers, and so on, and evolved from the various dynamic methodologies developed for NMOS and PMOS circuits during the 1970s. </p> <div class="mw-heading mw-heading2"><h2 id="Compared_to_CMOS">Compared to CMOS</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=7" title="Edit section: Compared to CMOS"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Compared to static CMOS, all variants of NMOS (and PMOS) are relatively power hungry in steady state. This is because they rely on load transistors working as <a href="/wiki/Resistor" title="Resistor">resistors</a>, where the <a href="/wiki/Quiescent_current" class="mw-redirect" title="Quiescent current">quiescent current</a> determines the maximum possible load at the output as well as the speed of the gate (i.e. with other factors constant). This contrasts to the power consumption characteristics of <i>static</i> CMOS circuits, which is due only to the transient power draw when the output state is changed and the p- and n-transistors thereby briefly conduct at the same time. However, this is a simplified view, and a more complete picture has to also include the fact that even purely static CMOS circuits have significant leakage in modern tiny geometries, as well as the fact that modern CMOS chips often contain <a href="/wiki/Dynamic_logic_(digital_electronics)" title="Dynamic logic (digital electronics)">dynamic</a> and/or <a href="/wiki/Domino_logic" title="Domino logic">domino logic</a> with a certain amount of <i>pseudo nMOS</i> circuitry.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Evolution_from_preceding_NMOS_types">Evolution from preceding NMOS types</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=8" title="Edit section: Evolution from preceding NMOS types"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Depletion-load processes differ from their predecessors in the way the <i>Vdd</i> voltage source, representing <i>1</i>, connects to each gate. In both technologies, each gate contains one NMOS transistor which is permanently turned on and connected to Vdd. When the transistors connecting to <i>0</i> turn off, this <a href="/wiki/Pull-up_resistor" title="Pull-up resistor">pull-up</a> transistor determines the output to be <i>1</i> by default. In standard NMOS, the pull-up is the same kind of transistor as is used for logic switches. As the output voltage approaches a value less than <i>Vdd</i>, it gradually switches itself off. This slows the <i>0</i> to <i>1</i> transition, resulting in a slower circuit. Depletion-load processes replace this transistor with a depletion-mode NMOS at a constant gate bias, with the gate tied directly to the source. This alternative type of transistor acts as a current source until the output approaches <i>1</i>, then acts as a resistor. The result is a faster <i>0</i> to <i>1</i> transition. </p> <div class="mw-heading mw-heading2"><h2 id="Static_power_consumption">Static power consumption</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=9" title="Edit section: Static power consumption"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Nmos_enhancement_saturated_nand.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/e8/Nmos_enhancement_saturated_nand.svg/220px-Nmos_enhancement_saturated_nand.svg.png" decoding="async" width="220" height="330" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/e8/Nmos_enhancement_saturated_nand.svg/330px-Nmos_enhancement_saturated_nand.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/e8/Nmos_enhancement_saturated_nand.svg/440px-Nmos_enhancement_saturated_nand.svg.png 2x" data-file-width="200" data-file-height="300" /></a><figcaption>An NMOS NAND gate with saturated enhancement-mode load device. The enhancement device can also be used with a more positive gate bias in a non-saturated configuration, which is more power efficient but requires a high gate voltage and a longer transistor. Neither is as power efficient or compact as a depletion load.</figcaption></figure> <p>Depletion-load circuits consume less power than enhancement-load circuits at the same speed. In both cases the connection to <i>1</i> is always active, even when the connection to <i>0</i> is also active. This results in high static power consumption. The amount of waste depends on the strength, or physical size, of the pull-up. Both (enhancement-mode) saturated-load and depletion-mode pull-up transistors use greatest power when the output is stable at <i>0</i>, so this loss is considerable. Because the strength of a depletion-mode transistor falls off less on the approach to <i>1</i>, they may reach <i>1</i> faster despite starting slower, i.e. conducting less current at the beginning of the transition and at steady state. </p> <div class="mw-heading mw-heading2"><h2 id="Notes_and_references">Notes and references</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Depletion-load_NMOS_logic&action=edit&section=10" title="Edit section: Notes and references"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"><i>See <a rel="nofollow" class="external free" href="http://www.zilog.com/index.php?option=com_product&Itemid=26&mode=showProductDetails&familyId=20&productId=Z84015">http://www.zilog.com/index.php?option=com_product&Itemid=26&mode=showProductDetails&familyId=20&productId=Z84015</a></i>.</span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><i>See <a rel="nofollow" class="external free" href="http://www.zilog.com/index.php?option=com_product&Itemid=26&mode=showProductDetails&familyId=20&productId=Z84C15">http://www.zilog.com/index.php?option=com_product&Itemid=26&mode=showProductDetails&familyId=20&productId=Z84C15</a></i>.</span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFFroschDerick1957" class="citation journal cs1">Frosch, C. J.; Derick, L (1957). <a rel="nofollow" class="external text" href="https://iopscience.iop.org/article/10.1149/1.2428650">"Surface Protection and Selective Masking during Diffusion in Silicon"</a>. <i>Journal of the Electrochemical Society</i>. <b>104</b> (9): 547. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1149%2F1.2428650">10.1149/1.2428650</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Journal+of+the+Electrochemical+Society&rft.atitle=Surface+Protection+and+Selective+Masking+during+Diffusion+in+Silicon&rft.volume=104&rft.issue=9&rft.pages=547&rft.date=1957&rft_id=info%3Adoi%2F10.1149%2F1.2428650&rft.aulast=Frosch&rft.aufirst=C.+J.&rft.au=Derick%2C+L&rft_id=https%3A%2F%2Fiopscience.iop.org%2Farticle%2F10.1149%2F1.2428650&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFAtallaKahng1960" class="citation journal cs1"><a href="/wiki/Mohamed_Atalla" class="mw-redirect" title="Mohamed Atalla">Atalla, M.</a>; <a href="/wiki/Dawon_Kahng" title="Dawon Kahng">Kahng, D.</a> (1960). "Silicon-silicon dioxide field induced surface devices". <i>IRE-AIEE Solid State Device Research Conference</i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IRE-AIEE+Solid+State+Device+Research+Conference&rft.atitle=Silicon-silicon+dioxide+field+induced+surface+devices&rft.date=1960&rft.aulast=Atalla&rft.aufirst=M.&rft.au=Kahng%2C+D.&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation journal cs1"><a rel="nofollow" class="external text" href="https://www.computerhistory.org/siliconengine/metal-oxide-semiconductor-mos-transistor-demonstrated/">"1960 – Metal Oxide Semiconductor (MOS) Transistor Demonstrated"</a>. <i>The Silicon Engine</i>. <a href="/wiki/Computer_History_Museum" title="Computer History Museum">Computer History Museum</a><span class="reference-accessdate">. Retrieved <span class="nowrap">2023-01-16</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=The+Silicon+Engine&rft.atitle=1960+%E2%80%93+Metal+Oxide+Semiconductor+%28MOS%29+Transistor+Demonstrated&rft_id=https%3A%2F%2Fwww.computerhistory.org%2Fsiliconengine%2Fmetal-oxide-semiconductor-mos-transistor-demonstrated%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFKAHNG1961" class="citation journal cs1">KAHNG, D. (1961). <a rel="nofollow" class="external text" href="https://doi.org/10.1142/9789814503464_0076">"Silicon-Silicon Dioxide Surface Device"</a>. <i>Technical Memorandum of Bell Laboratories</i>: 583–596. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1142%2F9789814503464_0076">10.1142/9789814503464_0076</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-981-02-0209-5" title="Special:BookSources/978-981-02-0209-5"><bdi>978-981-02-0209-5</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Technical+Memorandum+of+Bell+Laboratories&rft.atitle=Silicon-Silicon+Dioxide+Surface+Device&rft.pages=583-596&rft.date=1961&rft_id=info%3Adoi%2F10.1142%2F9789814503464_0076&rft.isbn=978-981-02-0209-5&rft.aulast=KAHNG&rft.aufirst=D.&rft_id=https%3A%2F%2Fdoi.org%2F10.1142%2F9789814503464_0076&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-Lojek-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-Lojek_7-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLojek2007" class="citation book cs1">Lojek, Bo (2007). <span class="id-lock-limited" title="Free access subject to limited trial, subscription normally required"><a rel="nofollow" class="external text" href="https://archive.org/details/historysemicondu00loje_697"><i>History of Semiconductor Engineering</i></a></span>. <a href="/wiki/Springer_Science_%26_Business_Media" class="mw-redirect" title="Springer Science & Business Media">Springer Science & Business Media</a>. pp. <a rel="nofollow" class="external text" href="https://archive.org/details/historysemicondu00loje_697/page/n327">321</a>–3. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/9783540342588" title="Special:BookSources/9783540342588"><bdi>9783540342588</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=History+of+Semiconductor+Engineering&rft.pages=321-3&rft.pub=Springer+Science+%26+Business+Media&rft.date=2007&rft.isbn=9783540342588&rft.aulast=Lojek&rft.aufirst=Bo&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2Fhistorysemicondu00loje_697&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSahLeistikoGrove1965" class="citation journal cs1"><a href="/wiki/Chih-Tang_Sah" title="Chih-Tang Sah">Sah, Chih-Tang</a>; Leistiko, Otto; Grove, A. S. (May 1965). <a rel="nofollow" class="external text" href="https://pdfslide.net/documents/electron-and-hole-mobilities-in-inversion-layers-on-thermally-oxidized-silicon-57e531d33262d.html">"Electron and hole mobilities in inversion layers on thermally oxidized silicon surfaces"</a>. <i><a href="/wiki/IEEE_Transactions_on_Electron_Devices" title="IEEE Transactions on Electron Devices">IEEE Transactions on Electron Devices</a></i>. <b>12</b> (5): 248–254. <a href="/wiki/Bibcode_(identifier)" class="mw-redirect" title="Bibcode (identifier)">Bibcode</a>:<a rel="nofollow" class="external text" href="https://ui.adsabs.harvard.edu/abs/1965ITED...12..248L">1965ITED...12..248L</a>. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FT-ED.1965.15489">10.1109/T-ED.1965.15489</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Transactions+on+Electron+Devices&rft.atitle=Electron+and+hole+mobilities+in+inversion+layers+on+thermally+oxidized+silicon+surfaces&rft.volume=12&rft.issue=5&rft.pages=248-254&rft.date=1965-05&rft_id=info%3Adoi%2F10.1109%2FT-ED.1965.15489&rft_id=info%3Abibcode%2F1965ITED...12..248L&rft.aulast=Sah&rft.aufirst=Chih-Tang&rft.au=Leistiko%2C+Otto&rft.au=Grove%2C+A.+S.&rft_id=https%3A%2F%2Fpdfslide.net%2Fdocuments%2Felectron-and-hole-mobilities-in-inversion-layers-on-thermally-oxidized-silicon-57e531d33262d.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFCritchlow2007" class="citation journal cs1">Critchlow, D. L. (2007). <a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FN-SSC.2007.4785536">"Recollections on MOSFET Scaling"</a>. <i>IEEE Solid-State Circuits Society Newsletter</i>. <b>12</b> (1): 19–22. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FN-SSC.2007.4785536">10.1109/N-SSC.2007.4785536</a></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Solid-State+Circuits+Society+Newsletter&rft.atitle=Recollections+on+MOSFET+Scaling&rft.volume=12&rft.issue=1&rft.pages=19-22&rft.date=2007&rft_id=info%3Adoi%2F10.1109%2FN-SSC.2007.4785536&rft.aulast=Critchlow&rft.aufirst=D.+L.&rft_id=https%3A%2F%2Fdoi.org%2F10.1109%252FN-SSC.2007.4785536&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text">These calculators (like the <a href="/wiki/Datapoint_2200" title="Datapoint 2200">Datapoint 2200</a> and others) were in many ways small <a href="/wiki/Desktop_computer" title="Desktop computer">desktop computers</a>, but preceded the <a href="/wiki/Apple_II" title="Apple II">Apple II</a> and the <a href="/wiki/IBM_PC" class="mw-redirect" title="IBM PC">IBM PC</a> by many years.</span> </li> <li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text"><i>Shown by its mere mention in a large roundup article written by GE engineer Herman Schmid that appeared in the December, 1972 issue of IEEE Transactions on Manufacturing Technology. Although it cites Maitland’s 1970 article in Electronics, Schmid’s article does not discuss NMOS fabrication in detail but it does cover PMOS and even CMOS fabrication extensively.</i></span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.hp9825.com/html/prologues.html">"Prologues"</a>. Hp9825.com<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-03-15</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Prologues&rft.pub=Hp9825.com&rft_id=http%3A%2F%2Fwww.hp9825.com%2Fhtml%2Fprologues.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"><i>Zilog relied on <a href="/wiki/Mostek" title="Mostek">Mostek</a> and <a href="/wiki/Synertek" title="Synertek">Synertek</a> to produce the Z80 and other chips before their own production facilities were ready.</i></span> </li> <li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text"><i>Each bit demands six transistors in a typical <a href="/wiki/Static_random-access_memory" title="Static random-access memory">static RAM</a>.</i></span> </li> <li id="cite_note-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-15">^</a></b></span> <span class="reference-text"><i>See for instance: <a rel="nofollow" class="external free" href="http://www.intel4004.com/sgate.htm">http://www.intel4004.com/sgate.htm</a> or <a rel="nofollow" class="external free" href="http://archive.computerhistory.org/resources/text/Oral_History/Faggin_Federico/Faggin_Federico_1_2_3.oral_history.2004.102658025.pdf">http://archive.computerhistory.org/resources/text/Oral_History/Faggin_Federico/Faggin_Federico_1_2_3.oral_history.2004.102658025.pdf</a></i> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20170110232713/http://archive.computerhistory.org/resources/text/Oral_History/Faggin_Federico/Faggin_Federico_1_2_3.oral_history.2004.102658025.pdf">Archived</a> 2017-01-10 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></span> </li> <li id="cite_note-M6800_redesign-16"><span class="mw-cite-backlink"><b><a href="#cite_ref-M6800_redesign_16-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation journal cs1"><a rel="nofollow" class="external text" href="http://www.bitsavers.org/pdf/microcomputerAssociates/Microcomputer_Digest_v03n02_Aug76.pdf">"Motorola Redesigns 6800"</a> <span class="cs1-format">(PDF)</span>. <i>Microcomputer Digest</i>. <b>3</b> (2). Santa Clara, CA: Microcomputer Associates: 4. August 1976.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Microcomputer+Digest&rft.atitle=Motorola+Redesigns+6800&rft.volume=3&rft.issue=2&rft.pages=4&rft.date=1976-08&rft_id=http%3A%2F%2Fwww.bitsavers.org%2Fpdf%2FmicrocomputerAssociates%2FMicrocomputer_Digest_v03n02_Aug76.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span> "Motorola is redesigning the M6800 microprocessor family by adding depletion loads to increase speed and reduce the 6800 CPU size to 160 mils."</span> </li> <li id="cite_note-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-17">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFVolkStollMetrovich2001" class="citation journal cs1">Volk, A.M.; Stoll, P.A.; Metrovich, P. (2001). <a rel="nofollow" class="external text" href="https://www.intel.com/content/dam/www/public/us/en/documents/research/2001-vol05-iss-1-intel-technology-journal.pdf">"Recollections of Early Chip Development at Intel"</a> <span class="cs1-format">(PDF)</span>. <i>Intel Technology Journal</i>. <b>5</b> (Q1).</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Intel+Technology+Journal&rft.atitle=Recollections+of+Early+Chip+Development+at+Intel&rft.volume=5&rft.issue=Q1&rft.date=2001&rft.aulast=Volk&rft.aufirst=A.M.&rft.au=Stoll%2C+P.A.&rft.au=Metrovich%2C+P.&rft_id=https%3A%2F%2Fwww.intel.com%2Fcontent%2Fdam%2Fwww%2Fpublic%2Fus%2Fen%2Fdocuments%2Fresearch%2F2001-vol05-iss-1-intel-technology-journal.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-18"><span class="mw-cite-backlink"><b><a href="#cite_ref-18">^</a></b></span> <span class="reference-text">See for instance: <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFScanlonMoody1981" class="citation book cs1">Scanlon, Leo J.; Moody, C.W. (1981). <i>The 68000 Principles and programming</i>. H.W. Sams. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-672-21853-8" title="Special:BookSources/978-0-672-21853-8"><bdi>978-0-672-21853-8</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/7802969">7802969</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=The+68000+Principles+and+programming&rft.pub=H.W.+Sams&rft.date=1981&rft_id=info%3Aoclcnum%2F7802969&rft.isbn=978-0-672-21853-8&rft.aulast=Scanlon&rft.aufirst=Leo+J.&rft.au=Moody%2C+C.W.&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-19"><span class="mw-cite-backlink"><b><a href="#cite_ref-19">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation conference cs1"><i>HMOS III Technology</i>. ISSCC 82. 1982.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=conference&rft.btitle=HMOS+III+Technology&rft.date=1982&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-20"><span class="mw-cite-backlink"><b><a href="#cite_ref-20">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFAtwoodDunLangstonHazani1982" class="citation journal cs1">Atwood, G.E.; Dun, H.; Langston, J.; Hazani, E.; So, E.Y.; Sachdev, S.; Fuchs, K. (October 1982). "HMOS III technology". <i>IEEE Journal of Solid-State Circuits</i>. <b>17</b> (5): 810–5. <a href="/wiki/Bibcode_(identifier)" class="mw-redirect" title="Bibcode (identifier)">Bibcode</a>:<a rel="nofollow" class="external text" href="https://ui.adsabs.harvard.edu/abs/1982IJSSC..17..810A">1982IJSSC..17..810A</a>. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FJSSC.1982.1051823">10.1109/JSSC.1982.1051823</a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:1215664">1215664</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Journal+of+Solid-State+Circuits&rft.atitle=HMOS+III+technology&rft.volume=17&rft.issue=5&rft.pages=810-5&rft.date=1982-10&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A1215664%23id-name%3DS2CID&rft_id=info%3Adoi%2F10.1109%2FJSSC.1982.1051823&rft_id=info%3Abibcode%2F1982IJSSC..17..810A&rft.aulast=Atwood&rft.aufirst=G.E.&rft.au=Dun%2C+H.&rft.au=Langston%2C+J.&rft.au=Hazani%2C+E.&rft.au=So%2C+E.Y.&rft.au=Sachdev%2C+S.&rft.au=Fuchs%2C+K.&rfr_id=info%3Asid%2Fen.wikipedia.org%3ADepletion-load+NMOS+logic" class="Z3988"></span></span> </li> <li id="cite_note-21"><span class="mw-cite-backlink"><b><a href="#cite_ref-21">^</a></b></span> <span class="reference-text"><i>Pseudo nMOS means that an enhancement-mode p-channel transistor with grounded gate is used in place of the depletion-mode n-channel transistor. See <a rel="nofollow" class="external free" href="http://eia.udg.es/~forest/VLSI/lect.10.pdf">http://eia.udg.es/~forest/VLSI/lect.10.pdf</a></i></span> </li> </ol></div></div> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output .hlist.inline ol,.mw-parser-output .hlist.inline ul,.mw-parser-output .hlist dl dl,.mw-parser-output .hlist dl ol,.mw-parser-output .hlist dl ul,.mw-parser-output .hlist ol dl,.mw-parser-output .hlist ol ol,.mw-parser-output .hlist ol ul,.mw-parser-output .hlist ul dl,.mw-parser-output .hlist ul ol,.mw-parser-output .hlist ul ul{display:inline}.mw-parser-output .hlist .mw-empty-li{display:none}.mw-parser-output .hlist dt::after{content:": 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href="/wiki/Transistor" title="Transistor">Transistor</a></li> <li><a href="/wiki/NMOS_logic" title="NMOS logic">NMOS</a></li> <li><a href="/wiki/PMOS_logic" title="PMOS logic">PMOS</a></li> <li><a href="/wiki/BiCMOS" title="BiCMOS">BiCMOS</a></li> <li><a href="/wiki/Bio-FET" title="Bio-FET">BioFET</a></li> <li><a href="/wiki/Chemical_field-effect_transistor" title="Chemical field-effect transistor">Chemical field-effect transistor</a> (ChemFET)</li> <li><a href="/wiki/CMOS" title="CMOS">Complementary MOS</a> (CMOS)</li> <li><a class="mw-selflink selflink">Depletion-load NMOS</a></li> <li><a href="/wiki/FinFET" class="mw-redirect" title="FinFET">Fin field-effect transistor</a> (FinFET)</li> <li><a href="/wiki/Floating-gate_MOSFET" title="Floating-gate MOSFET">Floating-gate MOSFET</a> (FGMOS)</li> <li><a href="/wiki/Insulated-gate_bipolar_transistor" title="Insulated-gate bipolar transistor">Insulated-gate bipolar transistor</a> (IGBT)</li> <li><a href="/wiki/ISFET" title="ISFET">ISFET</a></li> <li><a href="/wiki/LDMOS" title="LDMOS">LDMOS</a></li> <li><a href="/wiki/MOSFET" title="MOSFET">MOS field-effect transistor</a> (MOSFET)</li> <li><a href="/wiki/Multigate_device" title="Multigate device">Multi-gate field-effect transistor</a> (MuGFET)</li> <li><a href="/wiki/Power_MOSFET" title="Power MOSFET">Power MOSFET</a></li> <li><a href="/wiki/Thin-film_transistor" title="Thin-film transistor">Thin-film transistor</a> (TFT)</li> <li><a href="/wiki/VMOS" title="VMOS">VMOS</a></li> <li><a href="/wiki/Power_MOSFET#UMOS" title="Power MOSFET">UMOS</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Transistor" title="Transistor">Other <br />transistors</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bipolar_junction_transistor" title="Bipolar junction transistor">Bipolar junction transistor</a> (BJT)</li> <li><a href="/wiki/Darlington_transistor" title="Darlington transistor">Darlington transistor</a></li> <li><a href="/wiki/Diffused_junction_transistor" title="Diffused junction transistor">Diffused junction transistor</a></li> <li><a href="/wiki/Field-effect_transistor" title="Field-effect transistor">Field-effect transistor</a> (FET) <ul><li><a href="/wiki/JFET" title="JFET">Junction Gate FET (JFET)</a></li> <li><a href="/wiki/Organic_field-effect_transistor" title="Organic field-effect transistor">Organic FET (OFET)</a></li></ul></li> <li><a href="/wiki/Light-emitting_transistor" title="Light-emitting transistor">Light-emitting transistor</a> (LET) <ul><li><a href="/wiki/Organic_light-emitting_transistor" title="Organic light-emitting transistor">Organic LET (OLET)</a></li></ul></li> <li><a href="/wiki/Pentode_transistor" title="Pentode transistor">Pentode transistor</a></li> <li><a href="/wiki/Point-contact_transistor" title="Point-contact transistor">Point-contact transistor</a></li> <li><a href="/wiki/Programmable_unijunction_transistor" title="Programmable unijunction transistor">Programmable unijunction transistor</a> (PUT)</li> <li><a href="/wiki/Static_induction_transistor" title="Static induction transistor">Static induction transistor</a> (SIT)</li> <li><a href="/wiki/Tetrode_transistor" title="Tetrode transistor">Tetrode transistor</a></li> <li><a href="/wiki/Unijunction_transistor" title="Unijunction transistor">Unijunction transistor</a> (UJT)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Diode" title="Diode">Diodes</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Avalanche_diode" title="Avalanche diode">Avalanche diode</a></li> <li><a href="/wiki/Constant-current_diode" title="Constant-current diode">Constant-current diode</a> (CLD, CRD)</li> <li><a href="/wiki/Gunn_diode" title="Gunn diode">Gunn diode</a></li> <li><a href="/wiki/Laser_diode" title="Laser diode">Laser diode</a> (LD)</li> <li><a href="/wiki/Light-emitting_diode" title="Light-emitting diode">Light-emitting diode</a> (LED)</li> <li><a href="/wiki/OLED" title="OLED">Organic light-emitting diode</a> (OLED)</li> <li><a href="/wiki/Photodiode" title="Photodiode">Photodiode</a></li> <li><a href="/wiki/PIN_diode" title="PIN diode">PIN diode</a></li> <li><a href="/wiki/Schottky_diode" title="Schottky diode">Schottky diode</a></li> <li><a href="/wiki/Step_recovery_diode" title="Step recovery diode">Step recovery diode</a></li> <li><a href="/wiki/Zener_diode" title="Zener diode">Zener diode</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other <br />devices</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Printed_electronics" title="Printed electronics">Printed electronics</a></li> <li><a href="/wiki/Printed_circuit_board" title="Printed circuit board">Printed circuit board</a></li> <li><a href="/wiki/DIAC" title="DIAC">DIAC</a></li> <li><a href="/wiki/Heterostructure_barrier_varactor" title="Heterostructure barrier varactor">Heterostructure barrier varactor</a></li> <li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> (IC)</li> <li><a href="/wiki/Hybrid_integrated_circuit" title="Hybrid integrated circuit">Hybrid integrated circuit</a></li> <li><a href="/wiki/Light_emitting_capacitor" class="mw-redirect" title="Light emitting capacitor">Light emitting capacitor</a> (LEC)</li> <li><a href="/wiki/Memistor" title="Memistor">Memistor</a></li> <li><a href="/wiki/Memristor" title="Memristor">Memristor</a></li> <li><a href="/wiki/Memtransistor" title="Memtransistor">Memtransistor</a></li> <li><a href="/wiki/Memory_cell_(computing)" title="Memory cell (computing)">Memory cell</a></li> <li><a href="/wiki/Metal-oxide_varistor" class="mw-redirect" title="Metal-oxide varistor">Metal-oxide varistor</a> (MOV)</li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal integrated circuit</a></li> <li><a href="/wiki/MOS_integrated_circuit" class="mw-redirect" title="MOS integrated circuit">MOS integrated circuit</a> (MOS IC)</li> <li><a href="/wiki/Organic_semiconductor" title="Organic semiconductor">Organic semiconductor</a></li> <li><a href="/wiki/Photodetector" title="Photodetector">Photodetector</a></li> <li><a href="/wiki/Quantum_circuit" title="Quantum circuit">Quantum circuit</a></li> <li><a href="/wiki/RF_CMOS" title="RF CMOS">RF CMOS</a></li> <li><a href="/wiki/Silicon_controlled_rectifier" title="Silicon controlled rectifier">Silicon controlled rectifier</a> (SCR)</li> <li><a href="/wiki/Solaristor" title="Solaristor">Solaristor</a></li> <li><a href="/wiki/Static_induction_thyristor" title="Static induction thyristor">Static induction thyristor</a> (SITh)</li> <li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">Three-dimensional integrated circuit</a> (3D IC)</li> <li><a href="/wiki/Thyristor" title="Thyristor">Thyristor</a></li> <li><a href="/wiki/Trancitor" title="Trancitor">Trancitor</a></li> <li><a href="/wiki/TRIAC" title="TRIAC">TRIAC</a></li> <li><a href="/wiki/Varicap" title="Varicap">Varicap</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Voltage_regulator" title="Voltage regulator">Voltage regulators</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Linear_regulator" title="Linear regulator">Linear regulator</a></li> <li><a href="/wiki/Low-dropout_regulator" title="Low-dropout regulator">Low-dropout regulator</a></li> <li><a href="/wiki/Switching_regulator" class="mw-redirect" title="Switching regulator">Switching regulator</a></li> <li><a href="/wiki/Buck_converter" title="Buck converter">Buck</a></li> <li><a href="/wiki/Boost_converter" title="Boost converter">Boost</a></li> <li><a href="/wiki/Buck%E2%80%93boost_converter" title="Buck–boost converter">Buck–boost</a></li> <li><a href="/wiki/Split-pi_topology" title="Split-pi topology">Split-pi</a></li> <li><a href="/wiki/%C4%86uk_converter" title="Ćuk converter">Ćuk</a></li> <li><a href="/wiki/Single-ended_primary-inductor_converter" title="Single-ended primary-inductor converter">SEPIC</a></li> <li><a href="/wiki/Charge_pump" title="Charge pump">Charge pump</a></li> <li><a href="/wiki/Switched_capacitor" title="Switched capacitor">Switched capacitor</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Vacuum_tube" title="Vacuum tube">Vacuum tubes</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Acorn_tube" title="Acorn tube">Acorn tube</a></li> <li><a href="/wiki/Audion" title="Audion">Audion</a></li> <li><a href="/wiki/Beam_tetrode" title="Beam tetrode">Beam tetrode</a></li> <li><a href="/wiki/Hot-wire_barretter" title="Hot-wire barretter">Barretter</a></li> <li><a href="/wiki/Compactron" title="Compactron">Compactron</a></li> <li><a href="/wiki/Vacuum_diode" class="mw-redirect" title="Vacuum diode">Diode</a></li> <li><a href="/wiki/Fleming_valve" title="Fleming valve">Fleming valve</a></li> <li><a href="/wiki/Neutron_generator" title="Neutron generator">Neutron tube</a></li> <li><a href="/wiki/Nonode" title="Nonode">Nonode</a></li> <li><a href="/wiki/Nuvistor" title="Nuvistor">Nuvistor</a></li> <li><a href="/wiki/Pentagrid_converter" title="Pentagrid converter">Pentagrid</a> (Hexode, Heptode, Octode)</li> <li><a href="/wiki/Pentode" title="Pentode">Pentode</a></li> <li><a href="/wiki/Photomultiplier_tube" title="Photomultiplier tube">Photomultiplier</a></li> <li><a href="/wiki/Phototube" title="Phototube">Phototube</a></li> <li><a href="/wiki/Tetrode" title="Tetrode">Tetrode</a></li> <li><a href="/wiki/Triode" title="Triode">Triode</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Vacuum_tube" title="Vacuum tube">Vacuum tubes</a> (<a href="/wiki/Electromagnetic_radiation" title="Electromagnetic radiation">RF</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Backward-wave_oscillator" title="Backward-wave oscillator">Backward-wave oscillator</a> (BWO)</li> <li><a href="/wiki/Cavity_magnetron" title="Cavity magnetron">Cavity magnetron</a></li> <li><a href="/wiki/Crossed-field_amplifier" title="Crossed-field amplifier">Crossed-field amplifier</a> (CFA)</li> <li><a href="/wiki/Gyrotron" title="Gyrotron">Gyrotron</a></li> <li><a href="/wiki/Inductive_output_tube" title="Inductive output tube">Inductive output tube</a> (IOT)</li> <li><a href="/wiki/Klystron" title="Klystron">Klystron</a></li> <li><a href="/wiki/Maser" title="Maser">Maser</a></li> <li><a href="/wiki/Sutton_tube" title="Sutton tube">Sutton tube</a></li> <li><a href="/wiki/Traveling-wave_tube" title="Traveling-wave tube">Traveling-wave tube</a> (TWT)</li> <li><a href="/wiki/X-ray_tube" title="X-ray tube">X-ray tube</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Cathode-ray_tube" title="Cathode-ray tube">Cathode-ray tubes</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Beam_deflection_tube" title="Beam deflection tube">Beam deflection tube</a></li> <li><a href="/wiki/Charactron" title="Charactron">Charactron</a></li> <li><a href="/wiki/Iconoscope" title="Iconoscope">Iconoscope</a></li> <li><a href="/wiki/Magic_eye_tube" title="Magic eye tube">Magic eye tube</a></li> <li><a href="/wiki/Monoscope" title="Monoscope">Monoscope</a></li> <li><a href="/wiki/Selectron_tube" title="Selectron tube">Selectron tube</a></li> <li><a href="/wiki/Storage_tube" title="Storage tube">Storage tube</a></li> <li><a href="/wiki/Trochotron" class="mw-redirect" title="Trochotron">Trochotron</a></li> <li><a href="/wiki/Video_camera_tube" title="Video camera tube">Video camera tube</a></li> <li><a href="/wiki/Williams_tube" title="Williams tube">Williams tube</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Gas-filled_tube" title="Gas-filled tube">Gas-filled tubes</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Cold_cathode" title="Cold cathode">Cold cathode</a></li> <li><a href="/wiki/Crossatron" title="Crossatron">Crossatron</a></li> <li><a href="/wiki/Dekatron" title="Dekatron">Dekatron</a></li> <li><a href="/wiki/Ignitron" title="Ignitron">Ignitron</a></li> <li><a href="/wiki/Krytron" title="Krytron">Krytron</a></li> <li><a href="/wiki/Mercury-arc_valve" title="Mercury-arc valve">Mercury-arc valve</a></li> <li><a href="/wiki/Neon_lamp" title="Neon lamp">Neon lamp</a></li> <li><a href="/wiki/Nixie_tube" title="Nixie tube">Nixie tube</a></li> <li><a href="/wiki/Thyratron" title="Thyratron">Thyratron</a></li> <li><a href="/wiki/Trigatron" title="Trigatron">Trigatron</a></li> <li><a href="/wiki/Voltage-regulator_tube" title="Voltage-regulator tube">Voltage-regulator tube</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Adjustable</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Potentiometer" title="Potentiometer">Potentiometer</a> <ul><li><a href="/wiki/Digital_potentiometer" title="Digital potentiometer">digital</a></li></ul></li> <li><a href="/wiki/Variable_capacitor" title="Variable capacitor">Variable capacitor</a></li> <li><a href="/wiki/Varicap" title="Varicap">Varicap</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Passive</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li>Connector <ul><li><a href="/wiki/Audio_and_video_interfaces_and_connectors" title="Audio and video interfaces and connectors">audio and video</a></li> <li><a href="/wiki/AC_power_plugs_and_sockets" title="AC power plugs and sockets">electrical power</a></li> <li><a href="/wiki/RF_connector" title="RF connector">RF</a></li></ul></li> <li><a href="/wiki/Electrolytic_detector" title="Electrolytic detector">Electrolytic detector</a></li> <li><a href="/wiki/Ferrite_core" title="Ferrite core">Ferrite</a></li> <li><a href="/wiki/Antifuse" title="Antifuse">Antifuse</a></li> <li><a href="/wiki/Fuse_(electrical)" title="Fuse (electrical)">Fuse</a> <ul><li><a href="/wiki/Resettable_fuse" title="Resettable fuse">resettable</a></li> <li><a href="/wiki/EFUSE" class="mw-redirect" title="EFUSE">eFUSE</a></li></ul></li> <li><a href="/wiki/Resistor" title="Resistor">Resistor</a></li> <li><a href="/wiki/Switch" title="Switch">Switch</a></li> <li><a href="/wiki/Thermistor" title="Thermistor">Thermistor</a></li> <li><a href="/wiki/Transformer" title="Transformer">Transformer</a></li> <li><a href="/wiki/Varistor" title="Varistor">Varistor</a></li> <li><a href="/wiki/Wire" title="Wire">Wire</a> <ul><li><a href="/wiki/Wollaston_wire" title="Wollaston wire">Wollaston wire</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Electrical_reactance" title="Electrical reactance">Reactive</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Capacitor" title="Capacitor">Capacitor</a> <ul><li><a href="/wiki/Capacitor_types" title="Capacitor types">types</a></li></ul></li> <li><a href="/wiki/Ceramic_resonator" title="Ceramic resonator">Ceramic resonator</a></li> <li><a href="/wiki/Crystal_oscillator" title="Crystal oscillator">Crystal oscillator</a></li> <li><a href="/wiki/Inductor" title="Inductor">Inductor</a></li> <li><a href="/wiki/Parametron" title="Parametron">Parametron</a></li> <li><a href="/wiki/Relay" title="Relay">Relay</a> <ul><li><a href="/wiki/Reed_relay" title="Reed relay">reed relay</a></li> <li><a href="/wiki/Mercury_relay" title="Mercury relay">mercury relay</a></li></ul></li></ul> </div></td></tr></tbody></table></div>    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