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<span>Description</span> </div> </a> <button aria-controls="toc-Description-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Description subsection</span> </button> <ul id="toc-Description-sublist" class="vector-toc-list"> <li id="toc-Programming_model" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Programming_model"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>Programming model</span> </div> </a> <ul id="toc-Programming_model-sublist" class="vector-toc-list"> <li id="toc-Registers" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Registers"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.1</span> <span>Registers</span> </div> </a> <ul id="toc-Registers-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Flags" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Flags"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.2</span> <span>Flags</span> </div> </a> <ul id="toc-Flags-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Commands,_instructions" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Commands,_instructions"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.3</span> <span>Commands, instructions</span> </div> </a> <ul id="toc-Commands,_instructions-sublist" class="vector-toc-list"> <li id="toc-8-bit_instructions" class="vector-toc-list-item vector-toc-level-4"> <a class="vector-toc-link" href="#8-bit_instructions"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.3.1</span> <span>8-bit instructions</span> </div> </a> <ul id="toc-8-bit_instructions-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-16-bit_operations" class="vector-toc-list-item vector-toc-level-4"> <a class="vector-toc-link" href="#16-bit_operations"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.3.2</span> <span>16-bit operations</span> </div> </a> <ul id="toc-16-bit_operations-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Instruction_set" class="vector-toc-list-item vector-toc-level-4"> <a class="vector-toc-link" href="#Instruction_set"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.3.3</span> <span>Instruction set</span> </div> </a> <ul id="toc-Instruction_set-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Input/output_scheme" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Input/output_scheme"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2</span> <span>Input/output scheme</span> </div> </a> <ul id="toc-Input/output_scheme-sublist" class="vector-toc-list"> <li id="toc-Input_output_port_space" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Input_output_port_space"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2.1</span> <span>Input output port space</span> </div> </a> <ul id="toc-Input_output_port_space-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Separate_stack_space" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Separate_stack_space"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2.2</span> <span>Separate stack space</span> </div> </a> <ul id="toc-Separate_stack_space-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Status_word" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Status_word"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3</span> <span>Status word</span> </div> </a> <ul id="toc-Status_word-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Example_code" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Example_code"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.4</span> <span>Example code</span> </div> </a> <ul id="toc-Example_code-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Pin_use" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Pin_use"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.5</span> <span>Pin use</span> </div> </a> <ul id="toc-Pin_use-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Support_chips" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Support_chips"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Support chips</span> </div> </a> <ul id="toc-Support_chips-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Physical_implementation" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Physical_implementation"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Physical implementation</span> </div> </a> <ul id="toc-Physical_implementation-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Commercial_impact" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Commercial_impact"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Commercial impact</span> </div> </a> <button aria-controls="toc-Commercial_impact-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Commercial impact subsection</span> </button> <ul id="toc-Commercial_impact-sublist" class="vector-toc-list"> <li id="toc-Applications_and_successors" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Applications_and_successors"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1</span> <span>Applications and successors</span> </div> </a> <ul id="toc-Applications_and_successors-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Industry_change" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Industry_change"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.2</span> <span>Industry change</span> </div> </a> <ul id="toc-Industry_change-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Cultural_impact" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Cultural_impact"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>Cultural impact</span> </div> </a> <ul id="toc-Cultural_impact-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Further_reading" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Further_reading"> <div class="vector-toc-text"> <span class="vector-toc-numb">9</span> <span>Further reading</span> </div> </a> <ul id="toc-Further_reading-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">10</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Patent_on_8080" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Patent_on_8080"> <div class="vector-toc-text"> <span class="vector-toc-numb">11</span> <span>Patent on 8080</span> </div> </a> <ul id="toc-Patent_on_8080-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Toggle the table of contents</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">Intel 8080</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. Available in 40 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-40" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">40 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D8%A5%D9%86%D8%AA%D9%84_8080" title="إنتل 8080 – Arabic" lang="ar" hreflang="ar" data-title="إنتل 8080" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-az mw-list-item"><a href="https://az.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Azerbaijani" lang="az" hreflang="az" data-title="Intel 8080" data-language-autonym="Azərbaycanca" data-language-local-name="Azerbaijani" class="interlanguage-link-target"><span>Azərbaycanca</span></a></li><li class="interlanguage-link interwiki-bn mw-list-item"><a href="https://bn.wikipedia.org/wiki/%E0%A6%87%E0%A6%A8%E0%A7%8D%E0%A6%9F%E0%A7%87%E0%A6%B2_%E0%A7%AE%E0%A7%A6%E0%A7%AE%E0%A7%A6" title="ইন্টেল ৮০৮০ – Bangla" lang="bn" hreflang="bn" data-title="ইন্টেল ৮০৮০" data-language-autonym="বাংলা" data-language-local-name="Bangla" class="interlanguage-link-target"><span>বাংলা</span></a></li><li class="interlanguage-link interwiki-be mw-list-item"><a href="https://be.wikipedia.org/wiki/8080" title="8080 – Belarusian" lang="be" hreflang="be" data-title="8080" data-language-autonym="Беларуская" data-language-local-name="Belarusian" class="interlanguage-link-target"><span>Беларуская</span></a></li><li class="interlanguage-link interwiki-bg mw-list-item"><a href="https://bg.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Bulgarian" lang="bg" hreflang="bg" data-title="Intel 8080" data-language-autonym="Български" data-language-local-name="Bulgarian" class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Catalan" lang="ca" hreflang="ca" data-title="Intel 8080" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Czech" lang="cs" hreflang="cs" data-title="Intel 8080" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – German" lang="de" hreflang="de" data-title="Intel 8080" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Estonian" lang="et" hreflang="et" data-title="Intel 8080" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-el mw-list-item"><a href="https://el.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Greek" lang="el" hreflang="el" data-title="Intel 8080" data-language-autonym="Ελληνικά" data-language-local-name="Greek" class="interlanguage-link-target"><span>Ελληνικά</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Spanish" lang="es" hreflang="es" data-title="Intel 8080" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%D8%A7%DB%8C%D9%86%D8%AA%D9%84_%DB%B8%DB%B0%DB%B8%DB%B0" title="اینتل ۸۰۸۰ – Persian" lang="fa" hreflang="fa" data-title="اینتل ۸۰۸۰" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – French" lang="fr" hreflang="fr" data-title="Intel 8080" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-gl mw-list-item"><a href="https://gl.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Galician" lang="gl" hreflang="gl" data-title="Intel 8080" data-language-autonym="Galego" data-language-local-name="Galician" class="interlanguage-link-target"><span>Galego</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EC%9D%B8%ED%85%94_8080" title="인텔 8080 – Korean" lang="ko" hreflang="ko" data-title="인텔 8080" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-hr mw-list-item"><a href="https://hr.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Croatian" lang="hr" hreflang="hr" data-title="Intel 8080" data-language-autonym="Hrvatski" data-language-local-name="Croatian" class="interlanguage-link-target"><span>Hrvatski</span></a></li><li class="interlanguage-link interwiki-id mw-list-item"><a href="https://id.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Indonesian" lang="id" hreflang="id" data-title="Intel 8080" data-language-autonym="Bahasa Indonesia" data-language-local-name="Indonesian" class="interlanguage-link-target"><span>Bahasa Indonesia</span></a></li><li class="interlanguage-link interwiki-ia mw-list-item"><a href="https://ia.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Interlingua" lang="ia" hreflang="ia" data-title="Intel 8080" data-language-autonym="Interlingua" data-language-local-name="Interlingua" class="interlanguage-link-target"><span>Interlingua</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Italian" lang="it" hreflang="it" data-title="Intel 8080" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-he mw-list-item"><a href="https://he.wikipedia.org/wiki/%D7%90%D7%99%D7%A0%D7%98%D7%9C_8080" title="אינטל 8080 – Hebrew" lang="he" hreflang="he" data-title="אינטל 8080" data-language-autonym="עברית" data-language-local-name="Hebrew" class="interlanguage-link-target"><span>עברית</span></a></li><li class="interlanguage-link interwiki-lt mw-list-item"><a href="https://lt.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Lithuanian" lang="lt" hreflang="lt" data-title="Intel 8080" data-language-autonym="Lietuvių" data-language-local-name="Lithuanian" class="interlanguage-link-target"><span>Lietuvių</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Hungarian" lang="hu" hreflang="hu" data-title="Intel 8080" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-ml mw-list-item"><a href="https://ml.wikipedia.org/wiki/%E0%B4%87%E0%B4%A8%E0%B5%8D%E0%B4%B1%E0%B5%BD_8080" title="ഇന്റൽ 8080 – Malayalam" lang="ml" hreflang="ml" data-title="ഇന്റൽ 8080" data-language-autonym="മലയാളം" data-language-local-name="Malayalam" class="interlanguage-link-target"><span>മലയാളം</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Dutch" lang="nl" hreflang="nl" data-title="Intel 8080" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Japanese" lang="ja" hreflang="ja" data-title="Intel 8080" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="Intel 8080" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-oc mw-list-item"><a href="https://oc.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Occitan" lang="oc" hreflang="oc" data-title="Intel 8080" data-language-autonym="Occitan" data-language-local-name="Occitan" class="interlanguage-link-target"><span>Occitan</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Polish" lang="pl" hreflang="pl" data-title="Intel 8080" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Portuguese" lang="pt" hreflang="pt" data-title="Intel 8080" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ro mw-list-item"><a href="https://ro.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Romanian" lang="ro" hreflang="ro" data-title="Intel 8080" data-language-autonym="Română" data-language-local-name="Romanian" class="interlanguage-link-target"><span>Română</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Russian" lang="ru" hreflang="ru" data-title="Intel 8080" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-si mw-list-item"><a href="https://si.wikipedia.org/wiki/%E0%B6%89%E0%B6%B1%E0%B7%8A%E0%B6%A7%E0%B7%99%E0%B6%BD%E0%B7%8A_8080" title="ඉන්ටෙල් 8080 – Sinhala" lang="si" hreflang="si" data-title="ඉන්ටෙල් 8080" data-language-autonym="සිංහල" data-language-local-name="Sinhala" class="interlanguage-link-target"><span>සිංහල</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Slovak" lang="sk" hreflang="sk" data-title="Intel 8080" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-sr mw-list-item"><a href="https://sr.wikipedia.org/wiki/Intel_8080" title="Intel 8080 – Serbian" lang="sr" hreflang="sr" data-title="Intel 8080" data-language-autonym="Српски / srpski" data-language-local-name="Serbian" class="interlanguage-link-target"><span>Српски / srpski</span></a></li><li class="interlanguage-link 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.hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Not to be confused with the numbered minor planet <a href="/wiki/8080_Intel" class="mw-redirect" title="8080 Intel">8080 Intel</a>.</div> <p class="mw-empty-elt"> </p> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title">Intel 8080</caption><tbody><tr><td colspan="2" class="infobox-image"><span class="mw-default-size" typeof="mw:File/Frameless"><a href="/wiki/File:Intel_8080_open-closed.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/a/ac/Intel_8080_open-closed.jpg/220px-Intel_8080_open-closed.jpg" decoding="async" width="220" height="156" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/a/ac/Intel_8080_open-closed.jpg/330px-Intel_8080_open-closed.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/a/ac/Intel_8080_open-closed.jpg/440px-Intel_8080_open-closed.jpg 2x" data-file-width="1460" data-file-height="1034" /></a></span><div class="infobox-caption">Closed and open Intel 8080 processor</div></td></tr><tr><th colspan="2" class="infobox-header">General information</th></tr><tr><th scope="row" class="infobox-label">Launched</th><td class="infobox-data">April 1974<span class="noprint">; 50 years ago</span><span style="display:none"> (<span class="bday dtstart published updated">1974-04</span>)</span></td></tr><tr><th scope="row" class="infobox-label">Discontinued</th><td class="infobox-data">1990<span class="noprint">; 35 years ago</span><span style="display:none"> (<span class="bday dtstart published updated">1990</span>)</span><sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup></td></tr><tr><th scope="row" class="infobox-label">Marketed by</th><td class="infobox-data"><a href="/wiki/Intel" title="Intel">Intel</a></td></tr><tr><th scope="row" class="infobox-label">Designed by</th><td class="infobox-data">Intel</td></tr><tr><th scope="row" class="infobox-label">Common manufacturer</th><td class="infobox-data"><style data-mw-deduplicate="TemplateStyles:r1126788409">.mw-parser-output .plainlist ol,.mw-parser-output .plainlist ul{line-height:inherit;list-style:none;margin:0;padding:0}.mw-parser-output .plainlist ol li,.mw-parser-output .plainlist ul li{margin-bottom:0}</style><div class="plainlist"><ul><li>Intel</li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Performance</th></tr><tr><th scope="row" class="infobox-label">Max. <a href="/wiki/Central_processing_unit" title="Central processing unit">CPU</a> <a href="/wiki/Clock_rate" title="Clock rate">clock rate</a></th><td class="infobox-data">2 MHz to 3.125 MHz</td></tr><tr><th scope="row" class="infobox-label">Data width</th><td class="infobox-data"><a href="/wiki/8-bit_computing" title="8-bit computing">8 bits</a></td></tr><tr><th scope="row" class="infobox-label">Address width</th><td class="infobox-data">16 bits</td></tr><tr><th colspan="2" class="infobox-header">Architecture and classification</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Technology_node" class="mw-redirect" title="Technology node">Technology node</a></th><td class="infobox-data"><a href="/wiki/6_%CE%BCm_process" title="6 μm process">6 μm</a></td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set</a></th><td class="infobox-data">8080</td></tr><tr><th colspan="2" class="infobox-header">Physical specifications</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Transistor_count" title="Transistor count">Transistors</a></th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li>4,500 or 6,000<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup></li></ul></div></td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Multi-core_processor" title="Multi-core processor">Cores</a></th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li>1</li></ul></div></td></tr><tr><th scope="row" class="infobox-label">Package</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li>40-pin <a href="/wiki/Dual_in-line_package" title="Dual in-line package">DIP</a></li></ul></div></td></tr><tr><th scope="row" class="infobox-label">Socket</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li><a href="/wiki/Dual_in-line_package" title="Dual in-line package">DIP40</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">History</th></tr><tr><th scope="row" class="infobox-label">Predecessor</th><td class="infobox-data"><a href="/wiki/Intel_8008" title="Intel 8008">Intel 8008</a></td></tr><tr><th scope="row" class="infobox-label">Successor</th><td class="infobox-data"><a href="/wiki/Intel_8085" title="Intel 8085">Intel 8085</a></td></tr><tr><th colspan="2" class="infobox-header">Support status</th></tr><tr><td colspan="2" class="infobox-full-data">Unsupported</td></tr></tbody></table> <p>The <b>Intel 8080</b> (<i>"eighty-eighty"</i>) is the second <a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a> microprocessor designed and manufactured by <a href="/wiki/Intel" title="Intel">Intel</a>. It first appeared in April 1974 and is an extended and enhanced variant of the earlier <a href="/wiki/Intel_8008" title="Intel 8008">8008</a> design, although without <a href="/wiki/Binary_compatibility" class="mw-redirect" title="Binary compatibility">binary compatibility</a>.<sup id="cite_ref-ENews-04-1974_3-0" class="reference"><a href="#cite_note-ENews-04-1974-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> Although earlier microprocessors were commonly used in mass-produced devices such as <a href="/wiki/Calculator" title="Calculator">calculators</a>, <a href="/wiki/Cash_register" title="Cash register">cash registers</a>, <a href="/wiki/Computer_terminal" title="Computer terminal">computer terminals</a>, <a href="/wiki/Industrial_robot" title="Industrial robot">industrial robots</a>,<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> and other applications, the 8080 saw greater success in a wider set of applications, and is largely credited with starting the <a href="/wiki/Microcomputer" title="Microcomputer">microcomputer</a> industry.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p><p>Several factors contributed to its popularity: its 40-pin package made it easier to interface than the 18-pin 8008, and also made its data bus more efficient; its NMOS implementation gave it faster transistors than those of the <a href="/wiki/PMOS_logic" title="PMOS logic">P-type metal–oxide–semiconductor logic</a> (PMOS) 8008, while also simplifying interfacing by making it <a href="/wiki/Transistor%E2%80%93transistor_logic" title="Transistor–transistor logic">TTL-compatible</a>; a wider variety of support chips were available; its instruction set was enhanced over the 8008;<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> and its full <a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a> address bus (versus the 14-bit one of the 8008) enabled it to access 64 KB of memory, four times more than the 8008's range of 16 KB. </p><p>It was used in the <a href="/wiki/Altair_8800" title="Altair 8800">Altair 8800</a> and subsequent <a href="/wiki/S-100_bus" title="S-100 bus">S-100 bus</a> personal computers until it was replaced by the <a href="/wiki/Zilog_Z80" title="Zilog Z80">Z80</a> in this role, and was the original target CPU for <a href="/wiki/CP/M" title="CP/M">CP/M</a> operating systems developed by <a href="/wiki/Gary_Kildall" title="Gary Kildall">Gary Kildall</a>. </p><p>The 8080 directly influenced the later <a href="/wiki/X86_architecture" class="mw-redirect" title="X86 architecture">x86 architecture</a>. Intel designed the <a href="/wiki/8086" class="mw-redirect" title="8086">8086</a> to have its <a href="/wiki/Assembly_language" title="Assembly language">assembly language</a> be similar enough to the 8080, with most instructions mapping directly onto each other, that <a href="/wiki/Source-to-source_compiler" title="Source-to-source compiler">transpiled</a> 8080 assembly code could be executed on the 8086.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p><p>The initial specified <a href="/wiki/Clock_rate" title="Clock rate">clock rate</a> or frequency limit was 2 <a href="/wiki/Megahertz" class="mw-redirect" title="Megahertz">MHz</a>, with common instructions using 4, 5, 7, 10, or 11 clock cycles. As a result, the processor is able to execute several hundred thousand <a href="/wiki/Instructions_per_second" title="Instructions per second">instructions per second</a>. Two faster variants, the 8080A-1 and 8080A-2, became available later with clock frequency limits of 3.125 MHz and 2.63 MHz respectively.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> The 8080 needs two support chips to function in most applications: the i8224 clock generator/driver and the i8228 bus controller. The 8080 is implemented in <a href="/wiki/NMOS_logic" title="NMOS logic">N-type metal–oxide–semiconductor logic</a> (NMOS) using non-saturated <a href="/wiki/Depletion_and_enhancement_modes" title="Depletion and enhancement modes">enhancement mode</a> transistors as loads<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> thus demanding a +12 <a href="/wiki/Volt" title="Volt">V</a> and a −5 V voltage in addition to the main <a href="/wiki/Transistor%E2%80%93transistor_logic" title="Transistor–transistor logic">transistor–transistor logic</a> (TTL) compatible +5 V. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="History">History</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=1" title="Edit section: History"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Microprocessor customers were reluctant to adopt the 8008 because of limitations such as the single addressing mode, low clock speed, low pin count, and small on-chip stack, which restricted the scale and complexity of software. There were several proposed designs for the 8080, ranging from simply adding stack instructions to the 8008 to a complete departure from all previous Intel architectures.<sup id="cite_ref-8080_DEV_11-0" class="reference"><a href="#cite_note-8080_DEV-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> The final design was a compromise between the proposals. </p><p>The conception of the 8080 began in the summer of 1971, when <a href="/wiki/Intel" title="Intel">Intel</a> wrapped up development of the <a href="/wiki/Intel_4004" title="Intel 4004">4004</a> and were still working on the <a href="/wiki/Intel_8008" title="Intel 8008">8008</a>. After rumors about the "CPU on a chip" came out, Intel started to see interest in the microprocessor from all sorts of customers. At the same time, <a href="/wiki/Federico_Faggin" title="Federico Faggin">Federico Faggin</a> – who led the design of the 4004 and became the primary architect of the 8080 – was giving some technical seminars on both of the aforementioned microprocessors and visiting customers. He found that they were complaining about the architecture and performance of said microprocessors, especially the 8008 – as its speed at 0.5 MHz was "not adequate."<sup id="cite_ref-8080_DEV_11-1" class="reference"><a href="#cite_note-8080_DEV-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </p><p>Faggin later proposed the chip to Intel's management and pushed for its implementation in the spring of 1972, as development of the 8008 was wrapping up. However, much to his surprise and frustration, Intel didn't approve the project. Faggin says that Intel wanted to see how the market would react to the 4004 and 8008 first, while others noted the problems Intel was having getting its latest generation of memory chips out the door and wanted to focus on that. As a result, Intel didn't approve of the project until fall of that year.<sup id="cite_ref-8080_DEV_11-2" class="reference"><a href="#cite_note-8080_DEV-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> Faggin hired <a href="/wiki/Masatoshi_Shima" title="Masatoshi Shima">Masatoshi Shima</a>, who helped design the logic of the 4004 with him, from Japan in November 1972. Shima did the detailed design under Faggin's direction,<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> using the design methodology for random logic with silicon gate that Faggin had created for the 4000 family and the 8008. </p><p>The 8080 was explicitly designed to be a general-purpose microprocessor for a larger number of customers. Much of the development effort was spent trying to integrate the functionalities of the 8008's supplemental chips into one package. It was decided early in development that the 8080 was not to be binary-compatible with the 8008, instead opting for source compatibility once run through a transpiler, to allow new software to not be subject to the same restrictions as the 8008. For the same reason, as well as to expand the capabilities of stack-based routines and interrupts, the stack was moved to external memory. </p><p>Noting the specialized use of general-purpose registers by programmers in mainframe systems, Faggin with Shima and <a href="/wiki/Stanley_Mazor" title="Stanley Mazor">Stanley Mazor</a> decided the 8080's registers would be specialized, with register pairs having a different set of uses.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> This also allowed the engineers to more effectively use transistors for other purposes. </p><p>Shima finished the layout in August 1973. Production of the chip later began in December of that year.<sup id="cite_ref-8080_DEV_11-3" class="reference"><a href="#cite_note-8080_DEV-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> After the development of <a href="/wiki/NMOS_logic" title="NMOS logic">NMOS logic</a> fabrication, a prototype of the 8080 was completed in January 1974. It had a flaw, in that driving with standard TTL devices increased the ground voltage because high current flowed into the narrow line. Intel had already produced 40,000 units of the 8080 at the direction of the sales section before Shima characterized the prototype. After working out some typical last-minute issues, Intel introduced the product in March 1974.<sup id="cite_ref-8080_DEV_11-4" class="reference"><a href="#cite_note-8080_DEV-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> It was released a month later as requiring Low-power Schottky TTL (LS TTL) devices. The 8080A fixed this flaw.<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> </p><p><span class="anchor" id="INTERP"></span>Intel offered an <a href="/wiki/Instruction_set_simulator" title="Instruction set simulator">instruction set simulator</a> for the 8080 named INTERP/80 to run compiled <a href="/wiki/PL/M" title="PL/M">PL/M</a> programs. It was written in <a href="/wiki/FORTRAN_IV" class="mw-redirect" title="FORTRAN IV">FORTRAN IV</a> by <a href="/wiki/Gary_Kildall" title="Gary Kildall">Gary Kildall</a> while he worked as a consultant for Intel.<sup id="cite_ref-Kildall_1974_15-0" class="reference"><a href="#cite_note-Kildall_1974-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Intel_1975_16-0" class="reference"><a href="#cite_note-Intel_1975-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> </p><p>There is only one patent on the 8080 with the following names: Federico Faggin, Masatoshi Shima, Stanley Mazor. </p> <div class="mw-heading mw-heading2"><h2 id="Description">Description</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=2" title="Edit section: Description"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Programming_model">Programming model</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=3" title="Edit section: Programming model"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Intel_8080_arch.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/5/5d/Intel_8080_arch.svg/220px-Intel_8080_arch.svg.png" decoding="async" width="220" height="196" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/5/5d/Intel_8080_arch.svg/330px-Intel_8080_arch.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/5/5d/Intel_8080_arch.svg/440px-Intel_8080_arch.svg.png 2x" data-file-width="835" data-file-height="744" /></a><figcaption>i8080 microarchitecture</figcaption></figure> <table class="infobox" style="font-size:88%;width:34em;"> <caption>Intel 8080 registers </caption> <tbody><tr> <td style="text-align:center;"><sup>1</sup><sub>5</sub> </td> <td style="text-align:center;"><sup>1</sup><sub>4</sub> </td> <td style="text-align:center;"><sup>1</sup><sub>3</sub> </td> <td style="text-align:center;"><sup>1</sup><sub>2</sub> </td> <td style="text-align:center;"><sup>1</sup><sub>1</sub> </td> <td style="text-align:center;"><sup>1</sup><sub>0</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>9</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>8</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>7</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>6</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>5</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>4</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>3</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>2</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>1</sub> </td> <td style="text-align:center;"><sup>0</sup><sub>0</sub> </td> <td><i>(bit position)</i> </td></tr> <tr> <td colspan="17"><b>Main registers</b> <br /> </td></tr> <tr style="background:silver;color:black"> <td style="text-align:center;" colspan="8">A </td> <td style="text-align:center;background:#DDD" colspan="8">Flags </td> <td style="width:auto; background:white; color:black;"><b>P</b>rogram <b>S</b>tatus <b>W</b>ord </td></tr> <tr style="background:silver;color:black"> <td style="text-align:center;" colspan="8">B </td> <td style="text-align:center;" colspan="8">C </td> <td style="background:white; color:black;"><b>B</b> </td></tr> <tr style="background:silver;color:black"> <td style="text-align:center;" colspan="8">D </td> <td style="text-align:center;" colspan="8">E </td> <td style="background:white; color:black;"><b>D</b> </td></tr> <tr style="background:silver;color:black"> <td style="text-align:center;" colspan="8">H </td> <td style="text-align:center;" colspan="8">L </td> <td style="background:white; color:black;"><b>H</b> (indirect address) </td></tr> <tr> <td colspan="17"><b>Index registers</b> <br /> </td></tr> <tr style="background:silver;color:black"> <td style="text-align:center;" colspan="16">SP </td> <td style="background:white; color:black;"><b>S</b>tack <b>P</b>ointer </td></tr> <tr> <td colspan="17"><b>Program counter</b> <br /> </td></tr> <tr style="background:silver;color:black"> <td style="text-align:center;" colspan="16">PC </td> <td style="background:white; color:black;"><b>P</b>rogram <b>C</b>ounter </td></tr> <tr> <td colspan="17"><b>Status register</b> </td></tr> <tr style="background:silver;color:black"> <td style="text-align:center; background:white" colspan="8">  </td> <td style="text-align:center;"><a href="/wiki/Sign_flag" class="mw-redirect" title="Sign flag">S</a> </td> <td style="text-align:center;"><a href="/wiki/Zero_flag" title="Zero flag">Z</a> </td> <td style="text-align:center;">0 </td> <td style="text-align:center;"><a href="/wiki/Half-carry_flag" title="Half-carry flag"><sup>A</sup><sub>C</sub></a> </td> <td style="text-align:center;">0 </td> <td style="text-align:center;"><a href="/wiki/Parity_flag" title="Parity flag">P</a> </td> <td style="text-align:center;">1 </td> <td style="text-align:center;"><a href="/wiki/Carry_flag" title="Carry flag">C</a> </td> <td style="background:white; color:black">Flags <sup id="cite_ref-AssyLang_17-0" class="reference"><a href="#cite_note-AssyLang-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> </td></tr></tbody></table> <p>The Intel 8080 is the successor to the <a href="/wiki/Intel_8008" title="Intel 8008">8008</a>. It uses the same basic <a href="/wiki/Instruction_set" class="mw-redirect" title="Instruction set">instruction set</a> and <a href="/wiki/Processor_register" title="Processor register">register</a> model as the 8008, although it is neither <a href="/wiki/Source-code_compatibility" title="Source-code compatibility">source code compatible</a> nor <a href="/wiki/Binary-code_compatibility" title="Binary-code compatibility">binary code compatible</a> with its predecessor. Every instruction in the 8008 has an equivalent instruction in the 8080. The 8080 also adds 16-bit operations in its instruction set. Whereas the 8008 required the use of the HL register pair to indirectly access its 14-bit memory space, the 8080 added addressing modes to allow direct access to its full 16-bit memory space. The internal 7-level push-down <a href="/wiki/Call_stack" title="Call stack">call stack</a> of the 8008 was replaced by a dedicated 16-bit stack-pointer (SP) register. The 8080's 40-pin <a href="/wiki/Dual_in-line_package" title="Dual in-line package">DIP packaging</a> permits it to provide a 16-bit <a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">address bus</a> and an 8-bit <a href="/wiki/Bus_(computing)" title="Bus (computing)">data bus</a>, enabling access to 64 <a href="/wiki/Kibibyte" class="mw-redirect" title="Kibibyte">KiB</a> (2<sup>16</sup> bytes) of memory. </p> <div class="mw-heading mw-heading4"><h4 id="Registers">Registers</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=4" title="Edit section: Registers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The processor has seven 8-bit <a href="/wiki/Processor_register" title="Processor register">registers</a> (A, B, C, D, E, H, and L), where A is the primary 8-bit accumulator. The other six registers can be used as either individual 8-bit registers or in three 16-bit register pairs (BC, DE, and HL, referred to as B, D and H in Intel documents) depending on the particular instruction. Some instructions also enable the HL register pair to be used as a (limited) 16-bit accumulator. A pseudo-register M, which refers to the dereferenced memory location pointed to by HL, can be used almost anywhere other registers can be used. The 8080 has a 16-bit <a href="/wiki/Stack-based_memory_allocation" title="Stack-based memory allocation">stack pointer</a> to memory, replacing the 8008's internal <a href="/wiki/Stack_(data_structure)" class="mw-redirect" title="Stack (data structure)">stack</a>, and a 16-bit <a href="/wiki/Program_counter" title="Program counter">program counter</a>. </p> <div class="mw-heading mw-heading4"><h4 id="Flags">Flags</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=5" title="Edit section: Flags"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The processor maintains internal <a href="/wiki/Flag_word" class="mw-redirect" title="Flag word">flag bits</a> (a <a href="/wiki/Status_register" title="Status register">status register</a>), which indicate the results of arithmetic and logical instructions. Only certain instructions affect the flags. The flags are: </p> <ul><li><a href="/wiki/Sign_flag" class="mw-redirect" title="Sign flag">Sign</a> (S), set if the result is negative.</li> <li><a href="/wiki/Zero_flag" title="Zero flag">Zero</a> (Z), set if the result is zero.</li> <li><a href="/wiki/Parity_flag" title="Parity flag">Parity</a> (P), set if the number of 1 bits in the result is even.</li> <li><a href="/wiki/Carry_flag" title="Carry flag">Carry</a> (C), set if the last addition operation resulted in a carry or if the last subtraction operation required a borrow.</li> <li><a href="/wiki/Half-carry_flag" title="Half-carry flag">Auxiliary carry</a> (AC or H), used for <a href="/wiki/Binary-coded_decimal" title="Binary-coded decimal">binary-coded decimal</a> arithmetic (BCD).</li></ul> <p>The carry bit can be set or complemented by specific instructions. Conditional-branch instructions test the various flag status bits. The accumulator and the flags together are called the PSW, or program status word. PSW can be pushed to or popped from the stack. </p> <div class="mw-heading mw-heading4"><h4 id="Commands,_instructions"><span id="Commands.2C_instructions"></span>Commands, instructions</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=6" title="Edit section: Commands, instructions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>As with many other 8-bit processors, all instructions are encoded in one byte (including register numbers, but excluding immediate data), for simplicity. Some can be followed by one or two bytes of data, which can be an immediate operand, a memory address, or a port number. Like more advanced processors, it has automatic CALL and RET instructions for multi-level procedure calls and returns (which can even be conditionally executed, like jumps) and instructions to save and restore any 16-bit register pair on the machine stack. Eight one-byte call instructions (<code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">RST</code>) for subroutines exist at the fixed addresses 00h, 08h, 10h, ..., 38h. These are intended to be supplied by external hardware in order to invoke a corresponding <a href="/wiki/Interrupt_service_routine" class="mw-redirect" title="Interrupt service routine">interrupt service routine</a>, but are also often employed as fast <a href="/wiki/System_call" title="System call">system calls</a>. The instruction that executes slowest is <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">XTHL</code>, which is used for exchanging the register pair HL with the value stored at the address indicated by the stack pointer. </p> <div class="mw-heading mw-heading5"><h5 id="8-bit_instructions">8-bit instructions</h5><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=7" title="Edit section: 8-bit instructions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>All 8-bit operations with two operands can only be performed on the 8-bit <a href="/wiki/Accumulator_(computing)" title="Accumulator (computing)">accumulator</a> (the A register). The other operand can be either an immediate value, another 8-bit register, or a memory byte addressed by the 16-bit register pair HL. Increments and decrements can be performed on any 8 bit register or an HL-addressed memory byte. Direct copying is supported between any two 8-bit registers and between any 8-bit register and an HL-addressed memory byte. Due to the regular encoding of the <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">MOV</code> instruction (using a quarter of available opcode space), there are redundant codes to copy a register into itself (<code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">MOV B,B</code>, for instance), which are of little use, except for delays. However, the systematic opcode for <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">MOV M,M</code> is instead used to encode the halt (<a href="/wiki/HLT_(x86_instruction)" title="HLT (x86 instruction)"><code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">HLT</code></a>) instruction, halting execution until an external reset or interrupt occurs. </p> <div class="mw-heading mw-heading5"><h5 id="16-bit_operations">16-bit operations</h5><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=8" title="Edit section: 16-bit operations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Although the 8080 is generally an 8-bit processor, it has limited abilities to perform 16-bit operations. Any of the three 16-bit register pairs (BC, DE, or HL, referred to as B, D, H in Intel documents) or SP can be loaded with an immediate 16-bit value (using <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">LXI</code>), incremented or decremented (using <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">INX</code> and <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">DCX</code>), or added to HL (using <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">DAD</code>). By adding HL to itself, it is possible to achieve the same result as a 16-bit arithmetical left shift with one instruction. The only 16-bit instructions that affect any flag is <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">DAD</code>, which sets the CY (carry) flag in order to allow for programmed 24-bit or 32-bit <a href="/wiki/Arithmetic" title="Arithmetic">arithmetic</a> (or larger), needed to implement <a href="/wiki/Floating-point_arithmetic" title="Floating-point arithmetic">floating-point arithmetic</a>. BC, DE, HL, or PSW can be copied to and from the stack using <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">PUSH</code> and <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">POP</code>. A stack frame can be allocated using <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">DAD SP</code> and <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">SPHL</code>. A branch to a computed pointer can be executed with <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">PCHL</code>. <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">LHLD</code> loads HL from directly addressed memory and <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">SHLD</code> stores HL likewise. The <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">XCHG</code><sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> instruction exchanges the values of the HL and DE register pairs. <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">XTHL</code>exchanges last item pushed on stack with HL. </p> <div class="mw-heading mw-heading5"><h5 id="Instruction_set">Instruction set</h5><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=9" title="Edit section: Instruction set"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" style="text-align:center"> <tbody><tr> <th colspan="8">Opcode</th> <th colspan="2">Operands</th> <th rowspan="2">Mnemonic</th> <th rowspan="2">Clocks</th> <th rowspan="2">Description </th></tr> <tr> <th>7</th> <th>6</th> <th>5</th> <th>4</th> <th>3</th> <th>2</th> <th>1</th> <th>0</th> <th>b2</th> <th>b3 </th></tr> <tr> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>—</td> <td>—</td> <td align="left">NOP</td> <td>4</td> <td align="left">No operation </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="2">RP</td> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td><i>datlo</i></td> <td><i>dathi</i></td> <td align="left">LXI <i>rp,data</i></td> <td>10</td> <td align="left">RP ← <i>data</i> </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="2">RP</td> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>—</td> <td>—</td> <td align="left">STAX <i>rp</i></td> <td>7</td> <td align="left">(RP) ← A [BC or DE only] </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="2">RP</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">INX <i>rp</i></td> <td>5</td> <td align="left">RP ← RP + 1 </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="3">DDD</td> <td>1</td> <td>0</td> <td>0</td> <td>—</td> <td>—</td> <td align="left">INR <i>ddd</i></td> <td>5/10</td> <td align="left">DDD ← DDD + 1 </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="3">DDD</td> <td>1</td> <td>0</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">DCR <i>ddd</i></td> <td>5/10</td> <td align="left">DDD ← DDD - 1 </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="3">DDD</td> <td>1</td> <td>1</td> <td>0</td> <td><i>data</i></td> <td>—</td> <td align="left">MVI <i>ddd,data</i></td> <td>7/10</td> <td align="left">DDD ← data </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="2">RP</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">DAD <i>rp</i></td> <td>10</td> <td align="left">HL ← HL + RP </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="2">RP</td> <td>1</td> <td>0</td> <td>1</td> <td>0</td> <td>—</td> <td>—</td> <td align="left">LDAX <i>rp</i></td> <td>7</td> <td align="left">A ← (RP) [BC or DE only] </td></tr> <tr> <td>0</td> <td>0</td> <td colspan="2">RP</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">DCX <i>rp</i></td> <td>5</td> <td align="left">RP ← RP - 1 </td></tr> <tr> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">RLC</td> <td>4</td> <td align="left">A<sub>1-7</sub> ← A<sub>0-6</sub>; A<sub>0</sub> ← Cy ← A<sub>7</sub> </td></tr> <tr> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">RRC</td> <td>4</td> <td align="left">A<sub>0-6</sub> ← A<sub>1-7</sub>; A<sub>7</sub> ← Cy ← A<sub>0</sub> </td></tr> <tr> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">RAL</td> <td>4</td> <td align="left">A<sub>1-7</sub> ← A<sub>0-6</sub>; Cy ← A<sub>7</sub>; A<sub>0</sub> ← Cy </td></tr> <tr> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">RAR</td> <td>4</td> <td align="left">A<sub>0-6</sub> ← A<sub>1-7</sub>; Cy ← A<sub>0</sub>; A<sub>7</sub> ← Cy </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">SHLD <i>add</i></td> <td>16</td> <td align="left">(add) ← HL </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">DAA</td> <td>4</td> <td align="left">If A<sub>0-3</sub> > 9 OR AC = 1 then A ← A + 6; <p>then if A<sub>4-7</sub> > 9 OR Cy = 1 then A ← A + 0x60 </p> </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>1</td> <td>0</td> <td>1</td> <td>0</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">LHLD <i>add</i></td> <td>16</td> <td align="left">HL ← (add) </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">CMA</td> <td>4</td> <td align="left">A ← ¬A </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">STA <i>add</i></td> <td>13</td> <td align="left">(add) ← A </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">STC</td> <td>4</td> <td align="left">Cy ← 1 </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>0</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">LDA <i>add</i></td> <td>13</td> <td align="left">A ← (add) </td></tr> <tr> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">CMC</td> <td>4</td> <td align="left">Cy ← ¬Cy </td></tr> <tr> <td>0</td> <td>1</td> <td colspan="3">DDD</td> <td colspan="3">SSS</td> <td>—</td> <td>—</td> <td align="left">MOV <i>ddd,sss</i></td> <td>5/7</td> <td align="left">DDD ← SSS </td></tr> <tr> <td>0</td> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>0</td> <td>—</td> <td>—</td> <td align="left">HLT</td> <td>7</td> <td align="left">Halt </td></tr> <tr> <td>1</td> <td>0</td> <td colspan="3">ALU</td> <td colspan="3">SSS</td> <td>—</td> <td>—</td> <td align="left">ADD ADC SUB SBB ANA XRA ORA CMP <i>sss</i></td> <td>4/7</td> <td align="left">A ← A [ALU operation] SSS </td></tr> <tr> <td>1</td> <td>1</td> <td colspan="3">CC</td> <td>0</td> <td>0</td> <td>0</td> <td>—</td> <td>—</td> <td align="left">Rcc (RET conditional)</td> <td>5/11</td> <td align="left">If cc true, PC ← (SP), SP ← SP + 2 </td></tr> <tr> <td>1</td> <td>1</td> <td colspan="2">RP</td> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">POP <i>rp</i></td> <td>10</td> <td align="left">RP ← (SP), SP ← SP + 2 </td></tr> <tr> <td>1</td> <td>1</td> <td colspan="3">CC</td> <td>0</td> <td>1</td> <td>0</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">Jcc <i>add</i> (JMP conditional)</td> <td>10</td> <td align="left">If cc true, PC ← add </td></tr> <tr> <td>1</td> <td>1</td> <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">JMP <i>add</i></td> <td>10</td> <td align="left">PC ← add </td></tr> <tr> <td>1</td> <td>1</td> <td colspan="3">CC</td> <td>1</td> <td>0</td> <td>0</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">Ccc <i>add</i> (CALL conditional)</td> <td>11/17</td> <td align="left">If cc true, SP ← SP - 2, (SP) ← PC, PC ← add </td></tr> <tr> <td>1</td> <td>1</td> <td colspan="2">RP</td> <td>0</td> <td>1</td> <td>0</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">PUSH <i>rp</i></td> <td>11</td> <td align="left">SP ← SP - 2, (SP) ← RP </td></tr> <tr> <td>1</td> <td>1</td> <td colspan="3">ALU</td> <td>1</td> <td>1</td> <td>0</td> <td><i>data</i></td> <td>—</td> <td align="left">ADI ACI SUI SBI ANI XRI ORI CPI <i>data</i></td> <td>7</td> <td align="left">A ← A [ALU operation] data </td></tr> <tr> <td>1</td> <td>1</td> <td colspan="3">N</td> <td>1</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">RST <i>n</i></td> <td>11</td> <td align="left">SP ← SP - 2, (SP) ← PC, PC ← N x 8 </td></tr> <tr> <td>1</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">RET</td> <td>10</td> <td align="left">PC ← (SP), SP ← SP + 2 </td></tr> <tr> <td>1</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td><i>addlo</i></td> <td><i>addhi</i></td> <td align="left">CALL <i>add</i></td> <td>17</td> <td align="left">SP ← SP - 2, (SP) ← PC, PC ← add </td></tr> <tr> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td><i>port</i></td> <td>—</td> <td align="left">OUT <i>port</i></td> <td>10</td> <td align="left">Port ← A </td></tr> <tr> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td><i>port</i></td> <td>—</td> <td align="left">IN <i>port</i></td> <td>10</td> <td align="left">A ← Port </td></tr> <tr> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">XTHL</td> <td>18</td> <td align="left">HL ↔ (SP) </td></tr> <tr> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">PCHL</td> <td>5</td> <td align="left">PC ← HL </td></tr> <tr> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">XCHG</td> <td>4</td> <td align="left">HL ↔ DE </td></tr> <tr> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">DI</td> <td>4</td> <td align="left">Disable interrupts </td></tr> <tr> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>0</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">SPHL</td> <td>5</td> <td align="left">SP ← HL </td></tr> <tr> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>1</td> <td>0</td> <td>1</td> <td>1</td> <td>—</td> <td>—</td> <td align="left">EI</td> <td>4</td> <td align="left">Enable interrupts </td></tr> <tr> <th>7</th> <th>6</th> <th>5</th> <th>4</th> <th>3</th> <th>2</th> <th>1</th> <th>0</th> <th>b2</th> <th>b3</th> <th>Mnemonic</th> <th>Clocks</th> <th>Description </th></tr> <tr> <th colspan="13"> </th></tr> <tr> <th colspan="5">SSS DDD</th> <th>2</th> <th>1</th> <th>0</th> <th colspan="2">CC</th> <th>ALU</th> <th>RP</th> <th> </th></tr> <tr> <td colspan="5">B</td> <td>0</td> <td>0</td> <td>0</td> <td colspan="2">NZ</td> <td align="left">ADD ADI (A ← A + arg)</td> <td>BC </td></tr> <tr> <td colspan="5">C</td> <td>0</td> <td>0</td> <td>1</td> <td colspan="2">Z</td> <td align="left">ADC ACI (A ← A + arg + Cy)</td> <td>DE </td></tr> <tr> <td colspan="5">D</td> <td>0</td> <td>1</td> <td>0</td> <td colspan="2">NC</td> <td align="left">SUB SUI (A ← A - arg)</td> <td>HL </td></tr> <tr> <td colspan="5">E</td> <td>0</td> <td>1</td> <td>1</td> <td colspan="2">C</td> <td align="left">SBB SBI (A ← A - arg - Cy)</td> <td>SP or PSW </td></tr> <tr> <td colspan="5">H</td> <td>1</td> <td>0</td> <td>0</td> <td colspan="2">PO</td> <td align="left">ANA ANI (A ← A ∧ arg) </td></tr> <tr> <td colspan="5">L</td> <td>1</td> <td>0</td> <td>1</td> <td colspan="2">PE</td> <td align="left">XRA XRI (A ← A ⊻ arg) </td></tr> <tr> <td colspan="5">M</td> <td>1</td> <td>1</td> <td>0</td> <td colspan="2">P</td> <td align="left">ORA ORI (A ← A ∨ arg) </td></tr> <tr> <td colspan="5">A</td> <td>1</td> <td>1</td> <td>1</td> <td colspan="2">N</td> <td align="left">CMP CPI (A - arg) </td></tr> <tr> <th colspan="5">SSS DDD</th> <th>2</th> <th>1</th> <th>0</th> <th colspan="2">CC</th> <th>ALU</th> <th colspan="2"> </th></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="Input/output_scheme"><span id="Input.2Foutput_scheme"></span>Input/output scheme</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=10" title="Edit section: Input/output scheme"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id="Input_output_port_space">Input output port space</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=11" title="Edit section: Input output port space"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The 8080 supports 256 <a href="/wiki/Input/output" title="Input/output">input/output</a> (I/O) ports,<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> accessed via dedicated I/O instructions taking port addresses as operands.<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> This I/O mapping scheme is regarded as an advantage, as it frees up the processor's limited address space. Many CPU architectures instead use so-called <a href="/wiki/Memory-mapped_I/O" class="mw-redirect" title="Memory-mapped I/O">memory-mapped I/O</a> (MMIO), in which a common address space is used for both RAM and peripheral chips. This removes the need for dedicated I/O instructions, although a drawback in such designs may be that special hardware must be used to insert wait states, as peripherals are often slower than memory. However, in some simple 8080 computers, I/O is indeed addressed as if they were memory cells, "memory-mapped", leaving the I/O commands unused. I/O addressing can also sometimes employ the fact that the processor outputs the same 8-bit port address to both the lower and the higher address byte (i.e., <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">IN 05h</code> would put the address 0505h on the 16-bit address bus). Similar I/O-port schemes are used in the backward-compatible Zilog Z80 and Intel 8085, and the closely related x86 microprocessor families. </p> <div class="mw-heading mw-heading4"><h4 id="Separate_stack_space">Separate stack space</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=12" title="Edit section: Separate stack space"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>One of the bits in the processor state word (see below) indicates that the processor is accessing data from the stack. Using this signal, it is possible to implement a separate stack memory space. This feature is seldom used. </p> <div class="mw-heading mw-heading3"><h3 id="Status_word">Status word</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=13" title="Edit section: Status word"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>For more advanced systems, during the beginning of each machine cycle, the processor places an eight bit status word on the data bus. This byte contains flags that determine whether the memory or I/O port is accessed and whether it is necessary to handle an interrupt. </p><p>The interrupt system state (enabled or disabled) is also output on a separate pin. For simple systems, where the interrupts are not used, it is possible to find cases where this pin is used as an additional single-bit output port (the popular <a href="/wiki/Radio-86RK" title="Radio-86RK">Radio-86RK</a> computer made in the <a href="/wiki/Soviet_Union" title="Soviet Union">Soviet Union</a>, for instance). </p> <div class="mw-heading mw-heading3"><h3 id="Example_code">Example code</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=14" title="Edit section: Example code"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The following 8080/8085 <a href="/wiki/Assembly_language" title="Assembly language">assembler</a> source code is for a subroutine named <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">memcpy</code> that copies a block of data bytes of a given size from one location to another. The data block is copied one byte at a time, and the data movement and looping logic utilizes 16-bit operations. </p> <table> <tbody><tr> <td> <pre> 1000 1000 1000 78 1001 B1 1002 C8 1003 1A 1004 77 1005 13 1006 23 1007 0B 1008 78 1009 B1 100A C2 03 10 100D C9 </pre> </td> <td> <div class="mw-highlight mw-highlight-lang-nasm mw-content-ltr" dir="ltr"><pre><span></span><span class="c1">; memcpy --</span> <span class="c1">; Copy a block of memory from one location to another.</span> <span class="c1">;</span> <span class="c1">; Entry registers</span> <span class="c1">; BC - Number of bytes to copy</span> <span class="c1">; DE - Address of source data block</span> <span class="c1">; HL - Address of target data block</span> <span class="c1">;</span> <span class="c1">; Return registers</span> <span class="c1">; BC - Zero</span> <span class="w"> </span><span class="k">org</span><span class="w"> </span><span class="mh">1000h</span><span class="w"> </span><span class="c1">;Origin at 1000h</span> <span class="nf">memcpy</span><span class="w"> </span><span class="nv">public</span> <span class="w"> </span><span class="nf">mov</span><span class="w"> </span><span class="nv">a</span><span class="p">,</span><span class="nv">b</span><span class="w"> </span><span class="c1">;Copy register B to register A</span> <span class="w"> </span><span class="nf">ora</span><span class="w"> </span><span class="nv">c</span><span class="w"> </span><span class="c1">;Bitwise OR of A and C into register A</span> <span class="w"> </span><span class="nf">rz</span><span class="w"> </span><span class="c1">;Return if the zero-flag is set high.</span> <span class="nl">loop:</span><span class="w"> </span><span class="nf">ldax</span><span class="w"> </span><span class="nv">d</span><span class="w"> </span><span class="c1">;Load A from the address pointed by DE</span> <span class="w"> </span><span class="nf">mov</span><span class="w"> </span><span class="nv">m</span><span class="p">,</span><span class="nv">a</span><span class="w"> </span><span class="c1">;Store A into the address pointed by HL</span> <span class="w"> </span><span class="nf">inx</span><span class="w"> </span><span class="nv">d</span><span class="w"> </span><span class="c1">;Increment DE</span> <span class="w"> </span><span class="nf">inx</span><span class="w"> </span><span class="nv">h</span><span class="w"> </span><span class="c1">;Increment HL</span> <span class="w"> </span><span class="nf">dcx</span><span class="w"> </span><span class="nv">b</span><span class="w"> </span><span class="c1">;Decrement BC (does not affect Flags)</span> <span class="w"> </span><span class="nf">mov</span><span class="w"> </span><span class="nv">a</span><span class="p">,</span><span class="nv">b</span><span class="w"> </span><span class="c1">;Copy B to A (so as to compare BC with zero)</span> <span class="w"> </span><span class="nf">ora</span><span class="w"> </span><span class="nv">c</span><span class="w"> </span><span class="c1">;A = A | C (are both B and C zero?)</span> <span class="w"> </span><span class="nf">jnz</span><span class="w"> </span><span class="nv">loop</span><span class="w"> </span><span class="c1">;Jump to 'loop:' if the zero-flag is not set. </span> <span class="w"> </span><span class="nf">ret</span><span class="w"> </span><span class="c1">;Return</span> </pre></div> </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="Pin_use">Pin use</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=15" title="Edit section: Pin use"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:Intel_8080_Microprocessor.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/e2/Intel_8080_Microprocessor.png/300px-Intel_8080_Microprocessor.png" decoding="async" width="300" height="547" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/e2/Intel_8080_Microprocessor.png/450px-Intel_8080_Microprocessor.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/e2/Intel_8080_Microprocessor.png/600px-Intel_8080_Microprocessor.png 2x" data-file-width="898" data-file-height="1636" /></a><figcaption>8080 <a href="/wiki/Pinout" title="Pinout">pinout</a></figcaption></figure> <p>The address bus has its own 16 pins, and the data bus has 8 pins that are usable without any multiplexing. Using the two additional pins (read and write signals), it is possible to assemble simple microprocessor devices very easily. Only the separate IO space, interrupts, and DMA need added chips to decode the processor pin signals. However, the pin load capacity is limited; even simple computers often require bus amplifiers. </p><p>The processor needs three power sources (−5, +5, and +12 V) and two non-overlapping high-amplitude synchronizing signals. However, at least the late Soviet version КР580ВМ80А was able to work with a single +5 V power source, the +12 V pin being connected to +5 V and the −5 V pin to ground. </p><p>The pin-out table, from the chip's accompanying documentation, describes the pins as follows: </p> <table class="wikitable"> <tbody><tr> <th>Pin number </th> <th>Signal </th> <th>Type </th> <th>Comment </th></tr> <tr> <td>1</td> <td>A10 </td> <td>Output</td> <td>Address bus 10 </td></tr> <tr> <td>2</td> <td>GND </td> <td>—</td> <td>Ground </td></tr> <tr> <td>3</td> <td>D4 </td> <td rowspan="8">Bidirectional </td> <td rowspan="8">Bidirectional data bus. The processor also transiently sets here the "processor state", providing information about what the processor is currently doing: <ul><li>D0 reading interrupt command. In response to the interrupt signal, the processor is reading and executing a single arbitrary command with this flag raised. Normally the supporting chips provide the subroutine call command (CALL or RST), transferring control to the interrupt handling code.</li> <li>D1 reading (low level means writing)</li> <li>D2 accessing stack (probably a separate stack memory space was initially planned)</li> <li>D3 doing nothing, has been halted by the <a href="/wiki/HLT_(x86_instruction)" title="HLT (x86 instruction)">HLT</a> instruction</li> <li>D4 writing data to an output port</li> <li>D5 reading the first byte of an executable instruction</li> <li>D6 reading data from an input port</li> <li>D7 reading data from memory</li></ul> </td></tr> <tr> <td>4</td> <td>D5 </td></tr> <tr> <td>5</td> <td>D6 </td></tr> <tr> <td>6</td> <td>D7 </td></tr> <tr> <td>7</td> <td>D3 </td></tr> <tr> <td>8</td> <td>D2 </td></tr> <tr> <td>9</td> <td>D1 </td></tr> <tr> <td>10</td> <td>D0 </td></tr> <tr> <td>11</td> <td>−5 V </td> <td>—</td> <td>The −5 V power supply. This must be the first power source connected and the last disconnected, otherwise the processor will be damaged. </td></tr> <tr> <td>12</td> <td>RESET </td> <td>Input</td> <td>Reset. This active low signal forces execution of commands located at address 0000. The content of other processor registers is not modified. </td></tr> <tr> <td>13</td> <td>HOLD </td> <td>Input</td> <td>Direct memory access request. The processor is requested to switch the data and address bus to the high impedance ("disconnected") state. </td></tr> <tr> <td>14</td> <td>INT </td> <td>Input</td> <td>Interrupt request </td></tr> <tr> <td>15</td> <td>φ2 </td> <td>Input</td> <td>The second phase of the clock generator signal </td></tr> <tr> <td>16</td> <td>INTE </td> <td>Output</td> <td>The processor has two commands for setting 0 or 1 level on this pin. The pin normally is supposed to be used for interrupt control. However, in simple computers it was sometimes used as a single bit output port for various purposes. </td></tr> <tr> <td>17</td> <td>DBIN </td> <td>Output</td> <td>Read (the processor reads from memory or input port) </td></tr> <tr> <td>18</td> <td>WR </td> <td>Output</td> <td>Write (the processor writes to memory or output port). This is an active low output. </td></tr> <tr> <td>19</td> <td>SYNC </td> <td>Output</td> <td>Active level indicates that the processor has put the "state word" on the data bus. The various bits of this state word provide added information to support the separate address and memory spaces, interrupts, and direct memory access. This signal is required to pass through additional logic before it can be used to write the processor state word from the data bus into some external register, e.g., <a rel="nofollow" class="external text" href="http://www.datasheets360.com/pdf/-4828066515233335508">8238</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230918030959/https://www.datasheets360.com/pdf/-4828066515233335508">Archived</a> September 18, 2023, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>-System Controller and Bus Driver. </td></tr> <tr> <td>20</td> <td>+5 V</td> <td>—</td> <td>The + 5 V power supply </td></tr> <tr> <td>21</td> <td>HLDA </td> <td>Output</td> <td>Direct memory access confirmation. The processor switches data and address pins into the high impedance state, allowing another device to manipulate the bus </td></tr> <tr> <td>22</td> <td>φ1 </td> <td>Input</td> <td>The first phase of the clock generator signal </td></tr> <tr> <td>23</td> <td>READY </td> <td>Input</td> <td>Wait. With this signal it is possible to suspend the processor's work. It is also used to support the hardware-based step-by step debugging mode. </td></tr> <tr> <td>24</td> <td>WAIT </td> <td>Output</td> <td>Wait (indicates that the processor is in the waiting state) </td></tr> <tr> <td>25</td> <td>A0 </td> <td rowspan="3">Output </td> <td rowspan="3">Address bus </td></tr> <tr> <td>26</td> <td>A1 </td></tr> <tr> <td>27</td> <td>A2 </td></tr> <tr> <td>28</td> <td>12 V </td> <td>—</td> <td>The +12 V power supply. This must be the <i>last</i> connected and first disconnected power source. </td></tr> <tr> <td>29</td> <td>A3 </td> <td rowspan="12">Output </td> <td rowspan="12">The address bus; can switch into high impedance state on demand </td></tr> <tr> <td>30</td> <td>A4 </td></tr> <tr> <td>31</td> <td>A5 </td></tr> <tr> <td>32</td> <td>A6 </td></tr> <tr> <td>33</td> <td>A7 </td></tr> <tr> <td>34</td> <td>A8 </td></tr> <tr> <td>35</td> <td>A9 </td></tr> <tr> <td>36</td> <td>A15 </td></tr> <tr> <td>37</td> <td>A12 </td></tr> <tr> <td>38</td> <td>A13 </td></tr> <tr> <td>39</td> <td>A14 </td></tr> <tr> <td>40</td> <td>A11 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Support_chips">Support chips</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=16" title="Edit section: Support chips"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A key factor in the success of the 8080 was the broad range of support chips available, providing serial communications, counter/timing, input/output, direct memory access, and programmable interrupt control amongst other functions: </p> <ul><li>8214 - Priority Interrupt Control Unit<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup></li> <li>8224 – <a href="/wiki/Clock_generator" title="Clock generator">Clock generator</a></li> <li>8228/<a rel="nofollow" class="external text" href="http://www.datasheets360.com/pdf/-4828066515233335508">8238</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230918030959/https://www.datasheets360.com/pdf/-4828066515233335508">Archived</a> September 18, 2023, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> – System controller and bus driver</li> <li><a href="/wiki/Intel_8251" title="Intel 8251">8251</a> – Communication controller</li> <li><a href="/wiki/Intel_8253" title="Intel 8253">8253</a> – <a href="/wiki/Programmable_interval_timer" title="Programmable interval timer">Programmable interval timer</a></li> <li><a href="/wiki/Intel_8255" title="Intel 8255">8255</a> – Programmable peripheral interface</li> <li><a href="/wiki/Intel_8257" title="Intel 8257">8257</a> – <a href="/wiki/Direct_memory_access" title="Direct memory access">DMA controller</a></li> <li><a href="/wiki/Intel_8259" title="Intel 8259">8259</a> – <a href="/wiki/Programmable_interrupt_controller" title="Programmable interrupt controller">Programmable interrupt controller</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Physical_implementation">Physical implementation</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=17" title="Edit section: Physical implementation"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The 8080 <a href="/wiki/Integrated_circuit" title="Integrated circuit">integrated circuit</a> uses non-saturated enhancement-load <a href="/wiki/NMOS_logic" title="NMOS logic">nMOS</a> gates, demanding extra voltages (for the load-gate bias). It was manufactured in a <a href="/wiki/Silicon_gate" class="mw-redirect" title="Silicon gate">silicon gate</a> process using a minimal feature size of 6 μm. A single layer of metal is used to <a href="/wiki/Electrical_connection" class="mw-redirect" title="Electrical connection">interconnect</a> the approximately 4,500 transistors<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> in the design, but the higher <a href="/wiki/Electrical_resistance" class="mw-redirect" title="Electrical resistance">resistance</a> <a href="/wiki/Polycrystalline_silicon" title="Polycrystalline silicon">polysilicon</a> layer, which required higher voltage for some interconnects, is implemented with transistor gates. The <a href="/wiki/Die_preparation" title="Die preparation">die</a> size is approximately 20 mm<sup>2</sup>. </p> <div class="mw-heading mw-heading2"><h2 id="Commercial_impact">Commercial impact</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=18" title="Edit section: Commercial impact"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Applications_and_successors">Applications and successors</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=19" title="Edit section: Applications and successors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><span class="anchor" id="8080_CPU_family"></span> The 8080 was used in many early microcomputers, such as the MITS <a href="/wiki/Altair_8800" title="Altair 8800">Altair 8800</a> Computer, <a href="/wiki/Processor_Technology" title="Processor Technology">Processor Technology</a> <a href="/wiki/SOL-20" class="mw-redirect" title="SOL-20">SOL-20</a> Terminal Computer and <a href="/wiki/IMSAI_8080" title="IMSAI 8080">IMSAI 8080</a> Microcomputer, forming the basis for machines running the <a href="/wiki/CP/M" title="CP/M">CP/M</a> operating system (the later, almost fully compatible and more able, <a href="/wiki/Zilog_Z80" title="Zilog Z80">Zilog Z80</a> processor would capitalize on this, with Z80 and CP/M becoming the dominant CPU and OS combination of the period <abbr title="circa">c.</abbr><span style="white-space:nowrap;"> 1976</span> to 1983 much as did the <a href="/wiki/X86" title="X86">x86</a> and <a href="/wiki/DOS" title="DOS">DOS</a> for the PC a decade later). </p><p>In 1979, even after the introduction of the Z80 and 8085 processors, five manufacturers of the 8080 were selling an estimated 500,000 units per month at a price around $3 to $4 each.<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup> </p><p>The first <a href="/wiki/Single-board_computer" title="Single-board computer">single-board microcomputers</a>, such as <a href="/wiki/MYCRO-1" title="MYCRO-1">MYCRO-1</a> and the <i>dyna-micro</i> / MMD-1 (see: <a href="/wiki/Single-board_computer" title="Single-board computer">Single-board computer</a>) were based on the Intel 8080. One of the early uses of the 8080 was made in the late 1970s by Cubic-Western Data of San Diego, California, in its Automated Fare Collection Systems custom designed for mass transit systems around the world. An early industrial use of the 8080 is as the "brain" of the DatagraphiX Auto-COM (Computer Output Microfiche) line of products which takes large amounts of user data from reel-to-reel tape and images it onto microfiche. The Auto-COM instruments also include an entire automated film cutting, processing, washing, and drying sub-system. </p><p>Several early video <a href="/wiki/Arcade_game" title="Arcade game">arcade games</a> were built around the 8080 microprocessor. The first commercially-available arcade video game to incorporate a microprocessor was <i><a href="/wiki/Gun_Fight" title="Gun Fight">Gun Fight</a></i>, <a href="/wiki/Midway_Games" title="Midway Games">Midway Games</a>' 8080-based reimplementation of <a href="/wiki/Taito" title="Taito">Taito</a>'s discrete-logic <i><a href="/wiki/Western_Gun" class="mw-redirect" title="Western Gun">Western Gun</a></i>, which was released in November 1975.<sup id="cite_ref-stackexchange_1st_micro_coin-op_24-0" class="reference"><a href="#cite_note-stackexchange_1st_micro_coin-op-24"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Kent_8080_Gun_Fight_25-0" class="reference"><a href="#cite_note-Kent_8080_Gun_Fight-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Akagi_Gun_Fight_26-0" class="reference"><a href="#cite_note-Akagi_Gun_Fight-26"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Demolition_Derby_game_27-0" class="reference"><a href="#cite_note-Demolition_Derby_game-27"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup> (A pinball machine which incorporated a <a href="/wiki/Motorola" title="Motorola">Motorola</a> <a href="/wiki/Motorola_6800" title="Motorola 6800">6800</a> processor, <i><a href="/wiki/The_Spirit_of_%2776_(pinball)" title="The Spirit of '76 (pinball)">The Spirit of '76</a></i>, had already been released the previous month.<sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup>) The 8080 was then used in later Midway arcade video games<sup id="cite_ref-Midway_8080_board_30-0" class="reference"><a href="#cite_note-Midway_8080_board-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> and in Taito's 1978 <i><a href="/wiki/Space_Invaders" title="Space Invaders">Space Invaders</a></i>, one of the most successful and well-known of all arcade video games.<sup id="cite_ref-KLOV_Space_Invaders_31-0" class="reference"><a href="#cite_note-KLOV_Space_Invaders-31"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-1UP_Space_Invaders_32-0" class="reference"><a href="#cite_note-1UP_Space_Invaders-32"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup> </p><p><a href="/wiki/Zilog" title="Zilog">Zilog</a> introduced the <a href="/wiki/Zilog_Z80" title="Zilog Z80">Z80</a>, which has a compatible <a href="/wiki/Machine_code" title="Machine code">machine language</a> instruction set and initially used the same assembly language as the 8080, but for legal reasons, Zilog developed a syntactically-different (but code compatible) alternative assembly language for the Z80. At Intel, the 8080 was followed by the compatible and electrically more elegant <a href="/wiki/Intel_8085" title="Intel 8085">8085</a>. </p><p>Later, Intel issued the assembly-language compatible (but not binary-compatible) 16-bit <a href="/wiki/Intel_8086" title="Intel 8086">8086</a> and then the 8/16-bit <a href="/wiki/Intel_8088" title="Intel 8088">8088</a>, which was selected by <a href="/wiki/IBM" title="IBM">IBM</a> for its new <a href="/wiki/IBM_PC" class="mw-redirect" title="IBM PC">PC</a> to be launched in 1981. Later <a href="/wiki/NEC" title="NEC">NEC</a> made the <a href="/wiki/NEC_V20" title="NEC V20">NEC V20</a> (an 8088 clone with <a href="/wiki/Intel_80186" title="Intel 80186">Intel 80186</a> instruction set compatibility) which also supports an 8080 emulation mode. This is also supported by NEC's <a href="/wiki/NEC_V30" class="mw-redirect" title="NEC V30">V30</a> (a similarly enhanced 8086 clone). Thus, the 8080, via its <a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">instruction set architecture</a> (ISA), made a lasting impact on computer history. </p><p>A number of processors compatible with the Intel 8080A were manufactured in the <a href="/wiki/Eastern_Bloc" title="Eastern Bloc">Eastern Bloc</a>: the <a href="/wiki/KR580VM80A" title="KR580VM80A">KR580VM80A</a> (initially marked as КР580ИК80) in the <a href="/wiki/Soviet_Union" title="Soviet Union">Soviet Union</a>, the MCY7880<sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup> made by Unitra CEMI in <a href="/wiki/Poland" title="Poland">Poland</a>, the MHB8080A<sup id="cite_ref-cpuworld_34-0" class="reference"><a href="#cite_note-cpuworld-34"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> made by <a href="/wiki/Tesla_(Czechoslovak_company)" class="mw-redirect" title="Tesla (Czechoslovak company)">TESLA</a> in <a href="/wiki/Czechoslovakia" title="Czechoslovakia">Czechoslovakia</a>, the 8080APC<sup id="cite_ref-cpuworld_34-1" class="reference"><a href="#cite_note-cpuworld-34"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> made by <a href="/wiki/Tungsram" title="Tungsram">Tungsram</a> / MEV in <a href="/wiki/Hungary" title="Hungary">Hungary</a>, and the MMN8080<sup id="cite_ref-cpuworld_34-2" class="reference"><a href="#cite_note-cpuworld-34"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> made by <a href="/wiki/Electronics_industry_in_the_Socialist_Republic_of_Romania" title="Electronics industry in the Socialist Republic of Romania">Microelectronica Bucharest</a> in <a href="/wiki/Romania" title="Romania">Romania</a>. </p><p>As of 2017<sup class="plainlinks noexcerpt noprint asof-tag update" style="display:none;"><a class="external text" href="https://en.wikipedia.org/w/index.php?title=Intel_8080&action=edit">[update]</a></sup>, the 8080 is still in production at Lansdale Semiconductors.<sup id="cite_ref-35" class="reference"><a href="#cite_note-35"><span class="cite-bracket">[</span>35<span class="cite-bracket">]</span></a></sup> </p> <ul class="gallery mw-gallery-packed"> <li class="gallerycaption">Intel 8080 <a href="/wiki/Second_source" title="Second source">second sources</a></li> <li class="gallerybox" style="width: 415.33333333333px"> <div class="thumb" style="width: 413.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:AMD_C8080A.jpg" class="mw-file-description" title="AMD Am9080"><img alt="AMD Am9080" src="//upload.wikimedia.org/wikipedia/commons/thumb/6/6a/AMD_C8080A.jpg/620px-AMD_C8080A.jpg" decoding="async" width="414" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/6/6a/AMD_C8080A.jpg 1.5x" data-file-width="790" data-file-height="287" /></a></span></div> <div class="gallerytext"><a href="/wiki/AMD_Am9080" title="AMD Am9080">AMD Am9080</a></div> </li> <li class="gallerybox" style="width: 198.66666666667px"> <div class="thumb" style="width: 196.66666666667px;"><span typeof="mw:File"><a href="/wiki/File:Poland_MCY7880_1.jpg" class="mw-file-description" title="CEMI MCY7880 (Poland)"><img alt="CEMI MCY7880 (Poland)" src="//upload.wikimedia.org/wikipedia/commons/thumb/9/99/Poland_MCY7880_1.jpg/295px-Poland_MCY7880_1.jpg" decoding="async" width="197" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/9/99/Poland_MCY7880_1.jpg/443px-Poland_MCY7880_1.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/9/99/Poland_MCY7880_1.jpg 2x" data-file-width="531" data-file-height="405" /></a></span></div> <div class="gallerytext">CEMI MCY7880 (Poland)</div> </li> <li class="gallerybox" style="width: 147.33333333333px"> <div class="thumb" style="width: 145.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:580IK80.jpg" class="mw-file-description" title="Kvazar Kyiv K580IK80 (Ukrainian SSR)"><img alt="Kvazar Kyiv K580IK80 (Ukrainian SSR)" src="//upload.wikimedia.org/wikipedia/commons/thumb/6/64/580IK80.jpg/218px-580IK80.jpg" decoding="async" width="146" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/64/580IK80.jpg/327px-580IK80.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/64/580IK80.jpg/436px-580IK80.jpg 2x" data-file-width="800" data-file-height="826" /></a></span></div> <div class="gallerytext">Kvazar Kyiv <a href="/wiki/KR580VM80A" title="KR580VM80A">K580IK80</a> (Ukrainian SSR)</div> </li> <li class="gallerybox" style="width: 279.33333333333px"> <div class="thumb" style="width: 277.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:Mitsubishi_M5L8080AP_1.jpg" class="mw-file-description" title="Mitsubishi Electric M5L8080"><img alt="Mitsubishi Electric M5L8080" src="//upload.wikimedia.org/wikipedia/commons/thumb/0/0b/Mitsubishi_M5L8080AP_1.jpg/416px-Mitsubishi_M5L8080AP_1.jpg" decoding="async" width="278" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/0/0b/Mitsubishi_M5L8080AP_1.jpg 1.5x" data-file-width="495" data-file-height="268" /></a></span></div> <div class="gallerytext"><a href="/wiki/Mitsubishi_Electric" title="Mitsubishi Electric">Mitsubishi Electric</a> M5L8080</div> </li> <li class="gallerybox" style="width: 265.33333333333px"> <div class="thumb" style="width: 263.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:NatSem_INS8080AJ_1.jpg" class="mw-file-description" title="National Semiconductor INS8080"><img alt="National Semiconductor INS8080" src="//upload.wikimedia.org/wikipedia/commons/thumb/3/30/NatSem_INS8080AJ_1.jpg/395px-NatSem_INS8080AJ_1.jpg" decoding="async" width="264" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/3/30/NatSem_INS8080AJ_1.jpg 1.5x" data-file-width="502" data-file-height="286" /></a></span></div> <div class="gallerytext"><a href="/wiki/National_Semiconductor" title="National Semiconductor">National Semiconductor</a> INS8080</div> </li> <li class="gallerybox" style="width: 273.33333333333px"> <div class="thumb" style="width: 271.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:NEC_8080AF_1.jpg" class="mw-file-description" title="NEC μPD8080AF"><img alt="NEC μPD8080AF" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/11/NEC_8080AF_1.jpg/407px-NEC_8080AF_1.jpg" decoding="async" width="272" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/1/11/NEC_8080AF_1.jpg 1.5x" data-file-width="544" data-file-height="301" /></a></span></div> <div class="gallerytext"><a href="/wiki/NEC_%CE%BCPD8080AF" class="mw-redirect" title="NEC μPD8080AF">NEC μPD8080AF</a></div> </li> <li class="gallerybox" style="width: 204px"> <div class="thumb" style="width: 202px;"><span typeof="mw:File"><a href="/wiki/File:OKI_MSM8080A_1.jpg" class="mw-file-description" title="OKI MSM8080"><img alt="OKI MSM8080" src="//upload.wikimedia.org/wikipedia/commons/thumb/9/90/OKI_MSM8080A_1.jpg/303px-OKI_MSM8080A_1.jpg" decoding="async" width="202" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/9/90/OKI_MSM8080A_1.jpg/455px-OKI_MSM8080A_1.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/9/90/OKI_MSM8080A_1.jpg/606px-OKI_MSM8080A_1.jpg 2x" data-file-width="959" data-file-height="712" /></a></span></div> <div class="gallerytext"><a href="/wiki/Oki_Electric_Industry" title="Oki Electric Industry">OKI</a> MSM8080</div> </li> <li class="gallerybox" style="width: 232.66666666667px"> <div class="thumb" style="width: 230.66666666667px;"><span typeof="mw:File"><a href="/wiki/File:Siemens_SAB8080A_1.jpg" class="mw-file-description" title="Siemens SAB8080"><img alt="Siemens SAB8080" src="//upload.wikimedia.org/wikipedia/commons/thumb/4/46/Siemens_SAB8080A_1.jpg/346px-Siemens_SAB8080A_1.jpg" decoding="async" width="231" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/4/46/Siemens_SAB8080A_1.jpg/519px-Siemens_SAB8080A_1.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/4/46/Siemens_SAB8080A_1.jpg/691px-Siemens_SAB8080A_1.jpg 2x" data-file-width="769" data-file-height="501" /></a></span></div> <div class="gallerytext"><a href="/wiki/Siemens" title="Siemens">Siemens</a> SAB8080</div> </li> <li class="gallerybox" style="width: 185.33333333333px"> <div class="thumb" style="width: 183.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:Signetics_MP8080AI_1.jpg" class="mw-file-description" title="Signetics MP8080"><img alt="Signetics MP8080" src="//upload.wikimedia.org/wikipedia/commons/thumb/2/2f/Signetics_MP8080AI_1.jpg/275px-Signetics_MP8080AI_1.jpg" decoding="async" width="184" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/2/2f/Signetics_MP8080AI_1.jpg/414px-Signetics_MP8080AI_1.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/2/2f/Signetics_MP8080AI_1.jpg 2x" data-file-width="548" data-file-height="448" /></a></span></div> <div class="gallerytext"><a href="/wiki/Signetics" title="Signetics">Signetics</a> MP8080</div> </li> <li class="gallerybox" style="width: 313.33333333333px"> <div class="thumb" style="width: 311.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:KL_Tesla_MHB8080.jpg" class="mw-file-description" title="Tesla MHB8080"><img alt="Tesla MHB8080" src="//upload.wikimedia.org/wikipedia/commons/thumb/d/dc/KL_Tesla_MHB8080.jpg/467px-KL_Tesla_MHB8080.jpg" decoding="async" width="312" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/dc/KL_Tesla_MHB8080.jpg/701px-KL_Tesla_MHB8080.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/dc/KL_Tesla_MHB8080.jpg/933px-KL_Tesla_MHB8080.jpg 2x" data-file-width="1419" data-file-height="685" /></a></span></div> <div class="gallerytext"><a href="/wiki/Tesla_(Czechoslovak_company)" class="mw-redirect" title="Tesla (Czechoslovak company)">Tesla</a> MHB8080</div> </li> <li class="gallerybox" style="width: 226.66666666667px"> <div class="thumb" style="width: 224.66666666667px;"><span typeof="mw:File"><a href="/wiki/File:TI_TMS8080JL_1.jpg" class="mw-file-description" title="Texas Instruments TMS8080"><img alt="Texas Instruments TMS8080" src="//upload.wikimedia.org/wikipedia/commons/thumb/6/60/TI_TMS8080JL_1.jpg/337px-TI_TMS8080JL_1.jpg" decoding="async" width="225" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/60/TI_TMS8080JL_1.jpg/506px-TI_TMS8080JL_1.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/6/60/TI_TMS8080JL_1.jpg 2x" data-file-width="570" data-file-height="381" /></a></span></div> <div class="gallerytext"><a href="/wiki/Texas_Instruments" title="Texas Instruments">Texas Instruments</a> TMS8080</div> </li> <li class="gallerybox" style="width: 423.33333333333px"> <div class="thumb" style="width: 421.33333333333px;"><span typeof="mw:File"><a href="/wiki/File:5G8080.jpg" class="mw-file-description" title="5G8080 (PR China)"><img alt="5G8080 (PR China)" src="//upload.wikimedia.org/wikipedia/commons/thumb/8/85/5G8080.jpg/632px-5G8080.jpg" decoding="async" width="422" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/8/85/5G8080.jpg 1.5x" data-file-width="800" data-file-height="285" /></a></span></div> <div class="gallerytext">5G8080 (PR China)</div> </li> </ul> <div class="mw-heading mw-heading3"><h3 id="Industry_change">Industry change</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=20" title="Edit section: Industry change"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-Original_research plainlinks metadata ambox ambox-content ambox-Original_research" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><span><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/40px-Ambox_important.svg.png" decoding="async" width="40" height="40" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/60px-Ambox_important.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/80px-Ambox_important.svg.png 2x" data-file-width="40" data-file-height="40" /></span></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>possibly contains <a href="/wiki/Wikipedia:No_original_research" title="Wikipedia:No original research">original research</a></b>.<span class="hide-when-compact"> Please <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Intel_8080&action=edit">improve it</a> by <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">verifying</a> the claims made and adding <a href="/wiki/Wikipedia:Citing_sources#Inline_citations" title="Wikipedia:Citing sources">inline citations</a>. Statements consisting only of original research should be removed.</span> <span class="date-container"><i>(<span class="date">August 2017</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p>The 8080 also changed how computers were created. When the 8080 was introduced, computer systems were usually created by computer manufacturers such as <a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">Digital Equipment Corporation</a>, <a href="/wiki/Hewlett-Packard" title="Hewlett-Packard">Hewlett-Packard</a>, or <a href="/wiki/IBM" title="IBM">IBM</a>. A manufacturer would produce the whole computer, including processor, terminals, and system software such as compilers and operating system. The 8080 was designed for almost any application <i>except</i> a complete computer system. Hewlett-Packard developed the <a href="/wiki/HP_2640" title="HP 2640">HP 2640</a> series of smart terminals around the 8080. The <a href="/wiki/HP_2647" class="mw-redirect" title="HP 2647">HP 2647</a> is a terminal which runs the programming language <a href="/wiki/BASIC" title="BASIC">BASIC</a> on the 8080. <a href="/wiki/Microsoft" title="Microsoft">Microsoft</a>'s founding product, <a href="/wiki/Microsoft_BASIC" title="Microsoft BASIC">Microsoft BASIC</a>, was originally programmed for the 8080. </p><p>The 8080 and <a href="/wiki/Intel_8085" title="Intel 8085">8085</a> gave rise to the 8086, which was designed as a <a href="/wiki/Source-code_compatibility" title="Source-code compatibility">source code compatible</a>, albeit not <a href="/wiki/Binary-code_compatibility" title="Binary-code compatibility">binary compatible</a>, extension of the 8080.<sup id="cite_ref-36" class="reference"><a href="#cite_note-36"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup> This design, in turn, later spawned the <a href="/wiki/X86" title="X86">x86</a> family of chips, which continue to be Intel's primary line of processors. Many of the 8080's core machine instructions and concepts survive in the widespread x86 platform. Examples include the registers named <i>A</i>, <i>B</i>, <i>C</i>, and <i>D</i> and many of the flags used to control conditional jumps. 8080 assembly code can still be directly translated into x86 instructions,<sup class="noprint Inline-Template" style="margin-left:0.1em; white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Vagueness" title="Wikipedia:Vagueness"><span title="Does this mean 8080 instructions can be translated into IA-32 and AMD64-specific instructions? (November 2021)">vague</span></a></i>]</sup> since all of its core elements are still present. </p> <div class="mw-heading mw-heading2"><h2 id="Cultural_impact">Cultural impact</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=21" title="Edit section: Cultural impact"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Asteroid" title="Asteroid">Asteroid</a> <a href="/wiki/8080_Intel" class="mw-redirect" title="8080 Intel">8080 Intel</a> is named as a pun<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="The reference gives no evidence that this is a pun, and I don't see how it is a pun. (July 2023)">citation needed</span></a></i>]</sup> and praise on the name of Intel 8080.<sup id="cite_ref-37" class="reference"><a href="#cite_note-37"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup></li> <li>Microsoft's published phone number, 425-882-8080, was chosen because much early work was on this chip.</li> <li>Many of Intel's main phone numbers also take a similar form: xxx-xxx-8080</li></ul> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=22" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/CP/M" title="CP/M">CP/M</a> – operating system</li> <li><a href="/wiki/S-100_bus" title="S-100 bus">S-100 bus</a></li> <li><a href="/wiki/MPT8080" title="MPT8080">MPT8080</a></li> <li><a href="/wiki/Intellec_8_Mod_80" class="mw-redirect" title="Intellec 8 Mod 80">Intellec 8 Mod 80</a></li> <li><a href="/w/index.php?title=MDS_800&action=edit&redlink=1" class="new" title="MDS 800 (page does not exist)">MDS 800</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=23" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20100116143420/http://www.cpushack.net/life-cycle-of-cpu.html">"CPU History – The CPU Museum – Life Cycle of the CPU"</a>. Archived from <a rel="nofollow" class="external text" href="http://www.cpushack.com/life-cycle-of-cpu.html">the original</a> on January 16, 2010.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=CPU+History+%E2%80%93+The+CPU+Museum+%E2%80%93+Life+Cycle+of+the+CPU&rft_id=http%3A%2F%2Fwww.cpushack.com%2Flife-cycle-of-cpu.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text">Lewnes, Ann, "The Intel386 Architecture Here to Stay", Intel Corporation, Microcomputer Solutions, July/August 1989, page 2</span> </li> <li id="cite_note-ENews-04-1974-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-ENews-04-1974_3-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation news cs1">"From CPU to software, the 8080 Microcomputer is here". <i>Electronic News</i>. New York: Fairchild Publications. April 15, 1974. pp. <span class="nowrap">44–</span>45.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Electronic+News&rft.atitle=From+CPU+to+software%2C+the+8080+Microcomputer+is+here&rft.pages=%3Cspan+class%3D%22nowrap%22%3E44-%3C%2Fspan%3E45&rft.date=1974-04-15&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span><i> Electronic News</i> was a weekly trade newspaper. The same advertisement appeared in the <a href="/wiki/File:Intel_8080_Advertisement_May_1974.jpg" title="File:Intel 8080 Advertisement May 1974.jpg">May 2, 1974, issue of <i>Electronics</i> magazine</a>.</span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text">The <a href="/wiki/Intel_8008" title="Intel 8008">8008</a> (1972) was used for interpolation and control in ASEA's (now ABB) first line of general industrial robots, introduced October 1973.</span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMueller2006" class="citation book cs1">Mueller, Scott (2006). <a rel="nofollow" class="external text" href="https://www.informit.com/articles/article.aspx?p=482324&seqNum=2"><i>Upgrading and Repairing PCs</i></a> (17th ed.). Pearson Education. p. 37. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-7897-3404-4" title="Special:BookSources/978-0-7897-3404-4"><bdi>978-0-7897-3404-4</bdi></a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211116001341/https://www.informit.com/articles/article.aspx?p=482324&seqNum=2">Archived</a> from the original on November 16, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 16,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Upgrading+and+Repairing+PCs&rft.pages=37&rft.edition=17th&rft.pub=Pearson+Education&rft.date=2006&rft.isbn=978-0-7897-3404-4&rft.aulast=Mueller&rft.aufirst=Scott&rft_id=https%3A%2F%2Fwww.informit.com%2Farticles%2Farticle.aspx%3Fp%3D482324%26seqNum%3D2&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text">The enhancements were largely based on customer feedback and Federico Faggin and others listening to minicomputer-oriented professionals about certain problems and lack of features in the 8008 architecture. (Source: 8008 and 8080 oral histories.)</span> </li> <li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMazor1978" class="citation journal cs1">Mazor, Stanley (June 1978). <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/5430762">"The Intel 8086 Microprocessor: a 16-bit Evolution of the 8080"</a>. <i>IEEE Computer</i>. <b>11</b> (6): <span class="nowrap">18–</span>27. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FC-M.1978.218219">10.1109/C-M.1978.218219</a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:16962774">16962774</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20210919153639/https://ieeexplore.ieee.org/document/5430762">Archived</a> from the original on September 19, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 18,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Computer&rft.atitle=The+Intel+8086+Microprocessor%3A+a+16-bit+Evolution+of+the+8080&rft.volume=11&rft.issue=6&rft.pages=%3Cspan+class%3D%22nowrap%22%3E18-%3C%2Fspan%3E27&rft.date=1978-06&rft_id=info%3Adoi%2F10.1109%2FC-M.1978.218219&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A16962774%23id-name%3DS2CID&rft.aulast=Mazor&rft.aufirst=Stanley&rft_id=https%3A%2F%2Fieeexplore.ieee.org%2Fdocument%2F5430762&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.elektronikjk.com/technika_komputerowa/CPU/Intel_8080A.pdf">"8080A/8080A-1/8080A-2 8-Bit N Channel Microprocessor"</a> <span class="cs1-format">(PDF)</span>. Intel. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211115165927/http://www.elektronikjk.com/technika_komputerowa/CPU/Intel_8080A.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on November 15, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 16,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=8080A%2F8080A-1%2F8080A-2+8-Bit+N+Channel+Microprocessor&rft.pub=Intel&rft_id=http%3A%2F%2Fwww.elektronikjk.com%2Ftechnika_komputerowa%2FCPU%2FIntel_8080A.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text">similar to <i><a href="/wiki/Pull-up_resistor" title="Pull-up resistor">pull-up resistors</a></i></span> </li> <li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFTohya2013" class="citation book cs1">Tohya, Hirokazu (2013). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=ILceDgAAQBAJ&q=8080+non-saturated+enhancement&pg=PA4"><i>Switching Mode Circuit Analysis and Design: Innovative Methodology by Novel Solitary Electromagnetic Wave Theory</i></a>. Bentham Science Publishers. p. 4. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/9781608054497" title="Special:BookSources/9781608054497"><bdi>9781608054497</bdi></a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211115163542/https://books.google.com/books?id=ILceDgAAQBAJ&q=8080+non-saturated+enhancement&pg=PA4">Archived</a> from the original on November 15, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 28,</span> 2020</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Switching+Mode+Circuit+Analysis+and+Design%3A+Innovative+Methodology+by+Novel+Solitary+Electromagnetic+Wave+Theory&rft.pages=4&rft.pub=Bentham+Science+Publishers&rft.date=2013&rft.isbn=9781608054497&rft.aulast=Tohya&rft.aufirst=Hirokazu&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DILceDgAAQBAJ%26q%3D8080%2Bnon-saturated%2Benhancement%26pg%3DPA4&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-8080_DEV-11"><span class="mw-cite-backlink">^ <a href="#cite_ref-8080_DEV_11-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-8080_DEV_11-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-8080_DEV_11-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-8080_DEV_11-3"><sup><i><b>d</b></i></sup></a> <a href="#cite_ref-8080_DEV_11-4"><sup><i><b>e</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMiller" class="citation web cs1">Miller, Michael. <a rel="nofollow" class="external text" href="https://www.pcmag.com/news/creating-the-8080-the-processor-that-started-the-pc-revolution">"Creating the 8080: The Processor That Started the PC Revolution"</a>. <i>PCMag</i>. Zaff Davis. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211114174610/https://www.pcmag.com/news/creating-the-8080-the-processor-that-started-the-pc-revolution">Archived</a> from the original on November 14, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 14,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=PCMag&rft.atitle=Creating+the+8080%3A+The+Processor+That+Started+the+PC+Revolution&rft.aulast=Miller&rft.aufirst=Michael&rft_id=https%3A%2F%2Fwww.pcmag.com%2Fnews%2Fcreating-the-8080-the-processor-that-started-the-pc-revolution&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFFaggin" class="citation web cs1">Faggin, Federico. <a rel="nofollow" class="external text" href="https://sites.google.com/site/microprocessorintel4004/8008-8080-q-a">"8008 and 8080 Q&A"</a>. <i>Microprocessor Intel 4004</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211115233233/https://sites.google.com/site/microprocessorintel4004/8008-8080-q-a">Archived</a> from the original on November 15, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 15,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Microprocessor+Intel+4004&rft.atitle=8008+and+8080+Q%26A&rft.aulast=Faggin&rft.aufirst=Federico&rft_id=https%3A%2F%2Fsites.google.com%2Fsite%2Fmicroprocessorintel4004%2F8008-8080-q-a&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMazor2007" class="citation journal cs1">Mazor, Stanley (April–June 2007). "Intel 8080 CPU Chip Development". <i>IEEE Annals of the History of Computing</i>. <b>29</b> (2): <span class="nowrap">70–</span>73. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FMAHC.2007.25">10.1109/MAHC.2007.25</a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:14755544">14755544</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Annals+of+the+History+of+Computing&rft.atitle=Intel+8080+CPU+Chip+Development&rft.volume=29&rft.issue=2&rft.pages=%3Cspan+class%3D%22nowrap%22%3E70-%3C%2Fspan%3E73&rft.date=2007-04%2F2007-06&rft_id=info%3Adoi%2F10.1109%2FMAHC.2007.25&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A14755544%23id-name%3DS2CID&rft.aulast=Mazor&rft.aufirst=Stanley&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFShimaNishimuraIshida1979" class="citation journal cs1 cs1-prop-foreign-lang-source"><a href="/wiki/Masatoshi_Shima" title="Masatoshi Shima">Shima, Masatoshi</a>; Nishimura, Hirohiko; Ishida, Haruhisa (1979). "座談会マイクロコンピュータの誕生開発者嶋正利氏に聞く". <i>Bit</i> (in Japanese). <b>11</b> (11). 共立出版: <span class="nowrap">4–</span>12. <a href="/wiki/ISSN_(identifier)" class="mw-redirect" title="ISSN (identifier)">ISSN</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/issn/0385-6984">0385-6984</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Bit&rft.atitle=%E5%BA%A7%E8%AB%87%E4%BC%9A+%E3%83%9E%E3%82%A4%E3%82%AF%E3%83%AD%E3%82%B3%E3%83%B3%E3%83%94%E3%83%A5%E3%83%BC%E3%82%BF%E3%81%AE%E8%AA%95%E7%94%9F+%E9%96%8B%E7%99%BA%E8%80%85+%E5%B6%8B+%E6%AD%A3%E5%88%A9%E6%B0%8F%E3%81%AB%E8%81%9E%E3%81%8F&rft.volume=11&rft.issue=11&rft.pages=%3Cspan+class%3D%22nowrap%22%3E4-%3C%2Fspan%3E12&rft.date=1979&rft.issn=0385-6984&rft.aulast=Shima&rft.aufirst=Masatoshi&rft.au=Nishimura%2C+Hirohiko&rft.au=Ishida%2C+Haruhisa&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-Kildall_1974-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-Kildall_1974_15-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFKildall1974" class="citation magazine cs1"><a href="/wiki/Gary_Arlen_Kildall" class="mw-redirect" title="Gary Arlen Kildall">Kildall, Gary Arlen</a> (June 27, 1974). <a rel="nofollow" class="external text" href="https://www.retrotechnology.com/dri/kildall_highlevel_1974.pdf">"High-level language simplifies microcomputer programming"</a> <span class="cs1-format">(PDF)</span>. <i><a href="/wiki/Electronics_(magazine)" title="Electronics (magazine)">Electronics</a></i>. <a href="/wiki/McGraw-Hill_Education" class="mw-redirect" title="McGraw-Hill Education">McGraw-Hill Education</a>. pp. 103–109 [108]. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211114174610/https://www.retrotechnology.com/dri/kildall_highlevel_1974.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on November 14, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 14,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Electronics&rft.atitle=High-level+language+simplifies+microcomputer+programming&rft.pages=103-109+108&rft.date=1974-06-27&rft.aulast=Kildall&rft.aufirst=Gary+Arlen&rft_id=https%3A%2F%2Fwww.retrotechnology.com%2Fdri%2Fkildall_highlevel_1974.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-Intel_1975-16"><span class="mw-cite-backlink"><b><a href="#cite_ref-Intel_1975_16-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://mark-ogden.uk/files/intel/publications/98-119A%208080%20Simulator%20Interp_80-Mar75.pdf">"8080 Simulator INTERP/80"</a> <span class="cs1-format">(PDF)</span>. Microcomputer Software. <a href="/wiki/Intel_Corporation" class="mw-redirect" title="Intel Corporation">Intel Corporation</a>. March 1975. Product Code 98-119A. MCS-516-0375/27.5K. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20231125172836/https://mark-ogden.uk/files/intel/publications/98-119A%208080%20Simulator%20Interp_80-Mar75.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on November 25, 2023<span class="reference-accessdate">. Retrieved <span class="nowrap">November 25,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=8080+Simulator+INTERP%2F80&rft.series=Microcomputer+Software&rft.pub=Intel+Corporation&rft.date=1975-03&rft_id=https%3A%2F%2Fmark-ogden.uk%2Ffiles%2Fintel%2Fpublications%2F98-119A%25208080%2520Simulator%2520Interp_80-Mar75.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span> (2 pages)</span> </li> <li id="cite_note-AssyLang-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-AssyLang_17-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://archive.org/download/intel-8080-assembly-language-programming-manual-1975/Intel%208080%20Assembly%20Language%20Programming%20Manual%20%281975%29.pdf"><i>8080 Assembly Language Programming Manual</i></a> <span class="cs1-format">(PDF)</span> (Rev B ed.). Intel. 1975. p. 22<span class="reference-accessdate">. Retrieved <span class="nowrap">February 29,</span> 2024</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=8080+Assembly+Language+Programming+Manual&rft.pages=22&rft.edition=Rev+B&rft.pub=Intel&rft.date=1975&rft_id=https%3A%2F%2Farchive.org%2Fdownload%2Fintel-8080-assembly-language-programming-manual-1975%2FIntel%25208080%2520Assembly%2520Language%2520Programming%2520Manual%2520%25281975%2529.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-18"><span class="mw-cite-backlink"><b><a href="#cite_ref-18">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www.classiccmp.org/dunfield/r/8080.txt">8080 instruction encoding</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20180305170555/http://www.classiccmp.org/dunfield/r/8080.txt">Archived</a> March 5, 2018, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>. ClassicCMP.org. Retrieved on October 23, 2011.</span> </li> <li id="cite_note-19"><span class="mw-cite-backlink"><b><a href="#cite_ref-19">^</a></b></span> <span class="reference-text">Note: Some Intel datasheets from the 1970s advertise 512 I/O ports, because they count input and output ports separately.</span> </li> <li id="cite_note-20"><span class="mw-cite-backlink"><b><a href="#cite_ref-20">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFHAYES1978" class="citation book cs1">HAYES, JOHN P. (1978). <i>Computer Architecture and Organization</i>. McGraw-Hill. pp. <span class="nowrap">420–</span>423. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-07-027363-4" title="Special:BookSources/0-07-027363-4"><bdi>0-07-027363-4</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Computer+Architecture+and+Organization&rft.pages=%3Cspan+class%3D%22nowrap%22%3E420-%3C%2Fspan%3E423&rft.pub=McGraw-Hill&rft.date=1978&rft.isbn=0-07-027363-4&rft.aulast=HAYES&rft.aufirst=JOHN+P.&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-21"><span class="mw-cite-backlink"><b><a href="#cite_ref-21">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www.bitsavers.org/components/intel/MCS80/98-153B_Intel_8080_Microcomputer_Systems_Users_Manual_197509.pdf">Intel Corporation, "8214 Priorty Interrupt Control Unit", Intel 8080 Microcomputer Systems User's Manual, September 1975, page 5-153</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20240528085204/http://bitsavers.org/components/intel/MCS80/98-153B_Intel_8080_Microcomputer_Systems_Users_Manual_197509.pdf">Archived</a> May 28, 2024, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> from bitsaver.org in PDF</span> </li> <li id="cite_note-22"><span class="mw-cite-backlink"><b><a href="#cite_ref-22">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/content/dam/www/public/us/en/documents/corporate-information/history-intel-chips-timeline-poster.pdf">"Intel Chips timeline"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i>. Intel Corporation. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211114170816/https://www.intel.com/content/dam/www/public/us/en/documents/corporate-information/history-intel-chips-timeline-poster.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on November 14, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 14,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=Intel+Chips+timeline&rft_id=https%3A%2F%2Fwww.intel.com%2Fcontent%2Fdam%2Fwww%2Fpublic%2Fus%2Fen%2Fdocuments%2Fcorporate-information%2Fhistory-intel-chips-timeline-poster.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-23"><span class="mw-cite-backlink"><b><a href="#cite_ref-23">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLibes1979" class="citation news cs1">Libes, Sol (November 1979). "Byte News". <i><a href="/wiki/Byte_(magazine)" title="Byte (magazine)">Byte</a></i>. 11. Vol. 4. p. 82. <a href="/wiki/ISSN_(identifier)" class="mw-redirect" title="ISSN (identifier)">ISSN</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/issn/0360-5280">0360-5280</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Byte&rft.atitle=Byte+News&rft.volume=4&rft.pages=82&rft.date=1979-11&rft.issn=0360-5280&rft.aulast=Libes&rft.aufirst=Sol&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-stackexchange_1st_micro_coin-op-24"><span class="mw-cite-backlink"><b><a href="#cite_ref-stackexchange_1st_micro_coin-op_24-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://retrocomputing.stackexchange.com/questions/613/what-was-the-first-arcade-game-to-use-a-microprocessor-instead-of-discrete-logic">"What was the first arcade game to use a microprocessor instead of discrete logic?"</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230411143158/https://retrocomputing.stackexchange.com/questions/613/what-was-the-first-arcade-game-to-use-a-microprocessor-instead-of-discrete-logic">Archived</a> from the original on April 11, 2023<span class="reference-accessdate">. Retrieved <span class="nowrap">April 11,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=What+was+the+first+arcade+game+to+use+a+microprocessor+instead+of+discrete+logic%3F&rft_id=https%3A%2F%2Fretrocomputing.stackexchange.com%2Fquestions%2F613%2Fwhat-was-the-first-arcade-game-to-use-a-microprocessor-instead-of-discrete-logic&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-Kent_8080_Gun_Fight-25"><span class="mw-cite-backlink"><b><a href="#cite_ref-Kent_8080_Gun_Fight_25-0">^</a></b></span> <span class="reference-text"><a href="/wiki/Steve_L._Kent" class="mw-redirect" title="Steve L. Kent">Steve L. Kent</a> (2001), <i><a href="/wiki/The_ultimate_history_of_video_games:_from_Pong_to_Pok%C3%A9mon_and_beyond_:_the_story_behind_the_craze_that_touched_our_lives_and_changed_the_world" class="mw-redirect" title="The ultimate history of video games: from Pong to Pokémon and beyond : the story behind the craze that touched our lives and changed the world">The ultimate history of video games: from Pong to Pokémon and beyond : the story behind the craze that touched our lives and changed the world</a></i>, p. 64, Prima, <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-7615-3643-4" title="Special:BookSources/0-7615-3643-4">0-7615-3643-4</a></span> </li> <li id="cite_note-Akagi_Gun_Fight-26"><span class="mw-cite-backlink"><b><a href="#cite_ref-Akagi_Gun_Fight_26-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFAkagi2006" class="citation book cs1 cs1-prop-foreign-lang-source">Akagi, Masumi (October 13, 2006). <a rel="nofollow" class="external text" href="https://archive.org/details/ArcadeGameList1971-2005/page/n125"><i>アーケードTVゲームリスト国内•海外編(1971–2005)</i></a> [<i>Arcade TV Game List: Domestic • Overseas Edition (1971–2005)</i>] (in Japanese). Japan: Amusement News Agency. p. 124. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-4990251215" title="Special:BookSources/978-4990251215"><bdi>978-4990251215</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=%E3%82%A2%E3%83%BC%E3%82%B1%E3%83%BC%E3%83%89TV%E3%82%B2%E3%83%BC%E3%83%A0%E3%83%AA%E3%82%B9%E3%83%88%E5%9B%BD%E5%86%85%E2%80%A2%E6%B5%B7%E5%A4%96%E7%B7%A8%281971%E2%80%932005%29&rft.place=Japan&rft.pages=124&rft.pub=Amusement+News+Agency&rft.date=2006-10-13&rft.isbn=978-4990251215&rft.aulast=Akagi&rft.aufirst=Masumi&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2FArcadeGameList1971-2005%2Fpage%2Fn125&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-Demolition_Derby_game-27"><span class="mw-cite-backlink"><b><a href="#cite_ref-Demolition_Derby_game_27-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://allincolorforaquarter.blogspot.com/2013/07/dave-needle-and-jerry-lawon-two-early.html">"Dave Needle and Jerry Lawson - Two Early Independent Video Game Designers"</a>. July 29, 2013. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230411143158/http://allincolorforaquarter.blogspot.com/2013/07/dave-needle-and-jerry-lawon-two-early.html">Archived</a> from the original on April 11, 2023<span class="reference-accessdate">. Retrieved <span class="nowrap">April 11,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Dave+Needle+and+Jerry+Lawson+-+Two+Early+Independent+Video+Game+Designers&rft.date=2013-07-29&rft_id=http%3A%2F%2Fallincolorforaquarter.blogspot.com%2F2013%2F07%2Fdave-needle-and-jerry-lawon-two-early.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-28"><span class="mw-cite-backlink"><b><a href="#cite_ref-28">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.ipdb.org/machine.cgi?id=2294">"Internet Pinball Machine Database: Mirco Games, Inc. 'Spirit of 76'<span class="cs1-kern-right"></span>"</a>. <i>www.ipdb.org</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230416224750/https://www.ipdb.org/machine.cgi?id=2294">Archived</a> from the original on April 16, 2023<span class="reference-accessdate">. Retrieved <span class="nowrap">April 11,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=www.ipdb.org&rft.atitle=Internet+Pinball+Machine+Database%3A+Mirco+Games%2C+Inc.+%27Spirit+of+76%27&rft_id=http%3A%2F%2Fwww.ipdb.org%2Fmachine.cgi%3Fid%3D2294&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-29"><span class="mw-cite-backlink"><b><a href="#cite_ref-29">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFwayout440" class="citation web cs1">wayout440. <a rel="nofollow" class="external text" href="https://pinside.com/pinball/forum/topic/mirco-spirit-of-76-for-sale-the-first-solid-state-pin">"Mirco Spirit of 76 for sale – THE first solid state pin?"</a>. <i>Pinside.com</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230411143207/https://pinside.com/pinball/forum/topic/mirco-spirit-of-76-for-sale-the-first-solid-state-pin">Archived</a> from the original on April 11, 2023<span class="reference-accessdate">. Retrieved <span class="nowrap">April 11,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Pinside.com&rft.atitle=Mirco+Spirit+of+76+for+sale+%E2%80%93+THE+first+solid+state+pin%3F&rft.au=wayout440&rft_id=https%3A%2F%2Fpinside.com%2Fpinball%2Fforum%2Ftopic%2Fmirco-spirit-of-76-for-sale-the-first-solid-state-pin&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span><span class="cs1-maint citation-comment"><code class="cs1-code">{{<a href="/wiki/Template:Cite_web" title="Template:Cite web">cite web</a>}}</code>: CS1 maint: numeric names: authors list (<a href="/wiki/Category:CS1_maint:_numeric_names:_authors_list" title="Category:CS1 maint: numeric names: authors list">link</a>)</span></span> </li> <li id="cite_note-Midway_8080_board-30"><span class="mw-cite-backlink"><b><a href="#cite_ref-Midway_8080_board_30-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://arcarc.xmission.com/Web%20Archives/Users.Erols.Com-mowerman%20(Aug-24-2003)/midway.htm">"Midway 8080 System Boards"</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230411145527/https://arcarc.xmission.com/Web%20Archives/Users.Erols.Com-mowerman%20(Aug-24-2003)/midway.htm">Archived</a> from the original on April 11, 2023<span class="reference-accessdate">. Retrieved <span class="nowrap">April 11,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Midway+8080+System+Boards&rft_id=https%3A%2F%2Farcarc.xmission.com%2FWeb%2520Archives%2FUsers.Erols.Com-mowerman%2520%28Aug-24-2003%29%2Fmidway.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-KLOV_Space_Invaders-31"><span class="mw-cite-backlink"><b><a href="#cite_ref-KLOV_Space_Invaders_31-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.klov.com/game_detail.php?game_id=9662">"Space Invaders Videogame by Bally Midway (1978)"</a>. <a href="/wiki/Killer_List_of_Videogames" class="mw-redirect" title="Killer List of Videogames">Killer List of Videogames</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20101125042142/http://www.arcade-museum.com/game_detail.php?game_id=9662">Archived</a> from the original on November 25, 2010<span class="reference-accessdate">. Retrieved <span class="nowrap">April 11,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Space+Invaders+Videogame+by+Bally+Midway+%281978%29&rft.pub=Killer+List+of+Videogames&rft_id=http%3A%2F%2Fwww.klov.com%2Fgame_detail.php%3Fgame_id%3D9662&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-1UP_Space_Invaders-32"><span class="mw-cite-backlink"><b><a href="#cite_ref-1UP_Space_Invaders_32-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFEdwards,_Benj" class="citation web cs1">Edwards, Benj. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20090226064943/http://www.1up.com/do/feature?cId=3168373">"Ten Things Everyone Should Know About Space Invaders"</a>. <i><a href="/wiki/1UP.com" class="mw-redirect" title="1UP.com">1UP.com</a></i>. Archived from <a rel="nofollow" class="external text" href="http://www.1up.com/do/feature?cId=3168373">the original</a> on February 26, 2009<span class="reference-accessdate">. Retrieved <span class="nowrap">April 11,</span> 2023</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=1UP.com&rft.atitle=Ten+Things+Everyone+Should+Know+About+Space+Invaders&rft.au=Edwards%2C+Benj&rft_id=http%3A%2F%2Fwww.1up.com%2Fdo%2Ffeature%3FcId%3D3168373&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-33"><span class="mw-cite-backlink"><b><a href="#cite_ref-33">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/8080/Poland-MCY7880.html">MCY7880—a Polish-made clone of 8080</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20160817083511/http://www.cpu-world.com/CPUs/8080/Poland-MCY7880.html">Archived</a> August 17, 2016, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>. CPU World. Retrieved on October 23, 2011.</span> </li> <li id="cite_note-cpuworld-34"><span class="mw-cite-backlink">^ <a href="#cite_ref-cpuworld_34-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-cpuworld_34-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-cpuworld_34-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www.cpu-world.com/info/exUSSR-chips.html">Soviet chips and their western analogs</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20170209223725/http://www.cpu-world.com/info/exUSSR-chips.html">Archived</a> February 9, 2017, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>. CPU-world. Retrieved on October 23, 2011.</span> </li> <li id="cite_note-35"><span class="mw-cite-backlink"><b><a href="#cite_ref-35">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://lansdale.com/parts_reference.php?manufacturer=Intel&series=Microprocessor+8080A+Family+%26+828X+Series">"Intel – Microprocessor 8080A Family & 828X Series"</a>. Lansdale Semiconductor Inc. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20151014132249/http://www.lansdale.com/parts_reference.php?manufacturer=Intel&series=Microprocessor+8080A+Family+%26+828X+Series">Archived</a> from the original on October 14, 2015<span class="reference-accessdate">. Retrieved <span class="nowrap">June 20,</span> 2017</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Intel+%E2%80%93+Microprocessor+8080A+Family+%26+828X+Series&rft.pub=Lansdale+Semiconductor+Inc.&rft_id=http%3A%2F%2Flansdale.com%2Fparts_reference.php%3Fmanufacturer%3DIntel%26series%3DMicroprocessor%2B8080A%2BFamily%2B%2526%2B828X%2BSeries&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-36"><span class="mw-cite-backlink"><b><a href="#cite_ref-36">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMorseRavenelMazorPohlman1980" class="citation journal cs1">Morse, Stephen; Ravenel, Bruce; Mazor, Stanley; Pohlman, William (October 1980). <a rel="nofollow" class="external text" href="https://stevemorse.org/8086history/8086history.pdf">"Intel Microprocessors: 8008 to 8086"</a> <span class="cs1-format">(PDF)</span>. <i>IEEE Computer</i>. <b>13</b> (10): <span class="nowrap">42–</span>60. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FMC.1980.1653375">10.1109/MC.1980.1653375</a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:206445851">206445851</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20210914205011/https://stevemorse.org/8086history/8086history.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on September 14, 2021<span class="reference-accessdate">. Retrieved <span class="nowrap">November 5,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Computer&rft.atitle=Intel+Microprocessors%3A+8008+to+8086&rft.volume=13&rft.issue=10&rft.pages=%3Cspan+class%3D%22nowrap%22%3E42-%3C%2Fspan%3E60&rft.date=1980-10&rft_id=info%3Adoi%2F10.1109%2FMC.1980.1653375&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A206445851%23id-name%3DS2CID&rft.aulast=Morse&rft.aufirst=Stephen&rft.au=Ravenel%2C+Bruce&rft.au=Mazor%2C+Stanley&rft.au=Pohlman%2C+William&rft_id=https%3A%2F%2Fstevemorse.org%2F8086history%2F8086history.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> <li id="cite_note-37"><span class="mw-cite-backlink"><b><a href="#cite_ref-37">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://minorplanetcenter.net/db_search/show_object?object_id=8080">"(8080) Intel = 1958 QC = 1987 WU2 = 1989 AS5"</a>. <i>Minor Planet Center</i>. International Astronomical Union. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20190925141642/https://minorplanetcenter.net/db_search/show_object?object_id=8080">Archived</a> from the original on September 25, 2019<span class="reference-accessdate">. Retrieved <span class="nowrap">November 14,</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Minor+Planet+Center&rft.atitle=%288080%29+Intel+%3D+1958+QC+%3D+1987+WU2+%3D+1989+AS5&rft_id=https%3A%2F%2Fminorplanetcenter.net%2Fdb_search%2Fshow_object%3Fobject_id%3D8080&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=24" title="Edit section: Further reading"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLeventhal1978" class="citation book cs1">Leventhal, Lance (1978). <a rel="nofollow" class="external text" href="https://archive.org/details/8080a8085AssemblyLanguageProgramming/"><i>8080A/8085 Assembly Language Programming</i></a> (1st ed.). Adam Osborne & Associates.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=8080A%2F8085+Assembly+Language+Programming&rft.edition=1st&rft.pub=Adam+Osborne+%26+Associates&rft.date=1978&rft.aulast=Leventhal&rft.aufirst=Lance&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2F8080a8085AssemblyLanguageProgramming%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span><sup class="noprint Inline-Template"><span style="white-space: nowrap;">[<i><a href="/wiki/Wikipedia:Link_rot" title="Wikipedia:Link rot"><span title=" Dead link tagged November 2021">dead link</span></a></i><span style="visibility:hidden; color:transparent; padding-left:2px">‍</span>]</span></sup>; 495 pages</li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMiller1981" class="citation book cs1">Miller, Alan (1981). <a rel="nofollow" class="external text" href="https://archive.org/details/8080_and_Z-80_Assembly_Language_Techniques_1981_John_Wiley_and_Sons/"><i>8080/Z80 Assembly Language – Techniques for Improved Programming</i></a> (1st ed.). John Wiley & Sons. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0471081241" title="Special:BookSources/978-0471081241"><bdi>978-0471081241</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=8080%2FZ80+Assembly+Language+%E2%80%93+Techniques+for+Improved+Programming&rft.edition=1st&rft.pub=John+Wiley+%26+Sons&rft.date=1981&rft.isbn=978-0471081241&rft.aulast=Miller&rft.aufirst=Alan&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2F8080_and_Z-80_Assembly_Language_Techniques_1981_John_Wiley_and_Sons%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span>; 332 pages</li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFZaksLesea1979" class="citation book cs1">Zaks, Rodnay; Lesea, Austin (1979). <a rel="nofollow" class="external text" href="https://archive.org/details/MicroprocessorInterfacingTechniques_3rd_ed/"><i>Microprocessor Interfacing Techniques</i></a> (3rd ed.). Sybex. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-89588-029-1" title="Special:BookSources/978-0-89588-029-1"><bdi>978-0-89588-029-1</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Microprocessor+Interfacing+Techniques&rft.edition=3rd&rft.pub=Sybex&rft.date=1979&rft.isbn=978-0-89588-029-1&rft.aulast=Zaks&rft.aufirst=Rodnay&rft.au=Lesea%2C+Austin&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2FMicroprocessorInterfacingTechniques_3rd_ed%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span>; 466 pages</li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSpracklen1979" class="citation book cs1">Spracklen, Kathe (1979). <a rel="nofollow" class="external text" href="https://archive.org/details/z808080assemblyl00kath/"><i>Z80 and 8080 Assembly Language Programming</i></a> (1st ed.). Hayden. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0810451674" title="Special:BookSources/978-0810451674"><bdi>978-0810451674</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Z80+and+8080+Assembly+Language+Programming&rft.edition=1st&rft.pub=Hayden&rft.date=1979&rft.isbn=978-0810451674&rft.aulast=Spracklen&rft.aufirst=Kathe&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2Fz808080assemblyl00kath%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+8080" class="Z3988"></span>; 180 pages</li></ul> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=25" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="http://www.cpu-collection.de/?tn=0&l0=cl&l1=8080">Intel and other manufacturers' 8080 CPU images and descriptions at cpu-collection.de</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20061011123653/http://www.cpu-collection.de/?tn=0&l0=cl&l1=8080">Archived</a> October 11, 2006, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070928060215/http://www.datasheetarchive.com/search.php?q=8080">Scan of the Intel 8080 data book at DataSheetArchive.com</a></li> <li><a rel="nofollow" class="external text" href="http://donbot.com/MicrocomputerDesign/SE/M001.html">Microcomputer Design, Second Edition, 1976</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20120311032333/http://donbot.com/MicrocomputerDesign/SE/M001.html">Archived</a> March 11, 2012, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li><a rel="nofollow" class="external text" href="http://www.bluishcoder.co.nz/js8080/">8080 Emulator written in JavaScript</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20100317080605/http://www.bluishcoder.co.nz/js8080/">Archived</a> March 17, 2010, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li><a rel="nofollow" class="external text" href="https://github.com/begoon/i8080-js/">Intel 8080/KR580VM80A emulator in JavaScript</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20180611025338/https://github.com/begoon/i8080-js">Archived</a> June 11, 2018, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li><a rel="nofollow" class="external text" href="http://www.nj7p.info/Manuals/PDFs/Intel/9800153B.pdf">Intel 8080 Microcomputer Systems User's Manual (September 1975, 262 pages)</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20180310201916/http://www.nj7p.info/Manuals/PDFs/Intel/9800153B.pdf">Archived</a> March 10, 2018, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li><a rel="nofollow" class="external text" href="http://www.elenota.pl/datasheet-pdf/133557/Intel/8080">Intel 8080 Microcomputer Systems User's Manual (September 1975, 234 pages)</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20130226005332/http://www.elenota.pl/datasheet-pdf/133557/Intel/8080">Archived</a> February 26, 2013, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li><a rel="nofollow" class="external text" href="https://sbc-85.com/download/8085-reference-card-hex/">Intel 8080/8085 Instruction Reference Card</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20210810014546/https://sbc-85.com/download/8085-reference-card-hex/">Archived</a> August 10, 2021, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Patent_on_8080">Patent on 8080</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_8080&action=edit&section=26" title="Edit section: Patent on 8080"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><style data-mw-deduplicate="TemplateStyles:r1041539562">.mw-parser-output .citation{word-wrap:break-word}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}</style><span class="citation patent" id="harv"><a rel="nofollow" class="external text" href="https://worldwide.espacenet.com/textdoc?DB=EPODOC&IDX=US4010449">US patent 4010449</a>, <a href="/wiki/Federico_Faggin" title="Federico Faggin">Federico Faggin</a>, <a href="/wiki/Masatoshi_Shima" title="Masatoshi Shima">Masatoshi Shima</a>, Stanley Mazor, "MOS computer employing a plurality of separate chips", issued March 1, 1977</span><span class="Z3988" title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.number=4010449&rft.cc=US&rft.title=MOS+computer+employing+a+plurality+of+separate+chips&rft.inventor=%5B%5BFederico+Faggin%5D%5D%2C+%5B%5BMasatoshi+Shima%5D%5D%2C+Stanley+Mazor&rft.date=March 1, 1977"><span style="display: none;"> </span></span> This patent contains three claims. The first two relate to the <a class="mw-selflink-fragment" href="#Status_word">status word</a> multiplexed onto the data bus. The third claim is for the <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">RST 7</code> instruction which can be invoked by pulling the data bus high. The <a href="/wiki/Prior_art" title="Prior art">prior art</a> 8008 <code class="mw-highlight mw-highlight-lang-text mw-content-ltr" style="" dir="ltr">RST 7</code> required more complicated instruction jamming circuitry.</li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output .hlist.inline ol,.mw-parser-output .hlist.inline ul,.mw-parser-output .hlist dl dl,.mw-parser-output .hlist dl ol,.mw-parser-output .hlist dl ul,.mw-parser-output .hlist ol dl,.mw-parser-output .hlist ol ol,.mw-parser-output .hlist ol ul,.mw-parser-output .hlist ul dl,.mw-parser-output .hlist ul ol,.mw-parser-output .hlist ul ul{display:inline}.mw-parser-output .hlist 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.navbar-ct-full{font-size:114%;margin:0 7em}.mw-parser-output .navbar-ct-mini{font-size:114%;margin:0 4em}html.skin-theme-clientpref-night .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}@media(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Intel_processors" title="Template:Intel processors"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel_processors" title="Template talk:Intel processors"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_processors" title="Special:EditPage/Template:Intel processors"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Intel_processors144" style="font-size:114%;margin:0 4em"><a href="/wiki/List_of_Intel_processors" title="List of Intel processors">Intel processors</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/List_of_Intel_processors" title="List of Intel processors">Processors</a> <ul><li><a href="/wiki/List_of_Intel_Atom_processors" title="List of Intel Atom processors">Atom</a></li> <li><a href="/wiki/List_of_Intel_Celeron_processors" title="List of Intel Celeron processors">Celeron</a></li> <li><a href="/wiki/List_of_Intel_Pentium_processors" title="List of Intel Pentium processors">Pentium</a> <ul><li><a href="/wiki/List_of_Intel_Pentium_Pro_processors" title="List of Intel Pentium Pro processors">Pro</a></li> <li><a href="/wiki/List_of_Intel_Pentium_II_processors" title="List of Intel Pentium II processors">II</a></li> <li><a href="/wiki/List_of_Intel_Pentium_III_processors" title="List of Intel Pentium III processors">III</a></li> <li><a href="/wiki/List_of_Intel_Pentium_4_processors" title="List of Intel Pentium 4 processors">4</a></li> <li><a href="/wiki/List_of_Intel_Pentium_D_processors" title="List of Intel Pentium D processors">D</a></li> <li><a href="/wiki/List_of_Intel_Pentium_M_processors" title="List of Intel Pentium M processors">M</a></li></ul></li> <li><a href="/wiki/List_of_Intel_Core_processors" title="List of Intel Core processors">Core</a> <ul><li><a href="/wiki/List_of_Intel_Core_2_processors" class="mw-redirect" title="List of Intel Core 2 processors">2</a></li> <li><a href="/wiki/List_of_Intel_Core_i3_processors" class="mw-redirect" title="List of Intel Core i3 processors">i3</a></li> <li><a href="/wiki/List_of_Intel_Core_i5_processors" class="mw-redirect" title="List of Intel Core i5 processors">i5</a></li> <li><a href="/wiki/List_of_Intel_Core_i7_processors" class="mw-redirect" title="List of Intel Core i7 processors">i7</a></li> <li><a href="/wiki/List_of_Intel_Core_i9_processors" class="mw-redirect" title="List of Intel Core i9 processors">i9</a></li> <li><a href="/wiki/List_of_Intel_Core_M_processors" class="mw-redirect" title="List of Intel Core M processors">M</a></li></ul></li> <li><a href="/wiki/List_of_Intel_Xeon_processors" title="List of Intel Xeon processors">Xeon</a></li> <li><a href="/wiki/Intel_Quark#List_of_Intel_Quark_processors" title="Intel Quark">Quark</a></li> <li><a href="/wiki/List_of_Intel_Itanium_processors" title="List of Intel Itanium processors">Itanium</a></li></ul></li> <li><a href="/wiki/List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_Intel_chipsets" title="List of Intel chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/P5_(microarchitecture)" class="mw-redirect" title="P5 (microarchitecture)">P5</a></li> <li><a href="/wiki/P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a> <ul><li><a href="/wiki/Pentium_M" title="Pentium M">P6 variant (Pentium M)</a></li> <li><a href="/wiki/Yonah_(microprocessor)" title="Yonah (microprocessor)">P6 variant (Enhanced Pentium M)</a></li></ul></li> <li><a href="/wiki/NetBurst" title="NetBurst">NetBurst</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Core_(microarchitecture)" title="Intel Core (microarchitecture)">Core</a> <ul><li><a href="/wiki/Penryn_(microarchitecture)" title="Penryn (microarchitecture)">Penryn</a></li></ul></li> <li><a href="/wiki/Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a> <ul><li><a href="/wiki/Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a></li></ul></li> <li><a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a> <ul><li><a href="/wiki/Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a></li></ul></li> <li><a href="/wiki/Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a> <ul><li><a href="/wiki/Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a></li></ul></li> <li><a href="/wiki/Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a> <ul><li><a href="/wiki/Cannon_Lake_(microprocessor)" title="Cannon Lake (microprocessor)">Cannon Lake</a></li></ul></li> <li><a href="/wiki/Sunny_Cove_(microarchitecture)" title="Sunny Cove (microarchitecture)">Sunny Cove</a> <ul><li><a href="/wiki/Cypress_Cove_(microarchitecture)" class="mw-redirect" title="Cypress Cove (microarchitecture)">Cypress Cove</a></li></ul></li> <li><a href="/wiki/Willow_Cove" title="Willow Cove">Willow Cove</a></li> <li><a href="/wiki/Golden_Cove" title="Golden Cove">Golden Cove</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86" title="X86">x86</a> <a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">ULV</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell</a> <ul><li><a href="/wiki/Saltwell_(microarchitecture)" class="mw-redirect" title="Saltwell (microarchitecture)">Saltwell</a></li> <li><a href="/wiki/Silvermont" title="Silvermont">Silvermont</a></li></ul></li> <li><a href="/wiki/Goldmont" title="Goldmont">Goldmont</a> <ul><li><a href="/wiki/Goldmont_Plus" title="Goldmont Plus">Goldmont Plus</a></li></ul></li> <li><a href="/wiki/Tremont_(microarchitecture)" title="Tremont (microarchitecture)">Tremont</a> <ul><li><a href="/wiki/Gracemont_(microarchitecture)" title="Gracemont (microarchitecture)">Gracemont</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)40" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a> <ul><li><a href="/wiki/Intel_Core#10th_generation" title="Intel Core">10th gen</a></li> <li><a href="/wiki/Intel_Core#11th_generation" title="Intel Core">11th gen</a></li> <li><a href="/wiki/Intel_Core#12th_generation" title="Intel Core">12th gen</a></li> <li><a href="/wiki/Intel_Core#13th_generation" title="Intel Core">13th gen</a></li> <li><a href="/wiki/Intel_Core#14th_generation" title="Intel Core">14th gen</a></li></ul></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Binary-coded_decimal" title="Binary-coded decimal">BCD</a> oriented (<a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_4004" title="Intel 4004">4004</a> (1971)</li> <li><a href="/wiki/Intel_4040" title="Intel 4040">4040</a> (1974)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">pre-x86 (<a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_8008" title="Intel 8008">8008</a> (1972)</li> <li><a class="mw-selflink selflink">8080</a> (1974)</li> <li><a href="/wiki/Intel_8085" title="Intel 8085">8085</a> (1977)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Early <a href="/wiki/X86" title="X86">x86</a> (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_8086" title="Intel 8086">8086</a> (1978)</li> <li><a href="/wiki/Intel_8088" title="Intel 8088">8088</a> (1979)</li> <li><a href="/wiki/Intel_80186" title="Intel 80186">80186</a> (1982)</li> <li><a href="/wiki/Intel_80188" class="mw-redirect" title="Intel 80188">80188</a> (1982)</li> <li><a href="/wiki/Intel_80286" title="Intel 80286">80286</a> (1982)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X87" title="X87">x87</a> (external <a href="/wiki/Floating-point_unit" title="Floating-point unit">FPUs</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <dl><dt>8/16-bit databus</dt> <dd><a href="/wiki/Intel_8087" title="Intel 8087">8087</a> (1980)</dd> <dt>16-bit databus</dt> <dd><a href="/wiki/Intel_80C187" class="mw-redirect" title="Intel 80C187">80C187</a></dd> <dd><a href="/wiki/Intel_80287" class="mw-redirect" title="Intel 80287">80287</a></dd> <dd><a href="/wiki/Intel_80387SX" title="Intel 80387SX">80387SX</a></dd> <dt>32-bit databus</dt> <dd><a href="/wiki/Intel_80387" class="mw-redirect" title="Intel 80387">80387DX</a></dd> <dd><a href="/wiki/Intel_80487" class="mw-redirect" title="Intel 80487">80487</a></dd></dl> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/I386" title="I386">i386</a> <ul><li><a href="/wiki/Intel_80386SX" class="mw-redirect" title="Intel 80386SX">SX</a></li> <li><a href="/wiki/Intel_80376" title="Intel 80376">376</a></li> <li><a href="/wiki/Intel_80386EX" title="Intel 80386EX">EX</a></li></ul></li> <li><a href="/wiki/I486" title="I486">i486</a> <ul><li><a href="/wiki/I486SX" title="I486SX">SX</a></li> <li><a href="/wiki/Intel_DX2" title="Intel DX2">DX2</a></li> <li><a href="/wiki/Intel_DX4" title="Intel DX4">DX4</a></li> <li><a href="/wiki/I486SL" title="I486SL">SL</a></li> <li><a href="/wiki/RapidCAD" title="RapidCAD">RapidCAD</a></li> <li><a href="/wiki/I486_OverDrive" title="I486 OverDrive">OverDrive</a></li></ul></li> <li><a href="/wiki/Stealey" title="Stealey">A100/A110</a></li> <li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> <ul><li><a href="/wiki/List_of_Intel_Atom_processors#CE_SoCs" title="List of Intel Atom processors">CE</a></li> <li><a href="/wiki/Atom_(system_on_a_chip)" title="Atom (system on a chip)">SoC</a></li></ul></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a> (1998) <ul><li><a href="/wiki/Celeron#P6-based_Mobile_Celerons" title="Celeron">M</a></li> <li><a href="/wiki/Celeron#Prescott-256" title="Celeron">D</a> (2004)</li></ul></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a> <ul><li><a href="/wiki/Pentium_(original)" title="Pentium (original)">Original i586</a></li> <li><a href="/wiki/Pentium_OverDrive" title="Pentium OverDrive">OverDrive</a></li> <li><a href="/wiki/Pentium_Pro" title="Pentium Pro">Pro</a></li> <li><a href="/wiki/Pentium_II" title="Pentium II">II</a></li> <li><a href="/wiki/Pentium_III" title="Pentium III">III</a></li> <li><a href="/wiki/Pentium_4" title="Pentium 4">4</a></li> <li><a href="/wiki/Pentium_M" title="Pentium M">M</a></li> <li><a href="/wiki/Pentium_Dual-Core" title="Pentium Dual-Core">Dual-Core</a></li></ul></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a> <ul><li><a href="/wiki/List_of_Intel_P6-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel P6-based Xeon microprocessors">P6-based</a></li> <li><a href="/wiki/List_of_Intel_NetBurst-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel NetBurst-based Xeon microprocessors">NetBurst-based</a></li> <li><a href="/wiki/List_of_Intel_Core-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel Core-based Xeon microprocessors">Core-based</a></li></ul></li> <li><a href="/wiki/Intel_Quark" title="Intel Quark">Quark</a></li> <li><a href="/wiki/Tolapai" title="Tolapai">Tolapai</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> <ul><li><a href="/wiki/Atom_(system_on_chip)" class="mw-redirect" title="Atom (system on chip)">SoC</a></li> <li><a href="/wiki/List_of_Intel_Atom_processors#CE_SoCs" title="List of Intel Atom processors">CE</a></li></ul></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a> <ul><li><a href="/wiki/Celeron#Prescott-256" title="Celeron">D</a></li> <li><a href="/wiki/Celeron#Celeron_Dual-Core" title="Celeron">Dual-Core</a></li></ul></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a> <ul><li><a href="/wiki/Pentium_4#Prescott_2M_(Extreme_Edition)" title="Pentium 4">4</a></li> <li><a href="/wiki/Pentium_D" title="Pentium D">D</a></li> <li><a href="/wiki/Pentium_D#Smithfield_XE" title="Pentium D">Extreme Edition</a></li> <li><a href="/wiki/Pentium_Dual-Core" title="Pentium Dual-Core">Dual-Core</a></li></ul></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a> <ul><li><a href="/wiki/Intel_Core_2" title="Intel Core 2">2</a></li> <li><a href="/wiki/Intel_Core#1st_generation" title="Intel Core">1st gen</a></li> <li><a href="/wiki/Intel_Core#2nd_generation" title="Intel Core">2nd gen</a></li> <li><a href="/wiki/Intel_Core#3rd_generation" title="Intel Core">3rd gen</a></li> <li><a href="/wiki/Intel_Core#4th_generation" title="Intel Core">4th gen</a></li> <li><a href="/wiki/Intel_Core#5th_generation" title="Intel Core">5th gen</a></li> <li><a href="/wiki/Intel_Core#6th_generation" title="Intel Core">6th gen</a></li> <li><a href="/wiki/Intel_Core#7th_generation" title="Intel Core">7th gen</a></li> <li><a href="/wiki/Intel_Core#8th_generation" title="Intel Core">8th gen</a></li> <li><a href="/wiki/Intel_Core#9th_generation" title="Intel Core">9th gen</a></li> <li><a href="/wiki/Intel_Core#10th_generation" title="Intel Core">10th gen</a></li> <li><a href="/wiki/Intel_Core#11th_generation" title="Intel Core">11th gen</a></li> <li><a href="/wiki/List_of_Intel_Core_M_processors" class="mw-redirect" title="List of Intel Core M processors">M</a></li></ul></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a> <ul><li><a href="/wiki/List_of_Intel_Xeon_processors_(Nehalem-based)" title="List of Intel Xeon processors (Nehalem-based)">Nehalem-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Sandy_Bridge-based)" title="List of Intel Xeon processors (Sandy Bridge-based)">Sandy Bridge-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Ivy_Bridge-based)" title="List of Intel Xeon processors (Ivy Bridge-based)">Ivy Bridge-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Haswell-based)" title="List of Intel Xeon processors (Haswell-based)">Haswell-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Broadwell-based)" title="List of Intel Xeon processors (Broadwell-based)">Broadwell-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Skylake-based)" title="List of Intel Xeon processors (Skylake-based)">Skylake-based</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <dl><dt><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></dt> <dd><a href="/wiki/Intel_iAPX_432" title="Intel iAPX 432">iAPX 432</a></dd> <dt><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></dt> <dd><a href="/wiki/Itanium" title="Itanium">Itanium</a></dd> <dt><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></dt> <dd><a href="/wiki/Intel_i860" title="Intel i860">i860</a></dd> <dd><a href="/wiki/Intel_i960" title="Intel i960">i960</a></dd> <dd><a href="/wiki/StrongARM" title="StrongARM">StrongARM</a></dd> <dd><a href="/wiki/XScale" title="XScale">XScale</a></dd></dl> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li> <li><a href="/wiki/Process%E2%80%93architecture%E2%80%93optimization_model" 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