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.sidebar-below{border-top:1px solid #aaa;border-bottom:1px solid #aaa}.mw-parser-output .sidebar-navbar{text-align:right;font-size:115%;padding:0 0.4em 0.4em}.mw-parser-output .sidebar-list-title{padding:0 0.4em;text-align:left;font-weight:bold;line-height:1.6em;font-size:105%}.mw-parser-output .sidebar-list-title-c{padding:0 0.4em;text-align:center;margin:0 3.3em}@media(max-width:640px){body.mediawiki .mw-parser-output .sidebar{width:100%!important;clear:both;float:none!important;margin-left:0!important;margin-right:0!important}}body.skin--responsive .mw-parser-output .sidebar a>img{max-width:none!important}@media screen{html.skin-theme-clientpref-night .mw-parser-output .sidebar:not(.notheme) .sidebar-list-title,html.skin-theme-clientpref-night .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle{background:transparent!important}html.skin-theme-clientpref-night .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle a{color:var(--color-progressive)!important}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .sidebar:not(.notheme) .sidebar-list-title,html.skin-theme-clientpref-os .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle{background:transparent!important}html.skin-theme-clientpref-os .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle a{color:var(--color-progressive)!important}}@media print{body.ns-0 .mw-parser-output .sidebar{display:none!important}}</style><table class="sidebar sidebar-collapse nomobile nowraplinks hlist"><tbody><tr><th class="sidebar-title"><a href="/wiki/Computer_memory" title="Computer memory">Computer memory</a> and <a href="/wiki/Computer_data_storage" title="Computer data storage">data storage</a> types</th></tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)">General</div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Memory_cell_(computing)" title="Memory cell (computing)">Memory cell</a></li> <li><a href="/wiki/Memory_coherence" title="Memory coherence">Memory coherence</a></li> <li><a href="/wiki/Cache_coherence" title="Cache coherence">Cache coherence</a></li> <li><a href="/wiki/Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a></li> <li><a href="/wiki/Memory_access_pattern" title="Memory access pattern">Memory access pattern</a></li> <li><a href="/wiki/Memory_map" title="Memory map">Memory map</a></li> <li><a href="/wiki/Computer_data_storage#Secondary_storage" title="Computer data storage">Secondary storage</a></li> <li><a href="/wiki/Semiconductor_memory" title="Semiconductor memory">MOS memory</a> <ul><li><a href="/wiki/Floating-gate_MOSFET" title="Floating-gate MOSFET">floating-gate</a></li></ul></li> <li><a href="/wiki/Continuous_availability" title="Continuous availability">Continuous availability</a></li> <li><a href="/wiki/Areal_density_(computer_storage)" class="mw-redirect" title="Areal density (computer storage)">Areal density (computer storage)</a></li> <li><a href="/wiki/Block_(data_storage)" title="Block (data storage)">Block (data storage)</a></li> <li><a href="/wiki/Object_storage" title="Object storage">Object storage</a></li> <li><a href="/wiki/Direct-attached_storage" title="Direct-attached storage">Direct-attached storage</a></li> <li><a href="/wiki/Network-attached_storage" title="Network-attached storage">Network-attached storage</a> <ul><li><a href="/wiki/Storage_area_network" title="Storage area network">Storage area network</a></li> <li><a href="/wiki/Block-level_storage" title="Block-level storage">Block-level storage</a></li></ul></li> <li><a href="/wiki/Single-instance_storage" title="Single-instance storage">Single-instance storage</a></li> <li><a href="/wiki/Data" title="Data">Data</a></li> <li><a href="/wiki/Data_model" title="Data model">Structured data</a></li> <li><a href="/wiki/Unstructured_data" title="Unstructured data">Unstructured data</a></li> <li><a href="/wiki/Big_data" title="Big data">Big data</a></li> <li><a href="/wiki/Metadata" title="Metadata">Metadata</a></li> <li><a href="/wiki/Data_compression" title="Data compression">Data compression</a></li> <li><a href="/wiki/Data_corruption" title="Data corruption">Data corruption</a></li> <li><a href="/wiki/Data_cleansing" title="Data cleansing">Data cleansing</a></li> <li><a href="/wiki/Data_degradation" title="Data degradation">Data degradation</a></li> <li><a href="/wiki/Data_integrity" title="Data integrity">Data integrity</a></li> <li><a href="/wiki/Data_security" title="Data security">Data security</a></li> <li><a href="/wiki/Data_validation" title="Data validation">Data validation</a></li> <li><a href="/wiki/Data_validation_and_reconciliation" title="Data validation and reconciliation">Data validation and reconciliation</a></li> <li><a href="/wiki/Data_recovery" title="Data recovery">Data recovery</a></li> <li><a href="/wiki/Computer_data_storage" title="Computer data storage">Storage</a></li> <li><a href="/wiki/Data_cluster" class="mw-redirect" title="Data cluster">Data cluster</a></li> <li><a href="/wiki/Directory_(computing)" title="Directory (computing)">Directory</a></li> <li><a href="/wiki/Shared_resource" title="Shared resource">Shared resource</a></li> <li><a href="/wiki/File_sharing" title="File sharing">File sharing</a></li> <li><a href="/wiki/File_system" title="File system">File system</a></li> <li><a href="/wiki/Clustered_file_system" title="Clustered file system">Clustered file system</a></li> <li><a href="/wiki/Clustered_file_system#Distributed_file_systems" title="Clustered file system">Distributed file system</a></li> <li><a href="/wiki/Distributed_file_system_for_cloud" title="Distributed file system for cloud">Distributed file system for cloud</a></li> <li><a href="/wiki/Distributed_data_store" title="Distributed data store">Distributed data store</a></li> <li><a href="/wiki/Distributed_database" title="Distributed database">Distributed database</a></li> <li><a href="/wiki/Database" title="Database">Database</a></li> <li><a href="/wiki/Data_bank" title="Data bank">Data bank</a></li> <li><a href="/wiki/Data_storage" title="Data storage">Data storage</a></li> <li><a href="/wiki/Data_store" title="Data store">Data store</a></li> <li><a href="/wiki/Data_deduplication" title="Data deduplication">Data deduplication</a></li> <li><a href="/wiki/Data_structure" title="Data structure">Data structure</a></li> <li><a href="/wiki/Data_redundancy" title="Data redundancy">Data redundancy</a></li> <li><a href="/wiki/Replication_(computing)" title="Replication (computing)">Replication (computing)</a></li> <li><a href="/wiki/Memory_refresh" title="Memory refresh">Memory refresh</a></li> <li><a href="/wiki/Storage_record" title="Storage record">Storage record</a></li> <li><a href="/wiki/Information_repository" title="Information repository">Information repository</a></li> <li><a href="/wiki/Knowledge_base" title="Knowledge base">Knowledge base</a></li> <li><a href="/wiki/Computer_file" title="Computer file">Computer file</a></li> <li><a href="/wiki/Object_file" title="Object file">Object file</a></li> <li><a href="/wiki/File_deletion" title="File deletion">File deletion</a></li> <li><a href="/wiki/File_copying" title="File copying">File copying</a></li> <li><a href="/wiki/Backup" title="Backup">Backup</a></li> <li><a href="/wiki/Core_dump" title="Core dump">Core dump</a></li> <li><a href="/wiki/Hex_dump" title="Hex dump">Hex dump</a></li> <li><a href="/wiki/Data_communication" title="Data communication">Data communication</a></li> <li><a href="/wiki/Information_transfer" title="Information transfer">Information transfer</a></li> <li><a href="/wiki/Temporary_file" title="Temporary file">Temporary file</a></li> <li><a href="/wiki/Copy_protection" title="Copy protection">Copy protection</a></li> <li><a href="/wiki/Digital_rights_management" title="Digital rights management">Digital rights management</a></li> <li><a href="/wiki/Volume_(computing)" title="Volume (computing)">Volume (computing)</a></li> <li><a href="/wiki/Boot_sector" title="Boot sector">Boot sector</a></li> <li><a href="/wiki/Master_boot_record" title="Master boot record">Master boot record</a></li> <li><a href="/wiki/Volume_boot_record" title="Volume boot record">Volume boot record</a></li> <li><a href="/wiki/Disk_array" title="Disk array">Disk array</a></li> <li><a href="/wiki/Disk_image" title="Disk image">Disk image</a></li> <li><a href="/wiki/Disk_mirroring" title="Disk mirroring">Disk mirroring</a></li> <li><a href="/wiki/Disk_aggregation" title="Disk aggregation">Disk aggregation</a></li> <li><a href="/wiki/Disk_partitioning" title="Disk partitioning">Disk partitioning</a></li> <li><a href="/wiki/Memory_segmentation" title="Memory segmentation">Memory segmentation</a></li> <li><a href="/wiki/Locality_of_reference" title="Locality of reference">Locality of reference</a></li> <li><a href="/wiki/Logical_disk" title="Logical disk">Logical disk</a></li> <li><a href="/wiki/Storage_virtualization" title="Storage virtualization">Storage virtualization</a></li> <li><a href="/wiki/Virtual_memory" title="Virtual memory">Virtual memory</a></li> <li><a href="/wiki/Memory-mapped_file" title="Memory-mapped file">Memory-mapped file</a></li> <li><a href="/wiki/Software_entropy" class="mw-redirect" title="Software entropy">Software entropy</a></li> <li><a href="/wiki/Software_rot" title="Software rot">Software rot</a></li> <li><a href="/wiki/In-memory_database" title="In-memory database">In-memory database</a></li> <li><a href="/wiki/In-memory_processing" title="In-memory processing">In-memory processing</a></li> <li><a href="/wiki/Persistence_(computer_science)" title="Persistence (computer science)">Persistence (computer science)</a></li> <li><a href="/wiki/Persistent_data_structure" title="Persistent data structure">Persistent data structure</a></li> <li><a href="/wiki/RAID" title="RAID">RAID</a></li> <li><a href="/wiki/Non-RAID_drive_architectures" title="Non-RAID drive architectures">Non-RAID drive architectures</a></li> <li><a href="/wiki/Memory_paging" title="Memory paging">Memory paging</a></li> <li><a href="/wiki/Bank_switching" title="Bank switching">Bank switching</a></li> <li><a href="/wiki/Grid_computing" title="Grid computing">Grid computing</a></li> <li><a href="/wiki/Cloud_computing" title="Cloud computing">Cloud computing</a></li> <li><a href="/wiki/Cloud_storage" title="Cloud storage">Cloud storage</a></li> <li><a href="/wiki/Fog_computing" title="Fog computing">Fog computing</a></li> <li><a href="/wiki/Edge_computing" title="Edge computing">Edge computing</a></li> <li><a href="/wiki/Dew_computing" title="Dew computing">Dew computing</a></li> <li><a href="/wiki/Amdahl%27s_law" title="Amdahl's law">Amdahl's law</a></li> <li><a href="/wiki/Moore%27s_law" title="Moore's law">Moore's law</a></li> <li><a href="/wiki/Mark_Kryder#Kryder's_law_projection" title="Mark Kryder">Kryder's law</a></li></ul></div></div></td> </tr><tr><th class="sidebar-heading"> <a href="/wiki/Volatile_memory" title="Volatile memory">Volatile</a></th></tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)"><a href="/wiki/Random-access_memory" title="Random-access memory">RAM</a></div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Cache_(computing)#HARDWARE" title="Cache (computing)">Hardware cache</a> <ul><li><a href="/wiki/CPU_cache" title="CPU cache">CPU cache</a></li> <li><a href="/wiki/Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li></ul></li> <li><a href="/wiki/Dynamic_random-access_memory" title="Dynamic random-access memory">DRAM</a> <ul><li><a href="/wiki/EDRAM" title="EDRAM">eDRAM</a></li> <li><a href="/wiki/Synchronous_dynamic_random-access_memory" title="Synchronous dynamic random-access memory">SDRAM</a></li> <li><a href="/wiki/Synchronous_dynamic_random-access_memory#Synchronous_Graphics_RAM_(SGRAM)" title="Synchronous dynamic random-access memory">SGRAM</a></li> <li><a href="/wiki/LPDDR" title="LPDDR">LPDDR</a></li> <li><a href="/wiki/Quad_Data_Rate_SRAM" title="Quad Data Rate SRAM">QDRSRAM</a></li> <li><a href="/wiki/Dynamic_random-access_memory#Extended_data_out_DRAM" title="Dynamic random-access memory">EDO DRAM</a></li> <li><a href="/wiki/XDR_DRAM" title="XDR DRAM">XDR DRAM</a></li> <li><a href="/wiki/RDRAM" title="RDRAM">RDRAM</a></li> <li><a href="/wiki/DDR_SDRAM" title="DDR SDRAM">DDR</a></li> <li><a href="/wiki/GDDR_SDRAM" title="GDDR SDRAM">GDDR</a></li> <li><a href="/wiki/High_Bandwidth_Memory" title="High Bandwidth Memory">HBM</a></li></ul></li> <li><a href="/wiki/Static_random-access_memory" title="Static random-access memory">SRAM</a> <ul><li><a class="mw-selflink selflink">1T-SRAM</a></li></ul></li> <li><a href="/wiki/Resistive_random-access_memory" title="Resistive random-access memory">ReRAM</a></li> <li><a href="/wiki/Quantum_memory" title="Quantum memory">QRAM</a></li> <li><a href="/wiki/Content-addressable_memory" title="Content-addressable memory">Content-addressable memory</a> (CAM)</li> <li><a href="/wiki/Computational_RAM" title="Computational RAM">Computational RAM</a></li> <li><a href="/wiki/Video_random_access_memory" class="mw-redirect" title="Video random access memory">VRAM</a></li> <li><a href="/wiki/Dual-ported_RAM" title="Dual-ported RAM">Dual-ported RAM</a> <ul><li><a href="/wiki/Video_RAM_(dual-ported_DRAM)" class="mw-redirect" title="Video RAM (dual-ported DRAM)">Video RAM (dual-ported DRAM)</a></li></ul></li></ul></div></div></td> </tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)">Historical</div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Williams_tube" title="Williams tube">Williams–Kilburn tube</a> (1946–1947)</li> <li><a href="/wiki/Delay-line_memory" title="Delay-line memory">Delay-line memory</a> (1947)</li> <li><a href="/wiki/Mellon_optical_memory" title="Mellon optical memory">Mellon optical memory</a> (1951)</li> <li><a href="/wiki/Selectron_tube" title="Selectron tube">Selectron tube</a> (1952)</li> <li><a href="/wiki/Dekatron" title="Dekatron">Dekatron</a></li> <li><a href="/wiki/T-RAM" title="T-RAM">T-RAM</a> (2009)</li> <li><a href="/wiki/Z-RAM" title="Z-RAM">Z-RAM</a> (2002–2010)</li></ul></div></div></td> </tr><tr><th class="sidebar-heading"> <a href="/wiki/Non-volatile_memory" title="Non-volatile memory">Non-volatile</a></th></tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)"><a href="/wiki/Read-only_memory" title="Read-only memory">ROM</a></div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Diode_matrix" title="Diode matrix">Diode matrix</a></li> <li><a href="/wiki/Read-only_memory#Factory-programmed" title="Read-only memory">MROM</a></li> <li><a href="/wiki/Programmable_ROM" title="Programmable ROM">PROM</a> <ul><li><a href="/wiki/EPROM" title="EPROM">EPROM</a></li> <li><a href="/wiki/EEPROM" title="EEPROM">EEPROM</a></li></ul></li> <li><a href="/wiki/ROM_cartridge" title="ROM cartridge">ROM cartridge</a></li> <li><a href="/wiki/Solid-state_storage" title="Solid-state storage">Solid-state storage</a> (SSS) <ul><li><a href="/wiki/Flash_memory" title="Flash memory">Flash memory</a> is used in:</li> <li><a href="/wiki/Solid-state_drive" title="Solid-state drive">Solid-state drive</a> (SSD)</li> <li><a href="/wiki/Solid-state_hybrid_drive" class="mw-redirect" title="Solid-state hybrid drive">Solid-state hybrid drive</a> (SSHD)</li> <li><a href="/wiki/USB_flash_drive" title="USB flash drive">USB flash drive</a></li> <li><a href="/wiki/IBM_FlashSystem" title="IBM FlashSystem">IBM FlashSystem</a></li> <li><a href="/wiki/Flash_Core_Module" title="Flash Core Module">Flash Core Module</a></li></ul></li> <li><a href="/wiki/Memory_card" title="Memory card">Memory card</a> <ul><li><a href="/wiki/Memory_Stick" title="Memory Stick">Memory Stick</a></li> <li><a href="/wiki/CompactFlash" title="CompactFlash">CompactFlash</a></li> <li><a href="/wiki/PC_Card" title="PC Card">PC Card</a></li> <li><a href="/wiki/MultiMediaCard" title="MultiMediaCard">MultiMediaCard</a></li> <li><a href="/wiki/SD_card" title="SD card">SD card</a></li> <li><a href="/wiki/SIM_card" title="SIM card">SIM card</a></li> <li><a href="/wiki/SmartMedia" title="SmartMedia">SmartMedia</a></li> <li><a href="/wiki/Universal_Flash_Storage" title="Universal Flash Storage">Universal Flash Storage</a></li> <li><a href="/wiki/SxS" title="SxS">SxS</a></li> <li><a href="/wiki/MicroP2" title="MicroP2">MicroP2</a></li> <li><a href="/wiki/XQD_card" title="XQD card">XQD card</a></li></ul></li> <li><a href="/wiki/Programmable_metallization_cell" title="Programmable metallization cell">Programmable metallization cell</a></li></ul></div></div></td> </tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)"><a href="/wiki/Non-volatile_random-access_memory" title="Non-volatile random-access memory">NVRAM</a></div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Memistor" title="Memistor">Memistor</a></li> <li><a href="/wiki/Memristor" title="Memristor">Memristor</a></li> <li><a href="/wiki/Phase-change_memory" title="Phase-change memory">PCM</a> (<a href="/wiki/3D_XPoint" title="3D XPoint">3D XPoint</a>)</li> <li><a href="/wiki/Magnetoresistive_RAM" title="Magnetoresistive RAM">MRAM</a></li> <li><a href="/wiki/Electrochemical_RAM" title="Electrochemical RAM">Electrochemical RAM</a> (ECRAM)</li> <li><a href="/wiki/Nano-RAM" title="Nano-RAM">Nano-RAM</a></li> <li><a href="/wiki/Programmable_metallization_cell" title="Programmable metallization cell">CBRAM</a></li></ul></div></div></td> </tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)">Early-stage <a href="/wiki/Non-volatile_random-access_memory" title="Non-volatile random-access memory">NVRAM</a></div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Ferroelectric_RAM" title="Ferroelectric RAM">FeRAM</a></li> <li><a href="/wiki/Resistive_random-access_memory" title="Resistive random-access memory">ReRAM</a></li> <li><a href="/wiki/Fe_FET" title="Fe FET">FeFET memory</a></li></ul></div></div></td> </tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)"><a href="/wiki/Analog_recording" title="Analog recording">Analog recording</a></div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Phonograph_cylinder" title="Phonograph cylinder">Phonograph cylinder</a></li> <li><a href="/wiki/Phonograph_record" title="Phonograph record">Phonograph record</a></li> <li><a href="/wiki/Quadruplex_videotape" title="Quadruplex videotape">Quadruplex videotape</a></li> <li><a href="/wiki/Vision_Electronic_Recording_Apparatus" title="Vision Electronic Recording Apparatus">Vision Electronic Recording Apparatus</a></li> <li><a href="/wiki/Magnetic_recording" class="mw-redirect" title="Magnetic recording">Magnetic recording</a> <ul><li><a href="/wiki/Magnetic_storage" title="Magnetic storage">Magnetic storage</a></li> <li><a href="/wiki/Magnetic_tape" title="Magnetic tape">Magnetic tape</a></li> <li><a href="/wiki/Magnetic-tape_data_storage" title="Magnetic-tape data storage">Magnetic-tape data storage</a></li> <li><a href="/wiki/Tape_drive" title="Tape drive">Tape drive</a></li> <li><a href="/wiki/Tape_library" title="Tape library">Tape library</a></li> <li><a href="/wiki/Digital_Data_Storage" title="Digital Data Storage">Digital Data Storage</a> (DDS)</li> <li><a href="/wiki/Videotape" title="Videotape">Videotape</a></li> <li><a href="/wiki/Videocassette" class="mw-redirect" title="Videocassette">Videocassette</a></li> <li><a href="/wiki/Cassette_tape" title="Cassette tape">Cassette tape</a></li> <li><a href="/wiki/Linear_Tape-Open" title="Linear Tape-Open">Linear Tape-Open</a></li> <li><a href="/wiki/Betamax" title="Betamax">Betamax</a></li> <li><a href="/wiki/8_mm_video_format" title="8 mm video format">8 mm video format</a></li> <li><a href="/wiki/DV_(video_format)" title="DV (video format)">DV</a></li> <li><a href="/wiki/MiniDV" class="mw-redirect" title="MiniDV">MiniDV</a></li> <li><a href="/wiki/MicroMV" title="MicroMV">MicroMV</a></li> <li><a href="/wiki/U-matic" title="U-matic">U-matic</a></li> <li><a href="/wiki/VHS" title="VHS">VHS</a></li> <li><a href="/wiki/S-VHS" title="S-VHS">S-VHS</a></li> <li><a href="/wiki/VHS-C" title="VHS-C">VHS-C</a></li> <li><a href="/wiki/D-VHS" title="D-VHS">D-VHS</a></li></ul></li> <li><a href="/wiki/Hard_disk_drive" title="Hard disk drive">Hard disk drive</a></li></ul></div></div></td> </tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)"><a href="/wiki/Optical_storage" title="Optical storage">Optical</a></div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/3D_optical_data_storage" title="3D optical data storage">3D optical data storage</a> <ul><li><a href="/wiki/Optical_disc" title="Optical disc">Optical disc</a></li> <li><a href="/wiki/LaserDisc" title="LaserDisc">LaserDisc</a></li> <li><a href="/wiki/Compact_Disc_Digital_Audio" title="Compact Disc Digital Audio">Compact Disc Digital Audio</a> (CDDA)</li> <li><a href="/wiki/Compact_disc" title="Compact disc">CD</a></li> <li><a href="/wiki/CD_Video" title="CD Video">CD Video</a></li> <li><a href="/wiki/CD-R" title="CD-R">CD-R</a></li> <li><a href="/wiki/CD-RW" title="CD-RW">CD-RW</a></li> <li><a href="/wiki/Video_CD" title="Video CD">Video CD</a></li> <li><a href="/wiki/Super_Video_CD" title="Super Video CD">Super Video CD</a></li> <li><a href="/wiki/Mini_CD" title="Mini CD">Mini CD</a></li> <li><a href="/wiki/Nintendo_optical_discs" title="Nintendo optical discs">Nintendo optical discs</a></li> <li><a href="/wiki/CD-ROM" title="CD-ROM">CD-ROM</a></li> <li><a href="/wiki/Hyper_CD-ROM" title="Hyper CD-ROM">Hyper CD-ROM</a></li> <li><a href="/wiki/DVD" title="DVD">DVD</a></li> <li><a href="/wiki/DVD_recordable#DVD+R_and_DVD+RW_(DVD_"plus")" title="DVD recordable">DVD+R</a></li> <li><a href="/wiki/DVD-Video" title="DVD-Video">DVD-Video</a></li> <li><a href="/wiki/DVD_card" title="DVD card">DVD card</a></li> <li><a href="/wiki/DVD-RAM" title="DVD-RAM">DVD-RAM</a></li> <li><a href="/wiki/MiniDVD" title="MiniDVD">MiniDVD</a></li> <li><a href="/wiki/HD_DVD" title="HD DVD">HD DVD</a></li> <li><a href="/wiki/Blu-ray" title="Blu-ray">Blu-ray</a></li> <li><a href="/wiki/Ultra_HD_Blu-ray" title="Ultra HD Blu-ray">Ultra HD Blu-ray</a></li> <li><a href="/wiki/Holographic_Versatile_Disc" title="Holographic Versatile Disc">Holographic Versatile Disc</a></li></ul></li> <li><a href="/wiki/Write_once_read_many" title="Write once read many">WORM</a></li></ul></div></div></td> </tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)">In development</div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Programmable_metallization_cell" title="Programmable metallization cell">CBRAM</a></li> <li><a href="/wiki/Racetrack_memory" title="Racetrack memory">Racetrack memory</a></li> <li><a href="/wiki/Nano-RAM" title="Nano-RAM">NRAM</a></li> <li><a href="/wiki/Millipede_memory" title="Millipede memory">Millipede memory</a></li> <li><a href="/wiki/Electrochemical_RAM" title="Electrochemical RAM">ECRAM</a></li> <li><a href="/wiki/Patterned_media" title="Patterned media">Patterned media</a></li> <li><a href="/wiki/Holographic_data_storage" title="Holographic data storage">Holographic data storage</a> <ul><li><a href="/wiki/Electronic_quantum_holography" title="Electronic quantum holography">Electronic quantum holography</a></li></ul></li> <li><a href="/wiki/5D_optical_data_storage" title="5D optical data storage">5D optical data storage</a></li> <li><a href="/wiki/DNA_digital_data_storage" title="DNA digital data storage">DNA digital data storage</a></li> <li><a href="/wiki/Universal_memory" title="Universal memory">Universal memory</a></li> <li><a href="/wiki/Time_crystal" title="Time crystal">Time crystal</a></li> <li><a href="/wiki/Quantum_memory" title="Quantum memory">Quantum memory</a></li> <li><a href="/wiki/UltraRAM" title="UltraRAM">UltraRAM</a></li></ul></div></div></td> </tr><tr><td class="sidebar-content"> <div class="sidebar-list mw-collapsible mw-collapsed"><div class="sidebar-list-title" style="color: var(--color-base)">Historical</div><div class="sidebar-list-content mw-collapsible-content"> <ul><li><a href="/wiki/Paper_data_storage" title="Paper data storage">Paper data storage</a> (1725)</li> <li><a href="/wiki/Punched_card" title="Punched card">Punched card</a> (1725)</li> <li><a href="/wiki/Punched_tape" title="Punched tape">Punched tape</a> (1725)</li> <li><a href="/wiki/Plugboard" title="Plugboard">Plugboard</a></li> <li><a href="/wiki/Drum_memory" title="Drum memory">Drum memory</a> (1932)</li> <li><a href="/wiki/Magnetic-core_memory" title="Magnetic-core memory">Magnetic-core memory</a> (1949)</li> <li><a href="/wiki/Plated-wire_memory" title="Plated-wire memory">Plated-wire memory</a> (1957)</li> <li><a href="/wiki/Core_rope_memory" title="Core rope memory">Core rope memory</a> (1960s)</li> <li><a href="/wiki/Thin-film_memory" title="Thin-film memory">Thin-film memory</a> (1962)</li> <li><a href="/wiki/Disk_pack" title="Disk pack">Disk pack</a> (1962)</li> <li><a href="/wiki/Twistor_memory" title="Twistor memory">Twistor memory</a> (~1968)</li> <li><a href="/wiki/Bubble_memory" title="Bubble memory">Bubble memory</a> (~1970)</li> <li><a href="/wiki/Floppy_disk" title="Floppy disk">Floppy disk</a> (1971)</li></ul></div></div></td> </tr><tr><td class="sidebar-navbar"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><style data-mw-deduplicate="TemplateStyles:r1239400231">.mw-parser-output .navbar{display:inline;font-size:88%;font-weight:normal}.mw-parser-output .navbar-collapse{float:left;text-align:left}.mw-parser-output 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navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Memory_types" title="Template:Memory types"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Memory_types" title="Template talk:Memory types"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Memory_types" title="Special:EditPage/Template:Memory types"><abbr title="Edit this template">e</abbr></a></li></ul></div></td></tr></tbody></table> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:1T-SRAM.JPG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/f/f1/1T-SRAM.JPG/220px-1T-SRAM.JPG" decoding="async" width="220" height="199" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/f/f1/1T-SRAM.JPG/330px-1T-SRAM.JPG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/f/f1/1T-SRAM.JPG/440px-1T-SRAM.JPG 2x" data-file-width="691" data-file-height="626" /></a><figcaption>MoSys 1T-SRAM</figcaption></figure> <p><b>1T-SRAM</b> is a <a href="/wiki/PSRAM" class="mw-redirect" title="PSRAM">pseudo-static random-access memory</a> (PSRAM) technology introduced by <a href="/wiki/MoSys" title="MoSys">MoSys, Inc.</a> in September 1998, which offers a high-density alternative to traditional <a href="/wiki/Static_random-access_memory" title="Static random-access memory">static random-access memory</a> (SRAM) in embedded memory applications. Mosys uses a single-transistor storage cell (bit cell) like <a href="/wiki/Dynamic_random-access_memory" title="Dynamic random-access memory">dynamic random-access memory</a> (DRAM), but surrounds the bit cell with control circuitry that makes the memory functionally equivalent to SRAM (the controller hides all DRAM-specific operations such as precharging and refresh). 1T-SRAM (and PSRAM in general) has a standard single-cycle SRAM interface and appears to the surrounding logic just as an SRAM would. </p><p>Due to its one-transistor bit cell, 1T-SRAM is smaller than conventional (six-transistor, or "6T") SRAM, and closer in size and density to embedded DRAM (<a href="/wiki/EDRAM" title="EDRAM">eDRAM</a>). At the same time, 1T-SRAM has performance comparable to SRAM at multi-megabit densities, uses less power than eDRAM and is manufactured in a standard <a href="/wiki/CMOS" title="CMOS">CMOS</a> logic process like conventional SRAM. </p><p>MoSys markets 1T-SRAM as physical <a href="/wiki/Intellectual_property" title="Intellectual property">IP</a> for embedded (on-die) use in <a href="/wiki/System-on-a-chip" class="mw-redirect" title="System-on-a-chip">System-on-a-chip</a> (SOC) applications. It is available on a variety of foundry processes, including Chartered, <a href="/wiki/Semiconductor_Manufacturing_International_Corporation" title="Semiconductor Manufacturing International Corporation">SMIC</a>, TSMC, and UMC. Some engineers use the terms 1T-SRAM and "embedded DRAM" interchangeably, as some foundries provide MoSys's 1T-SRAM as "eDRAM". However, other foundries provide 1T-SRAM as a distinct offering. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Technology">Technology</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=1T-SRAM&action=edit&section=1" title="Edit section: Technology"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>1T SRAM is built as an array of small banks (typically 128 rows × 256 bits/row, 32 <a href="/wiki/Kilobit" class="mw-redirect" title="Kilobit">kilobits</a> in total) coupled to a bank-sized SRAM cache and an intelligent controller. Although space-inefficient compared to regular DRAM, the short word lines allow much higher speeds, so the array can do a full sense and precharge (RAS cycle) per access, providing high-speed random access. Each access is to one bank, allowing unused banks to be refreshed at the same time. Additionally, each row read out of the active bank is copied to the bank-sized SRAM <a href="/wiki/CPU_cache" title="CPU cache">cache</a>. In the event of repeated accesses to one bank, which would not allow time for refresh cycles, there are two options: either the accesses are all to different rows, in which case all rows will be refreshed automatically, or some rows are accessed repeatedly. In the latter case, the cache provides the data and allows time for an unused row of the active bank to be refreshed. </p><p>There have been four generations of 1T-SRAM:<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Manual_of_Style/Dates_and_numbers#Chronological_items" title="Wikipedia:Manual of Style/Dates and numbers"><span title="The time period mentioned near this tag is ambiguous. (November 2022)">when?</span></a></i>]</sup> </p> <dl><dt>Original 1T-SRAM</dt> <dd>About half the size of 6T-SRAM, less than half the power.</dd> <dt>1T-SRAM-M</dt> <dd>Variant with lower standby power consumption, for applications such as cell phones.</dd> <dt>1T-SRAM-R</dt> <dd>Incorporates <a href="/wiki/Error_detection_and_correction#Error-correcting_code" title="Error detection and correction">ECC</a> for lower <a href="/wiki/Soft_error" title="Soft error">soft error</a> rates. To avoid an area penalty, it uses smaller bit cells, which have an inherently higher error rate, but the ECC more than makes up for that.</dd> <dt>1T-SRAM-Q</dt> <dd>This "quad-density" version uses a slightly non-standard fabrication process to produce a smaller folded capacitor, allowing the memory size to be halved again over 1T-SRAM-R. This does add slightly to wafer production costs, but does not interfere with logic transistor fabrication the way conventional DRAM capacitor construction does.</dd></dl> <div class="mw-heading mw-heading2"><h2 id="Comparison_with_other_embedded_memory_technologies">Comparison with other embedded memory technologies</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=1T-SRAM&action=edit&section=2" title="Edit section: Comparison with other embedded memory technologies"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>1T-SRAM has speed comparable to 6T-SRAM (at multi-megabit densities). It is significantly faster speed than eDRAM, and the "quad-density" variant is only slightly larger (10–15% is claimed). On most foundry processes, designs with eDRAM require additional (and costly) <a href="/wiki/Photomask" title="Photomask">masks</a> and processing steps, offsetting the cost of a larger 1T-SRAM die. Also, some of those steps require very high temperatures and must take place after the logic transistors are formed, possibly damaging them. </p><p>1T-SRAM is also available in device (IC) form. The <a href="/wiki/GameCube" title="GameCube">GameCube</a> was the first video game system to use 1T-SRAM as main memory storage; the GameCube possesses several dedicated 1T-SRAM devices. 1T-SRAM is also used in the successor to the GameCube, the <a href="/wiki/Wii" title="Wii">Wii</a>. </p><p>This is not the same as <a href="/wiki/1T_DRAM" class="mw-redirect" title="1T DRAM">1T DRAM</a>, which is a "capacitorless" DRAM cell built using the parasitic channel capacitor of <a href="/wiki/Silicon_on_Insulator" class="mw-redirect" title="Silicon on Insulator">SOI</a> transistors rather than a discrete capacitor. </p><p>MoSys claims the following sizes for 1T-SRAM arrays: </p> <table class="wikitable" style="text-align:right;"> <caption>1T-SRAM Cell sizes (μm²/bit or mm²/Mbit) </caption> <tbody><tr> <th colspan="2"><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Process node</a></th> <th>250 nm</th> <th>180 nm</th> <th>130 nm</th> <th>90 nm</th> <th>65 nm</th> <th>45 nm </th></tr> <tr> <th rowspan="2">6T-SRAM</th> <th>bit cell </th> <td>7.56</td> <td>4.65</td> <td>2.43</td> <td>1.36</td> <td>0.71</td> <td>0.34 </td></tr> <tr> <th>with overhead </th> <td>11.28</td> <td>7.18</td> <td>3.73</td> <td>2.09</td> <td>1.09</td> <td>0.52 </td></tr> <tr> <th rowspan="2">1T-SRAM</th> <th>bit cell </th> <td>3.51</td> <td>1.97</td> <td>1.10</td> <td>0.61</td> <td>0.32</td> <td>0.15 </td></tr> <tr> <th>with overhead </th> <td>7.0</td> <td>3.6</td> <td>1.9</td> <td>1.1</td> <td>0.57</td> <td>0.28 </td></tr> <tr> <th rowspan="2">1T-SRAM-Q</th> <th>bit cell </th> <td></td> <td></td> <td>0.50</td> <td>0.28</td> <td>0.15</td> <td>0.07 </td></tr> <tr> <th>with overhead </th> <td></td> <td></td> <td>1.05</td> <td>0.55</td> <td>0.29</td> <td>0.14 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=1T-SRAM&action=edit&section=3" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><a rel="nofollow" class="external text" href="https://patents.google.com/patent/US7146454">US Patent 7,146,454</a>"Hiding refresh in 1T-SRAM Architecture"* (by <a href="/wiki/Cypress_Semiconductor" title="Cypress Semiconductor">Cypress Semiconductor</a>) describes a similar system for hiding DRAM refresh using an SRAM cache. </p> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=1T-SRAM&action=edit&section=4" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFGlaskowsky1999" class="citation journal cs1">Glaskowsky, Peter N. (1999-09-13). <a rel="nofollow" class="external text" href="http://pages.cs.wisc.edu/~david/courses/cs838/reader/mpr01.pdf">"MoSys Explains 1T-SRAM Technology: Unique Architecture Hides Refresh, Makes DRAM Work Like SRAM"</a> <span class="cs1-format">(PDF)</span>. <i>Microprocessor Report</i>. <b>13</b> (12)<span class="reference-accessdate">. Retrieved <span class="nowrap">2007-10-06</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Microprocessor+Report&rft.atitle=MoSys+Explains+1T-SRAM+Technology%3A+Unique+Architecture+Hides+Refresh%2C+Makes+DRAM+Work+Like+SRAM&rft.volume=13&rft.issue=12&rft.date=1999-09-13&rft.aulast=Glaskowsky&rft.aufirst=Peter+N.&rft_id=http%3A%2F%2Fpages.cs.wisc.edu%2F~david%2Fcourses%2Fcs838%2Freader%2Fmpr01.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3A1T-SRAM" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFJones2003" class="citation report cs1">Jones, Mark-Eric (2003-10-14). <a rel="nofollow" class="external text" href="http://csserver.evansville.edu/~mr56/cs838/Paper16.pdf">1T-SRAM-Q: Quad-Density Technology Reins in Spiraling Memory Requirements</a> <span class="cs1-format">(PDF)</span> (Report). MoSys, Inc<span class="reference-accessdate">. Retrieved <span class="nowrap">2007-10-06</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=report&rft.btitle=1T-SRAM-Q%3A+Quad-Density+Technology+Reins+in+Spiraling+Memory+Requirements&rft.pub=MoSys%2C+Inc.&rft.date=2003-10-14&rft.aulast=Jones&rft.aufirst=Mark-Eric&rft_id=http%3A%2F%2Fcsserver.evansville.edu%2F~mr56%2Fcs838%2FPaper16.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3A1T-SRAM" class="Z3988"></span></li> <li><a rel="nofollow" class="external text" href="http://www.MoSys.com">MoSys homepage</a></li> <li><a rel="nofollow" class="external text" href="https://patents.google.com/patent/US6256248B1/en">US Patent 6,256,248</a> shows the DRAM array at the heart of 1T-SRAM.</li> <li><a rel="nofollow" class="external text" href="https://patents.google.com/patent/US6487135B2/en">US Patent 6,487,135</a> uses the term "1T DRAM" to describe the innards of 1T-SRAM.</li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFYouths2002" class="citation news cs1">Youths, Techfor (2002-12-16). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20190720145248/https://techforyouths.com/1-t-sram-macros-are-preconfigured-for-fast-integration-in-soc-designs/">"1-T SRAM macros are preconfigured for fast integration in SoC designs"</a>. Archived from <a rel="nofollow" class="external text" href="https://techforyouths.com/1-t-sram-macros-are-preconfigured-for-fast-integration-in-soc-designs/">the original</a> on 2019-07-20<span class="reference-accessdate">. Retrieved <span class="nowrap">2020-08-21</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=1-T+SRAM+macros+are+preconfigured+for+fast+integration+in+SoC+designs&rft.date=2002-12-16&rft.aulast=Youths&rft.aufirst=Techfor&rft_id=https%3A%2F%2Ftechforyouths.com%2F1-t-sram-macros-are-preconfigured-for-fast-integration-in-soc-designs%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3A1T-SRAM" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFCataldo2002" class="citation news cs1">Cataldo, Anthony (2002-12-16). <a rel="nofollow" class="external text" href="http://www.eetimes.com/story/OEG20021216S0028">"NEC, Mosys push bounds of embedded DRAM"</a>. <i>EE Times</i>. <a href="/wiki/ISSN_(identifier)" class="mw-redirect" title="ISSN (identifier)">ISSN</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/issn/0192-1541">0192-1541</a><span class="reference-accessdate">. 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