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Complex programmable logic device - Wikipedia
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class="mw-page-title-main">Complex programmable logic device</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. 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data-title="Сложно програмируемо логическо устройство" data-language-autonym="Български" data-language-local-name="Bulgarian" class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Dispositiu_l%C3%B2gic_programable_complex" title="Dispositiu lògic programable complex – Catalan" lang="ca" hreflang="ca" data-title="Dispositiu lògic programable complex" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Complex_Programmable_Logic_Device" title="Complex Programmable Logic Device – German" lang="de" hreflang="de" data-title="Complex Programmable Logic Device" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/CPLD" title="CPLD – Spanish" lang="es" hreflang="es" data-title="CPLD" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Circuit_logique_programmable#CPLD" title="Circuit logique programmable – French" lang="fr" hreflang="fr" data-title="Circuit logique programmable" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EB%B3%B5%ED%95%A9_%ED%94%84%EB%A1%9C%EA%B7%B8%EB%9E%98%EB%A8%B8%EB%B8%94_%EB%85%BC%EB%A6%AC_%EC%86%8C%EC%9E%90" title="복합 프로그래머블 논리 소자 – Korean" lang="ko" hreflang="ko" data-title="복합 프로그래머블 논리 소자" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Complex_Programmable_Logic_Device" title="Complex Programmable Logic Device – Italian" lang="it" hreflang="it" data-title="Complex Programmable Logic Device" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Complex_programmable_logic_device" title="Complex programmable logic device – Dutch" lang="nl" hreflang="nl" data-title="Complex programmable logic device" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/CPLD" title="CPLD – Japanese" lang="ja" hreflang="ja" data-title="CPLD" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/CPLD" title="CPLD – Polish" lang="pl" hreflang="pl" data-title="CPLD" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Dispositivo_l%C3%B3gico_complexo_program%C3%A1vel" title="Dispositivo lógico complexo programável – Portuguese" lang="pt" hreflang="pt" data-title="Dispositivo lógico complexo programável" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/CPLD" title="CPLD – Russian" lang="ru" hreflang="ru" data-title="CPLD" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Complex_programmable_logic_device" title="Complex programmable logic device – Slovak" lang="sk" hreflang="sk" data-title="Complex programmable logic device" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Complex_programmable_logic_device" title="Complex programmable logic device – Swedish" lang="sv" hreflang="sv" data-title="Complex programmable logic device" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/CPLD" title="CPLD – Ukrainian" lang="uk" hreflang="uk" data-title="CPLD" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-vi mw-list-item"><a href="https://vi.wikipedia.org/wiki/CPLD" title="CPLD – Vietnamese" lang="vi" hreflang="vi" data-title="CPLD" data-language-autonym="Tiếng Việt" data-language-local-name="Vietnamese" class="interlanguage-link-target"><span>Tiếng Việt</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/%E8%A4%87%E9%9B%9C%E5%8F%AF%E7%A8%8B%E5%BC%8F%E5%8C%96%E9%82%8F%E8%BC%AF%E8%A3%9D%E7%BD%AE" title="複雜可程式化邏輯裝置 – Chinese" lang="zh" hreflang="zh" data-title="複雜可程式化邏輯裝置" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span 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Unsourced material may be challenged and removed.<br /><small><span class="plainlinks"><i>Find sources:</i> <a rel="nofollow" class="external text" href="https://www.google.com/search?as_eq=wikipedia&q=%22Complex+programmable+logic+device%22">"Complex programmable logic device"</a> – <a rel="nofollow" class="external text" href="https://www.google.com/search?tbm=nws&q=%22Complex+programmable+logic+device%22+-wikipedia&tbs=ar:1">news</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?&q=%22Complex+programmable+logic+device%22&tbs=bkt:s&tbm=bks">newspapers</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?tbs=bks:1&q=%22Complex+programmable+logic+device%22+-wikipedia">books</a> <b>·</b> <a rel="nofollow" class="external text" href="https://scholar.google.com/scholar?q=%22Complex+programmable+logic+device%22">scholar</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.jstor.org/action/doBasicSearch?Query=%22Complex+programmable+logic+device%22&acc=on&wc=on">JSTOR</a></span></small></span> <span class="date-container"><i>(<span class="date">November 2013</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Type of electronic component</div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:Altera_MAX_7128_2500_gate_CPLD.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/a/a3/Altera_MAX_7128_2500_gate_CPLD.jpg/300px-Altera_MAX_7128_2500_gate_CPLD.jpg" decoding="async" width="300" height="243" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/a/a3/Altera_MAX_7128_2500_gate_CPLD.jpg/450px-Altera_MAX_7128_2500_gate_CPLD.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/a/a3/Altera_MAX_7128_2500_gate_CPLD.jpg/600px-Altera_MAX_7128_2500_gate_CPLD.jpg 2x" data-file-width="1479" data-file-height="1200" /></a><figcaption>An <a href="/wiki/Altera" title="Altera">Altera</a> MAX 7000-series CPLD with 2500 gates.</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Altera-epm7032-HD.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/63/Altera-epm7032-HD.jpg/220px-Altera-epm7032-HD.jpg" decoding="async" width="220" height="146" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/63/Altera-epm7032-HD.jpg/330px-Altera-epm7032-HD.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/63/Altera-epm7032-HD.jpg/440px-Altera-epm7032-HD.jpg 2x" data-file-width="4320" data-file-height="2864" /></a><figcaption><a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">Die</a> of an <a href="/wiki/Altera" title="Altera">Altera</a> EPM7032 <a href="/wiki/EEPROM" title="EEPROM">EEPROM</a>-based Complex Programmable Logic Device (CPLD). Die size 3446x2252 μm. Technology node 1 μm.</figcaption></figure> <p>A <b>complex programmable logic device</b> (<b>CPLD</b>) is a <a href="/wiki/Programmable_logic_device" title="Programmable logic device">programmable logic device</a> with complexity between that of <a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PALs</a> and <a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGAs</a>, and architectural features of both. The main building block of the CPLD is a <a href="/wiki/Macrocell_array" title="Macrocell array">macrocell</a>, which contains logic implementing <a href="/wiki/Disjunctive_normal_form" title="Disjunctive normal form">disjunctive normal form</a> expressions and more specialized logic operations. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Features">Features</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Complex_programmable_logic_device&action=edit&section=1" title="Edit section: Features"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Some of the CPLD features are in common with <a href="/wiki/Programmable_array_logic" class="mw-redirect" title="Programmable array logic">PALs</a>: </p> <ul><li>Non-volatile configuration memory. Unlike many FPGAs, an external configuration <a href="/wiki/Read-only_memory" title="Read-only memory">ROM</a> is not required, and the CPLD can function immediately on system start-up.</li> <li>For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic. This is usually not a factor for larger CPLDs and newer CPLD product families.</li></ul> <p>Other features are in common with <a href="/wiki/Field_programmable_gate_array" class="mw-redirect" title="Field programmable gate array">FPGAs</a>: </p> <ul><li>Large number of gates available. CPLDs typically have the equivalent of thousands to tens of thousands of <a href="/wiki/Logic_gate" title="Logic gate">logic gates</a>, allowing implementation of moderately complicated data processing devices. PALs typically have a few hundred gate equivalents at most, while FPGAs typically range from tens of thousands to several million.</li> <li>Some provisions for logic more flexible than <a href="/wiki/Disjunctive_normal_form" title="Disjunctive normal form">sum-of-product</a> expressions, including complicated feedback paths between macro cells, and specialized logic for implementing various commonly used functions, such as <a href="/wiki/Integer" title="Integer">integer</a> <a href="/wiki/Arithmetic" title="Arithmetic">arithmetic</a>.</li></ul> <p>The most noticeable difference between a large CPLD and a small FPGA is the presence of on-chip non-volatile memory in the CPLD, which allows CPLDs to be used for "<a href="/wiki/Boot_loader" class="mw-redirect" title="Boot loader">boot loader</a>" functions, before handing over control to other devices not having their own permanent program storage. A good example is where a CPLD is used to load configuration data for an FPGA from non-volatile memory.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Distinctions">Distinctions</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Complex_programmable_logic_device&action=edit&section=2" title="Edit section: Distinctions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>CPLDs were an evolutionary step from even smaller devices that preceded them: <a href="/wiki/Programmable_logic_array" title="Programmable logic array">PLAs</a> (first shipped by <a href="/wiki/Signetics" title="Signetics">Signetics</a>) and <a href="/wiki/Programmable_array_logic" class="mw-redirect" title="Programmable array logic">PALs</a>. These in turn were preceded by <a href="/wiki/Logic_family" title="Logic family">standard logic</a> products, which offered no programmability and were used to build logic functions by physically wiring several standard logic chips (or hundreds of them) together (usually with wiring on a printed circuit board or boards, but sometimes, especially for prototyping, using <a href="/wiki/Wire_wrap" title="Wire wrap">wire wrap</a> wiring). </p><p>The main distinction between FPGA and CPLD device architectures is that CPLDs are internally based on a collection of PLDs accompanied by a programmable interconnection structure, while FPGAs use <a href="/wiki/Logic_block" title="Logic block">logic blocks</a>. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Complex_programmable_logic_device&action=edit&section=3" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Language: <ul><li><a href="/wiki/VHSIC_Hardware_Description_Language" class="mw-redirect" title="VHSIC Hardware Description Language">VHSIC Hardware Description Language</a> (VHDL)</li> <li><a href="/wiki/Verilog" title="Verilog">Verilog Hardware Description Language</a></li> <li><a href="/wiki/Standard_Test_and_Programming_Language" title="Standard Test and Programming Language">Standard Test and Programming Language</a> (JAM/STAPL)</li></ul></li> <li>Manufacturers: <ul><li><a href="/wiki/Altera" title="Altera">Altera</a> (Now Intel)</li> <li><a href="/wiki/Cypress_Semiconductor" title="Cypress Semiconductor">Cypress Semiconductor</a></li> <li><a href="/wiki/Lattice_Semiconductor" title="Lattice Semiconductor">Lattice Semiconductor</a></li> <li><a href="/wiki/Microchip_Technology" title="Microchip Technology">Microchip Technology</a> (formerly <a href="/wiki/Actel" title="Actel">Actel</a>)</li> <li><a href="/wiki/Xilinx" title="Xilinx">Xilinx</a> (Now AMD)</li></ul></li> <li>Technology: <ul><li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">Application-specific integrated circuit</a> (ASIC)</li> <li><a href="/wiki/Erasable_programmable_logic_device" class="mw-redirect" title="Erasable programmable logic device">Erasable programmable logic device</a> (EPLD)</li> <li><a href="/wiki/Simple_programmable_logic_device" title="Simple programmable logic device">Simple programmable logic device</a> (SPLD)</li> <li><a href="/wiki/Macrocell_array" title="Macrocell array">Macrocell array</a></li> <li><a href="/wiki/Programmable_array_logic" class="mw-redirect" title="Programmable array logic">Programmable array logic</a> (PAL)</li> <li><a href="/wiki/Programmable_logic_array" title="Programmable logic array">Programmable logic array</a> (PLA)</li> <li><a href="/wiki/Programmable_logic_device" title="Programmable logic device">Programmable logic device</a> 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.mw-parser-output .navbox{display:none!important}}</style></div><div role="navigation" class="navbox" aria-labelledby="Programmable_logic" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><style data-mw-deduplicate="TemplateStyles:r1239400231">.mw-parser-output .navbar{display:inline;font-size:88%;font-weight:normal}.mw-parser-output .navbar-collapse{float:left;text-align:left}.mw-parser-output .navbar-boxtext{word-spacing:0}.mw-parser-output .navbar ul{display:inline-block;white-space:nowrap;line-height:inherit}.mw-parser-output .navbar-brackets::before{margin-right:-0.125em;content:"[ "}.mw-parser-output .navbar-brackets::after{margin-left:-0.125em;content:" ]"}.mw-parser-output .navbar li{word-spacing:-0.125em}.mw-parser-output .navbar a>span,.mw-parser-output .navbar a>abbr{text-decoration:inherit}.mw-parser-output .navbar-mini abbr{font-variant:small-caps;border-bottom:none;text-decoration:none;cursor:inherit}.mw-parser-output .navbar-ct-full{font-size:114%;margin:0 7em}.mw-parser-output .navbar-ct-mini{font-size:114%;margin:0 4em}html.skin-theme-clientpref-night .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}@media(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Programmable_logic" title="Template:Programmable logic"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Programmable_logic" title="Template talk:Programmable logic"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Programmable_logic" title="Special:EditPage/Template:Programmable logic"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Programmable_logic" style="font-size:114%;margin:0 4em"><a href="/wiki/Programmable_logic_device" title="Programmable logic device">Programmable logic</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Concepts</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/System_on_a_chip" title="System on a chip">SoC</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a> <ul><li><a href="/wiki/Logic_block" title="Logic block">Logic block</a></li></ul></li> <li><a class="mw-selflink selflink">CPLD</a></li> <li><a href="/wiki/Programmable_logic_device#EPLDs" title="Programmable logic device">EPLD</a></li> <li><a href="/wiki/Programmable_logic_array" title="Programmable logic array">PLA</a></li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li> <li><a href="/wiki/Generic_array_logic" class="mw-redirect" title="Generic array logic">GAL</a></li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">PSoC</a></li> <li><a href="/wiki/Reconfigurable_computing" title="Reconfigurable computing">Reconfigurable computing</a> <ul><li><a href="/wiki/Xputer" title="Xputer">Xputer</a></li></ul></li> <li><a href="/wiki/Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li> <li><a href="/wiki/Circuit_underutilization" title="Circuit underutilization">Circuit underutilization</a></li> <li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a></li> <li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_description_language" title="Hardware description language">Languages</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Verilog" title="Verilog">Verilog</a> <ul><li><a href="/wiki/Verilog-A" title="Verilog-A">A</a></li> <li><a href="/wiki/Verilog-AMS" title="Verilog-AMS">AMS</a></li></ul></li> <li><a href="/wiki/VHDL" title="VHDL">VHDL</a> <ul><li><a href="/wiki/VHDL-AMS" title="VHDL-AMS">AMS</a></li> <li><a href="/wiki/VHDL-VITAL" title="VHDL-VITAL">VITAL</a></li></ul></li> <li><a href="/wiki/SystemVerilog" title="SystemVerilog">SystemVerilog</a> <ul><li><a href="/wiki/SystemVerilog_DPI" title="SystemVerilog DPI">DPI</a></li></ul></li> <li><a href="/wiki/SystemC" title="SystemC">SystemC</a></li> <li><a href="/wiki/Altera_Hardware_Description_Language" title="Altera Hardware Description Language">AHDL</a></li> <li><a href="/wiki/Handel-C" title="Handel-C">Handel-C</a></li> <li><a href="/wiki/Lola_(computing)" title="Lola (computing)">Lola</a></li> <li><a href="/wiki/Property_Specification_Language" title="Property Specification Language">PSL</a></li> <li><a href="/wiki/Unified_Power_Format" title="Unified Power Format">UPF</a></li> <li><a href="/wiki/PALASM" title="PALASM">PALASM</a></li> <li><a href="/wiki/Advanced_Boolean_Expression_Language" title="Advanced Boolean Expression Language">ABEL</a></li> <li><a href="/wiki/Programmable_Array_Logic#CUPL" title="Programmable Array Logic">CUPL</a></li> <li><a href="/wiki/C_to_HDL" title="C to HDL">C to HDL</a></li> <li><a href="/wiki/Flow_to_HDL" title="Flow to HDL">Flow to HDL</a></li> <li><a href="/wiki/MyHDL" title="MyHDL">MyHDL</a></li> <li><a href="/wiki/ELLA_(programming_language)" title="ELLA (programming language)">ELLA</a></li> <li><a href="/wiki/Chisel_(programming_language)" title="Chisel (programming language)">Chisel</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Companies</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Accellera" title="Accellera">Accellera</a></li> <li><a href="/wiki/Achronix" title="Achronix">Achronix</a></li> <li><a href="/wiki/AMD" title="AMD">AMD</a></li> <li><a href="/wiki/Aldec" title="Aldec">Aldec</a></li> <li><a href="/wiki/Arm_Holdings" title="Arm Holdings">Arm</a></li> <li><a href="/wiki/Cadence_Design_Systems" title="Cadence Design Systems">Cadence</a></li> <li><a href="/wiki/Infineon_Technologies" title="Infineon Technologies">Infineon</a></li> <li><a href="/wiki/Intel" title="Intel">Intel</a></li> <li><a href="/wiki/Lattice_Semiconductor" title="Lattice Semiconductor">Lattice</a></li> <li><a href="/wiki/Microchip_Technology" title="Microchip Technology">Microchip Technology</a></li> <li><a href="/wiki/NXP_Semiconductors" title="NXP Semiconductors">NXP</a></li> <li><a href="/wiki/Siemens" title="Siemens">Siemens</a></li> <li><a href="/wiki/Synopsys" title="Synopsys">Synopsys</a></li> <li><a href="/wiki/Texas_Instruments" title="Texas Instruments">Texas Instruments</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Hardware</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ICE_(FPGA)" title="ICE (FPGA)">iCE</a></li> <li><a href="/wiki/Stratix" title="Stratix">Stratix</a></li> <li><a href="/wiki/Virtex_(FPGA)" title="Virtex (FPGA)">Virtex</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Software</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Quartus_Prime" title="Intel Quartus Prime">Intel Quartus Prime</a></li> <li><a href="/wiki/Xilinx_ISE" title="Xilinx ISE">Xilinx ISE</a></li> <li><a href="/wiki/Vivado" title="Vivado">Vivado</a></li> <li><a href="/wiki/ModelSim" title="ModelSim">ModelSim</a></li> <li><a href="/wiki/Verilog-to-Routing" title="Verilog-to-Routing">VTR</a></li> <li><a href="/wiki/List_of_HDL_simulators" title="List of HDL simulators">Simulators</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Intellectual_property" title="Intellectual property">Intellectual<br />property</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Proprietary_hardware" title="Proprietary hardware">Proprietary</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ARC_(processor)" title="ARC (processor)">ARC</a></li> <li><a href="/wiki/ARM_Cortex-M" title="ARM Cortex-M">ARM Cortex-M</a></li> <li><a href="/wiki/LEON" title="LEON">LEON</a></li> <li><a href="/wiki/LatticeMico8" title="LatticeMico8">LatticeMico8</a></li> <li><a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a></li> <li><a href="/wiki/PicoBlaze" title="PicoBlaze">PicoBlaze</a></li> <li><a href="/wiki/Nios_embedded_processor" title="Nios embedded processor">Nios</a></li> <li><a href="/wiki/Nios_II" title="Nios II">Nios II</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Open-source_hardware" title="Open-source hardware">Open-source</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Java_Optimized_Processor" title="Java Optimized Processor">JOP</a></li> <li><a href="/wiki/LatticeMico32" title="LatticeMico32">LatticeMico32</a></li> <li><a href="/wiki/OpenCores" title="OpenCores">OpenCores</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a> <ul><li><a href="/wiki/OpenRISC_1200" title="OpenRISC 1200">1200</a></li></ul></li> <li><a href="/wiki/Power_ISA" title="Power ISA">Power ISA</a> <ul><li><a href="/wiki/Libre-SOC" title="Libre-SOC">Libre-SOC</a></li> <li><a href="/wiki/OpenPOWER_Microwatt" title="OpenPOWER Microwatt">Microwatt</a></li></ul></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Digital_electronics" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Digital_electronics" title="Template:Digital electronics"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Digital_electronics" title="Template talk:Digital electronics"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Digital_electronics" title="Special:EditPage/Template:Digital electronics"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Digital_electronics" style="font-size:114%;margin:0 4em"><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Electronic_component" title="Electronic component">Components</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transistor" title="Transistor">Transistor</a></li> <li><a href="/wiki/Resistor" title="Resistor">Resistor</a></li> <li><a href="/wiki/Inductor" title="Inductor">Inductor</a></li> <li><a href="/wiki/Capacitor" title="Capacitor">Capacitor</a></li> <li><a href="/wiki/Printed_electronics" title="Printed electronics">Printed electronics</a></li> <li><a href="/wiki/Printed_circuit_board" title="Printed circuit board">Printed circuit board</a></li> <li><a href="/wiki/Electronic_circuit" title="Electronic circuit">Electronic circuit</a></li> <li><a href="/wiki/Flip-flop_(electronics)" title="Flip-flop (electronics)">Flip-flop</a></li> <li><a href="/wiki/Memory_cell_(computing)" title="Memory cell (computing)">Memory cell</a></li> <li><a href="/wiki/Combinational_logic" title="Combinational logic">Combinational logic</a></li> <li><a href="/wiki/Sequential_logic" title="Sequential logic">Sequential logic</a></li> <li><a href="/wiki/Logic_gate" title="Logic gate">Logic gate</a></li> <li><a href="/wiki/Boolean_circuit" title="Boolean circuit">Boolean circuit</a></li> <li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> (IC)</li> <li><a href="/wiki/Hybrid_integrated_circuit" title="Hybrid integrated circuit">Hybrid integrated circuit</a> (HIC)</li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal integrated circuit</a></li> <li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">Three-dimensional integrated circuit</a> (3D IC)</li> <li><a href="/wiki/Emitter-coupled_logic" title="Emitter-coupled logic">Emitter-coupled logic</a> (ECL)</li> <li><a href="/wiki/Erasable_programmable_logic_device" class="mw-redirect" title="Erasable programmable logic device">Erasable programmable logic device</a> (EPLD)</li> <li><a href="/wiki/Macrocell_array" title="Macrocell array">Macrocell array</a></li> <li><a href="/wiki/Programmable_logic_array" title="Programmable logic array">Programmable logic array</a> (PLA)</li> <li><a href="/wiki/Programmable_logic_device" title="Programmable logic device">Programmable logic device</a> (PLD)</li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">Programmable Array Logic</a> (PAL)</li> <li><a href="/wiki/Generic_Array_Logic" title="Generic Array Logic">Generic Array Logic</a> (GAL)</li> <li><a class="mw-selflink selflink">Complex programmable logic device</a> (CPLD)</li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">Field-programmable gate array</a> (FPGA)</li> <li><a href="/wiki/Field-programmable_object_array" title="Field-programmable object array">Field-programmable object array</a> (FPOA)</li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">Application-specific integrated circuit</a> (ASIC)</li> <li><a href="/wiki/Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Theory</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Digital_signal" title="Digital signal">Digital signal</a></li> <li><a href="/wiki/Boolean_algebra" title="Boolean algebra">Boolean algebra</a></li> <li><a href="/wiki/Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li> <li><a href="/wiki/Logic_in_computer_science" title="Logic in computer science">Logic in computer science</a></li> <li><a href="/wiki/Computer_architecture" title="Computer architecture">Computer architecture</a></li> <li><a href="/wiki/Digital_signal_(signal_processing)" title="Digital signal (signal processing)">Digital signal</a> <ul><li><a href="/wiki/Digital_signal_processing" title="Digital signal processing">Digital signal processing</a></li></ul></li> <li><a href="/wiki/Circuit_minimization_for_Boolean_functions" class="mw-redirect" title="Circuit minimization for Boolean functions">Circuit minimization</a></li> <li><a href="/wiki/Switching_circuit_theory" title="Switching circuit theory">Switching circuit theory</a></li> <li><a href="/wiki/Gate_equivalent" title="Gate equivalent">Gate equivalent</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Electronics_design" class="mw-redirect" title="Electronics design">Design</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li> <li><a href="/wiki/Place_and_route" title="Place and route">Place and route</a> <ul><li><a href="/wiki/Placement_(electronic_design_automation)" title="Placement (electronic design automation)">Placement</a></li> <li><a href="/wiki/Routing_(electronic_design_automation)" title="Routing (electronic design automation)">Routing</a></li></ul></li> <li><a href="/wiki/Transaction-level_modeling" title="Transaction-level modeling">Transaction-level modeling</a></li> <li><a href="/wiki/Register-transfer_level" title="Register-transfer level">Register-transfer level</a> <ul><li><a href="/wiki/Hardware_description_language" title="Hardware description language">Hardware description language</a></li> <li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a></li></ul></li> <li><a href="/wiki/Formal_equivalence_checking" title="Formal equivalence checking">Formal equivalence checking</a></li> <li><a href="/wiki/Synchronous_circuit" title="Synchronous circuit">Synchronous logic</a></li> <li><a href="/wiki/Asynchronous_circuit" title="Asynchronous circuit">Asynchronous logic</a></li> <li><a href="/wiki/Finite-state_machine" title="Finite-state machine">Finite-state machine</a> <ul><li><a href="/wiki/Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical state machine</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Applications</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Computer_hardware" title="Computer hardware">Computer hardware</a> <ul><li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul></li> <li><a href="/wiki/Digital_audio" title="Digital audio">Digital audio</a> <ul><li><a href="/wiki/Digital_radio" title="Digital radio">radio</a></li></ul></li> <li><a href="/wiki/Digital_photography" title="Digital photography">Digital photography</a></li> <li><a href="/wiki/Telephony#Digital_telephony" title="Telephony">Digital telephone</a></li> <li><a href="/wiki/Digital_video" title="Digital video">Digital video</a> <ul><li><a href="/wiki/Digital_cinematography" title="Digital cinematography">cinematography</a></li> <li><a href="/wiki/Digital_television" title="Digital television">television</a></li></ul></li> <li><a href="/wiki/Electronic_literature" title="Electronic literature">Electronic literature</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Design issues</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Metastability_(electronics)" title="Metastability (electronics)">Metastability</a></li> <li><a href="/wiki/Runt_pulse" title="Runt pulse">Runt pulse</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Hardware_acceleration" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Hardware_acceleration" title="Template:Hardware acceleration"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Hardware_acceleration" title="Template talk:Hardware acceleration"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Hardware_acceleration" title="Special:EditPage/Template:Hardware acceleration"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Hardware_acceleration" style="font-size:114%;margin:0 4em"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Models_of_computation" class="mw-redirect" title="Models of computation">Theory</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal Turing machine</a></li> <li><a href="/wiki/Parallel_computing" title="Parallel computing">Parallel computing</a></li> <li><a href="/wiki/Distributed_computing" title="Distributed computing">Distributed computing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Applications</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">GPU</a> <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li> <li><a href="/wiki/DirectX_Video_Acceleration" title="DirectX Video Acceleration">DirectX</a></li></ul></li> <li><a href="/wiki/Sound_card" title="Sound card">Audio</a></li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processing</a></li> <li><a href="/wiki/Hardware_random_number_generator" title="Hardware random number generator">Hardware random number generation</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">Artificial intelligence</a></li> <li><a href="/wiki/Cryptographic_accelerator" title="Cryptographic accelerator">Cryptography</a> <ul><li><a href="/wiki/TLS_acceleration" title="TLS acceleration">TLS</a></li></ul></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Machine vision</a></li> <li><a href="/wiki/Custom_hardware_attack" title="Custom hardware attack">Custom hardware attack</a> <ul><li><a href="/wiki/Scrypt" title="Scrypt">scrypt</a></li></ul></li> <li><a href="/wiki/Network_processor" title="Network processor">Networking</a></li> <li><a href="/wiki/Data_processing_unit" title="Data processing unit">Data</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Implementations</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a> <ul><li><a href="/wiki/C_to_HDL" title="C to HDL">C to HDL</a></li></ul></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a class="mw-selflink selflink">CPLD</a></li> <li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> <ul><li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architectures</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport triggered</a></li> <li><a href="/wiki/Multicore" class="mw-redirect" title="Multicore">Multicore</a></li> <li><a href="/wiki/Manycore" class="mw-redirect" title="Manycore">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous</a></li> <li><a href="/wiki/In-memory_processing" title="In-memory processing">In-memory computing</a></li> <li><a href="/wiki/Systolic_array" title="Systolic array">Systolic array</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Programmable_logic" class="mw-redirect" title="Programmable logic">Programmable logic</a></li> <li><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor</a> <ul><li><a href="/wiki/Processor_design" title="Processor design">design</a></li> <li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">chronology</a></li></ul></li> <li><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></li> <li><a href="/wiki/Virtualization" title="Virtualization">Virtualization</a> <ul><li><a href="/wiki/Hardware_emulation" title="Hardware emulation">Hardware emulation</a></li></ul></li> <li><a href="/wiki/Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li> <li><a href="/wiki/Embedded_system" title="Embedded system">Embedded systems</a></li></ul> </div></td></tr></tbody></table></div> <!-- NewPP limit report Parsed by mw‐web.eqiad.main‐7b4fbf584f‐5hxs4 Cached time: 20241218031048 Cache expiry: 2592000 Reduced expiry: false Complications: [vary‐revision‐sha1, show‐toc] CPU time usage: 0.315 seconds Real time usage: 0.434 seconds Preprocessor visited node count: 754/1000000 Post‐expand include size: 60655/2097152 bytes Template argument size: 990/2097152 bytes Highest expansion depth: 13/100 Expensive parser function count: 2/500 Unstrip recursion depth: 1/20 Unstrip post‐expand size: 32361/5000000 bytes Lua time usage: 0.205/10.000 seconds Lua memory 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