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class="vector-toc-numb">2</span> <span>Single-core desktop processors</span> </div> </a> <button aria-controls="toc-Single-core_desktop_processors-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Single-core desktop processors subsection</span> </button> <ul id="toc-Single-core_desktop_processors-sublist" class="vector-toc-list"> <li id="toc-Athlon_64" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_64"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>Athlon 64</span> </div> </a> <ul id="toc-Athlon_64-sublist" class="vector-toc-list"> <li id="toc-"ClawHammer"_(C0_&_CG,_130_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"ClawHammer"_(C0_&_CG,_130_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.1</span> <span>"ClawHammer" (C0 & CG, 130 nm)</span> </div> </a> <ul id="toc-"ClawHammer"_(C0_&_CG,_130_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Newcastle"_(CG,_130_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Newcastle"_(CG,_130_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.2</span> <span>"Newcastle" (CG, 130 nm)</span> </div> </a> <ul id="toc-"Newcastle"_(CG,_130_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Winchester"_(D0,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Winchester"_(D0,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.3</span> <span>"Winchester" (D0, 90 nm)</span> </div> </a> <ul id="toc-"Winchester"_(D0,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Venice"_(E3_&_E6,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Venice"_(E3_&_E6,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.4</span> <span>"Venice" (E3 & E6, 90 nm)</span> </div> </a> <ul id="toc-"Venice"_(E3_&_E6,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Manchester"_(E4,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Manchester"_(E4,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.5</span> <span>"Manchester" (E4, 90 nm)</span> </div> </a> <ul id="toc-"Manchester"_(E4,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"San_Diego"_(E4,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"San_Diego"_(E4,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.6</span> <span>"San Diego" (E4, 90 nm)</span> </div> </a> <ul id="toc-"San_Diego"_(E4,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Toledo"_(E6,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Toledo"_(E6,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.7</span> <span>"Toledo" (E6, 90 nm)</span> </div> </a> <ul id="toc-"Toledo"_(E6,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Orleans"_(F2_&_F3,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Orleans"_(F2_&_F3,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.8</span> <span>"Orleans" (F2 & F3, 90 nm)</span> </div> </a> <ul id="toc-"Orleans"_(F2_&_F3,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Lima"_(G1_&_G2,_65_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Lima"_(G1_&_G2,_65_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.9</span> <span>"Lima" (G1 & G2, 65 nm)</span> </div> </a> <ul id="toc-"Lima"_(G1_&_G2,_65_nm)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Athlon_64_FX" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_64_FX"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2</span> <span>Athlon 64 FX</span> </div> </a> <ul id="toc-Athlon_64_FX-sublist" class="vector-toc-list"> <li id="toc-"SledgeHammer"_(C0_&_CG,_130_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"SledgeHammer"_(C0_&_CG,_130_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2.1</span> <span>"SledgeHammer" (C0 & CG, 130 nm)</span> </div> </a> <ul id="toc-"SledgeHammer"_(C0_&_CG,_130_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"ClawHammer"_(CG,_130_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"ClawHammer"_(CG,_130_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2.2</span> <span>"ClawHammer" (CG, 130 nm)</span> </div> </a> <ul id="toc-"ClawHammer"_(CG,_130_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"San_Diego"_(E4,_90_nm)_2" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"San_Diego"_(E4,_90_nm)_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2.3</span> <span>"San Diego" (E4, 90 nm)</span> </div> </a> <ul id="toc-"San_Diego"_(E4,_90_nm)_2-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Dual-core_desktop_processors" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Dual-core_desktop_processors"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Dual-core desktop processors</span> </div> </a> <button aria-controls="toc-Dual-core_desktop_processors-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Dual-core desktop processors subsection</span> </button> <ul id="toc-Dual-core_desktop_processors-sublist" class="vector-toc-list"> <li id="toc-Athlon_64_X2" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_64_X2"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1</span> <span>Athlon 64 X2</span> </div> </a> <ul id="toc-Athlon_64_X2-sublist" class="vector-toc-list"> <li id="toc-"Manchester"_(E4,_90_nm)_2" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Manchester"_(E4,_90_nm)_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.1</span> <span>"Manchester" (E4, 90 nm)</span> </div> </a> <ul id="toc-"Manchester"_(E4,_90_nm)_2-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Toledo"_(E6,_90_nm)_2" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Toledo"_(E6,_90_nm)_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.2</span> <span>"Toledo" (E6, 90 nm)</span> </div> </a> <ul id="toc-"Toledo"_(E6,_90_nm)_2-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Windsor"_(F2_&_F3,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Windsor"_(F2_&_F3,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.3</span> <span>"Windsor" (F2 & F3, 90 nm)</span> </div> </a> <ul id="toc-"Windsor"_(F2_&_F3,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Brisbane"_(G1_&_G2,_65_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Brisbane"_(G1_&_G2,_65_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.4</span> <span>"Brisbane" (G1 & G2, 65 nm)</span> </div> </a> <ul id="toc-"Brisbane"_(G1_&_G2,_65_nm)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Athlon_X2" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_X2"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2</span> <span>Athlon X2</span> </div> </a> <ul id="toc-Athlon_X2-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Athlon_64_FX_2" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_64_FX_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3</span> <span>Athlon 64 FX</span> </div> </a> <ul id="toc-Athlon_64_FX_2-sublist" class="vector-toc-list"> <li id="toc-"Toledo"_(E6,_90_nm)_3" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Toledo"_(E6,_90_nm)_3"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3.1</span> <span>"Toledo" (E6, 90 nm)</span> </div> </a> <ul id="toc-"Toledo"_(E6,_90_nm)_3-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Windsor"_(F2,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Windsor"_(F2,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3.2</span> <span>"Windsor" (F2, 90 nm)</span> </div> </a> <ul id="toc-"Windsor"_(F2,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Windsor"_(Quad_FX_platform,_F3,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Windsor"_(Quad_FX_platform,_F3,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3.3</span> <span>"Windsor" (Quad FX platform, F3, 90 nm)</span> </div> </a> <ul id="toc-"Windsor"_(Quad_FX_platform,_F3,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Mobile_processors" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Mobile_processors"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Mobile processors</span> </div> </a> <button aria-controls="toc-Mobile_processors-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Mobile processors subsection</span> </button> <ul id="toc-Mobile_processors-sublist" class="vector-toc-list"> <li id="toc-Mobile_Athlon_64" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Mobile_Athlon_64"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1</span> <span>Mobile Athlon 64</span> </div> </a> <ul id="toc-Mobile_Athlon_64-sublist" class="vector-toc-list"> <li id="toc-"ClawHammer"_(C0_&_CG,_130_nm)_2" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"ClawHammer"_(C0_&_CG,_130_nm)_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1.1</span> <span>"ClawHammer" (C0 & CG, 130 nm)</span> </div> </a> <ul id="toc-"ClawHammer"_(C0_&_CG,_130_nm)_2-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Odessa"_(CG,_130_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Odessa"_(CG,_130_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1.2</span> <span>"Odessa" (CG, 130 nm)</span> </div> </a> <ul id="toc-"Odessa"_(CG,_130_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Oakville"_(D0,_90_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Oakville"_(D0,_90_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1.3</span> <span>"Oakville" (D0, 90 nm)</span> </div> </a> <ul id="toc-"Oakville"_(D0,_90_nm)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Newark"_(E5,_90_nm,_62W_TDP)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Newark"_(E5,_90_nm,_62W_TDP)"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1.4</span> <span>"Newark" (E5, 90 nm, 62W TDP)</span> </div> </a> <ul id="toc-"Newark"_(E5,_90_nm,_62W_TDP)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Athlon_Neo" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_Neo"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.2</span> <span>Athlon Neo</span> </div> </a> <ul id="toc-Athlon_Neo-sublist" class="vector-toc-list"> <li id="toc-"Huron"_(65_nm,_15W_TDP)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Huron"_(65_nm,_15W_TDP)"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.2.1</span> <span>"Huron" (65 nm, 15W TDP)</span> </div> </a> <ul id="toc-"Huron"_(65_nm,_15W_TDP)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-"Sherman"_(65_nm,_15W_TDP)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Sherman"_(65_nm,_15W_TDP)"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.2.2</span> <span>"Sherman" (65 nm, 15W TDP)</span> </div> </a> <ul id="toc-"Sherman"_(65_nm,_15W_TDP)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Athlon_Neo_X2" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Athlon_Neo_X2"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.3</span> <span>Athlon Neo X2</span> </div> </a> <ul id="toc-Athlon_Neo_X2-sublist" class="vector-toc-list"> <li id="toc-"Conesus"_(65_nm)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#"Conesus"_(65_nm)"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.3.1</span> <span>"Conesus" (65 nm)</span> </div> </a> <ul id="toc-"Conesus"_(65_nm)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Notes" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Notes"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Notes</span> </div> </a> <ul id="toc-Notes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Toggle the table of contents</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">List of AMD Athlon 64 processors</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. Available in 8 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-8" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">8 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Liste_der_AMD-Athlon-64-Prozessoren" title="Liste der AMD-Athlon-64-Prozessoren – German" lang="de" hreflang="de" data-title="Liste der AMD-Athlon-64-Prozessoren" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Anexo:Procesadores_AMD_Athlon_64" title="Anexo:Procesadores AMD Athlon 64 – Spanish" lang="es" hreflang="es" data-title="Anexo:Procesadores AMD Athlon 64" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Liste_des_microprocesseurs_AMD_Athlon_64" title="Liste des microprocesseurs AMD Athlon 64 – French" lang="fr" hreflang="fr" data-title="Liste des microprocesseurs AMD Athlon 64" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-pa mw-list-item"><a href="https://pa.wikipedia.org/wiki/%E0%A8%8F%E0%A8%90%E0%A9%B1%E0%A8%AE%E0%A8%A1%E0%A9%80_%E0%A8%90%E0%A8%82%E0%A8%A5%E0%A8%B2%E0%A9%8C%E0%A8%A8_64_%E0%A8%AA%E0%A9%8D%E0%A8%B0%E0%A9%8B%E0%A8%B8%E0%A9%88%E0%A8%B8%E0%A8%B0%E0%A8%BE%E0%A8%82_%E0%A8%A6%E0%A9%80_%E0%A8%B8%E0%A9%82%E0%A8%9A%E0%A9%80" title="ਏਐੱਮਡੀ ਐਂਥਲੌਨ 64 ਪ੍ਰੋਸੈਸਰਾਂ ਦੀ ਸੂਚੀ – Punjabi" lang="pa" hreflang="pa" data-title="ਏਐੱਮਡੀ ਐਂਥਲੌਨ 64 ਪ੍ਰੋਸੈਸਰਾਂ ਦੀ ਸੂਚੀ" data-language-autonym="ਪੰਜਾਬੀ" data-language-local-name="Punjabi" class="interlanguage-link-target"><span>ਪੰਜਾਬੀ</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Lista_procesor%C3%B3w_Athlon_64" title="Lista procesorów Athlon 64 – Polish" lang="pl" hreflang="pl" data-title="Lista procesorów Athlon 64" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/%D0%A1%D0%BF%D0%B8%D1%81%D0%BE%D0%BA_%D0%BC%D0%B8%D0%BA%D1%80%D0%BE%D0%BF%D1%80%D0%BE%D1%86%D0%B5%D1%81%D1%81%D0%BE%D1%80%D0%BE%D0%B2_Athlon_64" title="Список микропроцессоров Athlon 64 – Russian" lang="ru" hreflang="ru" data-title="Список микропроцессоров Athlon 64" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/%D0%A1%D0%BF%D0%B8%D1%81%D0%BE%D0%BA_%D0%BC%D1%96%D0%BA%D1%80%D0%BE%D0%BF%D1%80%D0%BE%D1%86%D0%B5%D1%81%D0%BE%D1%80%D1%96%D0%B2_AMD_Athlon_64" title="Список мікропроцесорів AMD Athlon 64 – Ukrainian" lang="uk" hreflang="uk" data-title="Список мікропроцесорів AMD Athlon 64" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh 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class="vector-body" aria-labelledby="firstHeading" data-mw-ve-target-container> <div class="vector-body-before-content"> <div class="mw-indicators"> </div> <div id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><p class="mw-empty-elt"> </p><p>The <a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> microprocessor from <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">Advanced Micro Devices</a> (AMD) is an eighth-generation <a href="/wiki/Central_processing_unit" title="Central processing unit">central processing unit</a> (CPU). Athlon 64 was targeted at the consumer market. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Features_overview">Features overview</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=1" title="Edit section: Features overview"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=">adding to it</a>. <span class="date-container"><i>(<span class="date">February 2024</span>)</i></span></div></td></tr></tbody></table> <p>Some features for Athlon 64 processors include:<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p> <ul><li>Use of <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> technology for I/O devices</li> <li><a href="/wiki/System_Management_Mode" title="System Management Mode">System Management Mode</a></li> <li><a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a> compatibility</li> <li>Integrated Memory Controller</li> <li>Cool'n'Quiet Technology</li> <li>Single and Dual-Core Options</li> <li>Scalability</li></ul> <div class="mw-heading mw-heading2"><h2 id="Single-core_desktop_processors">Single-core desktop processors</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=2" title="Edit section: Single-core desktop processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Athlon_64">Athlon 64</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=3" title="Edit section: Athlon 64"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><i>"<a href="/wiki/Code_name" title="Code name">Code name</a>" (<a href="/wiki/Stepping_level" title="Stepping level">Steppings</a>, <a href="/wiki/CMOS" title="CMOS">Process</a>)</i> </p> <div class="mw-heading mw-heading4"><h4 id=""ClawHammer"_(C0_&_CG,_130_nm)"><span id=".22ClawHammer.22_.28C0_.26_CG.2C_130_nm.29"></span>"ClawHammer" (C0 & CG, 130 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=4" title="Edit section: "ClawHammer" (C0 & CG, 130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(MHz)</th> <th><a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Multi</a><sup id="cite_ref-fn_1_2-0" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 2800+</td> <td>1.8</td> <td>512</td> <td>800</td> <td>9x</td> <td>1.50</td> <td>89</td> <td><a href="/wiki/Socket_754" title="Socket 754">754</a></td> <td>April 27, 2004</td> <td>ADA2800AEP4AP (C0)<br />ADA2800AEP4AR (CG)</td> <td>$178 </td></tr> <tr> <td>Athlon 64 3000+</td> <td>2.0</td> <td>512</td> <td>800</td> <td>10x</td> <td>1.50</td> <td>89</td> <td>754</td> <td>December 15, 2003</td> <td>ADA3000AEP4AP (C0)<br />ADA3000AEP4AR (CG)</td> <td>$218 </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.0</td> <td>1024</td> <td>800</td> <td>10x</td> <td>1.50</td> <td>89</td> <td>754</td> <td>September 23, 2003</td> <td>ADA3200AEP5AP (C0)<br />ADA3200AEP5AR (CG)</td> <td>$417 </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.2</td> <td>512</td> <td>800</td> <td>11x</td> <td>1.50</td> <td>89</td> <td>754</td> <td></td> <td>ADA3200AEP4AP (C0)<br />ADA3200AEP4AR (CG)</td> <td> </td></tr> <tr> <td>Athlon 64 3400+</td> <td>2.4</td> <td>512</td> <td>800</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>754</td> <td></td> <td>ADA3400AEP4AP (C0)<sup id="cite_ref-fn_4_3-0" class="reference"><a href="#cite_note-fn_4-3"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup><br />ADA3400AEP4AR (CG)</td> <td> </td></tr> <tr> <td>Athlon 64 3400+</td> <td>2.2</td> <td>1024</td> <td>800</td> <td>11x</td> <td>1.50</td> <td>89</td> <td>754</td> <td>January 6, 2004</td> <td>ADA3400AEP5AP (C0)<br />ADA3400AEP5AR (CG)</td> <td>$417 </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.50</td> <td>89</td> <td><a href="/wiki/Socket_939" title="Socket 939">939</a></td> <td>June 1, 2004</td> <td>ADA3500DEP4AS (CG)</td> <td>$500 </td></tr> <tr> <td>Athlon 64 3600+</td> <td>2.4</td> <td>1024</td> <td>800</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>754</td> <td>~2004</td> <td>ADA3600AEP5AR (CG)</td> <td> </td></tr> <tr> <td>Athlon 64 3700+</td> <td>2.4</td> <td>1024</td> <td>800</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>754</td> <td>June 1, 2004</td> <td>ADA3700AEP5AP (C0)<sup id="cite_ref-fn_4_3-1" class="reference"><a href="#cite_note-fn_4-3"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup><br />ADA3700AEP5AR (CG)</td> <td>$710 </td></tr> <tr> <td>Athlon 64 3800+</td> <td>2.4</td> <td>512</td> <td>1000</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>939</td> <td>June 1, 2004</td> <td>ADA3800DEP4AS (CG)</td> <td>$720 </td></tr> <tr> <td>Athlon 64 4000+</td> <td>2.4</td> <td>1024</td> <td>1000</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>939</td> <td>October 19, 2004</td> <td>ADA4000DEP5AS (CG)</td> <td>$729 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Newcastle"_(CG,_130_nm)"><span id=".22Newcastle.22_.28CG.2C_130_nm.29"></span>"Newcastle" (CG, 130 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=5" title="Edit section: "Newcastle" (CG, 130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(MHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-1" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 2800+</td> <td>1.8</td> <td>512</td> <td>800</td> <td>9x</td> <td>1.50</td> <td>89</td> <td>754</td> <td>April 27, 2004</td> <td>ADA2800AEP4AX</td> <td>$178 </td></tr> <tr> <td>Athlon 64 3000+</td> <td>2.0</td> <td>512</td> <td>800</td> <td>10x</td> <td>1.50</td> <td>89</td> <td>754</td> <td>December 15, 2003</td> <td>ADA3000AEP4AX</td> <td>$218 </td></tr> <tr> <td>Athlon 64 3000+</td> <td>1.8</td> <td>512</td> <td>1000</td> <td>9x</td> <td>1.50</td> <td>89</td> <td>939</td> <td></td> <td>ADA3000DEP4AW</td> <td> </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.2</td> <td>512</td> <td>800</td> <td>11x</td> <td>1.50</td> <td>89</td> <td>754</td> <td></td> <td>ADA3200AEP4AX</td> <td>$278 </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.0</td> <td>512</td> <td>1000</td> <td>10x</td> <td>1.50</td> <td>89</td> <td>939</td> <td></td> <td>ADA3200DEP4AW</td> <td> </td></tr> <tr> <td>Athlon 64 3300+<sup id="cite_ref-fn_2_6-0" class="reference"><a href="#cite_note-fn_2-6"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup></td> <td>2.4</td> <td>256</td> <td>800</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>754</td> <td></td> <td>ADA3300AEP3AX </td></tr> <tr> <td>Athlon 64 3400+</td> <td>2.4</td> <td>512</td> <td>800</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>754</td> <td></td> <td>ADA3400AEP4AX</td> <td> </td></tr> <tr> <td>Athlon 64 3400+<sup id="cite_ref-fn_2_6-1" class="reference"><a href="#cite_note-fn_2-6"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup></td> <td>2.2</td> <td>512</td> <td>800</td> <td>11x</td> <td>1.50</td> <td>89</td> <td>939</td> <td>early 2004</td> <td>ADA3400DEP4AZ</td> <td> </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.50</td> <td>89</td> <td>939</td> <td>June 1, 2004</td> <td>ADA3500DEP4AW</td> <td>$500 </td></tr> <tr> <td>Athlon 64 3800+</td> <td>2.4</td> <td>512</td> <td>1000</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>939</td> <td>June 1, 2004</td> <td>ADA3800DEP4AW</td> <td>$720 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Winchester"_(D0,_90_nm)"><span id=".22Winchester.22_.28D0.2C_90_nm.29"></span>"Winchester" (D0, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=6" title="Edit section: "Winchester" (D0, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-2" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 3000+</td> <td>1.8</td> <td>512</td> <td>1000</td> <td>9x</td> <td>1.40</td> <td>67</td> <td>939</td> <td>October 14, 2004</td> <td>ADA3000DIK4BI</td> <td>$163 </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.0</td> <td>512</td> <td>1000</td> <td>10x</td> <td>1.40</td> <td>67</td> <td>939</td> <td>October 14, 2004</td> <td>ADA3200DIK4BI</td> <td>$208 </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.40</td> <td>67</td> <td>939</td> <td>October 14, 2004</td> <td>ADA3500DIK4BI</td> <td>$288 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Venice"_(E3_&_E6,_90_nm)"><span id=".22Venice.22_.28E3_.26_E6.2C_90_nm.29"></span>"Venice" (E3 & E6, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=7" title="Edit section: "Venice" (E3 & E6, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-3" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 1500+<sup id="cite_ref-fn_2_6-2" class="reference"><a href="#cite_note-fn_2-6"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup></td> <td>1.0</td> <td>512</td> <td>800</td> <td>5x</td> <td>0.90</td> <td>9</td> <td>754</td> <td>November 7, 2005</td> <td>ADC1500B2X4BX (E6) </td></tr> <tr> <td>Athlon 64 3000+</td> <td>2.0</td> <td>512</td> <td>800</td> <td>10x</td> <td>1.35</td> <td>51</td> <td>754</td> <td></td> <td>ADA3000AKK4BX (E6)</td> <td> </td></tr> <tr> <td>Athlon 64 3000+</td> <td>2.0</td> <td>512</td> <td>800</td> <td>10x</td> <td>1.40</td> <td>51</td> <td>754</td> <td></td> <td>ADA3000AIK4BX (E6)</td> <td> </td></tr> <tr> <td>Athlon 64 3000+</td> <td>1.8</td> <td>512</td> <td>1000</td> <td>9x</td> <td>1.35–1.40</td> <td>67</td> <td>939</td> <td>April 4, 2005</td> <td>ADA3000DAA4BP (E3)<br />ADA3000DAA4BW (E6)</td> <td>$149 </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.2</td> <td>512</td> <td>800</td> <td>11x</td> <td>1.40</td> <td>59</td> <td>754</td> <td></td> <td>ADA3200AIO4BX (E6)</td> <td> </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.0</td> <td>512</td> <td>1000</td> <td>10x</td> <td>1.35–1.40</td> <td>67</td> <td>939</td> <td>April 4, 2005</td> <td>ADA3200DAA4BP (E3)<br />ADA3200DAA4BW (E6)</td> <td>$194 </td></tr> <tr> <td>Athlon 64 3400+<sup id="cite_ref-fn_3_7-0" class="reference"><a href="#cite_note-fn_3-7"><span class="cite-bracket">[</span>e<span class="cite-bracket">]</span></a></sup></td> <td>2.4</td> <td>512</td> <td>800</td> <td>12x</td> <td>1.40</td> <td>67</td> <td>754</td> <td></td> <td>ADA3400AIK4BO (E3)</td> <td> </td></tr> <tr> <td>Athlon 64 3400+<sup id="cite_ref-fn_2_6-3" class="reference"><a href="#cite_note-fn_2-6"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup></td> <td>2.2</td> <td>512</td> <td>800</td> <td>11x</td> <td>1.35–1.40</td> <td>67</td> <td>939</td> <td></td> <td>ADA3400DAA4BZ (E3) <p>ADA3400DAA4BY (E6) </p> </td> <td> </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.35–1.40</td> <td>67</td> <td>939</td> <td>April 4, 2005</td> <td>ADA3500DAA4BP (E3)<br />ADA3500DAA4BW (E6)</td> <td>$272 </td></tr> <tr> <td>Athlon 64 3800+</td> <td>2.4</td> <td>512</td> <td>1000</td> <td>12x</td> <td>1.35–1.40</td> <td>89</td> <td>939</td> <td>April 4, 2005</td> <td>ADA3800DAA4BP (E3)<br />ADA3800DAA4BW (E6)</td> <td>$424 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Manchester"_(E4,_90_nm)"><span id=".22Manchester.22_.28E4.2C_90_nm.29"></span>"Manchester" (E4, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=8" title="Edit section: "Manchester" (E4, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Athlon 64 X2 dual-core with one core disabled</li> <li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-4" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 3200+</td> <td>2.0</td> <td>512</td> <td>1000</td> <td>10x</td> <td>1.35</td> <td>67</td> <td>939</td> <td>May 31, 2005</td> <td>ADA3200DKA4CG</td> <td>$194 </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.35</td> <td>67</td> <td>939</td> <td>May 31, 2005</td> <td>ADA3500DKA4CG</td> <td>$272 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""San_Diego"_(E4,_90_nm)"><span id=".22San_Diego.22_.28E4.2C_90_nm.29"></span>"San Diego" (E4, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=9" title="Edit section: "San Diego" (E4, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-5" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.35–1.40</td> <td>67</td> <td>939</td> <td>May 4, 2005</td> <td>ADA3500DAA4BN</td> <td>$272 </td></tr> <tr> <td>Athlon 64 3700+</td> <td>2.2</td> <td>1024</td> <td>1000</td> <td>11x</td> <td>1.35–1.40</td> <td>89</td> <td>939</td> <td>May 4, 2005</td> <td>ADA3700DAA5BN</td> <td>$329 </td></tr> <tr> <td>Athlon 64 4000+</td> <td>2.4</td> <td>1024</td> <td>1000</td> <td>12x</td> <td>1.35–1.40</td> <td>89</td> <td>939</td> <td>May 4, 2005</td> <td>ADA4000DAA5BN</td> <td>$482 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Toledo"_(E6,_90_nm)"><span id=".22Toledo.22_.28E6.2C_90_nm.29"></span>"Toledo" (E6, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=10" title="Edit section: "Toledo" (E6, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Athlon 64 X2 dual-core with one core disabled</li> <li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-6" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 3700+</td> <td>2.2</td> <td>1024</td> <td>1000</td> <td>11x</td> <td>1.35</td> <td>89</td> <td>939</td> <td></td> <td>ADA3700DKA5CF</td> <td>$272 </td></tr> <tr> <td>Athlon 64 4000+</td> <td>2.4</td> <td>1024</td> <td>1000</td> <td>12x</td> <td>1.35</td> <td>89</td> <td>939</td> <td></td> <td>ADA4000DKA5CF</td> <td>$375 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Orleans"_(F2_&_F3,_90_nm)"><span id=".22Orleans.22_.28F2_.26_F3.2C_90_nm.29"></span>"Orleans" (F2 & F3, 90 nm) <span class="anchor" id="Orleans"></span></h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=11" title="Edit section: "Orleans" (F2 & F3, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-7" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Standard power</b> </td></tr> <tr> <td>Athlon 64 3000+</td> <td>1.8</td> <td>512</td> <td>1000</td> <td>9x</td> <td>1.35–1.40</td> <td>62</td> <td><a href="/wiki/Socket_AM2" title="Socket AM2">AM2</a></td> <td>May 23, 2006</td> <td>ADA3000IAA4CN (F2)<br />ADA3000IAA4CW (F2)</td> <td> </td></tr> <tr> <td>Athlon 64 3200+</td> <td>2.0</td> <td>512</td> <td>1000</td> <td>10x</td> <td>1.35–1.40</td> <td>62</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA3200IAA4CN (F2)<br />ADA3200IAA4CW (F2)</td> <td>$81 </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.25–1.40</td> <td>62</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA3500IAA4CN (F2)<br />ADA3500IAA4CW (F2)</td> <td>$189 </td></tr> <tr> <td>Athlon 64 3500+ (F3)</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.25–1.40</td> <td>62</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADA3500IAA4DH (F3)</td> <td>$88 </td></tr> <tr> <td>Athlon 64 3800+</td> <td>2.4</td> <td>512</td> <td>1000</td> <td>12x</td> <td>1.25–1.40</td> <td>62</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA3800IAA4CN (F2)<br />ADA3800IAA4CW (F2)</td> <td>$290 </td></tr> <tr> <td>Athlon 64 3800+ (F3)</td> <td>2.4</td> <td>512</td> <td>1000</td> <td>12x</td> <td>1.25–1.40</td> <td>62</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADA3800IAA4DH (F3)</td> <td>$93 </td></tr> <tr> <td>Athlon 64 4000+ (F3)</td> <td>2.6</td> <td>512</td> <td>1000</td> <td>13x</td> <td>1.25–1.40</td> <td>62</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADA4000IAA4DH (F3)</td> <td>$102 </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Energy-efficient</b> </td></tr> <tr> <td>Athlon 64 LE-1600</td> <td>2.2</td> <td>1024</td> <td>1000</td> <td>11x</td> <td>1.25–1.40</td> <td>45</td> <td>AM2</td> <td>October 8, 2007</td> <td>ADH1600IAA5DH (F3)</td> <td>$47 </td></tr> <tr> <td>Athlon 64 LE-1620</td> <td>2.4</td> <td>1024</td> <td>1000</td> <td>12x</td> <td>1.25–1.40</td> <td>45</td> <td>AM2</td> <td>October 8, 2007</td> <td>ADH1620IAA5DH (F3)</td> <td>$53 </td></tr> <tr> <td>Athlon 64 LE-1640</td> <td>2.6</td> <td>1024</td> <td>1000</td> <td>13x</td> <td>1.25–1.40</td> <td>45</td> <td>AM2</td> <td>January 7, 2008</td> <td>ADH1640IAA5DH (F3)</td> <td>$53 </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Energy-efficient small form factor</b> </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>512</td> <td>1000</td> <td>11x</td> <td>1.20–1.25</td> <td>35</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADD3500IAA4CN (F2)</td> <td>$231 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Lima"_(G1_&_G2,_65_nm)"><span id=".22Lima.22_.28G1_.26_G2.2C_65_nm.29"></span>"Lima" (G1 & G2, 65 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=12" title="Edit section: "Lima" (G1 & G2, 65 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-8" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Energy-efficient</b> </td></tr> <tr> <td>Athlon 64 2650e (G2)</td> <td>1.6</td> <td rowspan="7">512</td> <td rowspan="7">1000</td> <td>8x</td> <td rowspan="2">1.20–1.25</td> <td>15</td> <td rowspan="7">Socket AM2</td> <td rowspan="2">Q4, 2008</td> <td>ADG2650IAV4DP (G2) </td></tr> <tr> <td>Athlon 64 2850e (G2)</td> <td>1.8</td> <td>9x</td> <td>22</td> <td>ADJ2850IAA4DP (G2)</td> <td> </td></tr> <tr> <td>Athlon 64 3500+</td> <td>2.2</td> <td>11x</td> <td>1.20–1.25</td> <td rowspan="5">45</td> <td>February 20, 2007</td> <td>ADH3500IAA4DE (G1)</td> <td>$88 </td></tr> <tr> <td>Athlon 64 3800+</td> <td>2.4</td> <td>12x</td> <td>1.25–1.40</td> <td>February 20, 2007</td> <td>ADH3800IAA4DE (G1)</td> <td>$93 </td></tr> <tr> <td>Athlon LE-1640B (G2)<sup id="cite_ref-fn_5_8-0" class="reference"><a href="#cite_note-fn_5-8"><span class="cite-bracket">[</span>f<span class="cite-bracket">]</span></a></sup></td> <td>2.7</td> <td>13.5x</td> <td>1.25–1.40</td> <td>April 28, 2008</td> <td>ADH164BIAA4DP (G2)</td> <td> </td></tr> <tr> <td>Athlon LE-1640 (G2)</td> <td>2.7</td> <td>13.5x</td> <td>1.25–1.40</td> <td></td> <td>ADH1640IAA4DP (G2)</td> <td> </td></tr> <tr> <td>Athlon LE-1660 (G2)</td> <td>2.8</td> <td>14x</td> <td>1.25–1.40</td> <td>2008</td> <td>ADH1660IAA4DP (G2)</td> <td> </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Embedded energy-efficient</b> </td></tr> <tr> <td>Athlon 64 2000+</td> <td>1.0</td> <td rowspan="3">512</td> <td rowspan="3">1000</td> <td>5x</td> <td>0.90</td> <td>8</td> <td rowspan="3">Socket AM2</td> <td>??</td> <td>ADF2000IAV4DRE (G2)</td> <td> </td></tr> <tr> <td>Athlon 64 2600+</td> <td>1.6</td> <td>8x</td> <td>?</td> <td>15</td> <td>??</td> <td>ADG2600IAV4DRE (G2)</td> <td> </td></tr> <tr> <td>Athlon 64 3100+</td> <td>2.0</td> <td>10x</td> <td>?</td> <td>25</td> <td>??</td> <td>ADS3100IAR4DRE (G2)</td> <td> </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="Athlon_64_FX">Athlon 64 FX</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=13" title="Edit section: Athlon 64 FX"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id=""SledgeHammer"_(C0_&_CG,_130_nm)"><span id=".22SledgeHammer.22_.28C0_.26_CG.2C_130_nm.29"></span>"SledgeHammer" (C0 & CG, 130 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=14" title="Edit section: "SledgeHammer" (C0 & CG, 130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, AMD64</i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-9" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 FX-51</td> <td>2.2</td> <td>1024</td> <td>800</td> <td>11x</td> <td>1.50</td> <td>89</td> <td><a href="/wiki/Socket_940" title="Socket 940">940</a></td> <td>September 23, 2003</td> <td>ADAFX51CEP5AK (C0)<br />ADAFX51CEP5AT (CG)</td> <td>$733 </td></tr> <tr> <td>Athlon 64 FX-53</td> <td>2.4</td> <td>1024</td> <td>800</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>940</td> <td>March 18, 2004</td> <td>ADAFX53CEP5AT (CG)</td> <td>$733 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""ClawHammer"_(CG,_130_nm)"><span id=".22ClawHammer.22_.28CG.2C_130_nm.29"></span>"ClawHammer" (CG, 130 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=15" title="Edit section: "ClawHammer" (CG, 130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-10" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 FX-53</td> <td>2.4</td> <td>1024</td> <td>1000</td> <td>12x</td> <td>1.50</td> <td>89</td> <td>939</td> <td>June 1, 2004</td> <td>ADAFX53DEP5AS</td> <td>$799 </td></tr> <tr> <td>Athlon 64 FX-55</td> <td>2.6</td> <td>1024</td> <td>1000</td> <td>13x</td> <td>1.50</td> <td>104</td> <td>939</td> <td>October 19, 2004</td> <td>ADAFX55DEI5AS</td> <td>$827 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""San_Diego"_(E4,_90_nm)_2"><span id=".22San_Diego.22_.28E4.2C_90_nm.29_2"></span>"San Diego" (E4, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=16" title="Edit section: "San Diego" (E4, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-11" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 FX-55</td> <td>2.6</td> <td>1024</td> <td>1000</td> <td>13x</td> <td>1.35–1.40</td> <td>104</td> <td>939</td> <td></td> <td>ADAFX55DAA5BN</td> <td>$827 </td></tr> <tr> <td>Athlon 64 FX-57</td> <td>2.8</td> <td>1024</td> <td>1000</td> <td>14x</td> <td>1.35–1.40</td> <td>104</td> <td>939</td> <td>June 27, 2005</td> <td>ADAFX57DAA5BN</td> <td>$1,031 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Dual-core_desktop_processors">Dual-core desktop processors</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=17" title="Edit section: Dual-core desktop processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Athlon_64_X2">Athlon 64 X2</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=18" title="Edit section: Athlon 64 X2"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id=""Manchester"_(E4,_90_nm)_2"><span id=".22Manchester.22_.28E4.2C_90_nm.29_2"></span>"Manchester" (E4, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=19" title="Edit section: "Manchester" (E4, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-12" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 X2 3600+</td> <td>2.0</td> <td>2 × 256</td> <td>1000</td> <td>10x</td> <td>1.30–1.35</td> <td>89–110</td> <td>939</td> <td></td> <td>ADA3600DAA4BV</td> <td> </td></tr> <tr> <td>Athlon 64 X2 3800+</td> <td>2.0</td> <td>2 × 512</td> <td>1000</td> <td>10x</td> <td>1.30–1.35</td> <td>89</td> <td>939</td> <td>August 1, 2005</td> <td>ADA3800DAA5BV</td> <td>$354 </td></tr> <tr> <td>Athlon 64 X2 4200+</td> <td>2.2</td> <td>2 × 512</td> <td>1000</td> <td>11x</td> <td>1.30–1.35</td> <td>89</td> <td>939</td> <td>May 31, 2005</td> <td>ADA4200DAA5BV</td> <td>$581 </td></tr> <tr> <td>Athlon 64 X2 4600+</td> <td>2.4</td> <td>2 × 512</td> <td>1000</td> <td>12x</td> <td>1.30–1.35</td> <td>110</td> <td>939</td> <td>May 31, 2005</td> <td>ADA4600DAA5BV</td> <td>$803 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Toledo"_(E6,_90_nm)_2"><span id=".22Toledo.22_.28E6.2C_90_nm.29_2"></span>"Toledo" (E6, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=20" title="Edit section: "Toledo" (E6, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-13" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 X2 3800+</td> <td>2.0</td> <td>2 × 512</td> <td>1000</td> <td>10x</td> <td>1.30–1.35</td> <td>89</td> <td>939</td> <td>August 1, 2005</td> <td>ADA3800DAA5CD</td> <td>$354 </td></tr> <tr> <td>Athlon 64 X2 4200+</td> <td>2.2</td> <td>2 × 512</td> <td>1000</td> <td>11x</td> <td>1.30–1.35</td> <td>89</td> <td>939</td> <td>May 31, 2005</td> <td>ADA4200DAA5CD</td> <td>$537 </td></tr> <tr> <td rowspan="2">Athlon 64 X2 4400+</td> <td>2.2</td> <td>2 × 1024</td> <td>1000</td> <td>11x</td> <td>1.30–1.35</td> <td>110</td> <td>939</td> <td>May 31, 2005</td> <td>ADA4400DAA6CD</td> <td>$581 </td></tr> <tr> <td>2.2</td> <td>2 × 1024</td> <td>1000</td> <td>11x</td> <td>1.30–1.35</td> <td>89</td> <td>939</td> <td></td> <td>ADV4400DAA6CD</td> <td> </td></tr> <tr> <td>Athlon 64 X2 4600+</td> <td>2.4</td> <td>2 × 512</td> <td>1000</td> <td>12x</td> <td>1.30–1.35</td> <td>110</td> <td>939</td> <td>May 31, 2005</td> <td>ADA4600DAA5CD</td> <td>$803 </td></tr> <tr> <td>Athlon 64 X2 4800+</td> <td>2.4</td> <td>2 × 1024</td> <td>1000</td> <td>12x</td> <td>1.30–1.35</td> <td>110</td> <td>939</td> <td>May 31, 2005</td> <td>ADA4800DAA6CD</td> <td>$1001 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Windsor"_(F2_&_F3,_90_nm)"><span id=".22Windsor.22_.28F2_.26_F3.2C_90_nm.29"></span>"Windsor" (F2 & F3, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=21" title="Edit section: "Windsor" (F2 & F3, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-14" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Standard power</b> </td></tr> <tr> <td>Athlon 64 X2 3800+</td> <td>2.0</td> <td>2 × 512</td> <td>1000</td> <td>10x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA3800IAA5CU (F2)</td> <td>$303 </td></tr> <tr> <td>Athlon 64 X2 4000+</td> <td>2.0</td> <td>2 × 1024</td> <td>1000</td> <td>10x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA4000IAA6CS (F2)</td> <td>$328 </td></tr> <tr> <td>Athlon 64 X2 4200+</td> <td>2.2</td> <td>2 × 512</td> <td>1000</td> <td>11x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA4200IAA5CU (F2)</td> <td>$365 </td></tr> <tr> <td>Athlon 64 X2 4400+</td> <td>2.2</td> <td>2 × 1024</td> <td>1000</td> <td>11x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA4400IAA6CS (F2)</td> <td>$470 </td></tr> <tr> <td>Athlon 64 X2 4600+</td> <td>2.4</td> <td>2 × 512</td> <td>1000</td> <td>12x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA4600IAA5CU (F2)</td> <td>$558 </td></tr> <tr> <td>Athlon 64 X2 4800+</td> <td>2.4</td> <td>2 × 1024</td> <td>1000</td> <td>12x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA4800IAA6CS (F2)</td> <td>$645 </td></tr> <tr> <td>Athlon 64 X2 5000+</td> <td>2.6</td> <td>2 × 512</td> <td>1000</td> <td>13x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADA5000IAA5CS (F2)<br />ADA5000IAA5CU (F2)</td> <td>$696 </td></tr> <tr> <td>Athlon 64 X2 5000+ (F3)</td> <td>2.6</td> <td>2 × 512</td> <td>1000</td> <td>13x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td></td> <td>ADA5000IAA5CZ (F3)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 5200+</td> <td>2.6</td> <td>2 × 1024</td> <td>1000</td> <td>13x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>September 6, 2006</td> <td>ADA5200IAA6CS (F2)</td> <td>$403 </td></tr> <tr> <td>Athlon 64 X2 5200+ (F3)</td> <td>2.6</td> <td>2 × 1024</td> <td>1000</td> <td>13x</td> <td>1.20–1.25</td> <td>89</td> <td>AM2</td> <td></td> <td>ADA5200IAA6CZ (F3)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 5400+ (F3)</td> <td>2.8</td> <td>2 × 512</td> <td>1000</td> <td>14x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>December 12, 2006</td> <td>ADA5400IAA5CZ (F3)</td> <td>$485 </td></tr> <tr> <td>Athlon 64 X2 5600+ (F3)</td> <td>2.8</td> <td>2 × 1024</td> <td>1000</td> <td>14x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>December 12, 2006</td> <td>ADA5600IAA6CZ (F3)</td> <td>$505 </td></tr> <tr> <td rowspan="2">Athlon 64 X2 6000+ (F3)</td> <td>3.0</td> <td>2 × 1024</td> <td>1000</td> <td>15x</td> <td>1.35–1.40</td> <td>125</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADX6000IAA6CZ (F3)</td> <td>$464 </td></tr> <tr> <td>3.0</td> <td>2 × 1024</td> <td>1000</td> <td>15x</td> <td>1.30–1.35</td> <td>89</td> <td>AM2</td> <td>August 20, 2007</td> <td>ADA6000IAA6CZ (F3)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 6400+ (F3)<br /><b>Black Edition</b></td> <td>3.2</td> <td>2 × 1024</td> <td>1000</td> <td>16x</td> <td>1.35–1.40</td> <td>125</td> <td>AM2</td> <td>August 20, 2007</td> <td>ADX6400IAA6CZ (F3)</td> <td>$220 </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Energy-efficient</b> </td></tr> <tr> <td>Athlon 64 X2 3600+</td> <td>2.0</td> <td>2 × 256</td> <td>1000</td> <td>10x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>August 2006</td> <td>ADO3600IAA4CU (F2)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 3800+</td> <td>2.0</td> <td>2 × 512</td> <td>1000</td> <td>10x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADO3800IAA5CS (F2)<br />ADO3800IAA5CU (F2)</td> <td>$323 </td></tr> <tr> <td>Athlon 64 X2 3800+ (F3)</td> <td>2.0</td> <td>2 × 512</td> <td>1000</td> <td>10x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADO3800IAA5CZ (F3)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 4000+</td> <td>2.0</td> <td>2 × 1024</td> <td>1000</td> <td>10x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADO4000IAA6CS (F2)</td> <td>$353 </td></tr> <tr> <td>Athlon 64 X2 4200+</td> <td>2.2</td> <td>2 × 512</td> <td>1000</td> <td>11x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADO4200IAA5CU (F2)</td> <td>$417 </td></tr> <tr> <td>Athlon 64 X2 4400+</td> <td>2.2</td> <td>2 × 1024</td> <td>1000</td> <td>11x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADO4400IAA6CS (F2)</td> <td>$514 </td></tr> <tr> <td>Athlon 64 X2 4600+</td> <td>2.4</td> <td>2 × 512</td> <td>1000</td> <td>12x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADO4600IAA5CS (F2)<br />ADO4600IAA5CU (F2)</td> <td>$601 </td></tr> <tr> <td>Athlon 64 X2 4600+ (F3)</td> <td>2.4</td> <td>2 × 512</td> <td>1000</td> <td>12x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADO4600IAA5CZ (F3)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 4800+</td> <td>2.4</td> <td>2 × 1024</td> <td>1000</td> <td>12x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADO4800IAA6CS (F2)</td> <td>$671 </td></tr> <tr> <td>Athlon 64 X2 5000+</td> <td>2.6</td> <td>2 × 512</td> <td>1000</td> <td>13x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>October 30, 2006</td> <td>ADO5000IAA5CS (F2)</td> <td>$301 </td></tr> <tr> <td>Athlon 64 X2 5000+ (F3)</td> <td>2.6</td> <td>2 × 512</td> <td>1000</td> <td>13x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADO5000IAA5CZ (F3)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 5200+ (F3)</td> <td>2.6</td> <td>2 × 1024</td> <td>1000</td> <td>13x</td> <td>1.20–1.25</td> <td>65</td> <td>AM2</td> <td>February 20, 2007</td> <td>ADO5200IAA6CZ (F3)</td> <td> </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Energy-efficient small form factor</b> </td></tr> <tr> <td>Athlon 64 X2 3800+</td> <td>2.0</td> <td>2 × 512</td> <td>1000</td> <td>10x</td> <td>1.025–1.075</td> <td>35</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADD3800IAA5CU (F2)<br />ADD3800IAT5CU (F2)</td> <td>$364 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Brisbane"_(G1_&_G2,_65_nm)"><span id=".22Brisbane.22_.28G1_.26_G2.2C_65_nm.29"></span>"Brisbane" (G1 & G2, 65 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=22" title="Edit section: "Brisbane" (G1 & G2, 65 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-15" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 X2 3600+</td> <td>1.9</td> <td>2 × 512</td> <td>1000</td> <td>9.5x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td>January 22, 2007</td> <td>ADO3600IAA5DD (G1)<br />ADO3600IAA5DL (G1)</td> <td>$138 </td></tr> <tr> <td>Athlon 64 X2 4000+</td> <td>2.1</td> <td>2 × 512</td> <td>1000</td> <td>10.5x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td>December 5, 2006</td> <td>ADO4000IAA5DD (G1)</td> <td>$169 </td></tr> <tr> <td rowspan="2">Athlon 64 X2 4200+</td> <td>2.2</td> <td>2 × 512</td> <td>1000</td> <td>11x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td>2007</td> <td>ADO4200IAA5DD (G1)</td> <td> </td></tr> <tr> <td>2.2</td> <td>2 × 512</td> <td>1000</td> <td>11x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td></td> <td>ADO4200IAA5DO (G2)</td> <td> </td></tr> <tr> <td rowspan="2">Athlon 64 X2 4400+</td> <td>2.3</td> <td>2 × 512</td> <td>1000</td> <td>11.5x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td>December 5, 2006</td> <td>ADO4400IAA5DD (G1)</td> <td>$214 </td></tr> <tr> <td>2.3</td> <td>2 × 512</td> <td>1000</td> <td>11.5x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td>October 8, 2007</td> <td>ADO4400IAA5DO (G2)</td> <td>$89 </td></tr> <tr> <td>Athlon 64 X2 4600+</td> <td>2.4</td> <td>2 × 512</td> <td>1000</td> <td>12x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td></td> <td>ADO4600IAA5DO (G2)</td> <td> </td></tr> <tr> <td rowspan="2">Athlon 64 X2 4800+</td> <td>2.5</td> <td>2 × 512</td> <td>1000</td> <td>12.5x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td>December 5, 2006</td> <td>ADO4800IAA5DD (G1)</td> <td>$271 </td></tr> <tr> <td>2.5</td> <td>2 × 512</td> <td>1000</td> <td>12.5x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td>October 8, 2007</td> <td>ADO4800IAA5DO (G2)</td> <td>$104 </td></tr> <tr> <td rowspan="2">Athlon 64 X2 5000+</td> <td>2.6</td> <td>2 × 512</td> <td>1000</td> <td>13x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td>December 5, 2006</td> <td>ADO5000IAA5DD (G1)</td> <td>$301 </td></tr> <tr> <td>2.6</td> <td>2 × 512</td> <td>1000</td> <td>13x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td>October 8, 2007</td> <td>ADO5000IAA5DO (G2)</td> <td>$115 </td></tr> <tr> <td>Athlon 64 X2 5000+<br /><b>Black Edition</b></td> <td>2.6</td> <td>2 × 512</td> <td>1000</td> <td>13x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td>September 25, 2007</td> <td>ADO5000IAA5DS (G2)</td> <td>$136 </td></tr> <tr> <td rowspan="2">Athlon 64 X2 5200+</td> <td>2.7</td> <td>2 × 512</td> <td>1000</td> <td>13.5x</td> <td>1.25–1.35</td> <td>65</td> <td>AM2</td> <td></td> <td>ADO5200IAA5DD (G1)</td> <td> </td></tr> <tr> <td>2.7</td> <td>2 × 512</td> <td>1000</td> <td>13.5x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td>October 8, 2007</td> <td>ADO5200IAA5DO (G2)</td> <td>$125 </td></tr> <tr> <td>Athlon 64 X2 5400+</td> <td>2.8</td> <td>2 × 512</td> <td>1000</td> <td>14x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td>January, 2008</td> <td>ADO5400IAA5DO (G2)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 5400+<br /><b>Black Edition</b></td> <td>2.8</td> <td>2 × 512</td> <td>1000</td> <td>14x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td>June, 2008</td> <td>ADO5400IAA5DS (G2)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 5600+</td> <td>2.9</td> <td>2 × 512</td> <td>1000</td> <td>14.5x</td> <td>1.325–1.375</td> <td>65</td> <td>AM2</td> <td>February, 2008</td> <td>ADO5600IAA5DO (G2)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 5800+</td> <td>3.0</td> <td>2 × 512</td> <td>1000</td> <td>15x</td> <td>?</td> <td>89</td> <td>AM2</td> <td>April, 2008</td> <td>ADA5800IAA5DO (G2)</td> <td> </td></tr> <tr> <td>Athlon 64 X2 6000+</td> <td>3.1</td> <td>2 × 512</td> <td>1000</td> <td>15.5x</td> <td>1.1–1.40</td> <td>89</td> <td>AM2</td> <td>June, 2008</td> <td>ADV6000IAA5DO (G2)</td> <td> </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="Athlon_X2">Athlon X2</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=23" title="Edit section: Athlon X2"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/List_of_AMD_Athlon_X2_microprocessors" class="mw-redirect" title="List of AMD Athlon X2 microprocessors">List of AMD Athlon X2 microprocessors</a></div> <div class="mw-heading mw-heading3"><h3 id="Athlon_64_FX_2">Athlon 64 FX</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=24" title="Edit section: Athlon 64 FX"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id=""Toledo"_(E6,_90_nm)_3"><span id=".22Toledo.22_.28E6.2C_90_nm.29_3"></span>"Toledo" (E6, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=25" title="Edit section: "Toledo" (E6, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-16" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 FX-60</td> <td>2.6</td> <td>2 × 1024</td> <td>1000</td> <td>13x</td> <td>1.35–1.40</td> <td>110</td> <td>939</td> <td>January 9, 2006</td> <td>ADAFX60DAA6CD</td> <td>$1,031 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Windsor"_(F2,_90_nm)"><span id=".22Windsor.22_.28F2.2C_90_nm.29"></span>"Windsor" (F2, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=26" title="Edit section: "Windsor" (F2, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-17" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 FX-62</td> <td>2.8</td> <td>2 × 1024</td> <td>1000</td> <td>14x</td> <td>1.35–1.40</td> <td>125</td> <td>AM2</td> <td>May 23, 2006</td> <td>ADAFX62IAA6CS</td> <td>$1,031 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Windsor"_(Quad_FX_platform,_F3,_90_nm)"><span id=".22Windsor.22_.28Quad_FX_platform.2C_F3.2C_90_nm.29"></span>"Windsor" (<a href="/wiki/AMD_Quad_FX_platform" title="AMD Quad FX platform">Quad FX platform</a>, F3, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=27" title="Edit section: "Windsor" (Quad FX platform, F3, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li> <li>Usually sold in pairs</li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-18" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Athlon 64 FX-70</td> <td>2.6</td> <td>2 × 1024</td> <td>1000</td> <td>13x</td> <td>1.35–1.40</td> <td>125</td> <td><a href="/wiki/Socket_F" title="Socket F">F</a> (1207 FX)</td> <td>November 30, 2006</td> <td>ADAFX70GAA6DI</td> <td>$599/pair </td></tr> <tr> <td>Athlon 64 FX-72</td> <td>2.8</td> <td>2 × 1024</td> <td>1000</td> <td>14x</td> <td>1.35–1.40</td> <td>125</td> <td>F (1207 FX)</td> <td>November 30, 2006</td> <td>ADAFX72GAA6DI</td> <td>$799/pair </td></tr> <tr> <td>Athlon 64 FX-74</td> <td>3.0</td> <td>2 × 1024</td> <td>1000</td> <td>15x</td> <td>1.35–1.40</td> <td>125</td> <td>F (1207 FX)</td> <td>November 30, 2006</td> <td>ADAFX74GAA6DI</td> <td>$999/pair </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Mobile_processors">Mobile processors</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=28" title="Edit section: Mobile processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Mobile_Athlon_64">Mobile Athlon 64</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=29" title="Edit section: Mobile Athlon 64"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id=""ClawHammer"_(C0_&_CG,_130_nm)_2"><span id=".22ClawHammer.22_.28C0_.26_CG.2C_130_nm.29_2"></span>"ClawHammer" (C0 & CG, 130 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=30" title="Edit section: "ClawHammer" (C0 & CG, 130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-19" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Desktop replacement</b> </td></tr> <tr> <td>Mobile Athlon 64 2700+</td> <td>1.6</td> <td>512</td> <td>800</td> <td>8x</td> <td>1.50</td> <td>19–81.5</td> <td>754</td> <td></td> <td>AMA2700BEY4AP (C0)</td> <td> </td></tr> <tr> <td>Mobile Athlon 64 2800+</td> <td>1.6</td> <td>1024</td> <td>800</td> <td>8x</td> <td>1.50</td> <td>19–81.5</td> <td>754</td> <td></td> <td>AMA2800BEX5AP (C0)<br />AMA2800BEX5AR (CG)</td> <td> </td></tr> <tr> <td>Mobile Athlon 64 3000+</td> <td>1.8</td> <td>1024</td> <td>800</td> <td>9x</td> <td>1.50</td> <td>19–81.5</td> <td>754</td> <td>September 23, 2003</td> <td>AMA3000BEX5AP (C0)<br />AMA3000BEX5AR (CG)</td> <td>$278 </td></tr> <tr> <td>Mobile Athlon 64 3200+</td> <td>2.0</td> <td>1024</td> <td>800</td> <td>10x</td> <td>1.50</td> <td>19–81.5</td> <td>754</td> <td>September 23, 2003</td> <td>AMA3200BEX5AP (C0)<br />AMA3200BEX5AR (CG)</td> <td>$417 </td></tr> <tr> <td>Mobile Athlon 64 3400+</td> <td>2.2</td> <td>1024</td> <td>800</td> <td>11x</td> <td>1.50</td> <td>19–81.5</td> <td>754</td> <td>January 6, 2004</td> <td>AMA3400BEX5AP (C0)<br />AMA3400BEX5AR (CG)</td> <td>$417 </td></tr> <tr> <td>Mobile Athlon 64 3700+</td> <td>2.4</td> <td>1024</td> <td>800</td> <td>12x</td> <td>1.50</td> <td>19–81.5</td> <td>754</td> <td>August 17, 2004</td> <td>AMA3700BEX5AP (C0)<br />AMA3700BEX5AR (CG)</td> <td>$500 </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Standard power</b> </td></tr> <tr> <td>Mobile Athlon 64 2800+</td> <td>1.6</td> <td>1024</td> <td>800</td> <td>8x</td> <td>1.40</td> <td>62</td> <td>754</td> <td>January 6, 2004</td> <td>AMN2800BIX5AP (C0)<br />AMN2800BIX5AR (CG)</td> <td>$193 </td></tr> <tr> <td>Mobile Athlon 64 3000+</td> <td>1.8</td> <td>1024</td> <td>800</td> <td>9x</td> <td>1.40</td> <td>62</td> <td>754</td> <td>January 6, 2004</td> <td>AMN3000BIX5AP (C0)<br />AMN3000BIX5AR (CG)</td> <td>$233 </td></tr> <tr> <td>Mobile Athlon 64 3200+</td> <td>2.0</td> <td>1024</td> <td>800</td> <td>10x</td> <td>1.40</td> <td>62</td> <td>754</td> <td>January 6, 2004</td> <td>AMN3200BIX5AP (C0)<br />AMN3200BIX5AR (CG)</td> <td>$293 </td></tr> <tr> <td>Mobile Athlon 64 3400+</td> <td>2.2</td> <td>1024</td> <td>800</td> <td>11x</td> <td>1.40</td> <td>62</td> <td>754</td> <td>July 18, 2004</td> <td>AMN3400BIX5AR (CG)</td> <td>$432 </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Low power</b> </td></tr> <tr> <td>Mobile Athlon 64 2700+</td> <td>1.6</td> <td>512</td> <td>800</td> <td>8x</td> <td>1.20</td> <td>35</td> <td>754</td> <td>June 1, 2004</td> <td>AMD2700BQX4AR (CG)</td> <td>$209 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Odessa"_(CG,_130_nm)"><span id=".22Odessa.22_.28CG.2C_130_nm.29"></span>"Odessa" (CG, 130 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=31" title="Edit section: "Odessa" (CG, 130 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-20" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Desktop replacement</b> </td></tr> <tr> <td>Mobile Athlon 64 2800+</td> <td>1.8</td> <td>512</td> <td>800</td> <td>8x</td> <td>1.50</td> <td>19–81.5</td> <td>754</td> <td></td> <td>AMA2800BEX4AX</td> <td> </td></tr> <tr> <td align="left" colspan="11" style="background:#009966;color: white"><b>Low power</b> </td></tr> <tr> <td>Mobile Athlon 64 2700+</td> <td>1.6</td> <td>512</td> <td>800</td> <td>8x</td> <td>1.20</td> <td>35</td> <td>754</td> <td>June 1, 2004</td> <td>AMD2700BQX4AX</td> <td>$209 </td></tr> <tr> <td>Mobile Athlon 64 2800+</td> <td>1.8</td> <td>512</td> <td>800</td> <td>9x</td> <td>1.20</td> <td>35</td> <td>754</td> <td>June 1, 2004</td> <td>AMD2800BQX4AX</td> <td>$241 </td></tr> <tr> <td>Mobile Athlon 64 3000+</td> <td>2.0</td> <td>512</td> <td>800</td> <td>10x</td> <td>1.20</td> <td>35</td> <td>754</td> <td></td> <td>AMD3000BQX4AX</td> <td>$241 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Oakville"_(D0,_90_nm)"><span id=".22Oakville.22_.28D0.2C_90_nm.29"></span>"Oakville" (D0, 90 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=32" title="Edit section: "Oakville" (D0, 90 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-21" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Mobile Athlon 64 2700+</td> <td>1.6</td> <td>512</td> <td>800</td> <td>8x</td> <td>1.35</td> <td>35</td> <td>754</td> <td>August 17, 2004</td> <td>AMD2700BKX4LB</td> <td>$209 </td></tr> <tr> <td>Mobile Athlon 64 2800+</td> <td>1.8</td> <td>512</td> <td>800</td> <td>9x</td> <td>1.35</td> <td>35</td> <td>754</td> <td>August 17, 2004</td> <td>AMD2800BKX4LB</td> <td>$241 </td></tr> <tr> <td>Mobile Athlon 64 3000+</td> <td>2.0</td> <td>512</td> <td>800</td> <td>10x</td> <td>1.35</td> <td>35</td> <td>754</td> <td>August 17, 2004</td> <td>AMD3000BKX4LB</td> <td>$241 </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Newark"_(E5,_90_nm,_62W_TDP)"><span id=".22Newark.22_.28E5.2C_90_nm.2C_62W_TDP.29"></span>"Newark" (E5, 90 nm, 62W TDP)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=33" title="Edit section: "Newark" (E5, 90 nm, 62W TDP)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-22" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s)</th> <th>Release<br />price <p>(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </p> </th></tr> <tr> <td>Mobile Athlon 64 3000+</td> <td>1.8</td> <td>1024</td> <td>800</td> <td>9x</td> <td>1.35</td> <td>62</td> <td>754</td> <td>April 14, 2005</td> <td>AMN3000BKX5BU</td> <td>$153 </td></tr> <tr> <td>Mobile Athlon 64 3200+</td> <td>2.0</td> <td>1024</td> <td>800</td> <td>10x</td> <td>1.35</td> <td>62</td> <td>754</td> <td>April 14, 2005</td> <td>AMN3200BKX5BU</td> <td>$198 </td></tr> <tr> <td>Mobile Athlon 64 3400+</td> <td>2.2</td> <td>1024</td> <td>800</td> <td>11x</td> <td>1.35</td> <td>62</td> <td>754</td> <td>April 14, 2005</td> <td>AMN3400BKX5BU</td> <td>$228 </td></tr> <tr> <td>Mobile Athlon 64 3700+</td> <td>2.4</td> <td>1024</td> <td>800</td> <td>12x</td> <td>1.35</td> <td>62</td> <td>754</td> <td>April 14, 2005</td> <td>AMN3700BKX5BU</td> <td>$336 </td></tr> <tr> <td>Mobile Athlon 64 4000+</td> <td>2.6</td> <td>1024</td> <td>800</td> <td>13x</td> <td>1.35</td> <td>62</td> <td>754</td> <td>August 16, 2005</td> <td>AMN4000BKX5BU</td> <td>$382 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="Athlon_Neo">Athlon Neo</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=34" title="Edit section: Athlon Neo"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id=""Huron"_(65_nm,_15W_TDP)"><span id=".22Huron.22_.2865_nm.2C_15W_TDP.29"></span>"Huron" (65 nm, 15W TDP)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=35" title="Edit section: "Huron" (65 nm, 15W TDP)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a><sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-23" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/Chip_carrier" title="Chip carrier">Package</a></th> <th>Release date</th> <th>Part number(s) </th></tr> <tr> <td>Athlon Neo MV-40</td> <td>1.6</td> <td>512</td> <td>800</td> <td>8x</td> <td>1.1</td> <td>15</td> <td><a href="/w/index.php?title=ASB1_(chip_package)&action=edit&redlink=1" class="new" title="ASB1 (chip package) (page does not exist)">ASB1</a></td> <td>January 9, 2009</td> <td>AMGMV40OAX4DX (Tray) </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id=""Sherman"_(65_nm,_15W_TDP)"><span id=".22Sherman.22_.2865_nm.2C_15W_TDP.29"></span>"Sherman" (65 nm, 15W TDP)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=36" title="Edit section: "Sherman" (65 nm, 15W TDP)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th>Multi<sup id="cite_ref-fn_1_2-24" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/CPU_core_voltage" title="CPU core voltage">VCore</a><br />(<a href="/wiki/Volt" title="Volt">Volts</a>)</th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th>Package</th> <th>Release date</th> <th>Part number(s) </th></tr> <tr> <td>Athlon Neo TF-20</td> <td>1.6</td> <td>512</td> <td>800</td> <td>8x</td> <td>1.0</td> <td>15</td> <td><a href="/wiki/Socket_S1" title="Socket S1">S1</a></td> <td>Q1 2009</td> <td>AMGTF20HAX4DN </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="Athlon_Neo_X2">Athlon Neo X2</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=37" title="Edit section: Athlon Neo X2"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id=""Conesus"_(65_nm)"><span id=".22Conesus.22_.2865_nm.29"></span>"Conesus" (65 nm)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=38" title="Edit section: "Conesus" (65 nm)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, Enhanced <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64" title="X86-64">AMD64</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li></ul> <table class="wikitable"> <tbody><tr> <th>Model number</th> <th><a href="/wiki/Clock_rate" title="Clock rate">Clock</a><br />(GHz)</th> <th><a href="/wiki/CPU_cache#Multi-level_caches" title="CPU cache">L2 cache</a><br />(<a href="/wiki/Kilobyte" title="Kilobyte">kB</a>)</th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a><br />(GHz)</th> <th><a href="/wiki/CPU_multiplier" title="CPU multiplier">Multiplier</a><sup id="cite_ref-fn_1_2-25" class="reference"><a href="#cite_note-fn_1-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th><a href="/wiki/Volt" title="Volt">Voltage</a></th> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(<a href="/wiki/Watt" title="Watt">Watts</a>)</th> <th><a href="/wiki/CPU_socket" title="CPU socket">Socket</a></th> <th>Release date</th> <th>Part number(s) </th></tr> <tr> <td>Athlon Neo X2 L325</td> <td>1.5</td> <td>2 × 512</td> <td>800</td> <td>7.5x</td> <td>0.925</td> <td>18</td> <td>ASB1</td> <td>June 2009</td> <td>AMZL325OAX5DY </td></tr> <tr> <td>Athlon Neo X2 L335</td> <td>1.6</td> <td>2 × 256</td> <td>800</td> <td>8x</td> <td>0.925</td> <td>18</td> <td>ASB1</td> <td>June 2009</td> <td>AMZL335OAX5DY </td></tr> <tr> <td>Athlon Neo X2 L510</td> <td>1.6</td> <td>2 × 512</td> <td>800</td> <td>8x</td> <td>0.925</td> <td>18</td> <td>ASB1</td> <td>June 2009</td> <td>AMZL510OAX5DY </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=39" title="Edit section: Notes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444" /><table class="box-Unreferenced_section plainlinks metadata ambox ambox-content ambox-Unreferenced" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Question_book-new.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>does not <a href="/wiki/Wikipedia:Citing_sources" title="Wikipedia:Citing sources">cite</a> any <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">sources</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/List_of_AMD_Athlon_64_processors" title="Special:EditPage/List of AMD Athlon 64 processors">improve this section</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>. Unsourced material may be challenged and <a href="/wiki/Wikipedia:Verifiability#Burden_of_evidence" title="Wikipedia:Verifiability">removed</a>.</span> <span class="date-container"><i>(<span class="date">December 2009</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-fn_1-2"><span class="mw-cite-backlink">^ <a href="#cite_ref-fn_1_2-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-fn_1_2-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-fn_1_2-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-fn_1_2-3"><sup><i><b>d</b></i></sup></a> <a href="#cite_ref-fn_1_2-4"><sup><i><b>e</b></i></sup></a> <a href="#cite_ref-fn_1_2-5"><sup><i><b>f</b></i></sup></a> <a href="#cite_ref-fn_1_2-6"><sup><i><b>g</b></i></sup></a> <a href="#cite_ref-fn_1_2-7"><sup><i><b>h</b></i></sup></a> <a href="#cite_ref-fn_1_2-8"><sup><i><b>i</b></i></sup></a> <a href="#cite_ref-fn_1_2-9"><sup><i><b>j</b></i></sup></a> <a href="#cite_ref-fn_1_2-10"><sup><i><b>k</b></i></sup></a> <a href="#cite_ref-fn_1_2-11"><sup><i><b>l</b></i></sup></a> <a href="#cite_ref-fn_1_2-12"><sup><i><b>m</b></i></sup></a> <a href="#cite_ref-fn_1_2-13"><sup><i><b>n</b></i></sup></a> <a href="#cite_ref-fn_1_2-14"><sup><i><b>o</b></i></sup></a> <a href="#cite_ref-fn_1_2-15"><sup><i><b>p</b></i></sup></a> <a href="#cite_ref-fn_1_2-16"><sup><i><b>q</b></i></sup></a> <a href="#cite_ref-fn_1_2-17"><sup><i><b>r</b></i></sup></a> <a href="#cite_ref-fn_1_2-18"><sup><i><b>s</b></i></sup></a> <a href="#cite_ref-fn_1_2-19"><sup><i><b>t</b></i></sup></a> <a href="#cite_ref-fn_1_2-20"><sup><i><b>u</b></i></sup></a> <a href="#cite_ref-fn_1_2-21"><sup><i><b>v</b></i></sup></a> <a href="#cite_ref-fn_1_2-22"><sup><i><b>w</b></i></sup></a> <a href="#cite_ref-fn_1_2-23"><sup><i><b>x</b></i></sup></a> <a href="#cite_ref-fn_1_2-24"><sup><i><b>y</b></i></sup></a> <a href="#cite_ref-fn_1_2-25"><sup><i><b>z</b></i></sup></a></span> <span class="reference-text">Clock multiplier applies to 200 MHz <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> base clock.</span> </li> <li id="cite_note-fn_4-3"><span class="mw-cite-backlink">^ <a href="#cite_ref-fn_4_3-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-fn_4_3-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text">Processors with these markings are believed to be used only as an engineering sample.</span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text">Most likely a fake processor. Possibly a mislabeled mobile processor.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup></span> </li> <li id="cite_note-fn_2-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-fn_2_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-fn_2_6-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-fn_2_6-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-fn_2_6-3"><sup><i><b>d</b></i></sup></a></span> <span class="reference-text">Athlon 64 3300+ is available in <a href="/wiki/Hewlett-Packard" title="Hewlett-Packard">Hewlett-Packard</a> and <a href="/wiki/IBM" title="IBM">IBM</a> systems only, or as an OEM chip. The Socket 939 3400+ (both Newcastle and Venice versions) is an OEM-only chip and was never directly available from AMD. It shares all Socket 939 3500+ characteristics with the exception of the 800 MHz HyperTransport Link. The 1500+ is only used in the HP BladeSystem bc1500 <a href="/wiki/Blade_PC" title="Blade PC">blade PC</a>.</span> </li> <li id="cite_note-fn_3-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-fn_3_7-0">^</a></b></span> <span class="reference-text">These Venice-based Socket 754 Athlon 64s are reported to be very rare. The 3400+ version has been verified to exist. They do exist and have been available for OEMs for some time.</span> </li> <li id="cite_note-fn_5-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-fn_5_8-0">^</a></b></span> <span class="reference-text">AMD Business Class processor, availability guaranteed for 24 months after release.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=40" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/List_of_AMD_microprocessors" class="mw-redirect" title="List of AMD microprocessors">List of AMD microprocessors</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=41" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626" /><div class="reflist"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/datasheets/33425.pdf">"AMD Athlon™ 64 X2 Dual-Core Processor Product Data Sheet"</a> <span class="cs1-format">(PDF)</span>. AMD. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20240211163606/https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/datasheets/33425.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on 2024-02-11<span class="reference-accessdate">. Retrieved <span class="nowrap">2024-02-11</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AMD+Athlon%E2%84%A2+64+X2+Dual-Core+Processor+Product+Data+Sheet&rft.pub=AMD&rft_id=https%3A%2F%2Fwww.amd.com%2Fcontent%2Fdam%2Famd%2Fen%2Fdocuments%2Farchived-tech-docs%2Fdatasheets%2F33425.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+AMD+Athlon+64+processors" class="Z3988"></span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.cpu-world.com/CPUs/K8/AMD-Athlon%2064%203700%2B%20-%20ADA3700AEP5AP.html">"AMD Athlon 64 3700+ - ADA3700AEP5AP"</a>. <i>www.cpu-world.com</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2025-02-03</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=www.cpu-world.com&rft.atitle=AMD+Athlon+64+3700%2B+-+ADA3700AEP5AP&rft_id=https%3A%2F%2Fwww.cpu-world.com%2FCPUs%2FK8%2FAMD-Athlon%252064%25203700%252B%2520-%2520ADA3700AEP5AP.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+AMD+Athlon+64+processors" class="Z3988"></span></span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20090507135012/http://products.amd.com/en-us/NotebookCPUDetail.aspx?id=513">"AMD Processors for Notebooks: AMD Turion 64 X2 Mobile Technology, AMD Athlon 64 X2 Dual-Core, Mobile AMD Sempron Processor"</a>. Archived from <a rel="nofollow" class="external text" href="http://products.amd.com/en-us/NotebookCPUDetail.aspx?id=513">the original</a> on May 7, 2009<span class="reference-accessdate">. Retrieved <span class="nowrap">2009-11-05</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AMD+Processors+for+Notebooks%3A+AMD+Turion+64+X2+Mobile+Technology%2C+AMD+Athlon+64+X2+Dual-Core%2C+Mobile+AMD+Sempron+Processor&rft_id=http%3A%2F%2Fproducts.amd.com%2Fen-us%2FNotebookCPUDetail.aspx%3Fid%3D513&rfr_id=info%3Asid%2Fen.wikipedia.org%3AList+of+AMD+Athlon+64+processors" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=List_of_AMD_Athlon_64_processors&action=edit&section=42" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070511015847/http://www.amd.com/us-en/Processors/TechnicalResources/0%2C%2C30_182_739_7203%2C00.html">AMD Technical Documentation</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20091031060354/http://products.amd.com/en-US/DesktopCPUResult.aspx">AMD Processors for Desktops: AMD Phenom, AMD Athlon FX, AMD Athlon X2 Dual-Core, AMD Athlon, and AMD Sempron Processor</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070515052223/http://www.sandpile.org/impl/k8.htm">sandpile.org – AA-64 implementation – AMD K8</a></li> <li><a rel="nofollow" class="external text" href="http://fab51.com/cpu/guide/opn-64-e.html">AMD 64 OPN reference guide – Fab51</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20150105034106/http://www.theinquirer.net/?article=31842">Socket AM2 CPUs listed, specced, priced up – The Inquirer</a></li> <li><a rel="nofollow" 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class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/List_of_AMD_processors" title="List of AMD processors">Processors</a> <ul><li><a href="/wiki/List_of_AMD_K5_processors" title="List of AMD K5 processors">K5</a></li> <li><a href="/wiki/List_of_AMD_K6_processors" title="List of AMD K6 processors">K6</a></li> <li><a href="/wiki/List_of_AMD_Athlon_processors" title="List of AMD Athlon processors">Athlon</a> <ul><li><a href="/wiki/List_of_AMD_Athlon_XP_processors" title="List of AMD Athlon XP processors">XP</a></li> <li><a class="mw-selflink selflink">64</a></li> <li><a href="/wiki/List_of_AMD_Athlon_X2_processors" title="List of AMD Athlon X2 processors">X2</a></li> <li><a href="/wiki/List_of_AMD_Athlon_II_processors" title="List of AMD Athlon II processors">II</a></li></ul></li> <li><a href="/wiki/List_of_AMD_Phenom_processors" title="List of AMD Phenom processors">Phenom</a></li> <li><a href="/wiki/List_of_AMD_FX_processors" title="List of AMD FX processors">FX</a></li> <li><a href="/wiki/List_of_AMD_Ryzen_processors" title="List of AMD Ryzen processors">Ryzen</a></li> <li><a href="/wiki/List_of_AMD_Duron_processors" title="List of AMD Duron processors">Duron</a></li> <li><a href="/wiki/List_of_AMD_Sempron_processors" title="List of AMD Sempron processors">Sempron</a></li> <li><a href="/wiki/List_of_AMD_Turion_processors" title="List of AMD Turion processors">Turion</a></li> <li><a href="/wiki/List_of_AMD_Opteron_processors" title="List of AMD Opteron processors">Opteron</a></li> <li><a href="/wiki/List_of_AMD_Epyc_processors" class="mw-redirect" title="List of AMD Epyc processors">Epyc</a></li></ul></li> <li><a href="/wiki/List_of_AMD_processors_with_3D_graphics" title="List of AMD processors with 3D graphics">APUs</a></li> <li><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_AMD_chipsets" title="List of AMD chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon/K7</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 desktop</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K8" title="AMD K8">K8</a></li> <li><a href="/wiki/AMD_K9" title="AMD K9">K9</a></li> <li><a href="/wiki/AMD_10h" title="AMD 10h">K10 (aka 10h)</a></li> <li>15h <ul><li><a href="/wiki/Bulldozer_(microarchitecture)" title="Bulldozer (microarchitecture)">Bulldozer</a></li> <li><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver</a></li> <li><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller</a></li> <li><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a></li></ul></li> <li><a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a> <ul><li><a href="/wiki/Zen_(first_generation)" title="Zen (first generation)">1st gen</a></li> <li><a href="/wiki/Zen%2B" title="Zen+">Zen+</a></li> <li><a href="/wiki/Zen_2" title="Zen 2">Zen 2</a></li> <li><a href="/wiki/Zen_3" title="Zen 3">Zen 3</a></li> <li><a href="/wiki/Zen_3%2B" class="mw-redirect" title="Zen 3+">Zen 3+</a></li> <li><a href="/wiki/Zen_4" title="Zen 4">Zen 4</a></li> <li><a href="/wiki/Zen_5" title="Zen 5">Zen 5</a></li> <li><i><a href="/wiki/Zen_6" title="Zen 6">Zen 6</a></i></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 low-power</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bobcat_(microarchitecture)" title="Bobcat (microarchitecture)">Bobcat (aka 14h)</a></li> <li>16h <ul><li><a href="/wiki/Jaguar_(microarchitecture)" title="Jaguar (microarchitecture)">Jaguar</a></li> <li><a href="/wiki/Puma_(microarchitecture)" title="Puma (microarchitecture)">Puma</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/ARM_architecture_family#ARMv8-A" title="ARM architecture family">ARM64</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K12" title="AMD K12">K12 (aka 12h)</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)40" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon" title="Athlon">Athlon</a></li> <li><a href="/wiki/Ryzen" title="Ryzen">Ryzen</a></li> <li><a href="/wiki/Threadripper" title="Threadripper">Threadripper</a></li> <li><a href="/wiki/Epyc" title="Epyc">Epyc</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;background-color: #DDDDDD">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Early x86 (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am286" class="mw-redirect" title="Am286">Am286</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am386" title="Am386">Am386</a></li> <li><a href="/wiki/Am486" title="Am486">Am486</a></li> <li><a href="/wiki/Am5x86" title="Am5x86">Am5x86</a></li> <li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/AMD_K6-2" title="AMD K6-2">K6-2</a></li> <li><a href="/wiki/AMD_K6-III" title="AMD K6-III">K6-III</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon</a> <ul><li><a href="/wiki/Athlon_XP" class="mw-redirect" title="Athlon XP">XP</a></li> <li><a href="/wiki/Athlon_MP" class="mw-redirect" title="Athlon MP">MP</a></li></ul></li> <li><a href="/wiki/Duron" title="Duron">Duron</a></li> <li><a href="/wiki/Geode_(processor)" title="Geode (processor)">Geode</a></li> <li><a href="/wiki/AMD_%C3%89lan" title="AMD Élan">AMD Élan</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> <ul><li><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">X2</a></li> <li><a href="/wiki/Athlon_II" title="Athlon II">II</a></li></ul></li> <li><a href="/wiki/Sempron" title="Sempron">Sempron</a></li> <li><a href="/wiki/AMD_Turion" title="AMD Turion">Turion</a></li> <li><a href="/wiki/AMD_Phenom" title="AMD Phenom">Phenom</a> <ul><li><a href="/wiki/Phenom_II" title="Phenom II">II</a></li></ul></li> <li><a href="/wiki/AMD_FX" title="AMD FX">FX</a></li> <li><a href="/wiki/Opteron" title="Opteron">Opteron</a></li> <li><a href="/wiki/AMD_APU" title="AMD APU">A-series APUs</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Other</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_Am9080" title="AMD Am9080">Am9080</a></li> <li><a href="/wiki/AMD_Am2900" title="AMD Am2900">Am2900</a> <ul><li><a href="/wiki/List_of_AMD_Am2900_and_Am29000_families" title="List of AMD Am2900 and Am29000 families">list</a></li></ul></li> <li><a href="/wiki/AMD_Am29000" title="AMD Am29000">Am29000</a></li> <li><a href="/wiki/Alchemy_(microarchitecture)" class="mw-redirect" title="Alchemy (microarchitecture)">Alchemy</a> <ul><li><a href="/wiki/MIPS_architecture#MIPS32" title="MIPS architecture">MIPS32</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><i>Italics</i> indicates an upcoming architecture.</div></td></tr></tbody></table></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?useformat=desktop&type=1x1&usesul3=0" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=List_of_AMD_Athlon_64_processors&oldid=1280955836">https://en.wikipedia.org/w/index.php?title=List_of_AMD_Athlon_64_processors&oldid=1280955836</a>"</div></div> <div id="catlinks" class="catlinks" data-mw="interface"><div id="mw-normal-catlinks" class="mw-normal-catlinks"><a href="/wiki/Help:Category" title="Help:Category">Categories</a>: <ul><li><a href="/wiki/Category:AMD_x86_microprocessors" title="Category:AMD x86 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