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Interoperability subsection</span> </button> <ul id="toc-SMBus/I²C_Interoperability-sublist" class="vector-toc-list"> <li id="toc-Electrical" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Electrical"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1</span> <span>Electrical</span> </div> </a> <ul id="toc-Electrical-sublist" class="vector-toc-list"> <li id="toc-Input_Voltage_(VIL_and_VIH)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Input_Voltage_(VIL_and_VIH)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.1</span> <span>Input Voltage (<i>V<sub>IL</sub></i> and <i>V<sub>IH</sub></i>)</span> </div> </a> <ul id="toc-Input_Voltage_(VIL_and_VIH)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Sink_Current_(IOL)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Sink_Current_(IOL)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.2</span> <span>Sink Current (<i>I<sub>OL</sub></i>)</span> </div> </a> <ul id="toc-Sink_Current_(IOL)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Frequency_(FMAX_and_FMIN)" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Frequency_(FMAX_and_FMIN)"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.3</span> <span>Frequency (<i>F<sub>MAX</sub></i> and <i>F<sub>MIN</sub></i>)</span> </div> </a> <ul id="toc-Frequency_(FMAX_and_FMIN)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Timing" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Timing"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.4</span> <span>Timing</span> </div> </a> <ul id="toc-Timing-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Protocols" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Protocols"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2</span> <span>Protocols</span> </div> </a> <ul id="toc-Protocols-sublist" class="vector-toc-list"> <li id="toc-ACK_and_NACK_usage" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#ACK_and_NACK_usage"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.1</span> <span>ACK and NACK usage</span> </div> </a> <ul id="toc-ACK_and_NACK_usage-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-SMBus_protocols" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#SMBus_protocols"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.2</span> <span>SMBus protocols</span> </div> </a> <ul id="toc-SMBus_protocols-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Address_Resolution_Protocol" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Address_Resolution_Protocol"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.3</span> <span>Address Resolution Protocol</span> </div> </a> <ul id="toc-Address_Resolution_Protocol-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Time-out_feature" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Time-out_feature"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.4</span> <span>Time-out feature</span> </div> </a> <ul id="toc-Time-out_feature-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Packet_Error_Checking" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Packet_Error_Checking"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.5</span> <span>Packet Error Checking</span> </div> </a> <ul id="toc-Packet_Error_Checking-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-SMBALERT#" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#SMBALERT#"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.6</span> <span>SMBALERT#</span> </div> </a> <ul id="toc-SMBALERT#-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Support" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Support"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Support</span> </div> </a> <ul id="toc-Support-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Replacement" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Replacement"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Replacement</span> </div> </a> <ul id="toc-Replacement-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" 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mw-first-heading"><span class="mw-page-title-main">System Management Bus</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. 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class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/SMBus" title="SMBus – Catalan" lang="ca" hreflang="ca" data-title="SMBus" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – Czech" lang="cs" hreflang="cs" data-title="System Management Bus" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-da mw-list-item"><a href="https://da.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – Danish" lang="da" hreflang="da" data-title="System Management Bus" data-language-autonym="Dansk" data-language-local-name="Danish" class="interlanguage-link-target"><span>Dansk</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – German" lang="de" hreflang="de" data-title="System Management Bus" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – Spanish" lang="es" hreflang="es" data-title="System Management Bus" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – French" lang="fr" hreflang="fr" data-title="System Management Bus" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EC%8B%9C%EC%8A%A4%ED%85%9C_%EA%B4%80%EB%A6%AC_%EB%B2%84%EC%8A%A4" title="시스템 관리 버스 – Korean" lang="ko" hreflang="ko" data-title="시스템 관리 버스" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – Italian" lang="it" hreflang="it" data-title="System Management Bus" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-pt badge-Q70893996 mw-list-item" title=""><a href="https://pt.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – Portuguese" lang="pt" hreflang="pt" data-title="System Management Bus" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ro mw-list-item"><a href="https://ro.wikipedia.org/wiki/System_Management_Bus" title="System Management Bus – Romanian" lang="ro" hreflang="ro" data-title="System Management Bus" data-language-autonym="Română" data-language-local-name="Romanian" class="interlanguage-link-target"><span>Română</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/SMBus" title="SMBus – Russian" lang="ru" hreflang="ru" data-title="SMBus" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/SMBus" title="SMBus – Ukrainian" lang="uk" hreflang="uk" data-title="SMBus" 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class="vector-pinnable-header-toggle-button vector-pinnable-header-unpin-button" data-event-name="pinnable-header.vector-appearance.unpin">hide</button> </div> </div> </div> </nav> </div> </div> <div id="bodyContent" class="vector-body" aria-labelledby="firstHeading" data-mw-ve-target-container> <div class="vector-body-before-content"> <div class="mw-indicators"> </div> <div id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Simple two-wire bus for motherboards</div> <p><span class="anchor" id="1.0"></span><span class="anchor" id="1.1"></span><span class="anchor" id="2.0"></span><span class="anchor" id="3.0"></span><span class="anchor" id="3.1"></span><span class="anchor" id="3.2"></span> The <b>System Management Bus</b> (<b>SMBus</b> or <b>SMB</b>) is a <a href="/wiki/Single-ended_signalling" class="mw-redirect" title="Single-ended signalling">single-ended</a> simple two-wire <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a> for the purpose of lightweight communication. Most commonly it is found in chipsets of computer motherboards for communication with the power source for ON/OFF instructions. The exact functionality and hardware interfaces vary with vendors. </p><p>It is derived from <a href="/wiki/I%C2%B2C" title="I²C">I²C</a> for communication with low-bandwidth devices on a <a href="/wiki/Motherboard" title="Motherboard">motherboard</a>, especially power related chips such as a laptop's rechargeable battery subsystem (see <a href="/wiki/Smart_Battery_System" title="Smart Battery System">Smart Battery System</a> and <a href="/wiki/ACPI" title="ACPI">ACPI</a>).<sup id="cite_ref-FOLDOC_1-0" class="reference"><a href="#cite_note-FOLDOC-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> Other devices might include external master hosts, temperature sensor, fan or voltage sensors, lid switches, clock generator, and <a href="/wiki/RGB_lighting" class="mw-redirect" title="RGB lighting">RGB lighting</a>. <a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">Peripheral Component Interconnect</a> (PCI) add-in cards may connect to an SMBus segment. </p><p>A device can provide manufacturer information, indicate its model/part number, save its state for a suspend event, report different types of errors, accept control parameters, return status over SMBus, and poll chipset registers. The SMBus is generally not user configurable or accessible.<sup id="cite_ref-FOLDOC_1-1" class="reference"><a href="#cite_note-FOLDOC-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> Although SMBus devices usually can't identify their functionality, a new <a href="/wiki/Power_Management_Bus" title="Power Management Bus">PMBus</a> coalition has extended SMBus to include conventions allowing that. </p><p>The SMBus was defined by <a href="/wiki/Intel" title="Intel">Intel</a> and <a href="/wiki/Duracell" title="Duracell">Duracell</a> in 1994.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> It carries clock, data, and instructions and is based on <a href="/wiki/Philips" title="Philips">Philips</a>' <a href="/wiki/I%C2%B2C" title="I²C">I²C</a> serial bus protocol.<sup id="cite_ref-FOLDOC_1-2" class="reference"><a href="#cite_note-FOLDOC-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> Its clock frequency range is 10 kHz to 100 kHz. (PMBus extends this to 400 kHz.) Its voltage levels and timings are more strictly defined than those of I²C, but devices belonging to the two systems are often successfully mixed on the same bus. <sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="According to whom? (March 2017)">citation needed</span></a></i>]</sup> </p><p>SMBus is used as an interconnect in several platform management standards including: <a href="/wiki/Alert_Standard_Format" title="Alert Standard Format">Alert Standard Format</a> (ASF), <a href="/wiki/Desktop_and_mobile_Architecture_for_System_Hardware" title="Desktop and mobile Architecture for System Hardware">Desktop and mobile Architecture for System Hardware</a> (DASH), <a href="/wiki/Intelligent_Platform_Management_Interface" title="Intelligent Platform Management Interface">Intelligent Platform Management Interface</a> (IPMI). </p><p>SMBus is used to access DRAM configuration information as part of <a href="/wiki/Serial_presence_detect" title="Serial presence detect">serial presence detect</a> (SPD). SMBus has grown into a wide variety of system enumeration use cases other than power management. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="SMBus/I²C_Interoperability"><span id="SMBus.2FI.C2.B2C_Interoperability"></span>SMBus/I²C Interoperability</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=1" title="Edit section: SMBus/I²C Interoperability"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>While SMBus is derived from I²C, there are several major differences between the specifications of the two busses in the areas of electricals, timing, protocols and operating modes.<sup id="cite_ref-smbus_org-smbus20_3-0" class="reference"><a href="#cite_note-smbus_org-smbus20-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-smbus_org-smbus30_4-0" class="reference"><a href="#cite_note-smbus_org-smbus30-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-nxp_com_UM10204_3_5-0" class="reference"><a href="#cite_note-nxp_com_UM10204_3-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-maxim-ic_com-476_6-0" class="reference"><a href="#cite_note-maxim-ic_com-476-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Electrical">Electrical</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=2" title="Edit section: Electrical"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id="Input_Voltage_(VIL_and_VIH)"><span id="Input_Voltage_.28VIL_and_VIH.29"></span>Input Voltage (<i>V<sub>IL</sub></i> and <i>V<sub>IH</sub></i>)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=3" title="Edit section: Input Voltage (VIL and VIH)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>When mixing devices, the I²C specification defines the input levels to be 30% and 70% of the supply voltage <i>V<sub>DD</sub></i>,<sup id="cite_ref-nxp_com_UM10204_3_5-1" class="reference"><a href="#cite_note-nxp_com_UM10204_3-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page: 9">: 9 </span></sup> which may be 5 V, 3.3 V, or some other value. Instead of relating the bus input levels to <i>V<sub>DD</sub></i>, SMBus defines them to be fixed at 0.8 and 2.1 V. SMBus 2.0 supports <i>V<sub>DD</sub></i> ranging from 3 to 5 V. SMBus 3.0 supports <i>V<sub>DD</sub></i> ranging from 1.8 to 5 V and <i>V<sub>IH</sub></i> = 1.35 V.<sup id="cite_ref-smbus_org-smbus30_4-1" class="reference"><a href="#cite_note-smbus_org-smbus30-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Sink_Current_(IOL)"><span id="Sink_Current_.28IOL.29"></span>Sink Current (<i>I<sub>OL</sub></i>)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=4" title="Edit section: Sink Current (IOL)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SMBus 2.0 defines a ‘High Power’ class that includes a 4 mA sink current that cannot be driven by I²C chips unless the pull-up resistor is sized to I²C-bus levels. </p><p>NXP devices have a higher power set of electrical characteristics than SMBus 1.0. The main difference is the current sink capability with <i>V<sub>OL</sub></i> = 0.4 V. </p> <ul><li>SMBus low power = 350 μA</li> <li>SMBus high power = 4 mA</li> <li>I²C-bus = 3 mA</li></ul> <p>SMBus ‘high power’ devices and I²C-bus devices will work together if the pull-up resistor is sized for 3 mA. </p> <div class="mw-heading mw-heading4"><h4 id="Frequency_(FMAX_and_FMIN)"><span id="Frequency_.28FMAX_and_FMIN.29"></span>Frequency (<i>F<sub>MAX</sub></i> and <i>F<sub>MIN</sub></i>)</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=5" title="Edit section: Frequency (FMAX and FMIN)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The SMBus clock is defined from 10 to 100 kHz while I²C can be 0–100 kHz, 0–400 kHz, 0–1 MHz and 0–3.4 MHz, depending on the mode. This means that an I²C bus running at less than 10 kHz will not be SMBus compliant since the SMBus devices may time out. Many SMBus devices will however support lower frequencies. </p><p>SMBus 3.0 adds 400 kHz and 1 MHz bus speeds. </p> <div class="mw-heading mw-heading4"><h4 id="Timing">Timing</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=6" title="Edit section: Timing"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>SMBus defines a clock low time-out, TIMEOUT of 35 ms. I²C does not specify any timeout limit.</li> <li>SMBus specifies T<sub>LOW:SEXT</sub> as the cumulative clock low extend time for a slave device. I²C does not have a similar specification.</li> <li>SMBus specifies T<sub>LOW:MEXT</sub> as the cumulative clock low extend time for a master device. Again I²C does not have a similar specification.</li> <li>SMBus defines both rise and fall time of bus signals. I²C does not.</li> <li>The SMBus time-out specifications do not preclude I²C devices co-operating reliably on the SMBus. It is the responsibility of the designer to ensure that I²C devices are not going to violate these bus timing parameters.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Protocols">Protocols</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=7" title="Edit section: Protocols"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id="ACK_and_NACK_usage">ACK and NACK usage</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=8" title="Edit section: ACK and NACK usage"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>There are the following differences in the use of the NACK bus signaling: In I²C, a slave receiver is allowed to not acknowledge the slave address, if for example it's unable to receive because it's performing some real time task. SMBus requires devices to acknowledge their own address always, as a mechanism to detect a removable device's presence on the bus (battery, docking station, etc.) </p><p>I²C specifies that a slave device, although it may acknowledge its own address, may decide, some time later in the transfer, that it cannot receive any more data bytes. I²C specifies that the device may indicate this by generating the not acknowledge on the first byte to follow. </p><p>Other than to indicate a slave's device-busy condition, SMBus also uses the NACK mechanism to indicate the reception of an invalid command or datum. Since such a condition may occur on the last byte of the transfer, it is required that SMBus devices have the ability to generate the not acknowledge after the transfer of each byte and before the completion of the transaction. This is important because SMBus does not provide any other resend signaling. This difference in the use of the NACK signaling has implications on the specific implementation of the SMBus port, especially in devices that handle critical system data such as the SMBus host and the SBS components. </p> <div class="mw-heading mw-heading4"><h4 id="SMBus_protocols">SMBus protocols</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=9" title="Edit section: SMBus protocols"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Each message transaction on SMBus follows the format of one of the defined SMBus protocols. The SMBus protocols are a subset of the data transfer formats defined in the I²C specifications. I²C devices that can be accessed through one of the SMBus protocols are compatible with the SMBus specifications. I²C devices that do not adhere to these protocols cannot be accessed by standard methods as defined in the SMBus and <a href="/wiki/Advanced_Configuration_and_Power_Interface" class="mw-redirect" title="Advanced Configuration and Power Interface">Advanced Configuration and Power Interface</a> (ACPI) specifications. </p> <div class="mw-heading mw-heading4"><h4 id="Address_Resolution_Protocol">Address Resolution Protocol</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=10" title="Edit section: Address Resolution Protocol"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The SMBus uses I²C hardware and I²C hardware addressing, but adds second-level software for building special systems. In particular its specifications include an Address Resolution Protocol that can make dynamic address allocations. Dynamic reconfiguration of the hardware and software allow bus devices to be ‘hot-plugged’ and used immediately, without restarting the system. The devices are recognized automatically and assigned unique addresses. This advantage results in a plug-and-play user interface. In both those protocols there is a very useful distinction made between a System Host and all the other devices in the system that can have the names and functions of masters or slaves. </p><p>In the context of motherboard <a href="/wiki/PCI_Express" title="PCI Express">PCI Express</a> slots, the PCIe Electromechanical Specification expects ARP to be provided for the SMBus pins. However, because ARP is marked "optional" in the SMBus specification, it's commonly left unimplemented.<sup id="cite_ref-pci-2023_7-0" class="reference"><a href="#cite_note-pci-2023-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Time-out_feature">Time-out feature</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=11" title="Edit section: Time-out feature"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SMBus has a time-out feature which resets devices if a communication takes too long. This explains the minimum clock frequency of 10 kHz to prevent locking up the bus. I²C can be a ‘DC’ bus, meaning that a slave device stretches the master clock when performing some routine while the master is accessing it. This will notify to the master that the slave is busy but does not want to lose the communication. The slave device will allow continuation after its task is complete. There is no limit in the I²C-bus protocol as to how long this delay can be, whereas for an SMBus system, it would be limited to 35 ms. The SMBus protocol just assumes that if something takes too long, then it means that there is a problem on the bus and that all devices must reset in order to clear this mode. Slave devices are not then allowed to hold the clock LOW too long. </p> <div class="mw-heading mw-heading4"><h4 id="Packet_Error_Checking">Packet Error Checking</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=12" title="Edit section: Packet Error Checking"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SMBus 1.1 and later define optional <b>Packet Error Checking</b> (<b>PEC</b>). In that mode, a PEC (packet error code) byte is appended at the end of each transaction. The byte is calculated as <a href="/wiki/CRC-8" class="mw-redirect" title="CRC-8">CRC-8</a> <a href="/wiki/Checksum" title="Checksum">checksum</a>, calculated over the entire message including the address and read/write bit. The polynomial used is x<sup>8</sup>+x<sup>2</sup>+x+1 (the CRC-8-<a href="/wiki/Asynchronous_Transfer_Mode" title="Asynchronous Transfer Mode">ATM</a> <a href="/wiki/CRC-based_framing" title="CRC-based framing">HEC</a> algorithm, initialized to zero).<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="SMBALERT#"><span id="SMBALERT.23"></span>SMBALERT#</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=13" title="Edit section: SMBALERT#"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The SMBus has an extra optional shared <a href="/wiki/Interrupt" title="Interrupt">interrupt</a> signal called SMBALERT#, which can be used by slaves to tell the host to ask its slaves about events of interest. SMBus also defines a less common "Host Notify Protocol", providing similar notifications but passing more data and building on the I²C multi-master mode. </p> <div class="mw-heading mw-heading2"><h2 id="Support">Support</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=14" title="Edit section: Support"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SMBus devices are supported by <a href="/wiki/FreeBSD" title="FreeBSD">FreeBSD</a>, <a href="/wiki/OpenBSD" title="OpenBSD">OpenBSD</a>, <a href="/wiki/NetBSD" title="NetBSD">NetBSD</a>, <a href="/wiki/DragonFly_BSD" title="DragonFly BSD">DragonFly BSD</a>, <a href="/wiki/Linux" title="Linux">Linux</a>, <a href="/wiki/Windows_98" title="Windows 98">Windows 98</a> and newer and <a href="/wiki/Windows_CE" class="mw-redirect" title="Windows CE">Windows CE</a>. </p> <div class="mw-heading mw-heading2"><h2 id="Replacement">Replacement</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=15" title="Edit section: Replacement"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><a href="/wiki/DDR5" class="mw-redirect" title="DDR5">DDR5</a> introduces <a href="/wiki/I3C_(bus)" title="I3C (bus)">I3C</a> for its presence detect communication, replacing SMBus.<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </p><p><a href="/wiki/PCI_express" class="mw-redirect" title="PCI express">PCI express</a> devices commonly use SMBus as a "out-of-band management port". However, device vendors frequently use SMBus multiplexers (Mux) to manage address clashes (which are in turn caused by them <i>not</i> implementing the Address Resolution Protocol), causing link interruptions that break <a href="/wiki/Management_Component_Transport_Protocol" title="Management Component Transport Protocol">Management Component Transport Protocol</a> and other protocols when the Mux switches targets. To solve this problem, SNIA's <a href="/wiki/Enterprise_and_Data_Center_Standard_Form_Factor" title="Enterprise and Data Center Standard Form Factor">Enterprise and Data Center Standard Form Factor</a> version 3.1 (January 2023) describes a way to use I3C basic over the PCIe two-wire interface.<sup id="cite_ref-pci-2023_7-1" class="reference"><a href="#cite_note-pci-2023-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> <a href="/wiki/NVM_Express" title="NVM Express">NVM Express</a> 2.1 (August 2024) is also reworded to allow the use of I3C, "to match the new conventions used by SNIA SFF TA's EDSFF and PCI-SIG specifications for I3C".<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=16" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/List_of_network_buses" title="List of network buses">List of network buses</a></li> <li><a href="/wiki/Embedded_controller" title="Embedded controller">Embedded controller</a> (EC)</li> <li><a href="/wiki/Super_I/O" title="Super I/O">Super I/O</a></li> <li><a href="/wiki/Low_Pin_Count" title="Low Pin Count">Low Pin Count</a> (LPC)</li> <li><a href="/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface">Serial Peripheral Interface</a> (SPI)</li> <li><a href="/wiki/Platform_Environment_Control_Interface" title="Platform Environment Control Interface">Platform Environment Control Interface</a> (PECI)</li> <li><a href="/wiki/Host_Embedded_Controller_Interface" title="Host Embedded Controller Interface">Host Embedded Controller Interface</a> (HECI)</li> <li><a href="/wiki/Power_Management_Bus" title="Power Management Bus">Power Management Bus</a> (PMBus)</li> <li><a href="/wiki/System_Management_Controller" title="System Management Controller">System Management Controller</a> (SMC)</li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=17" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-FOLDOC-1"><span class="mw-cite-backlink">^ <a href="#cite_ref-FOLDOC_1-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-FOLDOC_1-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-FOLDOC_1-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1041539562">.mw-parser-output .citation{word-wrap:break-word}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}</style><span class="citation foldoc">This article is based on material taken from <a rel="nofollow" class="external text" href="https://foldoc.org/System+Management+Bus">System+Management+Bus</a> at the <i><a href="/wiki/Free_On-line_Dictionary_of_Computing" title="Free On-line Dictionary of Computing">Free On-line Dictionary of Computing</a></i>  prior to 1 November 2008 and incorporated under the "relicensing" terms of the <a href="/wiki/GNU_Free_Documentation_License" title="GNU Free Documentation License">GFDL</a>, version 1.3 or later.</span></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output 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rel="nofollow" class="external text" href="https://www.thefreelibrary.com/DURACELL+AND+INTEL+ANNOUNCE+'SMART+BATTERY'+SPECIFICATIONS+FOR...-a015157559">"DURACELL AND INTEL ANNOUNCE 'SMART BATTERY' SPECIFICATIONS FOR PORTABLE COMPUTERS - Free Online Library"</a>. <i>Thefreelibrary.com</i><span class="reference-accessdate">. Retrieved <span class="nowrap">27 October</span> 2017</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Thefreelibrary.com&rft.atitle=DURACELL+AND+INTEL+ANNOUNCE+%27SMART+BATTERY%27+SPECIFICATIONS+FOR+PORTABLE+COMPUTERS+-+Free+Online+Library&rft_id=https%3A%2F%2Fwww.thefreelibrary.com%2FDURACELL%2BAND%2BINTEL%2BANNOUNCE%2B%27SMART%2BBATTERY%27%2BSPECIFICATIONS%2BFOR...-a015157559&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span></span> </li> <li id="cite_note-smbus_org-smbus20-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-smbus_org-smbus20_3-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://smbus.org/specs/smbus20.pdf">"System Management Bus (SMBus) Specification Version 2.0"</a> <span class="cs1-format">(PDF)</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=System+Management+Bus+%28SMBus%29+Specification+Version+2.0&rft_id=http%3A%2F%2Fsmbus.org%2Fspecs%2Fsmbus20.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span> smbus.org</span> </li> <li id="cite_note-smbus_org-smbus30-4"><span class="mw-cite-backlink">^ <a href="#cite_ref-smbus_org-smbus30_4-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-smbus_org-smbus30_4-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://smbus.org/specs/SMBus_3_0_20141220.pdf">"System Management Bus (SMBus) Specification Version 3.0"</a> <span class="cs1-format">(PDF)</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=System+Management+Bus+%28SMBus%29+Specification+Version+3.0&rft_id=http%3A%2F%2Fsmbus.org%2Fspecs%2FSMBus_3_0_20141220.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span> smbus.org</span> </li> <li id="cite_note-nxp_com_UM10204_3-5"><span class="mw-cite-backlink">^ <a href="#cite_ref-nxp_com_UM10204_3_5-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-nxp_com_UM10204_3_5-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.nxp.com/docs/en/user-guide/UM10204.pdf">"I2C-bus specification and user manual Rev. 7"</a> <span class="cs1-format">(PDF)</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=I2C-bus+specification+and+user+manual+Rev.+7&rft_id=https%3A%2F%2Fwww.nxp.com%2Fdocs%2Fen%2Fuser-guide%2FUM10204.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span> nxp.com</span> </li> <li id="cite_note-maxim-ic_com-476-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-maxim-ic_com-476_6-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.maxim-ic.com/appnotes.cfm/an_pk/476">"APPLICATION NOTE 476 Comparing the I²C Bus to the SMBus"</a>. Maxim. 2000-12-01.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=APPLICATION+NOTE+476+Comparing+the+I%C2%B2C+Bus+to+the+SMBus&rft.pub=Maxim&rft.date=2000-12-01&rft_id=http%3A%2F%2Fwww.maxim-ic.com%2Fappnotes.cfm%2Fan_pk%2F476&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span> 090429 maxim-ic.com</span> </li> <li id="cite_note-pci-2023-7"><span class="mw-cite-backlink">^ <a href="#cite_ref-pci-2023_7-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-pci-2023_7-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFJurskiLoewenConstantineOrozco" class="citation web cs1">Jurski, Janusz; Loewen, Myron; Constantine, Anthony; Orozco, Juan; Kelly, Bryan; Lukwinski, Zbigniew. <a rel="nofollow" class="external text" href="https://storagedeveloper.org/sites/default/files/SDC/2023/presentations/SNIA-SDC23-Jurski-Loewen-Constantine-Orozco-Overcoming-SMBus-limitations-with-I3C.pdf">"Overcoming SMBus Limitations with I3C"</a> <span class="cs1-format">(PDF)</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Overcoming+SMBus+Limitations+with+I3C&rft.aulast=Jurski&rft.aufirst=Janusz&rft.au=Loewen%2C+Myron&rft.au=Constantine%2C+Anthony&rft.au=Orozco%2C+Juan&rft.au=Kelly%2C+Bryan&rft.au=Lukwinski%2C+Zbigniew&rft_id=https%3A%2F%2Fstoragedeveloper.org%2Fsites%2Fdefault%2Ffiles%2FSDC%2F2023%2Fpresentations%2FSNIA-SDC23-Jurski-Loewen-Constantine-Orozco-Overcoming-SMBus-limitations-with-I3C.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span> <a rel="nofollow" class="external text" href="https://www.snia.org/educational-library/overcoming-smbus-limitations-i3c-2023">video</a></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://sbs-forum.org/marcom/winter01/Designing%20with%20SMBus%202.pdf">"Designing with SMBus 2.0"</a> <span class="cs1-format">(PDF)</span>. <i>Sbs-forum.org</i><span class="reference-accessdate">. Retrieved <span class="nowrap">27 October</span> 2017</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Sbs-forum.org&rft.atitle=Designing+with+SMBus+2.0&rft_id=http%3A%2F%2Fsbs-forum.org%2Fmarcom%2Fwinter01%2FDesigning%2520with%2520SMBus%25202.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span></span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.smbus.org/faq/crc8Applet.htm">"CRC-8 Calculator"</a>. <i>Smbus.org</i><span class="reference-accessdate">. Retrieved <span class="nowrap">27 October</span> 2017</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Smbus.org&rft.atitle=CRC-8+Calculator&rft_id=http%3A%2F%2Fwww.smbus.org%2Ffaq%2Fcrc8Applet.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span></span> </li> <li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.picbasic.co.uk/forum/showthread.php?t=6231">"CRC-8 for SMBus"</a>. <i>Picbasic.co.uk</i><span class="reference-accessdate">. Retrieved <span class="nowrap">27 October</span> 2017</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Picbasic.co.uk&rft.atitle=CRC-8+for+SMBus&rft_id=http%3A%2F%2Fwww.picbasic.co.uk%2Fforum%2Fshowthread.php%3Ft%3D6231&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span></span> </li> <li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.mipi.org/blog/mipi-i3c-basic-in-jedec-ddr5-a-sum-greater-than-its-parts">"MIPI I3C Basic in JEDEC DDR5: A Sum Greater Than Its Parts"</a>. <i>www.mipi.org</i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=www.mipi.org&rft.atitle=MIPI+I3C+Basic+in+JEDEC+DDR5%3A+A+Sum+Greater+Than+Its+Parts&rft_id=https%3A%2F%2Fwww.mipi.org%2Fblog%2Fmipi-i3c-basic-in-jedec-ddr5-a-sum-greater-than-its-parts&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span></span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://nvmexpress.org/specification/changes-in-nvm-express-revision-2-1/">"Changes in NVM Express Revision 2.1 - NVM Express"</a>. 23 August 2024.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Changes+in+NVM+Express+Revision+2.1+-+NVM+Express&rft.date=2024-08-23&rft_id=https%3A%2F%2Fnvmexpress.org%2Fspecification%2Fchanges-in-nvm-express-revision-2-1%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+Management+Bus" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_Management_Bus&action=edit&section=18" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><span class="official-website"><span class="url"><a rel="nofollow" class="external text" href="http://www.smbus.org/">Official website</a></span></span></li> <li><a rel="nofollow" class="external text" href="http://www.smbus.org/specs/">Official SMBus specifications (free)</a></li> <li><a rel="nofollow" class="external text" href="http://www.sbs-forum.org/">SBS forum</a></li> <li><a rel="nofollow" class="external text" href="http://www.tech-faq.com/smbus.shtml">SMBus at tech-faq.com</a></li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output .hlist.inline ol,.mw-parser-output .hlist.inline ul,.mw-parser-output .hlist dl dl,.mw-parser-output .hlist dl ol,.mw-parser-output .hlist dl ul,.mw-parser-output .hlist ol dl,.mw-parser-output .hlist ol ol,.mw-parser-output .hlist ol ul,.mw-parser-output .hlist ul dl,.mw-parser-output .hlist ul ol,.mw-parser-output .hlist ul ul{display:inline}.mw-parser-output .hlist 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this template">e</abbr></a></li></ul></div><div id="Technical_and_de_facto_standards_for_wired_computer_buses" style="font-size:114%;margin:0 4em"><a href="/wiki/Technical_standard" title="Technical standard">Technical</a> and <a href="/wiki/De_facto_standard" title="De facto standard"><i>de facto</i> standards</a> for <a href="/wiki/Wired_communication" title="Wired communication">wired</a> <a href="/wiki/Bus_(computing)" title="Bus (computing)">computer buses</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">General</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/System_bus" title="System bus">System bus</a></li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a></li> <li><a href="/wiki/Back-side_bus" title="Back-side bus">Back-side bus</a></li> <li><a href="/wiki/Daisy_chain_(electrical_engineering)" title="Daisy chain (electrical engineering)">Daisy chain</a></li> <li><a href="/wiki/Control_bus" title="Control bus">Control bus</a></li> <li><a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">Address bus</a></li> <li><a href="/wiki/Bus_contention" title="Bus contention">Bus contention</a></li> <li><a href="/wiki/Bus_mastering" title="Bus mastering">Bus mastering</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li> <li><a href="/wiki/Plug_and_play" title="Plug and play">Plug and play</a></li> <li><a href="/wiki/List_of_interface_bit_rates#Computer_buses" title="List of interface bit rates">List of bus bandwidths</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Standards</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/SS-50_bus" title="SS-50 bus">SS-50 bus</a></li> <li><a href="/wiki/S-100_bus" title="S-100 bus">S-100 bus</a></li> <li><a href="/wiki/Multibus" title="Multibus">Multibus</a></li> <li><a href="/wiki/Unibus" title="Unibus">Unibus</a></li> <li><a href="/wiki/VAXBI_bus" title="VAXBI bus">VAXBI</a></li> <li><a href="/wiki/MBus_(SPARC)" title="MBus (SPARC)">MBus</a></li> <li><a href="/wiki/STD_Bus" title="STD Bus">STD Bus</a></li> <li><a class="mw-selflink selflink">SMBus</a></li> <li><a href="/wiki/Q-Bus" title="Q-Bus">Q-Bus</a></li> <li><a href="/wiki/Europe_Card_Bus" title="Europe Card Bus">Europe Card Bus</a></li> <li><a href="/wiki/Industry_Standard_Architecture" title="Industry Standard Architecture">ISA</a></li> <li><a href="/wiki/STEbus" title="STEbus">STEbus</a></li> <li><a href="/wiki/Amiga_Zorro_II" title="Amiga Zorro II">Zorro II</a></li> <li><a href="/wiki/Amiga_Zorro_III" title="Amiga Zorro III">Zorro III</a></li> <li><a href="/wiki/Computer_Automated_Measurement_and_Control" title="Computer Automated Measurement and Control">CAMAC</a></li> <li><a href="/wiki/FASTBUS" title="FASTBUS">FASTBUS</a></li> <li><a href="/wiki/Low_Pin_Count" title="Low Pin Count">LPC</a></li> <li><a href="/wiki/HP_Precision_Bus" title="HP Precision Bus">HP Precision Bus</a></li> <li><a href="/wiki/Extended_Industry_Standard_Architecture" title="Extended Industry Standard Architecture">EISA</a></li> <li><a href="/wiki/VMEbus" title="VMEbus">VME</a></li> <li><a href="/wiki/VME_eXtensions_for_Instrumentation" title="VME eXtensions for Instrumentation">VXI</a></li> <li><a href="/wiki/VXS" title="VXS">VXS</a></li> <li><a href="/wiki/VPX" title="VPX">VPX</a></li> <li><a href="/wiki/NuBus" title="NuBus">NuBus</a></li> <li><a href="/wiki/TURBOchannel" title="TURBOchannel">TURBOchannel</a></li> <li><a href="/wiki/Micro_Channel_architecture" title="Micro Channel architecture">MCA</a></li> <li><a href="/wiki/SBus" title="SBus">SBus</a></li> <li><a href="/wiki/VESA_Local_Bus" title="VESA Local Bus">VLB</a></li> <li><a href="/wiki/GSC_bus" title="GSC bus">HP GSC bus</a></li> <li><a href="/wiki/InfiniBand" title="InfiniBand">InfiniBand</a></li> <li><a href="/wiki/Ethernet" title="Ethernet">Ethernet</a></li> <li><a href="/wiki/Ultra_Port_Architecture" title="Ultra Port Architecture">UPA</a></li> <li><a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a></li> <li><a href="/wiki/PCI-X" title="PCI-X">PCI Extended (PCI-X)</a></li> <li><a href="/wiki/PCI_eXtensions_for_Instrumentation" title="PCI eXtensions for Instrumentation">PXI</a></li> <li><a href="/wiki/PCI_Express" title="PCI Express">PCI Express (PCIe)</a></li> <li><a href="/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port">AGP</a></li> <li><a href="/wiki/Compute_Express_Link" title="Compute Express Link">Compute Express Link (CXL)</a></li> <li><a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface (DMI)</a></li> <li><a href="/wiki/RapidIO" title="RapidIO">RapidIO</a></li> <li><a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">Intel QuickPath Interconnect</a></li> <li><a href="/wiki/NVLink" title="NVLink">NVLink</a></li> <li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> <ul><li><a href="/wiki/Infinity_Fabric" class="mw-redirect" title="Infinity Fabric">Infinity Fabric</a></li></ul></li> <li><a href="/wiki/Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Intel Ultra Path Interconnect</a></li> <li><a href="/wiki/Coherent_Accelerator_Processor_Interface" title="Coherent Accelerator Processor Interface">Coherent Accelerator Processor Interface (CAPI)</a></li> <li><a href="/wiki/SpaceWire" title="SpaceWire">SpaceWire</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Storage</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ST-506/ST-412" title="ST-506/ST-412">ST-506</a></li> <li><a href="/wiki/Enhanced_Small_Disk_Interface" title="Enhanced Small Disk Interface">ESDI</a></li> <li><a href="/wiki/Intelligent_Peripheral_Interface" title="Intelligent Peripheral Interface">IPI</a></li> <li><a href="/wiki/Storage_Module_Device" title="Storage Module Device">SMD</a></li> <li><a href="/wiki/Parallel_ATA" title="Parallel ATA">Parallel ATA (PATA)</a></li> <li><a href="/wiki/Bus_and_Tag" title="Bus and Tag">Bus and Tag</a></li> <li><a href="/wiki/Digital_Storage_Systems_Interconnect" title="Digital Storage Systems Interconnect">DSSI</a></li> <li><a href="/wiki/HIPPI" title="HIPPI">HIPPI</a></li> <li><a href="/wiki/SATA" title="SATA">Serial ATA (SATA)</a></li> <li><a href="/wiki/SCSI" title="SCSI">SCSI</a> <ul><li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel</a></li> <li><a href="/wiki/Serial_Attached_SCSI" title="Serial Attached SCSI">SAS</a></li></ul></li> <li><a href="/wiki/ESCON" title="ESCON">ESCON</a></li> <li><a href="/wiki/Fibre_Channel" title="Fibre Channel">Fibre Channel</a></li> <li><a href="/wiki/Serial_Storage_Architecture" title="Serial Storage Architecture">SSA</a></li> <li><a href="/wiki/SATA_Express" title="SATA Express">SATAe</a></li> <li>PCI Express (via <a href="/wiki/Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">AHCI</a> or <a href="/wiki/NVM_Express" title="NVM Express">NVMe</a> logical device interface)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Peripheral</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Apple_Desktop_Bus" title="Apple Desktop Bus">Apple Desktop Bus</a></li> <li><a href="/wiki/Atari_SIO" title="Atari SIO">Atari SIO</a></li> <li><a href="/wiki/Digital_Control_Bus" title="Digital Control Bus">DCB</a></li> <li><a href="/wiki/Commodore_bus" title="Commodore bus">Commodore bus</a></li> <li><a href="/wiki/HP-IL" title="HP-IL">HP-IL</a></li> <li><a href="/wiki/HIL_bus" title="HIL bus">HIL</a></li> <li><a href="/wiki/MIDI" title="MIDI">MIDI</a></li> <li><a href="/wiki/RS-232" title="RS-232">RS-232</a></li> <li><a href="/wiki/RS-422" title="RS-422">RS-422</a></li> <li><a href="/wiki/RS-423" title="RS-423">RS-423</a></li> <li><a href="/wiki/RS-485" title="RS-485">RS-485</a></li> <li><a href="/wiki/Lightning_(connector)" title="Lightning (connector)">Lightning</a></li> <li><a href="/wiki/DMX512#DMX512-A" title="DMX512">DMX512-A</a></li> <li><a href="/wiki/IEEE-488" class="mw-redirect" title="IEEE-488">IEEE-488 (GPIB)</a></li> <li><a href="/wiki/IEEE_1284" title="IEEE 1284">IEEE-1284 (parallel port)</a></li> <li><a href="/wiki/IEEE_1394" title="IEEE 1394">IEEE-1394 (FireWire)</a></li> <li><a href="/wiki/UNI/O" title="UNI/O">UNI/O</a></li> <li><a href="/wiki/1-Wire" title="1-Wire">1-Wire</a></li> <li><a href="/wiki/I%C2%B2C" title="I²C">I²C</a> (<a href="/wiki/ACCESS.bus" title="ACCESS.bus">ACCESS.bus</a>, <a href="/wiki/Power_Management_Bus" title="Power Management Bus">PMBus</a>, <a class="mw-selflink selflink">SMBus</a>)</li> <li><a href="/wiki/I3C_(bus)" title="I3C (bus)">I3C</a></li> <li><a href="/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface">SPI</a></li> <li><a href="/wiki/IEC_61030" title="IEC 61030">D²B</a></li> <li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel SCSI</a></li> <li><a href="/wiki/Profibus" title="Profibus">Profibus</a></li> <li><a href="/wiki/USB" title="USB">USB</a></li> <li><a href="/wiki/Camera_Link" title="Camera Link">Camera Link</a></li> <li><a href="/wiki/PCI_Express#PCI_Express_External_Cabling" title="PCI Express">External PCIe</a></li> <li><a href="/wiki/Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Audio</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ADAT_Lightpipe" title="ADAT Lightpipe">ADAT Lightpipe</a></li> <li><a href="/wiki/AES3" title="AES3">AES3</a></li> <li><a href="/wiki/Intel_High_Definition_Audio" title="Intel High Definition Audio">Intel HD Audio</a></li> <li><a href="/wiki/I%C2%B2S" title="I²S">I²S</a></li> <li><a href="/wiki/MADI" title="MADI">MADI</a></li> <li><a href="/wiki/McASP" title="McASP">McASP</a></li> <li><a href="/wiki/S/PDIF" title="S/PDIF">S/PDIF</a></li> <li><a href="/wiki/TOSLINK" title="TOSLINK">TOSLINK</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Portable</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/PC_Card" title="PC Card">PC Card</a></li> <li><a href="/wiki/ExpressCard" title="ExpressCard">ExpressCard</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Embedded</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multidrop_bus" title="Multidrop bus">Multidrop bus</a></li> <li><a href="/wiki/CoreConnect" title="CoreConnect">CoreConnect</a></li> <li><a href="/wiki/Advanced_Microcontroller_Bus_Architecture" title="Advanced Microcontroller Bus Architecture">AMBA</a> (<a href="/wiki/Advanced_eXtensible_Interface" title="Advanced eXtensible Interface">AXI</a>)</li> <li><a href="/wiki/Wishbone_(computer_bus)" title="Wishbone (computer bus)">Wishbone</a></li> <li><a href="/wiki/SLIMbus" title="SLIMbus">SLIMbus</a></li></ul> </div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><small>Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.</small><br /><span class="noviewer" typeof="mw:File"><span title="Category"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/16px-Symbol_category_class.svg.png" decoding="async" width="16" height="16" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/23px-Symbol_category_class.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/31px-Symbol_category_class.svg.png 2x" data-file-width="180" data-file-height="185" /></span></span> <a href="/wiki/Category:Computer_buses" title="Category:Computer buses">Category</a></div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Intel_technology" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Intel_technology" title="Template:Intel technology"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel_technology" title="Template talk:Intel technology"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_technology" title="Special:EditPage/Template:Intel technology"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Intel_technology" style="font-size:114%;margin:0 4em"><a href="/wiki/Intel" title="Intel">Intel</a> technology</div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Platforms</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Centrino" title="Centrino">Centrino</a></li> <li><a href="/wiki/Centrino#Montevina_platform_(2008)" title="Centrino">Centrino 2</a></li> <li><a href="/wiki/Intel_Viiv" title="Intel Viiv">Viiv</a></li> <li><a href="/wiki/Mobile_Internet_device#Intel_MID_platforms" title="Mobile Internet device">MID</a></li> <li><a href="/wiki/Tablet_computer#Intel_tablet_platforms" title="Tablet computer">Tablet</a></li> <li><a href="/wiki/Consumer_Ultra-Low_Voltage" title="Consumer Ultra-Low Voltage">CULV</a></li> <li><a href="/wiki/Ultrabook" title="Ultrabook">Ultrabook</a></li> <li><a href="/wiki/Intel_Skulltrail" title="Intel Skulltrail">Skulltrail</a></li> <li><a href="/wiki/Next_Unit_of_Computing" title="Next Unit of Computing">NUC</a></li> <li><a href="/wiki/Intel_Galileo" title="Intel Galileo">Galileo</a></li> <li><a href="/wiki/Intel_Edison" title="Intel Edison">Edison</a></li> <li><a href="/wiki/Intel_Curie" class="mw-redirect" title="Intel Curie">Curie</a></li> <li><a href="/wiki/Intel_Evo" title="Intel Evo">Evo</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Common_Building_Block" title="Common Building Block">Common Building Block</a></li> <li><a href="/wiki/MultiProcessor_Specification" title="MultiProcessor Specification">MultiProcessor Specification</a></li> <li><a href="/wiki/Intel_Communication_Streaming_Architecture" title="Intel Communication Streaming Architecture">Intel Communication Streaming Architecture</a></li> <li><a href="/wiki/Intel_Inboard_386" title="Intel Inboard 386">Intel Inboard 386</a></li> <li><a href="/wiki/Intel_Play" title="Intel Play">Intel Play</a></li> <li><a href="/wiki/MMC-1" title="MMC-1">MMC-1</a></li> <li><a href="/wiki/MMC-2" title="MMC-2">MMC-2</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Advanced_Programmable_Interrupt_Controller" title="Advanced Programmable Interrupt Controller">Advanced Programmable Interrupt Controller</a></li> <li><a href="/wiki/CNVi" title="CNVi">CNVi</a></li> <li><a href="/wiki/Intel_Turbo_Boost" title="Intel Turbo Boost">Intel Turbo Boost</a></li> <li><a href="/wiki/Intel_vPro" title="Intel vPro">vPro</a></li> <li><a href="/wiki/Intel_Secure_Key" class="mw-redirect" title="Intel Secure Key">Intel Secure Key</a></li> <li><a href="/wiki/Intel_Management_Engine" title="Intel Management Engine">Intel Management Engine</a></li> <li><a href="/wiki/Intel_Active_Management_Technology" title="Intel Active Management Technology">Active Management Technology</a> <ul><li><a href="/wiki/Intel_AMT_versions" title="Intel AMT versions">AMT versions</a></li></ul></li> <li><a href="/wiki/High-bandwidth_Digital_Content_Protection" title="High-bandwidth Digital Content Protection">High-bandwidth Digital Content Protection</a></li> <li><a href="/wiki/Intel_High_Definition_Audio" title="Intel High Definition Audio">High Definition Audio</a></li> <li><a href="/wiki/Intel_Hub_Architecture" title="Intel Hub Architecture">Hub Architecture</a></li> <li><a href="/wiki/Intel_Rapid_Storage_Technology" title="Intel Rapid Storage Technology">Rapid Storage Technology</a></li> <li><a href="/wiki/SpeedStep" title="SpeedStep">SpeedStep</a></li> <li><a href="/wiki/Serial_Digital_Video_Out" title="Serial Digital Video Out">Serial Digital Video Out</a></li> <li><a href="/wiki/Host_Embedded_Controller_Interface" title="Host Embedded Controller Interface">Host Embedded Controller Interface</a></li> <li><a href="/wiki/Hyper-threading" title="Hyper-threading">Hyper-threading</a></li> <li><a href="/wiki/Omni-Path" title="Omni-Path">Omni-Path</a></li> <li><a href="/wiki/Platform_Environment_Control_Interface" title="Platform Environment Control Interface">Platform Environment Control Interface</a></li> <li><a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">QuickPath Interconnect</a></li> <li><a href="/wiki/Platform_Controller_Hub" title="Platform Controller Hub">Platform Controller Hub</a></li> <li><a class="mw-selflink selflink">System Management Bus</a></li> <li><a href="/wiki/Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a></li> <li><a href="/wiki/Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Ultra Path Interconnect</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Upcoming</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Silicon_Photonics_Link" title="Silicon Photonics Link">Silicon Photonics Link</a></li></ul> </div></td></tr></tbody></table></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=System_Management_Bus&oldid=1258835731">https://en.wikipedia.org/w/index.php?title=System_Management_Bus&oldid=1258835731</a>"</div></div> <div id="catlinks" class="catlinks" data-mw="interface"><div id="mw-normal-catlinks" class="mw-normal-catlinks"><a href="/wiki/Help:Category" title="Help:Category">Categories</a>: <ul><li><a href="/wiki/Category:Computer-related_introductions_in_1995" title="Category:Computer-related introductions in 1995">Computer-related introductions in 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