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.sidebar:not(.notheme) .sidebar-list-title,html.skin-theme-clientpref-night .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle{background:transparent!important}html.skin-theme-clientpref-night .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle a{color:var(--color-progressive)!important}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .sidebar:not(.notheme) .sidebar-list-title,html.skin-theme-clientpref-os .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle{background:transparent!important}html.skin-theme-clientpref-os .mw-parser-output .sidebar:not(.notheme) .sidebar-title-with-pretitle a{color:var(--color-progressive)!important}}@media print{body.ns-0 .mw-parser-output .sidebar{display:none!important}}</style><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1246091330"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1246091330"><table class="sidebar nomobile nowraplinks"><tbody><tr><td class="sidebar-pretitle" style="padding-bottom:0.15em;">Part of <a href="/wiki/Category:Network_science" title="Category:Network science">a series</a> on</td></tr><tr><th class="sidebar-title-with-pretitle" style="font-size:175%;"><a href="/wiki/Network_science" title="Network science">Network science</a></th></tr><tr><td class="sidebar-image"><div class="center"><div class="center"> <div style="width: 250px; height: 250px; overflow: hidden;"> <div style="position: relative; top: -0px; left: -0px; width: 250px"><div class="noresize"><span typeof="mw:File"><a href="/wiki/File:Internet_map_1024.jpg" class="mw-file-description"><img alt="Internet_map_1024.jpg" src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d2/Internet_map_1024.jpg/250px-Internet_map_1024.jpg" decoding="async" width="250" height="250" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/d2/Internet_map_1024.jpg/375px-Internet_map_1024.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/d2/Internet_map_1024.jpg/500px-Internet_map_1024.jpg 2x" data-file-width="1280" data-file-height="1280" /></a></span></div></div> </div> </div></div></td></tr><tr><th class="sidebar-heading"> <div class="hlist"><ul><li><a href="/wiki/Network_theory" title="Network theory">Theory</a></li></ul></div></th></tr><tr><td class="sidebar-content hlist" style="padding-top:0.2em;padding-bottom:0.5em;"> <ul><li><a href="/wiki/Graph_(discrete_mathematics)" title="Graph (discrete mathematics)">Graph</a></li> <li><a href="/wiki/Complex_network" title="Complex network">Complex network</a></li> <li><a href="/wiki/Complex_contagion" title="Complex contagion">Contagion</a></li> <li><a href="/wiki/Small-world_network" title="Small-world network">Small-world</a></li> <li><a href="/wiki/Scale-free_network" title="Scale-free network">Scale-free</a></li> <li><a href="/wiki/Community_structure" title="Community structure">Community structure</a></li> <li><a href="/wiki/Percolation_theory" title="Percolation theory">Percolation</a></li> <li><a href="/wiki/Evolving_networks" class="mw-redirect" title="Evolving networks">Evolution</a></li> <li><a href="/wiki/Network_controllability" title="Network controllability">Controllability</a></li> <li><a href="/wiki/Graph_drawing" title="Graph drawing">Graph drawing</a></li> <li><a href="/wiki/Social_capital" title="Social capital">Social capital</a></li> <li><a href="/wiki/Link_analysis" title="Link analysis">Link analysis</a></li> <li><a href="/wiki/Combinatorial_optimization" title="Combinatorial optimization">Optimization</a></li> <li><a href="/wiki/Reciprocity_(network_science)" title="Reciprocity (network science)">Reciprocity</a></li> <li><a href="/wiki/Triadic_closure" title="Triadic closure">Closure</a></li> <li><a href="/wiki/Homophily" title="Homophily">Homophily</a></li> <li><a href="/wiki/Transitive_relation" title="Transitive relation">Transitivity</a></li> <li><a href="/wiki/Preferential_attachment" title="Preferential attachment">Preferential attachment</a></li> <li><a href="/wiki/Balance_theory" title="Balance theory">Balance theory</a></li> <li><a href="/wiki/Network_effect" title="Network effect">Network effect</a></li> <li><a href="/wiki/Social_influence" title="Social influence">Social influence</a></li></ul></td> </tr><tr><th class="sidebar-heading"> Network types</th></tr><tr><td class="sidebar-content hlist" style="padding-top:0.2em;padding-bottom:0.5em;"> <ul><li><a href="/wiki/Computer_network" title="Computer network">Informational (computing)</a></li> <li><a href="/wiki/Telecommunications_network" title="Telecommunications network">Telecommunication</a></li> <li><a href="/wiki/Transport_network" class="mw-redirect" title="Transport network">Transport</a></li> <li><a href="/wiki/Social_network" title="Social network">Social</a></li> <li><a href="/wiki/Scientific_collaboration_network" title="Scientific collaboration network">Scientific collaboration</a></li> <li><a href="/wiki/Biological_network" title="Biological network">Biological</a></li> <li><a href="/wiki/Artificial_neural_network" class="mw-redirect" title="Artificial neural network">Artificial neural</a></li> <li><a href="/wiki/Interdependent_networks" title="Interdependent networks">Interdependent</a></li> <li><a href="/wiki/Semantic_network" title="Semantic network">Semantic</a></li> <li><a href="/wiki/Spatial_network" title="Spatial network">Spatial</a></li> <li><a href="/wiki/Dependency_network" title="Dependency network">Dependency</a></li> <li><a href="/wiki/Flow_network" title="Flow network">Flow</a></li> <li><a class="mw-selflink selflink">on-Chip</a></li></ul></td> </tr><tr><th class="sidebar-heading"> <a href="/wiki/Graph_(discrete_mathematics)" title="Graph (discrete mathematics)">Graphs</a></th></tr><tr><td class="sidebar-content hlist" style="padding-top:0.2em;padding-bottom:0.5em;"> <table class="sidebar nomobile nowraplinks" style="background-color: transparent; color: var( --color-base, #202122 ); border-collapse:collapse; border-spacing:0px; border:none; width:100%; margin:0px; font-size:100%; clear:none; float:none"><tbody><tr><th class="sidebar-heading" style="font-weight:normal;font-style:italic;"> Features</th></tr><tr><td class="sidebar-content"> <ul><li><a href="/wiki/Clique_(graph_theory)" title="Clique (graph theory)">Clique</a></li> <li><a href="/wiki/Connected_component_(graph_theory)" class="mw-redirect" title="Connected component (graph theory)">Component</a></li> <li><a href="/wiki/Cut_(graph_theory)" title="Cut (graph theory)">Cut</a></li> <li><a href="/wiki/Cycle_(graph_theory)" title="Cycle (graph theory)">Cycle</a></li> <li><a href="/wiki/Graph_(abstract_data_type)" title="Graph (abstract data type)">Data structure</a></li> <li><a href="/wiki/Edge_(graph_theory)" class="mw-redirect" title="Edge (graph theory)">Edge</a></li> <li><a href="/wiki/Loop_(graph_theory)" title="Loop (graph theory)">Loop</a></li> <li><a href="/wiki/Neighbourhood_(graph_theory)" title="Neighbourhood (graph theory)">Neighborhood</a></li> <li><a href="/wiki/Path_(graph_theory)" title="Path (graph theory)">Path</a></li> <li><a href="/wiki/Vertex_(graph_theory)" title="Vertex (graph theory)">Vertex</a></li> <li><span class="nowrap"><a href="/wiki/Adjacency_list" title="Adjacency list">Adjacency list</a> / <a href="/wiki/Adjacency_matrix" title="Adjacency matrix">matrix</a></span></li> <li><span class="nowrap"><a href="/wiki/Incidence_list" class="mw-redirect" title="Incidence list">Incidence list</a> / <a href="/wiki/Incidence_matrix" title="Incidence matrix">matrix</a></span></li></ul></td> </tr><tr><th class="sidebar-heading" style="font-weight:normal;font-style:italic;"> Types</th></tr><tr><td class="sidebar-content"> <ul><li><a href="/wiki/Bipartite_graph" title="Bipartite graph">Bipartite</a></li> <li><a href="/wiki/Complete_graph" title="Complete graph">Complete</a></li> <li><a href="/wiki/Directed_graph" title="Directed graph">Directed</a></li> <li><a href="/wiki/Hypergraph" title="Hypergraph">Hyper</a></li> <li><a href="/wiki/Labeled_graph" class="mw-redirect" title="Labeled graph">Labeled</a></li> <li><a href="/wiki/Multigraph" title="Multigraph">Multi</a></li> <li><a href="/wiki/Random_graph" title="Random graph">Random</a></li> <li><a href="/wiki/Weighted_graph" class="mw-redirect" title="Weighted graph">Weighted</a></li></ul></td> </tr></tbody></table></td> </tr><tr><th class="sidebar-heading"> <div class="hlist"><ul><li><a href="/wiki/Metrics_(networking)" title="Metrics (networking)">Metrics</a></li><li><a href="/wiki/List_of_algorithms#Networking" title="List of algorithms">Algorithms</a></li></ul></div></th></tr><tr><td class="sidebar-content hlist" style="padding-top:0.2em;padding-bottom:0.5em;"> <ul><li><a href="/wiki/Centrality" title="Centrality">Centrality</a></li> <li><a href="/wiki/Degree_(graph_theory)" title="Degree (graph theory)">Degree</a></li> <li><a href="/wiki/Network_motif" title="Network motif">Motif</a></li> <li><a href="/wiki/Clustering_coefficient" title="Clustering coefficient">Clustering</a></li> <li><a href="/wiki/Degree_distribution" title="Degree distribution">Degree distribution</a></li> <li><a href="/wiki/Assortativity" title="Assortativity">Assortativity</a></li> <li><a href="/wiki/Distance_(graph_theory)" title="Distance (graph theory)">Distance</a></li> <li><a href="/wiki/Modularity_(networks)" title="Modularity (networks)">Modularity</a></li> <li><a href="/wiki/Efficiency_(network_science)" title="Efficiency (network science)">Efficiency</a></li></ul></td> </tr><tr><th class="sidebar-heading"> Models</th></tr><tr><td class="sidebar-content hlist" style="padding-top:0.2em;padding-bottom:0.5em;"> <table class="sidebar nomobile nowraplinks" style="background-color: transparent; color: var( --color-base, #202122 ); border-collapse:collapse; border-spacing:0px; border:none; width:100%; margin:0px; font-size:100%; clear:none; float:none"><tbody><tr><th class="sidebar-heading" style="font-weight:normal;font-style:italic;"> Topology</th></tr><tr><td class="sidebar-content"> <ul><li><a href="/wiki/Random_graph" title="Random graph">Random graph</a></li> <li><a href="/wiki/Erd%C5%91s%E2%80%93R%C3%A9nyi_model" title="Erdős–Rényi model">Erdős–Rényi</a></li> <li><a href="/wiki/Barab%C3%A1si%E2%80%93Albert_model" title="Barabási–Albert model">Barabási–Albert</a></li> <li><a href="/wiki/Bianconi%E2%80%93Barab%C3%A1si_model" title="Bianconi–Barabási model">Bianconi–Barabási</a></li> <li><a href="/wiki/Fitness_model_(network_theory)" title="Fitness model (network theory)">Fitness model</a></li> <li><a href="/wiki/Watts%E2%80%93Strogatz_model" title="Watts–Strogatz model">Watts–Strogatz</a></li> <li><a href="/wiki/Exponential_random_graph_models" class="mw-redirect" title="Exponential random graph models">Exponential random (ERGM)</a></li> <li><a href="/wiki/Random_geometric_graph" title="Random geometric graph">Random geometric (RGG)</a></li> <li><a href="/wiki/Hyperbolic_geometric_graph" title="Hyperbolic geometric graph">Hyperbolic (HGN)</a></li> <li><a href="/wiki/Hierarchical_network_model" title="Hierarchical network model">Hierarchical</a></li> <li><a href="/wiki/Stochastic_block_model" title="Stochastic block model">Stochastic block</a></li> <li><a href="/wiki/Blockmodeling" title="Blockmodeling">Blockmodeling</a></li> <li><a href="/wiki/Maximum-entropy_random_graph_model" title="Maximum-entropy random graph model">Maximum entropy</a></li> <li><a href="/wiki/Soft_configuration_model" title="Soft configuration model">Soft configuration</a></li> <li><a href="/wiki/Lancichinetti%E2%80%93Fortunato%E2%80%93Radicchi_benchmark" title="Lancichinetti–Fortunato–Radicchi benchmark">LFR Benchmark</a></li></ul></td> </tr><tr><th class="sidebar-heading" style="font-weight:normal;font-style:italic;"> Dynamics</th></tr><tr><td class="sidebar-content"> <ul><li><a href="/wiki/Boolean_network" title="Boolean network">Boolean network</a></li> <li><a href="/wiki/Agent-based_model" title="Agent-based model">agent based</a></li> <li><a href="/wiki/Epidemic_model" class="mw-redirect" title="Epidemic model">Epidemic</a>/<a href="/wiki/SIR_model" class="mw-redirect" title="SIR model">SIR</a></li></ul></td> </tr></tbody></table></td> </tr><tr><th class="sidebar-heading"> <div class="hlist"><ul><li>Lists</li><li>Categories</li></ul></div></th></tr><tr><td class="sidebar-content hlist" style="padding-top:0.2em;padding-bottom:0.5em;"> <ul><li><a href="/wiki/List_of_network_theory_topics" title="List of network theory topics">Topics</a></li> <li><a href="/wiki/Social_network_analysis_software" title="Social network analysis software">Software</a></li> <li><a href="/wiki/List_of_network_scientists" title="List of network scientists">Network scientists</a></li></ul> <ul><li><a href="/wiki/Category:Network_theory" title="Category:Network theory">Category:Network theory</a></li> <li><a href="/wiki/Category:Graph_theory" title="Category:Graph theory">Category:Graph theory</a></li></ul></td> </tr><tr><td class="sidebar-navbar"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><style data-mw-deduplicate="TemplateStyles:r1239400231">.mw-parser-output .navbar{display:inline;font-size:88%;font-weight:normal}.mw-parser-output .navbar-collapse{float:left;text-align:left}.mw-parser-output .navbar-boxtext{word-spacing:0}.mw-parser-output .navbar ul{display:inline-block;white-space:nowrap;line-height:inherit}.mw-parser-output .navbar-brackets::before{margin-right:-0.125em;content:"[ "}.mw-parser-output .navbar-brackets::after{margin-left:-0.125em;content:" ]"}.mw-parser-output .navbar li{word-spacing:-0.125em}.mw-parser-output .navbar a>span,.mw-parser-output .navbar a>abbr{text-decoration:inherit}.mw-parser-output .navbar-mini abbr{font-variant:small-caps;border-bottom:none;text-decoration:none;cursor:inherit}.mw-parser-output .navbar-ct-full{font-size:114%;margin:0 7em}.mw-parser-output .navbar-ct-mini{font-size:114%;margin:0 4em}html.skin-theme-clientpref-night .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}@media(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Network_science" title="Template:Network science"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Network_science" title="Template talk:Network science"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Network_science" title="Special:EditPage/Template:Network science"><abbr title="Edit this template">e</abbr></a></li></ul></div></td></tr></tbody></table> <p>A <b>network on a chip</b> or <b>network-on-chip</b> (<b>NoC</b> <span class="rt-commentedText nowrap"><span class="IPA nopopups noexcerpt" lang="en-fonipa"><a href="/wiki/Help:IPA/English" title="Help:IPA/English">/<span style="border-bottom:1px dotted"><span title="/ˌ/: secondary stress follows">ˌ</span><span title="/ɛ/: 'e' in 'dress'">ɛ</span><span title="'n' in 'nigh'">n</span><span title="/ˌ/: secondary stress follows">ˌ</span><span title="/oʊ/: 'o' in 'code'">oʊ</span><span title="/ˈ/: primary stress follows">ˈ</span><span title="'s' in 'sigh'">s</span><span title="/iː/: 'ee' in 'fleece'">iː</span></span>/</a></span></span> <a href="/wiki/Help:Pronunciation_respelling_key" title="Help:Pronunciation respelling key"><i title="English pronunciation respelling">en-oh-<span style="font-size:90%">SEE</span></i></a> or <span class="rt-commentedText nowrap"><span class="IPA nopopups noexcerpt" lang="en-fonipa"><a href="/wiki/Help:IPA/English" title="Help:IPA/English">/<span style="border-bottom:1px dotted"><span title="'n' in 'nigh'">n</span><span title="/ɒ/: 'o' in 'body'">ɒ</span><span title="'k' in 'kind'">k</span></span>/</a></span></span> <a href="/wiki/Help:Pronunciation_respelling_key" title="Help:Pronunciation respelling key"><i title="English pronunciation respelling">knock</i></a>)<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>nb 1<span class="cite-bracket">]</span></a></sup> is a <a href="/wiki/Network_theory" title="Network theory">network</a>-based <a href="/wiki/Communications_system" title="Communications system">communications subsystem</a> on an <a href="/wiki/Integrated_circuit" title="Integrated circuit">integrated circuit</a> ("<a href="/wiki/Microchip" class="mw-redirect" title="Microchip">microchip</a>"), most typically between <a href="/wiki/System_on_a_chip#Functional_components" title="System on a chip">modules</a> in a <a href="/wiki/System_on_a_chip" title="System on a chip">system on a chip</a> (<a href="/wiki/System_on_a_chip" title="System on a chip">SoC</a>). The modules on the IC are typically semiconductor <a href="/wiki/IP_core" class="mw-redirect" title="IP core">IP cores</a> schematizing various functions of the <a href="/wiki/Computer_system" class="mw-redirect" title="Computer system">computer system</a>, and are designed to be <a href="/wiki/Modularity_(networks)" title="Modularity (networks)">modular</a> in the sense of <a href="/wiki/Network_science" title="Network science">network science</a>. The network on chip is a <a href="/wiki/Router_(computing)" title="Router (computing)">router</a>-based <a href="/wiki/Packet_switching" title="Packet switching">packet switching</a> network between SoC <a href="/wiki/Modularity" title="Modularity">modules</a>. </p><p>NoC technology applies the theory and methods of <a href="/wiki/Computer_network" title="Computer network">computer networking</a> to on-chip <a href="/wiki/Communication" title="Communication">communication</a> and brings notable improvements over conventional <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a> and <a href="/wiki/Crossbar_switch" title="Crossbar switch">crossbar</a> <a href="/wiki/Network_architecture" title="Network architecture">communication architectures</a>. Networks-on-chip come in many <a href="/wiki/Network_topology" title="Network topology">network topologies</a>, many of which are still experimental as of 2018. <sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (August 2022)">citation needed</span></a></i>]</sup> </p><p>In 2000s, researchers had started to propose a type of on-chip interconnection in the form of <a href="/wiki/Packet_switching" title="Packet switching">packet switching</a> networks<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> in order to address the scalability issues of <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a>-based design. Preceding researches proposed the design that routes data packets instead of routing the wires.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> Then, the concept of "network on chips" was proposed in 2002.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> NoCs improve the <a href="/wiki/Scalability" title="Scalability">scalability</a> of systems-on-chip and the <a href="/wiki/Power_efficiency" class="mw-redirect" title="Power efficiency">power efficiency</a> of complex SoCs compared to other communication subsystem designs. They are an <a href="/wiki/Emerging_technologies" title="Emerging technologies">emerging technology</a>, with projections for large growth in the near future as <a href="/wiki/Multicore" class="mw-redirect" title="Multicore">multicore</a> computer architectures become more common. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Structure">Structure</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=1" title="Edit section: Structure"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Network_on_a_chip&action=edit&section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2018</span>)</i></span></div></td></tr></tbody></table> <p>NoCs can span synchronous and asynchronous clock domains, known as <a href="/wiki/Clock_domain_crossing" title="Clock domain crossing">clock domain crossing</a>, or use unclocked <a href="/wiki/Asynchronous_circuit" title="Asynchronous circuit">asynchronous</a> logic. NoCs support <a href="/wiki/Globally_asynchronous_locally_synchronous" title="Globally asynchronous locally synchronous">globally asynchronous, locally synchronous</a> electronics architectures, allowing each <a href="/wiki/Processor_core" class="mw-redirect" title="Processor core">processor core</a> or functional unit on the System-on-Chip to have its own <a href="/wiki/Clock_domain" class="mw-redirect" title="Clock domain">clock domain</a>.<sup id="cite_ref-:02_5-0" class="reference"><a href="#cite_note-:02-5"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Architectures">Architectures</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=2" title="Edit section: Architectures"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Network_on_a_chip&action=edit&section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2018</span>)</i></span></div></td></tr></tbody></table> <p>NoC architectures typically model <a href="/wiki/Sparsity" class="mw-redirect" title="Sparsity">sparse</a> <a href="/wiki/Small-world_network" title="Small-world network">small-world networks</a> (SWNs) and <a href="/wiki/Scale-free_network" title="Scale-free network">scale-free networks</a> (SFNs) to limit the number, length, area and <a href="/wiki/Power_consumption" class="mw-redirect" title="Power consumption">power consumption</a> of interconnection wires and <a href="/wiki/Point-to-point_(telecommunications)" title="Point-to-point (telecommunications)">point-to-point</a> connections. </p> <div class="mw-heading mw-heading2"><h2 id="Topology">Topology</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=3" title="Edit section: Topology"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The topology determines the physical layout and connections between nodes and channels. The message traverses hops, and each hop's channel length depends on the topology. The topology significantly influences both <a href="/wiki/Latency_(engineering)" title="Latency (engineering)">latency</a> and power consumption. Furthermore, since the topology determines the number of alternative paths between nodes, it affects the network traffic distribution, and hence the <a href="/wiki/Bandwidth_(computing)" title="Bandwidth (computing)">network bandwidth</a> and performance achieved.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Benefits">Benefits</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=4" title="Edit section: Benefits"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Traditionally, ICs have been designed with dedicated <a href="/wiki/Point-to-point_(telecommunications)" title="Point-to-point (telecommunications)">point-to-point</a> connections, with one wire dedicated to each signal. This results in a <a href="/wiki/Dense_network" class="mw-redirect" title="Dense network">dense network topology</a>. For large designs, in particular, this has several limitations from a <a href="/wiki/Integrated_circuit_design" title="Integrated circuit design">physical design</a> viewpoint. It requires <a href="/wiki/Power_consumption" class="mw-redirect" title="Power consumption">power</a> <a href="/wiki/Quadratic_function" title="Quadratic function">quadratic</a> in the number of interconnections. The wires occupy much of the <a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">area of the chip</a>, and in <a href="/wiki/Nanometer" class="mw-redirect" title="Nanometer">nanometer</a> <a href="/wiki/CMOS" title="CMOS">CMOS</a> technology, interconnects dominate both performance and dynamic <a href="/wiki/Power_dissipation" class="mw-redirect" title="Power dissipation">power dissipation</a>, as signal propagation in wires across the chip requires multiple <a href="/wiki/Clock_cycle" class="mw-redirect" title="Clock cycle">clock cycles</a>. This also allows more <a href="/wiki/Parasitic_capacitance" title="Parasitic capacitance">parasitic capacitance</a>, <a href="/wiki/Parasitic_element_(electrical_networks)" class="mw-redirect" title="Parasitic element (electrical networks)">resistance and inductance</a> to accrue on the circuit. (See <a href="/wiki/Rent%27s_rule" title="Rent's rule">Rent's rule</a> for a discussion of wiring requirements for point-to-point connections). </p><p><a href="/wiki/Sparse_network" title="Sparse network">Sparsity</a> and <a href="/wiki/Locality_of_reference" title="Locality of reference">locality</a> of interconnections in the communications subsystem yield several improvements over traditional <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a>-based and <a href="/wiki/Crossbar_switch" title="Crossbar switch">crossbar</a>-based systems. </p> <div style="clear:both;" class=""></div> <div class="mw-heading mw-heading2"><h2 id="Parallelism_and_scalability">Parallelism and scalability</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=5" title="Edit section: Parallelism and scalability"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The wires in the links of the network-on-chip are shared by many <a href="/wiki/Signals" class="mw-redirect" title="Signals">signals</a>. A high level of <a href="/wiki/Parallel_computing" title="Parallel computing">parallelism</a> is achieved, because all <a href="/wiki/Data_link" title="Data link">data links</a> in the NoC can operate simultaneously on different <a href="/wiki/Packet_switching" title="Packet switching">data packets</a>.<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Please_clarify" title="Wikipedia:Please clarify"><span title="The reason for this is unclear. (October 2018)">why?</span></a></i>]</sup> Therefore, as the complexity of <a href="/wiki/Very-large-scale_integration" title="Very-large-scale integration">integrated systems</a> keeps growing, a NoC provides enhanced performance (such as <a href="/wiki/Throughput" class="mw-redirect" title="Throughput">throughput</a>) and <a href="/wiki/Scalability" title="Scalability">scalability</a> in comparison with previous communication architectures (e.g., dedicated point-to-point signal <a href="/wiki/Wire" title="Wire">wires</a>, shared <a href="/wiki/Bus_(computing)" title="Bus (computing)">buses</a>, or segmented buses with <a href="/wiki/Network_bridge" title="Network bridge">bridges</a>). The <a href="/wiki/Algorithm" title="Algorithm">algorithms</a><sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Avoid_weasel_words" class="mw-redirect" title="Wikipedia:Avoid weasel words"><span title="The material near this tag possibly uses too vague attribution or weasel words. (October 2018)">which?</span></a></i>]</sup> must be designed in such a way that they offer <a href="/wiki/Massively_parallel" title="Massively parallel">large parallelism</a> and can hence utilize the potential of NoC. </p> <div class="mw-heading mw-heading2"><h2 id="Current_research">Current research</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=6" title="Edit section: Current research"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Wireless_TSV_(model).PNG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/2/2d/Wireless_TSV_%28model%29.PNG/220px-Wireless_TSV_%28model%29.PNG" decoding="async" width="220" height="236" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/2/2d/Wireless_TSV_%28model%29.PNG/330px-Wireless_TSV_%28model%29.PNG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/2/2d/Wireless_TSV_%28model%29.PNG/440px-Wireless_TSV_%28model%29.PNG 2x" data-file-width="700" data-file-height="750" /></a><figcaption>WiNoC in the 3D-chiplet</figcaption></figure> <p>Some researchers<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Manual_of_Style/Words_to_watch#Unsupported_attributions" title="Wikipedia:Manual of Style/Words to watch"><span title="The material near this tag possibly uses too-vague attribution or weasel words. (June 2015)">who?</span></a></i>]</sup> think that NoCs need to support <a href="/wiki/Quality_of_service" title="Quality of service">quality of service</a> (QoS), namely achieve the various requirements in terms of <a href="/wiki/Throughput" class="mw-redirect" title="Throughput">throughput</a>, end-to-end delays, <a href="/wiki/Fairness_measure" title="Fairness measure">fairness</a>,<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> and <a href="/wiki/Time_limit" title="Time limit">deadlines</a>.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (June 2015)">citation needed</span></a></i>]</sup> Real-time computation, including audio and video playback, is one reason for providing QoS support. However, current system implementations like <a href="/wiki/VxWorks" title="VxWorks">VxWorks</a>, <a href="/wiki/RTLinux" title="RTLinux">RTLinux</a> or <a href="/wiki/QNX" title="QNX">QNX</a> are able to achieve sub-millisecond real-time computing without special hardware.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (June 2015)">citation needed</span></a></i>]</sup> </p><p>This may indicate that for many <a href="/wiki/Real-time_computing" title="Real-time computing">real-time</a> applications the service quality of existing on-chip interconnect infrastructure is sufficient, and dedicated <a href="/wiki/Hardware_logic" class="mw-redirect" title="Hardware logic">hardware logic</a> would be necessary to achieve microsecond precision, a degree that is rarely needed in practice for end users (sound or video jitter need only tenth of milliseconds latency guarantee). Another motivation for NoC-level <a href="/wiki/Quality_of_service" title="Quality of service">quality of service</a> (QoS) is to support multiple concurrent users sharing resources of a single <a href="/wiki/Multi-core_(computing)" class="mw-redirect" title="Multi-core (computing)">chip multiprocessor</a> in a public <a href="/wiki/Cloud_computing" title="Cloud computing">cloud computing</a> infrastructure. In such instances, hardware QoS logic enables the service provider to make <a href="/wiki/Service-level_agreement" title="Service-level agreement">contractual guarantees</a> on the level of service that a user receives, a feature that may be deemed desirable by some corporate or government clients.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (June 2015)">citation needed</span></a></i>]</sup> </p><p>Many challenging research problems remain to be solved at all levels, from the physical link level through the network level, and all the way up to the system architecture and application software. The first dedicated research symposium on networks on chip was held at <a href="/wiki/Princeton_University" title="Princeton University">Princeton University</a>, in May 2007.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> The second <a href="/wiki/Institute_of_Electrical_and_Electronics_Engineers" title="Institute of Electrical and Electronics Engineers">IEEE</a> International Symposium on Networks-on-Chip was held in April 2008 at <a href="/wiki/Newcastle_University" title="Newcastle University">Newcastle University</a>. </p><p>Research has been conducted on integrated <a href="/wiki/Waveguide_(optics)" title="Waveguide (optics)">optical waveguides</a> and devices comprising an optical network on a chip (ONoC).<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-ONoC_10-0" class="reference"><a href="#cite_note-ONoC-10"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> </p><p>The possible way to increasing the performance of NoC is use wireless communication channels between <a href="/wiki/Chiplets" class="mw-redirect" title="Chiplets">chiplets</a> — named wireless network on chip (WiNoC).<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Side_benefits">Side benefits</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=7" title="Edit section: Side benefits"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In a multi-core system, connected by NoC, coherency messages and cache miss requests have to pass switches. Accordingly, switches can be augmented with simple tracking and forwarding elements to detect which cache blocks will be requested in the future by which cores. Then, the forwarding elements multicast any requested block to all the cores that may request the block in the future. This mechanism reduces cache miss rate.<sup id="cite_ref-Tree-based_scheme_for_reducing_shared_cache_miss_rate_leveraging_regional,_statistical_and_temporal_similarities_12-0" class="reference"><a href="#cite_note-Tree-based_scheme_for_reducing_shared_cache_miss_rate_leveraging_regional,_statistical_and_temporal_similarities-12"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Benchmarks">Benchmarks</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=8" title="Edit section: Benchmarks"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>NoC development and studies require comparing different proposals and options. NoC traffic patterns are under development to help such evaluations. Existing NoC benchmarks include NoCBench and MCSL NoC Traffic Patterns.<sup id="cite_ref-MCSL_NoC_Traffic_Patterns_13-0" class="reference"><a href="#cite_note-MCSL_NoC_Traffic_Patterns-13"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Interconnect_processing_unit">Interconnect processing unit</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=9" title="Edit section: Interconnect processing unit"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>An interconnect processing unit (IPU)<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> is an on-chip communication network with <a href="/wiki/Computer_hardware" title="Computer hardware">hardware</a> and <a href="/wiki/Software" title="Software">software</a> components which jointly implement key functions of different <a href="/wiki/System_on_a_chip" title="System on a chip">system-on-chip</a> programming models through a set of communication and <a href="/wiki/Synchronization_primitive" class="mw-redirect" title="Synchronization primitive">synchronization primitives</a> and provide <a href="/wiki/High-_and_low-level" title="High- and low-level">low-level</a> platform services to enable advanced features<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Avoid_weasel_words" class="mw-redirect" title="Wikipedia:Avoid weasel words"><span title="The material near this tag possibly uses too vague attribution or weasel words. (October 2018)">which?</span></a></i>]</sup> in modern heterogeneous applications<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Please_clarify" title="Wikipedia:Please clarify"><span title="You can help -- (October 2018)">definition needed</span></a></i>]</sup> on a single <a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">die</a>. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=10" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Arteris" title="Arteris">Arteris</a></li> <li><a href="/wiki/Electronic_design_automation" title="Electronic design automation">Electronic design automation</a> (EDA)</li> <li><a href="/wiki/Integrated_circuit_design" title="Integrated circuit design">Integrated circuit design</a></li> <li><a href="/wiki/CUDA" title="CUDA">CUDA</a></li> <li><a href="/wiki/Globally_asynchronous_locally_synchronous" title="Globally asynchronous locally synchronous">Globally asynchronous, locally synchronous</a></li> <li><a href="/wiki/Network_architecture" title="Network architecture">Network architecture</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=11" title="Edit section: Notes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">This article uses the convention that "NoC" is pronounced <span class="rt-commentedText nowrap"><span class="IPA nopopups noexcerpt" lang="en-fonipa"><a href="/wiki/Help:IPA/English" title="Help:IPA/English">/<span style="border-bottom:1px dotted"><span title="'n' in 'nigh'">n</span><span title="/ɒ/: 'o' in 'body'">ɒ</span><span title="'k' in 'kind'">k</span></span>/</a></span></span> <a href="/wiki/Help:Pronunciation_respelling_key" title="Help:Pronunciation respelling key"><i title="English pronunciation respelling">nock</i></a>. Therefore, it uses the convention "a" for the <a href="/wiki/Indefinite_article" class="mw-redirect" title="Indefinite article">indefinite article</a> corresponding to NoC ("<b>a</b> NoC"). Other sources may pronounce it as <span class="rt-commentedText nowrap"><span class="IPA nopopups noexcerpt" lang="en-fonipa"><a href="/wiki/Help:IPA/English" title="Help:IPA/English">/<span style="border-bottom:1px dotted"><span title="/ˌ/: secondary stress follows">ˌ</span><span title="/ɛ/: 'e' in 'dress'">ɛ</span><span title="'n' in 'nigh'">n</span><span title="/ˌ/: secondary stress follows">ˌ</span><span title="/oʊ/: 'o' in 'code'">oʊ</span><span title="/ˈ/: primary stress follows">ˈ</span><span title="'s' in 'sigh'">s</span><span title="/iː/: 'ee' in 'fleece'">iː</span></span>/</a></span></span> <a href="/wiki/Help:Pronunciation_respelling_key" title="Help:Pronunciation respelling key"><i title="English pronunciation respelling">en-oh-<span style="font-size:90%">SEE</span></i></a> and therefore use "<b>an</b> NoC".</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=12" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFGuerrierGreiner2000" class="citation book cs1">Guerrier, P.; Greiner, A. (2000). <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/840047">"A generic architecture for on-chip packet-switched interconnections"</a>. <i>Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537)</i>. Paris, France: IEEE Comput. Soc. pp. <span class="nowrap">250–</span>256. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FDATE.2000.840047">10.1109/DATE.2000.840047</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-7695-0537-4" title="Special:BookSources/978-0-7695-0537-4"><bdi>978-0-7695-0537-4</bdi></a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20221022095924/https://ieeexplore.ieee.org/document/840047/">Archived</a> from the original on 2022-10-22<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-11-23</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=bookitem&rft.atitle=A+generic+architecture+for+on-chip+packet-switched+interconnections&rft.btitle=Proceedings+Design%2C+Automation+and+Test+in+Europe+Conference+and+Exhibition+2000+%28Cat.+No.+PR00537%29&rft.place=Paris%2C+France&rft.pages=%3Cspan+class%3D%22nowrap%22%3E250-%3C%2Fspan%3E256&rft.pub=IEEE+Comput.+Soc&rft.date=2000&rft_id=info%3Adoi%2F10.1109%2FDATE.2000.840047&rft.isbn=978-0-7695-0537-4&rft.aulast=Guerrier&rft.aufirst=P.&rft.au=Greiner%2C+A.&rft_id=https%3A%2F%2Fieeexplore.ieee.org%2Fdocument%2F840047&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><i>Proceedings, 2001 Design Automation Conference : 38th DAC: Las Vegas Convention Center, Las Vegas, NV, June 18-22, 2001</i>. Association for Computing Machinery, ACM Special Interest Group on Design Automation. New York, N.Y.: Association for Computing Machinery. 2001. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/1-58113-297-2" title="Special:BookSources/1-58113-297-2"><bdi>1-58113-297-2</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/326240184">326240184</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Proceedings%2C+2001+Design+Automation+Conference+%3A+38th+DAC%3A+Las+Vegas+Convention+Center%2C+Las+Vegas%2C+NV%2C+June+18-22%2C+2001.&rft.place=New+York%2C+N.Y.&rft.pub=Association+for+Computing+Machinery&rft.date=2001&rft_id=info%3Aoclcnum%2F326240184&rft.isbn=1-58113-297-2&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span><span class="cs1-maint citation-comment"><code class="cs1-code">{{<a href="/wiki/Template:Cite_book" title="Template:Cite book">cite book</a>}}</code>: CS1 maint: others (<a href="/wiki/Category:CS1_maint:_others" title="Category:CS1 maint: others">link</a>)</span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBeniniDe_Micheli2002" class="citation journal cs1">Benini, L.; De Micheli, G. (January 2002). <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/976921">"Networks on chips: a new SoC paradigm"</a>. <i>Computer</i>. <b>35</b> (1): <span class="nowrap">70–</span>78. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2F2.976921">10.1109/2.976921</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20221022095900/https://ieeexplore.ieee.org/document/976921/">Archived</a> from the original on 2022-10-22<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-11-23</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Computer&rft.atitle=Networks+on+chips%3A+a+new+SoC+paradigm&rft.volume=35&rft.issue=1&rft.pages=%3Cspan+class%3D%22nowrap%22%3E70-%3C%2Fspan%3E78&rft.date=2002-01&rft_id=info%3Adoi%2F10.1109%2F2.976921&rft.aulast=Benini&rft.aufirst=L.&rft.au=De+Micheli%2C+G.&rft_id=https%3A%2F%2Fieeexplore.ieee.org%2Fdocument%2F976921&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-:02-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-:02_5-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFKunduChattopadhyay2014" class="citation book cs1">Kundu, Santanu; Chattopadhyay, Santanu (2014). <i>Network-on-chip: the Next Generation of System-on-Chip Integration</i> (1st ed.). Boca Raton, FL: CRC Press. p. 3. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1-4665-6527-2" title="Special:BookSources/978-1-4665-6527-2"><bdi>978-1-4665-6527-2</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/895661009">895661009</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Network-on-chip%3A+the+Next+Generation+of+System-on-Chip+Integration&rft.place=Boca+Raton%2C+FL&rft.pages=3&rft.edition=1st&rft.pub=CRC+Press&rft.date=2014&rft_id=info%3Aoclcnum%2F895661009&rft.isbn=978-1-4665-6527-2&rft.aulast=Kundu&rft.aufirst=Santanu&rft.au=Chattopadhyay%2C+Santanu&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFStaff2023" class="citation web cs1">Staff, E. D. N. (2023-07-26). <a rel="nofollow" class="external text" href="https://www.edn.com/network-on-chip-noc-interconnect-topologies-explained/">"Network-on-chip (NoC) interconnect topologies explained"</a>. <i>EDN</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2023-11-17</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=EDN&rft.atitle=Network-on-chip+%28NoC%29+interconnect+topologies+explained&rft.date=2023-07-26&rft.aulast=Staff&rft.aufirst=E.+D.+N.&rft_id=https%3A%2F%2Fwww.edn.com%2Fnetwork-on-chip-noc-interconnect-topologies-explained%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation journal cs1">"Balancing On-Chip Network Latency in Multi-Application Mapping for Chip-Multiprocessors". <i>IPDPS</i>. May 2014.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IPDPS&rft.atitle=Balancing+On-Chip+Network+Latency+in+Multi-Application+Mapping+for+Chip-Multiprocessors&rft.date=2014-05&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://2007.nocsymposium.org/">NoCS 2007</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20080901221034/http://2007.nocsymposium.org/">Archived</a> 2008-09-01 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> website.</span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://archive.today/20120730164033/http://www.cl.cam.ac.uk/users/rdm34/onChipNetBib/browser.htm">On-Chip Networks Bibliography</a></span> </li> <li id="cite_note-ONoC-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-ONoC_10-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.ece.ust.hk/~eexu/bibliography.html">"Inter/Intra-Chip Optical Network Bibliography-"</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20150923233005/http://www.ece.ust.hk/~eexu/bibliography.html">Archived</a> from the original on 2015-09-23<span class="reference-accessdate">. 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Pyramidal design of nanoantennas array. // VIII International Conference on Antenna Theory and Techniques (ICATT'11). - Kyiv, Ukraine. - National Technical University of Ukraine "Kyiv Polytechnic Institute". - September 20–23, 2011. - Pp. 140–142. <a rel="nofollow" class="external autonumber" href="https://slyusar.kiev.ua/ICATT_2011_Slyusar2.pdf">[1]</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20190717084106/http://slyusar.kiev.ua/ICATT_2011_Slyusar2.pdf">Archived</a> 2019-07-17 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></span> </li> <li id="cite_note-Tree-based_scheme_for_reducing_shared_cache_miss_rate_leveraging_regional,_statistical_and_temporal_similarities-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-Tree-based_scheme_for_reducing_shared_cache_miss_rate_leveraging_regional,_statistical_and_temporal_similarities_12-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMarzieh_LenjaniMahmoud_Reza_Hashemi2014" class="citation journal cs1">Marzieh Lenjani; Mahmoud Reza Hashemi (2014). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20181209212956/https://ieeexplore.ieee.org/document/6695819/">"Tree-based scheme for reducing shared cache miss rate leveraging regional, statistical and temporal similarities"</a>. <i>IET Computers & Digital Techniques</i>. <b>8</b>: <span class="nowrap">30–</span>48. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1049%2Fiet-cdt.2011.0066">10.1049/iet-cdt.2011.0066</a>. Archived from <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/6695819">the original</a> on December 9, 2018.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IET+Computers+%26+Digital+Techniques&rft.atitle=Tree-based+scheme+for+reducing+shared+cache+miss+rate+leveraging+regional%2C+statistical+and+temporal+similarities&rft.volume=8&rft.pages=%3Cspan+class%3D%22nowrap%22%3E30-%3C%2Fspan%3E48&rft.date=2014&rft_id=info%3Adoi%2F10.1049%2Fiet-cdt.2011.0066&rft.au=Marzieh+Lenjani&rft.au=Mahmoud+Reza+Hashemi&rft_id=https%3A%2F%2Fieeexplore.ieee.org%2Fdocument%2F6695819&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-MCSL_NoC_Traffic_Patterns-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-MCSL_NoC_Traffic_Patterns_13-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.ece.ust.hk/~eexu/traffic.html">"NoC traffic"</a>. <i>www.ece.ust.hk</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20171225203037/http://www.ece.ust.hk/~eexu/traffic.html">Archived</a> from the original on 2017-12-25<span class="reference-accessdate">. Retrieved <span class="nowrap">2018-10-08</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=www.ece.ust.hk&rft.atitle=NoC+traffic&rft_id=http%3A%2F%2Fwww.ece.ust.hk%2F~eexu%2Ftraffic.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text">Marcello Coppola, Miltos D. Grammatikakis, Riccardo Locatelli, Giuseppe Maruccia, Lorenzo Pieralisi, "Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC", CRC Press, 2008, <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1-4200-4471-3" title="Special:BookSources/978-1-4200-4471-3">978-1-4200-4471-3</a></span> </li> </ol></div></div> <p>Adapted from <a rel="nofollow" class="external text" href="http://www.ee.technion.ac.il/people/kolodny/">Avinoam Kolodny's</a>'s column in the ACM <a rel="nofollow" class="external text" href="http://www.sigda.org">SIGDA</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20070208034716/http://www.sigda.org/newsletter/index.html">e-newsletter</a> by <a rel="nofollow" class="external text" href="http://www.eecs.umich.edu/~imarkov/">Igor Markov</a> <br />The original text can be found at <a rel="nofollow" class="external free" href="http://www.sigda.org/newsletter/2006/060415.txt">http://www.sigda.org/newsletter/2006/060415.txt</a> </p> <div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=13" title="Edit section: Further reading"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFKunduChattopadhyay2014" class="citation book cs1">Kundu, Santanu; Chattopadhyay, Santanu (2014). <i>Network-on-chip: the Next Generation of System-on-Chip Integration</i> (1st ed.). Boca Raton, FL: CRC Press. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1-4665-6527-2" title="Special:BookSources/978-1-4665-6527-2"><bdi>978-1-4665-6527-2</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/895661009">895661009</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Network-on-chip%3A+the+Next+Generation+of+System-on-Chip+Integration&rft.place=Boca+Raton%2C+FL&rft.edition=1st&rft.pub=CRC+Press&rft.date=2014&rft_id=info%3Aoclcnum%2F895661009&rft.isbn=978-1-4665-6527-2&rft.aulast=Kundu&rft.aufirst=Santanu&rft.au=Chattopadhyay%2C+Santanu&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSheng_MaLibo_HuangMingche_LaiWei_Shi2014" class="citation book cs1">Sheng Ma; Libo Huang; Mingche Lai; Wei Shi; Zhiying Wang (2014). <i>Networks-on-Chip: From Implementations to Programming Paradigms</i> (1st ed.). Amsterdam, NL: Morgan Kaufmann. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-12-801178-2" title="Special:BookSources/978-0-12-801178-2"><bdi>978-0-12-801178-2</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/894609116">894609116</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Networks-on-Chip%3A+From+Implementations+to+Programming+Paradigms&rft.place=Amsterdam%2C+NL&rft.edition=1st&rft.pub=Morgan+Kaufmann&rft.date=2014&rft_id=info%3Aoclcnum%2F894609116&rft.isbn=978-0-12-801178-2&rft.au=Sheng+Ma&rft.au=Libo+Huang&rft.au=Mingche+Lai&rft.au=Wei+Shi&rft.au=Zhiying+Wang&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFGiorgios_DimitrakopoulosAnastasios_PsarrasIoannis_Seitanidis2014" class="citation book cs1">Giorgios Dimitrakopoulos; Anastasios Psarras; Ioannis Seitanidis (2014-08-27). <i>Microarchitecture of Network-on-Chip Routers: A Designer's Perspective</i> (1st ed.). New York, NY. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1-4614-4301-8" title="Special:BookSources/978-1-4614-4301-8"><bdi>978-1-4614-4301-8</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/890132032">890132032</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Microarchitecture+of+Network-on-Chip+Routers%3A+A+Designer%27s+Perspective&rft.place=New+York%2C+NY&rft.edition=1st&rft.date=2014-08-27&rft_id=info%3Aoclcnum%2F890132032&rft.isbn=978-1-4614-4301-8&rft.au=Giorgios+Dimitrakopoulos&rft.au=Anastasios+Psarras&rft.au=Ioannis+Seitanidis&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span><span class="cs1-maint citation-comment"><code class="cs1-code">{{<a href="/wiki/Template:Cite_book" title="Template:Cite book">cite book</a>}}</code>: CS1 maint: location missing publisher (<a href="/wiki/Category:CS1_maint:_location_missing_publisher" title="Category:CS1 maint: location missing publisher">link</a>)</span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFNatalie_Enright_JergerTushar_KrishnaLi-Shiuan_Peh2017" class="citation book cs1">Natalie Enright Jerger; Tushar Krishna; Li-Shiuan Peh (2017-06-19). <i>On-chip Networks</i> (2nd ed.). San Rafael, California. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1-62705-996-1" title="Special:BookSources/978-1-62705-996-1"><bdi>978-1-62705-996-1</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/991871622">991871622</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=On-chip+Networks&rft.place=San+Rafael%2C+California&rft.edition=2nd&rft.date=2017-06-19&rft_id=info%3Aoclcnum%2F991871622&rft.isbn=978-1-62705-996-1&rft.au=Natalie+Enright+Jerger&rft.au=Tushar+Krishna&rft.au=Li-Shiuan+Peh&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span><span class="cs1-maint citation-comment"><code class="cs1-code">{{<a href="/wiki/Template:Cite_book" title="Template:Cite book">cite book</a>}}</code>: CS1 maint: location missing publisher (<a href="/wiki/Category:CS1_maint:_location_missing_publisher" title="Category:CS1 maint: location missing publisher">link</a>)</span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMarzieh_LenjaniMahmoud_Reza_Hashemi2014" class="citation journal cs1">Marzieh Lenjani; Mahmoud Reza Hashemi (2014). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20181209212956/https://ieeexplore.ieee.org/document/6695819/">"Tree-based scheme for reducing shared cache miss rate leveraging regional, statistical and temporal similarities"</a>. <i>IET Computers & Digital Techniques</i>. <b>8</b>: <span class="nowrap">30–</span>48. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1049%2Fiet-cdt.2011.0066">10.1049/iet-cdt.2011.0066</a>. Archived from <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/6695819">the original</a> on December 9, 2018.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IET+Computers+%26+Digital+Techniques&rft.atitle=Tree-based+scheme+for+reducing+shared+cache+miss+rate+leveraging+regional%2C+statistical+and+temporal+similarities&rft.volume=8&rft.pages=%3Cspan+class%3D%22nowrap%22%3E30-%3C%2Fspan%3E48&rft.date=2014&rft_id=info%3Adoi%2F10.1049%2Fiet-cdt.2011.0066&rft.au=Marzieh+Lenjani&rft.au=Mahmoud+Reza+Hashemi&rft_id=https%3A%2F%2Fieeexplore.ieee.org%2Fdocument%2F6695819&rfr_id=info%3Asid%2Fen.wikipedia.org%3ANetwork+on+a+chip" class="Z3988"></span></li></ul> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Network_on_a_chip&action=edit&section=14" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="http://async.org.uk/noc2006">DATE 2006 workshop on NoC</a></li> <li><a rel="nofollow" class="external text" href="http://2007.nocsymposium.org/">NoCS 2007 - The 1st ACM/IEEE International Symposium on Networks-on-Chip</a></li> <li><a rel="nofollow" class="external text" href="http://async.org.uk/nocs2008">NoCS 2008 - The 2nd IEEE International Symposium on Networks-on-Chip</a></li> <li>Jean-Jacques Lecler, Gilles Baillieu, <i>Design Automation for Embedded Systems (Springer), "Application driven network-on-chip architecture exploration & refinement for a complex SoC", June 2011, Volume 15, Issue 2, pp 133–158, <a href="//doi.org/10.1007/s10617-011-9075-5" class="extiw" title="doi:10.1007/s10617-011-9075-5">doi:10.1007/s10617-011-9075-5</a> [Online] <a rel="nofollow" class="external free" href="http://www.arteris.com/hs-fs/hub/48858/file-14363521-pdf/docs/springer-appdrivennocarchitecture8.5x11.pdf">http://www.arteris.com/hs-fs/hub/48858/file-14363521-pdf/docs/springer-appdrivennocarchitecture8.5x11.pdf</a></i></li></ul> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><style data-mw-deduplicate="TemplateStyles:r1236075235">.mw-parser-output .navbox{box-sizing:border-box;border:1px solid #a2a9b1;width:100%;clear:both;font-size:88%;text-align:center;padding:1px;margin:1em auto 0}.mw-parser-output .navbox .navbox{margin-top:0}.mw-parser-output .navbox+.navbox,.mw-parser-output .navbox+.navbox-styles+.navbox{margin-top:-1px}.mw-parser-output .navbox-inner,.mw-parser-output .navbox-subgroup{width:100%}.mw-parser-output .navbox-group,.mw-parser-output .navbox-title,.mw-parser-output .navbox-abovebelow{padding:0.25em 1em;line-height:1.5em;text-align:center}.mw-parser-output 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navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:System_on_a_chip" title="Template:System on a chip"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:System_on_a_chip" title="Template talk:System on a chip"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:System_on_a_chip" title="Special:EditPage/Template:System on a chip"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="System_on_a_chip_(SoC)60" style="font-size:114%;margin:0 4em"><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> (SoC)</div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microprocessor" title="Microprocessor">Microprocessor</a> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">cores</a></li> <li><a href="/wiki/Chipset" title="Chipset">controllers</a></li></ul></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li> <li><a href="/wiki/Image_processor" title="Image processor">Image processor</a></li> <li><a href="/wiki/Media_processor" title="Media processor">Media processor</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">AI accelerator</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a class="mw-selflink selflink">Network on a chip</a> (NoC)</li> <li><a href="/wiki/Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor SoC</a> (MPSoC)</li> <li><a href="/wiki/Programmable_system_on_a_chip" class="mw-redirect" title="Programmable system on a chip">Programmable SoC</a> (PSoC)</li> <li><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a> (MCU)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Alternatives</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a> (SiP)</li> <li><a href="/wiki/Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor</a> <ul><li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">chronology</a></li> <li><a href="/wiki/Processor_design" title="Processor design">design</a></li></ul></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li> <li><a href="/wiki/Embedded_system" title="Embedded system">Embedded systems</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/List_of_system_on_a_chip_suppliers" title="List of system on a chip suppliers">List of SoC suppliers</a></li> <li><a href="/wiki/Mobile_computing" title="Mobile computing">Mobile computing</a></li> <li><a href="/wiki/Unified_memory" class="mw-redirect" title="Unified memory">Unified memory</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Processor_technologies439" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Processor_technologies" title="Template:Processor technologies"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Processor_technologies" title="Template talk:Processor technologies"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Processor_technologies" title="Special:EditPage/Template:Processor technologies"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Processor_technologies439" style="font-size:114%;margin:0 4em"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor technologies</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Model_of_computation" title="Model of computation">Models</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Abstract_machine" title="Abstract machine">Abstract machine</a></li> <li><a href="/wiki/Stored-program_computer" title="Stored-program computer">Stored-program computer</a></li> <li><a href="/wiki/Finite-state_machine" title="Finite-state machine">Finite-state machine</a> <ul><li><a href="/wiki/Finite-state_machine_with_datapath" class="mw-redirect" title="Finite-state machine with datapath">with datapath</a></li> <li><a href="/wiki/Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical</a></li> <li><a href="/wiki/Deterministic_finite_automaton" title="Deterministic finite automaton">Deterministic finite automaton</a></li> <li><a href="/wiki/Queue_automaton" title="Queue automaton">Queue automaton</a></li> <li><a href="/wiki/Cellular_automaton" title="Cellular automaton">Cellular automaton</a></li> <li><a href="/wiki/Quantum_cellular_automaton" title="Quantum cellular automaton">Quantum cellular automaton</a></li></ul></li> <li><a href="/wiki/Turing_machine" title="Turing machine">Turing machine</a> <ul><li><a href="/wiki/Alternating_Turing_machine" title="Alternating Turing machine">Alternating Turing machine</a></li> <li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal</a></li> <li><a href="/wiki/Post%E2%80%93Turing_machine" title="Post–Turing machine">Post–Turing</a></li> <li><a href="/wiki/Quantum_Turing_machine" title="Quantum Turing machine">Quantum</a></li> <li><a href="/wiki/Nondeterministic_Turing_machine" title="Nondeterministic Turing machine">Nondeterministic Turing machine</a></li> <li><a href="/wiki/Probabilistic_Turing_machine" title="Probabilistic Turing machine">Probabilistic Turing machine</a></li> <li><a href="/wiki/Hypercomputation" title="Hypercomputation">Hypercomputation</a></li> <li><a href="/wiki/Zeno_machine" title="Zeno machine">Zeno machine</a></li></ul></li> <li><a href="/wiki/History_of_general-purpose_CPUs#Belt_machine_architecture" title="History of general-purpose CPUs">Belt machine</a></li> <li><a href="/wiki/Stack_machine" title="Stack machine">Stack machine</a></li> <li><a href="/wiki/Register_machine" title="Register machine">Register machines</a> <ul><li><a href="/wiki/Counter_machine" title="Counter machine">Counter</a></li> <li><a href="/wiki/Pointer_machine" title="Pointer machine">Pointer</a></li> <li><a href="/wiki/Random-access_machine" title="Random-access machine">Random-access</a></li> <li><a href="/wiki/Random-access_stored-program_machine" title="Random-access stored-program machine">Random-access stored program</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architecture</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></li> <li><a href="/wiki/Von_Neumann_architecture" title="Von Neumann architecture">Von Neumann</a></li> <li><a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard</a> <ul><li><a href="/wiki/Modified_Harvard_architecture" title="Modified Harvard architecture">modified</a></li></ul></li> <li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport-triggered</a></li> <li><a href="/wiki/Cellular_architecture" title="Cellular architecture">Cellular</a></li> <li><a href="/wiki/Endianness" title="Endianness">Endianness</a></li> <li><a href="/wiki/Computer_data_storage" title="Computer data storage">Memory access</a> <ul><li><a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></li> <li><a href="/wiki/Uniform_memory_access" title="Uniform memory access">HUMA</a></li> <li><a href="/wiki/Load%E2%80%93store_architecture" title="Load–store architecture">Load–store</a></li> <li><a href="/wiki/Register%E2%80%93memory_architecture" title="Register–memory architecture">Register/memory</a></li></ul></li> <li><a href="/wiki/Cache_hierarchy" title="Cache hierarchy">Cache hierarchy</a></li> <li><a href="/wiki/Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a> <ul><li><a href="/wiki/Virtual_memory" title="Virtual memory">Virtual memory</a></li> <li><a href="/wiki/Secondary_storage" class="mw-redirect" title="Secondary storage">Secondary storage</a></li></ul></li> <li><a href="/wiki/Heterogeneous_System_Architecture" title="Heterogeneous System Architecture">Heterogeneous</a></li> <li><a href="/wiki/Fabric_computing" title="Fabric computing">Fabric</a></li> <li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessing</a></li> <li><a href="/wiki/Cognitive_computing" title="Cognitive computing">Cognitive</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set<br />architectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Orthogonal_instruction_set" title="Orthogonal instruction set">Orthogonal instruction set</a></li> <li><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></li> <li><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific</a></li> <li><a href="/wiki/Explicit_data_graph_execution" title="Explicit data graph execution">EDGE</a> <ul><li><a href="/wiki/TRIPS_architecture" title="TRIPS architecture">TRIPS</a></li></ul></li> <li><a href="/wiki/Very_long_instruction_word" title="Very long instruction word">VLIW</a> <ul><li><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></li></ul></li> <li><a href="/wiki/Minimal_instruction_set_computer" title="Minimal instruction set computer">MISC</a></li> <li><a href="/wiki/One-instruction_set_computer" title="One-instruction set computer">OISC</a></li> <li><a href="/wiki/No_instruction_set_computing" title="No instruction set computing">NISC</a></li> <li><a href="/wiki/Zero_instruction_set_computer" class="mw-redirect" title="Zero instruction set computer">ZISC</a></li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Quantum_computing" title="Quantum computing">Quantum computing</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Comparison</a> <ul><li><a href="/wiki/Addressing_mode" title="Addressing mode">Addressing modes</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instruction<br />sets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Motorola_68000_series" title="Motorola 68000 series">Motorola 68000 series</a></li> <li><a href="/wiki/VAX" title="VAX">VAX</a></li> <li><a href="/wiki/PDP-11_architecture" title="PDP-11 architecture">PDP-11</a></li> <li><a href="/wiki/X86" title="X86">x86</a></li> <li><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a></li> <li><a href="/wiki/Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li> <li><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a></li> <li><a href="/wiki/MIPS-X" title="MIPS-X">MIPS-X</a></li> <li>Power <ul><li><a href="/wiki/IBM_POWER_architecture" title="IBM POWER architecture">POWER</a></li> <li><a href="/wiki/PowerPC" title="PowerPC">PowerPC</a></li> <li><a href="/wiki/Power_ISA" title="Power ISA">Power ISA</a></li></ul></li> <li><a href="/wiki/Clipper_architecture" title="Clipper architecture">Clipper architecture</a></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a></li> <li><a href="/wiki/SuperH" title="SuperH">SuperH</a></li> <li><a href="/wiki/DEC_Alpha" title="DEC Alpha">DEC Alpha</a></li> <li><a href="/wiki/ETRAX_CRIS" title="ETRAX CRIS">ETRAX CRIS</a></li> <li><a href="/wiki/M32R" title="M32R">M32R</a></li> <li><a href="/wiki/Unicore" title="Unicore">Unicore</a></li> <li><a href="/wiki/IA-64" title="IA-64">Itanium</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a></li> <li><a href="/wiki/Little_man_computer" title="Little man computer">LMC</a></li> <li>System/3x0 <ul><li><a href="/wiki/IBM_System/360_architecture" title="IBM System/360 architecture">S/360</a></li> <li><a href="/wiki/IBM_System/370" title="IBM System/370">S/370</a></li> <li><a href="/wiki/IBM_System/390" title="IBM System/390">S/390</a></li> <li><a href="/wiki/Z/Architecture" title="Z/Architecture">z/Architecture</a></li></ul></li> <li>Tilera ISA</li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Adapteva#Products" class="mw-redirect" title="Adapteva">Epiphany architecture</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Others</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_cycle" title="Instruction cycle">Execution</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Instruction pipelining</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Pipeline_stall" title="Pipeline stall">Pipeline stall</a></li> <li><a href="/wiki/Operand_forwarding" title="Operand forwarding">Operand forwarding</a></li> <li><a href="/wiki/Classic_RISC_pipeline" title="Classic RISC pipeline">Classic RISC pipeline</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hazard_(computer_architecture)" title="Hazard (computer architecture)">Hazards</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Data_dependency" title="Data dependency">Data dependency</a></li> <li><a href="/wiki/Structural_hazard" class="mw-redirect" title="Structural hazard">Structural</a></li> <li><a href="/wiki/Control_hazard" class="mw-redirect" title="Control hazard">Control</a></li> <li><a href="/wiki/False_sharing" title="False sharing">False sharing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Out-of-order_execution" title="Out-of-order execution">Out-of-order</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Scoreboarding" title="Scoreboarding">Scoreboarding</a></li> <li><a href="/wiki/Tomasulo%27s_algorithm" title="Tomasulo's algorithm">Tomasulo's algorithm</a> <ul><li><a href="/wiki/Reservation_station" title="Reservation station">Reservation station</a></li> <li><a href="/wiki/Re-order_buffer" title="Re-order buffer">Re-order buffer</a></li></ul></li> <li><a href="/wiki/Register_renaming" title="Register renaming">Register renaming</a></li> <li><a href="/wiki/Wide-issue" title="Wide-issue">Wide-issue</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Speculative_execution" title="Speculative execution">Speculative</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch prediction</a></li> <li><a href="/wiki/Memory_dependence_prediction" title="Memory dependence prediction">Memory dependence prediction</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Parallel_computing" title="Parallel computing">Parallelism</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Level</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bit-level_parallelism" title="Bit-level parallelism">Bit</a> <ul><li><a href="/wiki/Bit-serial_architecture" title="Bit-serial architecture">Bit-serial</a></li> <li><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word</a></li></ul></li> <li><a href="/wiki/Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li> <li><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Pipelining</a> <ul><li><a href="/wiki/Scalar_processor" title="Scalar processor">Scalar</a></li> <li><a href="/wiki/Superscalar_processor" title="Superscalar processor">Superscalar</a></li></ul></li> <li><a href="/wiki/Task_parallelism" title="Task parallelism">Task</a> <ul><li><a href="/wiki/Thread_(computing)" title="Thread (computing)">Thread</a></li> <li><a href="/wiki/Process_(computing)" title="Process (computing)">Process</a></li></ul></li> <li><a href="/wiki/Data_parallelism" title="Data parallelism">Data</a> <ul><li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li></ul></li> <li><a href="/wiki/Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li> <li><a href="/wiki/Distributed_architecture" class="mw-redirect" title="Distributed architecture">Distributed</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Temporal_multithreading" title="Temporal multithreading">Temporal</a></li> <li><a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a> <ul><li><a href="/wiki/Hyper-threading" title="Hyper-threading">Hyperthreading</a></li> <li><a href="/wiki/Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li></ul></li> <li><a href="/wiki/Speculative_multithreading" title="Speculative multithreading">Speculative</a></li> <li><a href="/wiki/Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li> <li><a href="/wiki/Cooperative_multitasking" title="Cooperative multitasking">Cooperative</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Flynn%27s_taxonomy" title="Flynn's taxonomy">Flynn's taxonomy</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single_instruction,_single_data" title="Single instruction, single data">SISD</a></li> <li><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> <ul><li><a href="/wiki/Single_instruction,_multiple_threads" title="Single instruction, multiple threads">Array processing (SIMT)</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Pipelined_processor" title="Flynn's taxonomy">Pipelined processing</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Associative_processor" title="Flynn's taxonomy">Associative processing</a></li> <li><a href="/wiki/SWAR" title="SWAR">SWAR</a></li></ul></li> <li><a href="/wiki/Multiple_instruction,_single_data" title="Multiple instruction, single data">MISD</a></li> <li><a href="/wiki/Multiple_instruction,_multiple_data" title="Multiple instruction, multiple data">MIMD</a> <ul><li><a href="/wiki/Single_program,_multiple_data" title="Single program, multiple data">SPMD</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_performance" title="Computer performance">Processor<br />performance</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transistor_count" title="Transistor count">Transistor count</a></li> <li><a href="/wiki/Instructions_per_cycle" title="Instructions per cycle">Instructions per cycle</a> (IPC) <ul><li><a href="/wiki/Cycles_per_instruction" title="Cycles per instruction">Cycles per instruction</a> (CPI)</li></ul></li> <li><a href="/wiki/Instructions_per_second" title="Instructions per second">Instructions per second</a> (IPS)</li> <li><a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">Floating-point operations per second</a> (FLOPS)</li> <li><a href="/wiki/Transactions_per_second" title="Transactions per second">Transactions per second</a> (TPS)</li> <li><a href="/wiki/SUPS" title="SUPS">Synaptic updates per second</a> (SUPS)</li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li> <li><a href="/wiki/Cache_performance_measurement_and_metric" title="Cache performance measurement and metric">Cache performance metrics</a></li> <li><a href="/wiki/Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Types</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Central processing unit</a> (CPU)</li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU) <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li></ul></li> <li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li> <li><a href="/wiki/Barrel_processor" title="Barrel processor">Barrel</a></li> <li><a href="/wiki/Stream_processing" title="Stream processing">Stream</a></li> <li><a href="/wiki/Tile_processor" title="Tile processor">Tile processor</a></li> <li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Field-programmable_object_array" title="Field-programmable object array">FPOA</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a> (SiP)</li> <li><a href="/wiki/Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">By application</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Embedded_system" title="Embedded system">Embedded system</a></li> <li><a href="/wiki/Microprocessor" title="Microprocessor">Microprocessor</a></li> <li><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a></li> <li><a href="/wiki/Mobile_processor" title="Mobile processor">Mobile</a></li> <li><a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">Ultra-low-voltage</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">ASIP</a></li> <li><a href="/wiki/Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Systems<br />on chip</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> (SoC)</li> <li><a href="/wiki/Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor</a> (MPSoC)</li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li> <li><a class="mw-selflink selflink">Network on a chip</a> (NoC)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware<br />accelerators</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">AI accelerator</a></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li> <li><a href="/wiki/Image_processor" title="Image processor">Image processor</a></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Vision processing unit</a> (VPU)</li> <li><a href="/wiki/Physics_processing_unit" title="Physics processing unit">Physics processing unit</a> (PPU)</li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li> <li><a href="/wiki/Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li> <li><a href="/wiki/Secure_cryptoprocessor" title="Secure cryptoprocessor">Secure cryptoprocessor</a></li> <li><a href="/wiki/Network_processor" title="Network processor">Network processor</a></li> <li><a href="/wiki/Baseband_processor" title="Baseband processor">Baseband processor</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word size</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/1-bit_computing" title="1-bit computing">1-bit</a></li> <li><a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a></li> <li><a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a></li> <li><a href="/wiki/12-bit_computing" title="12-bit computing">12-bit</a></li> <li><a href="/wiki/Apollo_Guidance_Computer" title="Apollo Guidance Computer">15-bit</a></li> <li><a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a></li> <li><a href="/wiki/24-bit_computing" title="24-bit computing">24-bit</a></li> <li><a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a></li> <li><a href="/wiki/48-bit_computing" title="48-bit computing">48-bit</a></li> <li><a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a></li> <li><a href="/wiki/128-bit_computing" title="128-bit computing">128-bit</a></li> <li><a href="/wiki/256-bit_computing" title="256-bit computing">256-bit</a></li> <li><a href="/wiki/512-bit_computing" title="512-bit computing">512-bit</a></li> <li><a href="/wiki/Bit_slicing" title="Bit slicing">bit slicing</a></li> <li><a href="/wiki/Word_(computer_architecture)#Table_of_word_sizes" title="Word (computer architecture)">others</a> <ul><li><a href="/wiki/Word_(computer_architecture)#Variable-word_architectures" title="Word (computer architecture)">variable</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Core count</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single-core" title="Single-core">Single-core</a></li> <li><a href="/wiki/Multi-core_processor" title="Multi-core processor">Multi-core</a></li> <li><a href="/wiki/Manycore_processor" title="Manycore processor">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous architecture</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Core</a></li> <li><a href="/wiki/Cache_(computing)" title="Cache (computing)">Cache</a> <ul><li><a href="/wiki/CPU_cache" title="CPU cache">CPU cache</a></li> <li><a href="/wiki/Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li> <li><a href="/wiki/Data_cache" class="mw-redirect" title="Data cache">Data cache</a></li> <li><a href="/wiki/Instruction_cache" class="mw-redirect" title="Instruction cache">Instruction cache</a></li> <li><a href="/wiki/Cache_replacement_policies" title="Cache replacement policies">replacement policies</a></li> <li><a href="/wiki/Cache_coherence" title="Cache coherence">coherence</a></li></ul></li> <li><a href="/wiki/Bus_(computing)" title="Bus (computing)">Bus</a></li> <li><a href="/wiki/Clock_rate" title="Clock rate">Clock rate</a></li> <li><a href="/wiki/Clock_signal" title="Clock signal">Clock signal</a></li> <li><a href="/wiki/FIFO_(computing_and_electronics)" title="FIFO (computing and electronics)">FIFO</a></li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Execution_unit" title="Execution unit">Functional<br />units</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">Arithmetic logic unit</a> (ALU)</li> <li><a href="/wiki/Address_generation_unit" title="Address generation unit">Address generation unit</a> (AGU)</li> <li><a href="/wiki/Floating-point_unit" title="Floating-point unit">Floating-point unit</a> (FPU)</li> <li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a> (MMU) <ul><li><a href="/wiki/Load%E2%80%93store_unit" title="Load–store unit">Load–store unit</a></li> <li><a href="/wiki/Translation_lookaside_buffer" title="Translation lookaside buffer">Translation lookaside buffer</a> (TLB)</li></ul></li> <li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch predictor</a></li> <li><a href="/wiki/Branch_target_predictor" title="Branch target predictor">Branch target predictor</a></li> <li><a href="/wiki/Memory_controller" title="Memory controller">Integrated memory controller</a> (IMC) <ul><li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a></li></ul></li> <li><a href="/wiki/Instruction_decoder" class="mw-redirect" title="Instruction decoder">Instruction decoder</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Logic_gate" title="Logic gate">Logic</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Combinational_logic" title="Combinational logic">Combinational</a></li> <li><a href="/wiki/Sequential_logic" title="Sequential logic">Sequential</a></li> <li><a href="/wiki/Glue_logic" title="Glue logic">Glue</a></li> <li><a href="/wiki/Logic_gate" title="Logic gate">Logic gate</a> <ul><li><a href="/wiki/Quantum_logic_gate" title="Quantum logic gate">Quantum</a></li> <li><a href="/wiki/Gate_array" title="Gate array">Array</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_register" title="Hardware register">Registers</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Processor_register" title="Processor register">Processor register</a></li> <li><a href="/wiki/Status_register" title="Status register">Status register</a></li> <li><a href="/wiki/Stack_register" title="Stack register">Stack register</a></li> <li><a href="/wiki/Register_file" title="Register file">Register file</a></li> <li><a href="/wiki/Memory_buffer_register" title="Memory buffer register">Memory buffer</a></li> <li><a href="/wiki/Memory_address_register" title="Memory address register">Memory address register</a></li> <li><a href="/wiki/Program_counter" title="Program counter">Program counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Control_unit" title="Control unit">Control unit</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Hardwired_control_unit" class="mw-redirect" title="Hardwired control unit">Hardwired control unit</a></li> <li><a href="/wiki/Instruction_unit" title="Instruction unit">Instruction unit</a></li> <li><a href="/wiki/Data_buffer" title="Data buffer">Data buffer</a></li> <li><a href="/wiki/Write_buffer" title="Write buffer">Write buffer</a></li> <li><a href="/wiki/Microcode" title="Microcode">Microcode</a> <a href="/wiki/ROM_image" title="ROM image">ROM</a></li> <li><a href="/wiki/Counter_(digital)" title="Counter (digital)">Counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Datapath" title="Datapath">Datapath</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multiplexer" title="Multiplexer">Multiplexer</a></li> <li><a href="/wiki/Demultiplexer" class="mw-redirect" title="Demultiplexer">Demultiplexer</a></li> <li><a href="/wiki/Adder_(electronics)" title="Adder (electronics)">Adder</a></li> <li><a href="/wiki/Binary_multiplier" title="Binary multiplier">Multiplier</a> <ul><li><a href="/wiki/CPU_multiplier" title="CPU multiplier">CPU</a></li></ul></li> <li><a href="/wiki/Binary_decoder" title="Binary decoder">Binary decoder</a> <ul><li><a href="/wiki/Address_decoder" title="Address decoder">Address decoder</a></li> <li><a href="/wiki/Sum-addressed_decoder" title="Sum-addressed decoder">Sum-addressed decoder</a></li></ul></li> <li><a href="/wiki/Barrel_shifter" title="Barrel shifter">Barrel shifter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Electronic_circuit" title="Electronic circuit">Circuitry</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> <ul><li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D</a></li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal</a></li> <li><a href="/wiki/Power_management_integrated_circuit" title="Power management integrated circuit">Power management</a></li></ul></li> <li><a href="/wiki/Boolean_circuit" title="Boolean circuit">Boolean</a></li> <li><a href="/wiki/Circuit_(computer_science)" title="Circuit (computer science)">Digital</a></li> <li><a href="/wiki/Analogue_electronics" title="Analogue electronics">Analog</a></li> <li><a href="/wiki/Quantum_circuit" title="Quantum circuit">Quantum</a></li> <li><a href="/wiki/Switch#Electronic_switches" title="Switch">Switch</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Power_management" title="Power management">Power<br />management</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Power_Management_Unit" title="Power Management Unit">PMU</a></li> <li><a href="/wiki/Advanced_Power_Management" title="Advanced Power Management">APM</a></li> <li><a href="/wiki/ACPI" title="ACPI">ACPI</a></li> <li><a href="/wiki/Dynamic_frequency_scaling" title="Dynamic frequency scaling">Dynamic frequency scaling</a></li> <li><a href="/wiki/Dynamic_voltage_scaling" title="Dynamic voltage scaling">Dynamic voltage scaling</a></li> <li><a href="/wiki/Clock_gating" title="Clock gating">Clock gating</a></li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/History_of_general-purpose_CPUs" title="History of general-purpose CPUs">History of general-purpose CPUs</a></li> <li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">Microprocessor chronology</a></li> <li><a href="/wiki/Processor_design" title="Processor design">Processor design</a></li> <li><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></li> <li><a href="/wiki/Hardware_security_module" title="Hardware security module">Hardware security module</a></li> <li><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li> <li><a href="/wiki/Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li> <li><a href="/wiki/Pin_grid_array" title="Pin grid array">Pin grid array</a></li> <li><a href="/wiki/Chip_carrier" title="Chip carrier">Chip carrier</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Hardware_acceleration130" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Hardware_acceleration" title="Template:Hardware acceleration"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Hardware_acceleration" title="Template talk:Hardware acceleration"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Hardware_acceleration" title="Special:EditPage/Template:Hardware acceleration"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Hardware_acceleration130" style="font-size:114%;margin:0 4em"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Models_of_computation" class="mw-redirect" title="Models of computation">Theory</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal Turing machine</a></li> <li><a href="/wiki/Parallel_computing" title="Parallel computing">Parallel computing</a></li> <li><a href="/wiki/Distributed_computing" title="Distributed computing">Distributed computing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Applications</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">GPU</a> <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li> <li><a href="/wiki/DirectX_Video_Acceleration" title="DirectX Video Acceleration">DirectX</a></li></ul></li> <li><a href="/wiki/Sound_card" title="Sound card">Audio</a></li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processing</a></li> <li><a href="/wiki/Hardware_random_number_generator" title="Hardware random number generator">Hardware random number generation</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">Artificial intelligence</a></li> <li><a href="/wiki/Cryptographic_accelerator" title="Cryptographic accelerator">Cryptography</a> <ul><li><a href="/wiki/TLS_acceleration" title="TLS acceleration">TLS</a></li></ul></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Machine vision</a></li> <li><a href="/wiki/Custom_hardware_attack" title="Custom hardware attack">Custom hardware attack</a> <ul><li><a href="/wiki/Scrypt" title="Scrypt">scrypt</a></li></ul></li> <li><a href="/wiki/Network_processor" title="Network processor">Networking</a></li> <li><a href="/wiki/Data_processing_unit" title="Data processing unit">Data</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Implementations</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a> <ul><li><a href="/wiki/C_to_HDL" title="C to HDL">C to HDL</a></li></ul></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> <ul><li><a class="mw-selflink selflink">Network on a chip</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architectures</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport triggered</a></li> <li><a href="/wiki/Multicore" class="mw-redirect" title="Multicore">Multicore</a></li> <li><a href="/wiki/Manycore" class="mw-redirect" title="Manycore">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous</a></li> <li><a href="/wiki/In-memory_processing" title="In-memory processing">In-memory computing</a></li> <li><a href="/wiki/Systolic_array" title="Systolic array">Systolic array</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Programmable_logic" class="mw-redirect" title="Programmable logic">Programmable logic</a></li> <li><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor</a> <ul><li><a href="/wiki/Processor_design" title="Processor design">design</a></li> <li><a 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