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class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>History</span> </div> </a> <button aria-controls="toc-History-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle History subsection</span> </button> <ul id="toc-History-sublist" class="vector-toc-list"> <li id="toc-64-bit_data_timeline" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#64-bit_data_timeline"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>64-bit data timeline</span> </div> </a> <ul id="toc-64-bit_data_timeline-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-64-bit_address_timeline" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#64-bit_address_timeline"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2</span> <span>64-bit address timeline</span> </div> </a> <ul id="toc-64-bit_address_timeline-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-64-bit_operating_system_timeline" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#64-bit_operating_system_timeline"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3</span> <span>64-bit operating system timeline</span> </div> </a> <ul id="toc-64-bit_operating_system_timeline-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Limits_of_processors" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Limits_of_processors"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Limits of processors</span> </div> </a> <ul id="toc-Limits_of_processors-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-64-bit_applications" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#64-bit_applications"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>64-bit applications</span> </div> </a> <button aria-controls="toc-64-bit_applications-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle 64-bit applications subsection</span> </button> <ul id="toc-64-bit_applications-sublist" class="vector-toc-list"> <li id="toc-32-bit_vs_64-bit" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#32-bit_vs_64-bit"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1</span> <span>32-bit vs 64-bit</span> </div> </a> <ul id="toc-32-bit_vs_64-bit-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Pros_and_cons" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Pros_and_cons"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.2</span> <span>Pros and cons</span> </div> </a> <ul id="toc-Pros_and_cons-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Software_availability" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Software_availability"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.3</span> <span>Software availability</span> </div> </a> <ul id="toc-Software_availability-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-64-bit_data_models" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#64-bit_data_models"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>64-bit data models</span> </div> </a> <ul id="toc-64-bit_data_models-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Current_64-bit_architectures" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Current_64-bit_architectures"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>Current 64-bit architectures</span> </div> </a> <ul id="toc-Current_64-bit_architectures-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Notes" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Notes"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>Notes</span> </div> </a> <ul id="toc-Notes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">9</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">10</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" 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Available in 29 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-29" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">29 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D9%85%D8%B9%D9%85%D8%A7%D8%B1%D9%8A%D8%A9_64_%D8%A8%D8%AA" title="معمارية 64 بت – Arabic" lang="ar" hreflang="ar" data-title="معمارية 64 بت" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/64_bits" title="64 bits – Catalan" lang="ca" hreflang="ca" data-title="64 bits" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/64bitov%C3%BD" title="64bitový – Czech" lang="cs" hreflang="cs" data-title="64bitový" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/64-Bit-Architektur" title="64-Bit-Architektur – German" lang="de" hreflang="de" data-title="64-Bit-Architektur" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/64-bitine_arvutiarhitektuur" title="64-bitine arvutiarhitektuur – Estonian" lang="et" hreflang="et" data-title="64-bitine arvutiarhitektuur" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/64_bits" title="64 bits – Spanish" lang="es" hreflang="es" data-title="64 bits" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Processeur_64_bits" title="Processeur 64 bits – French" lang="fr" hreflang="fr" data-title="Processeur 64 bits" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/64%EB%B9%84%ED%8A%B8" title="64비트 – Korean" lang="ko" hreflang="ko" data-title="64비트" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-id mw-list-item"><a href="https://id.wikipedia.org/wiki/64-bit" title="64-bit – Indonesian" lang="id" hreflang="id" data-title="64-bit" data-language-autonym="Bahasa Indonesia" data-language-local-name="Indonesian" class="interlanguage-link-target"><span>Bahasa Indonesia</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/64_bit" title="64 bit – Italian" lang="it" hreflang="it" data-title="64 bit" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-lv mw-list-item"><a href="https://lv.wikipedia.org/wiki/64_bitu_arhitekt%C5%ABra" title="64 bitu arhitektūra – Latvian" lang="lv" hreflang="lv" data-title="64 bitu arhitektūra" data-language-autonym="Latviešu" data-language-local-name="Latvian" class="interlanguage-link-target"><span>Latviešu</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/64_bites_architekt%C3%BAra" title="64 bites architektúra – Hungarian" lang="hu" hreflang="hu" data-title="64 bites architektúra" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-ml mw-list-item"><a href="https://ml.wikipedia.org/wiki/64-%E0%B4%AC%E0%B4%BF%E0%B4%B1%E0%B5%8D%E0%B4%B1%E0%B5%8D_%E0%B4%95%E0%B4%AE%E0%B5%8D%E0%B4%AA%E0%B5%8D%E0%B4%AF%E0%B5%82%E0%B4%9F%E0%B5%8D%E0%B4%9F%E0%B4%BF%E0%B4%82%E0%B4%97%E0%B5%8D" title="64-ബിറ്റ് കമ്പ്യൂട്ടിംഗ് – Malayalam" lang="ml" hreflang="ml" data-title="64-ബിറ്റ് കമ്പ്യൂട്ടിംഗ്" data-language-autonym="മലയാളം" data-language-local-name="Malayalam" class="interlanguage-link-target"><span>മലയാളം</span></a></li><li class="interlanguage-link interwiki-ms mw-list-item"><a href="https://ms.wikipedia.org/wiki/64-bit" title="64-bit – Malay" lang="ms" hreflang="ms" data-title="64-bit" data-language-autonym="Bahasa Melayu" data-language-local-name="Malay" class="interlanguage-link-target"><span>Bahasa Melayu</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/64%E3%83%93%E3%83%83%E3%83%88" title="64ビット – Japanese" lang="ja" hreflang="ja" data-title="64ビット" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/64-biter" title="64-biter – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="64-biter" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-oc mw-list-item"><a href="https://oc.wikipedia.org/wiki/64_bits" title="64 bits – Occitan" lang="oc" hreflang="oc" data-title="64 bits" data-language-autonym="Occitan" data-language-local-name="Occitan" class="interlanguage-link-target"><span>Occitan</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Architektura_64-bitowa" title="Architektura 64-bitowa – Polish" lang="pl" hreflang="pl" data-title="Architektura 64-bitowa" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/64_bits" title="64 bits – Portuguese" lang="pt" hreflang="pt" data-title="64 bits" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ro mw-list-item"><a href="https://ro.wikipedia.org/wiki/64-bit" title="64-bit – Romanian" lang="ro" hreflang="ro" data-title="64-bit" data-language-autonym="Română" data-language-local-name="Romanian" class="interlanguage-link-target"><span>Română</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/64_%D0%B1%D0%B8%D1%82%D0%B0" title="64 бита – Russian" lang="ru" hreflang="ru" data-title="64 бита" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-simple mw-list-item"><a href="https://simple.wikipedia.org/wiki/64-bit_computing" title="64-bit computing – Simple English" lang="en-simple" hreflang="en-simple" data-title="64-bit computing" data-language-autonym="Simple English" data-language-local-name="Simple English" class="interlanguage-link-target"><span>Simple English</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/64-bit" title="64-bit – Slovak" lang="sk" hreflang="sk" data-title="64-bit" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-ta mw-list-item"><a href="https://ta.wikipedia.org/wiki/64_%E0%AE%87%E0%AE%B0%E0%AF%81%E0%AE%AE%E0%AE%AE%E0%AF%8D" title="64 இருமம் – Tamil" lang="ta" hreflang="ta" data-title="64 இருமம்" data-language-autonym="தமிழ்" data-language-local-name="Tamil" class="interlanguage-link-target"><span>தமிழ்</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/64_%D0%B1%D1%96%D1%82%D0%B8" title="64 біти – Ukrainian" lang="uk" hreflang="uk" data-title="64 біти" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-vi mw-list-item"><a href="https://vi.wikipedia.org/wiki/%C4%90i%E1%BB%87n_to%C3%A1n_64-bit" title="Điện toán 64-bit – Vietnamese" lang="vi" hreflang="vi" data-title="Điện toán 64-bit" data-language-autonym="Tiếng Việt" data-language-local-name="Vietnamese" class="interlanguage-link-target"><span>Tiếng Việt</span></a></li><li class="interlanguage-link interwiki-wuu mw-list-item"><a href="https://wuu.wikipedia.org/wiki/64%E4%BD%8D" title="64位 – Wu" lang="wuu" hreflang="wuu" data-title="64位" data-language-autonym="吴语" data-language-local-name="Wu" class="interlanguage-link-target"><span>吴语</span></a></li><li class="interlanguage-link interwiki-zh-yue mw-list-item"><a href="https://zh-yue.wikipedia.org/wiki/%E5%85%AD%E5%8D%81%E5%9B%9B%E4%BD%8D%E5%85%83" title="六十四位元 – Cantonese" lang="yue" hreflang="yue" data-title="六十四位元" data-language-autonym="粵語" data-language-local-name="Cantonese" class="interlanguage-link-target"><span>粵語</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/64%E4%BD%8D%E5%85%83" title="64位元 – Chinese" lang="zh" hreflang="zh" data-title="64位元" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a href="https://www.wikidata.org/wiki/Special:EntityPage/Q252132#sitelinks-wikipedia" title="Edit interlanguage links" class="wbc-editpage">Edit links</a></span></div> </div> </div> </div> </header> <div class="vector-page-toolbar"> <div class="vector-page-toolbar-container"> <div id="left-navigation"> <nav aria-label="Namespaces"> <div id="p-associated-pages" class="vector-menu vector-menu-tabs mw-portlet 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a{color:var(--color-progressive)!important}}@media print{body.ns-0 .mw-parser-output .sidebar{display:none!important}}</style><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374" /><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374" /><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374" /><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374" /><table class="sidebar nomobile nowraplinks"><tbody><tr><th class="sidebar-title" style="font-size: 120%;">Computer architecture bit widths</th></tr><tr><th class="sidebar-heading" style="background-color: #ccccff;"> <a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Bit</a></th></tr><tr><td class="sidebar-content"> <div class="hlist"><ul><li><a href="/wiki/1-bit_computing" title="1-bit computing">1</a></li><li><a href="/wiki/4-bit_computing" title="4-bit computing">4</a></li><li><a href="/wiki/8-bit_computing" title="8-bit computing">8</a></li><li><a href="/wiki/12-bit_computing" title="12-bit computing">12</a></li><li><a href="/wiki/16-bit_computing" title="16-bit computing">16</a></li><li><a href="/wiki/18-bit_computing" title="18-bit computing">18</a></li><li><a href="/wiki/24-bit_computing" title="24-bit computing">24</a></li><li><a href="/wiki/26-bit_computing" title="26-bit computing">26</a></li><li><a href="/wiki/UNIVAC_490" title="UNIVAC 490">30</a></li><li><a href="/wiki/31-bit_computing" title="31-bit computing">31</a></li><li><a href="/wiki/32-bit_computing" title="32-bit computing">32</a></li><li><a href="/wiki/36-bit_computing" title="36-bit computing">36</a></li><li><a href="/wiki/45-bit_computing" title="45-bit computing">45</a></li><li><a href="/wiki/48-bit_computing" title="48-bit computing">48</a></li><li><a href="/wiki/60-bit_computing" title="60-bit computing">60</a></li><li><a class="mw-selflink selflink">64</a></li><li><a href="/wiki/128-bit_computing" title="128-bit computing">128</a></li><li><a href="/wiki/256-bit_computing" title="256-bit computing">256</a></li><li><a href="/wiki/512-bit_computing" title="512-bit computing">512</a></li><li><a href="/wiki/Bit_slicing" title="Bit slicing">bit slicing</a></li></ul></div></td> </tr><tr><th class="sidebar-heading" style="background-color: #ccccff;"> <a href="/wiki/Application_software" title="Application software">Application</a></th></tr><tr><td class="sidebar-content"> <div class="hlist"><ul><li><a href="/wiki/8-bit_computing" title="8-bit computing">8</a></li><li><a href="/wiki/16-bit_computing#16-bit_application" title="16-bit computing">16</a></li><li><a href="/wiki/32-bit_computing#32-bit_application" title="32-bit computing">32</a></li><li><a class="mw-selflink-fragment" href="#64-bit_applications">64</a></li></ul></div></td> </tr><tr><th class="sidebar-heading" style="background-color: #ccccff;"> <a href="/wiki/Floating-point_arithmetic" title="Floating-point arithmetic">Binary floating-point</a> <a href="/wiki/Precision_(computer_science)" title="Precision (computer science)">precision</a></th></tr><tr><td class="sidebar-content"> <div class="hlist"><ul><li><a href="/wiki/Half-precision_floating-point_format" title="Half-precision floating-point format">16</a> (×½)</li><li><a href="/wiki/Minifloat" title="Minifloat">24</a></li><li><a href="/wiki/Single-precision_floating-point_format" title="Single-precision floating-point format">32</a> (×1)</li><li><a href="/wiki/Extended_precision" title="Extended precision">40</a></li><li><a href="/wiki/Double-precision_floating-point_format" title="Double-precision floating-point format">64</a> (×2)</li><li><a href="/wiki/Extended_precision" title="Extended precision">80</a></li><li><a href="/wiki/Quadruple-precision_floating-point_format" title="Quadruple-precision floating-point format">128</a> (×4)</li><li><a href="/wiki/Octuple-precision_floating-point_format" title="Octuple-precision floating-point format">256</a> (×8)</li></ul></div></td> </tr><tr><th class="sidebar-heading" style="background-color: #ccccff;"> <a href="/wiki/Decimal_floating_point" title="Decimal floating point">Decimal floating-point</a> <a href="/wiki/Precision_(computer_science)" title="Precision (computer science)">precision</a></th></tr><tr><td class="sidebar-content"> <div class="hlist"><ul><li><a href="/wiki/Decimal32_floating-point_format" title="Decimal32 floating-point format">32</a></li><li><a href="/wiki/Decimal64_floating-point_format" title="Decimal64 floating-point format">64</a></li><li><a href="/wiki/Decimal128_floating-point_format" title="Decimal128 floating-point format">128</a></li></ul></div></td> </tr><tr><td class="sidebar-navbar"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374" /><style data-mw-deduplicate="TemplateStyles:r1239400231">.mw-parser-output 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abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Computer_architecture_bit_widths" title="Template:Computer architecture bit widths"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Computer_architecture_bit_widths" title="Template talk:Computer architecture bit widths"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Computer_architecture_bit_widths" title="Special:EditPage/Template:Computer architecture bit widths"><abbr title="Edit this template">e</abbr></a></li></ul></div></td></tr></tbody></table> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Hex_dump_of_the_Section_Table_in_a_64_bit_PE_File.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/3a/Hex_dump_of_the_Section_Table_in_a_64_bit_PE_File.jpg/220px-Hex_dump_of_the_Section_Table_in_a_64_bit_PE_File.jpg" decoding="async" width="220" height="78" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/3a/Hex_dump_of_the_Section_Table_in_a_64_bit_PE_File.jpg/330px-Hex_dump_of_the_Section_Table_in_a_64_bit_PE_File.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/3a/Hex_dump_of_the_Section_Table_in_a_64_bit_PE_File.jpg/440px-Hex_dump_of_the_Section_Table_in_a_64_bit_PE_File.jpg 2x" data-file-width="624" data-file-height="222" /></a><figcaption><a href="/wiki/Hex_dump" title="Hex dump">Hex dump</a> of the section table in a 64-bit <a href="/wiki/Portable_Executable" title="Portable Executable">Portable Executable</a> File. A 64-bit <a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">word</a> can be expressed as a sequence of 16 <a href="/wiki/Hexadecimal" title="Hexadecimal">hexadecimal</a> digits.</figcaption></figure> <p>In <a href="/wiki/Computer_architecture" title="Computer architecture">computer architecture</a>, <b>64-bit</b> <a href="/wiki/Integer_(computer_science)" title="Integer (computer science)">integers</a>, <a href="/wiki/Memory_address" title="Memory address">memory addresses</a>, or other <a href="/wiki/Data_(computing)" class="mw-redirect" title="Data (computing)">data</a> units<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> are those that are 64 <a href="/wiki/Bit" title="Bit">bits</a> wide. Also, 64-bit <a href="/wiki/Central_processing_unit" title="Central processing unit">central processing units</a> (CPU) and <a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">arithmetic logic units</a> (ALU) are those that are based on <a href="/wiki/Processor_register" title="Processor register">processor registers</a>, <a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">address buses</a>, or <a href="/wiki/Bus_(computing)" title="Bus (computing)">data buses</a> of that size. A <a href="/wiki/Computer" title="Computer">computer</a> that uses such a processor is a 64-bit computer. </p><p>From the software perspective, 64-bit computing means the use of <a href="/wiki/Machine_code" title="Machine code">machine code</a> with 64-bit <a href="/wiki/Virtual_memory" title="Virtual memory">virtual memory</a> addresses. However, not all 64-bit instruction sets support full 64-bit virtual memory addresses; <a href="/wiki/X86-64" title="X86-64">x86-64</a> and <a href="/wiki/AArch64" title="AArch64">AArch64</a>, for example, support only 48 bits of virtual address, with the remaining 16 bits of the virtual address required to be all zeros (000...) or all ones (111...), and several 64-bit instruction sets support fewer than 64 bits of physical memory address. </p><p>The term <i>64-bit</i> also describes a generation of computers in which 64-bit processors are the norm. 64 bits is a <a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">word</a> size that defines certain classes of computer architecture, buses, memory, and CPUs and, by extension, the software that runs on them. 64-bit CPUs have been used in <a href="/wiki/Supercomputer" title="Supercomputer">supercomputers</a> since the 1970s (<a href="/wiki/Cray-1" title="Cray-1">Cray-1</a>, 1975) and in <a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">reduced instruction set computers</a> (RISC) based <a href="/wiki/Workstation" title="Workstation">workstations</a> and <a href="/wiki/Server_(computing)" title="Server (computing)">servers</a> since the early 1990s. In 2003, 64-bit CPUs were introduced to the mainstream <a href="/wiki/Personal_computer" title="Personal computer">PC</a> market in the form of x86-64 processors and the <a href="/wiki/PowerPC_970" title="PowerPC 970">PowerPC G5</a>. </p><p>A 64-bit register can hold any of 2<sup>64</sup> (over 18 <a href="/wiki/Quintillion" class="mw-redirect" title="Quintillion">quintillion</a> or 1.8×10<sup>19</sup>) different values. The range of <a href="/wiki/Integer" title="Integer">integer</a> values that can be stored in 64 bits depends on the <a href="/wiki/Integer_(computer_science)#Value_and_representation" title="Integer (computer science)">integer representation</a> used. With the two most common representations, the range is 0 through 18,446,744,073,709,551,615 (equal to 2<sup>64</sup> − 1) for representation as an (<a href="/wiki/Signedness" title="Signedness">unsigned</a>) <a href="/wiki/Binary_number" title="Binary number">binary number</a>, and −9,223,372,036,854,775,808 (−2<sup>63</sup>) through 9,223,372,036,854,775,807 (2<sup>63</sup> − 1) for representation as <a href="/wiki/Two%27s_complement" title="Two's complement">two's complement</a>. Hence, a processor with 64-bit memory addresses can directly access 2<sup>64</sup> bytes (16 <a href="/wiki/Exabytes" class="mw-redirect" title="Exabytes">exabytes</a> or EB) of <a href="/wiki/Byte_addressing" title="Byte addressing">byte-addressable</a> memory. </p><p>With no further qualification, a <i>64-bit computer architecture</i> generally has integer and addressing <a href="/wiki/Processor_register" title="Processor register">registers</a> that are 64 bits wide, allowing direct support for 64-bit data types and addresses. However, a CPU might have external <a href="/wiki/Bus_(computing)" title="Bus (computing)">data buses</a> or <a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">address buses</a> with different sizes from the registers, even larger (the 32-bit <a href="/wiki/Pentium" title="Pentium">Pentium</a> had a 64-bit data bus, for instance).<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Architectural_implications">Architectural implications</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=1" title="Edit section: Architectural implications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444" /><table class="box-Unreferenced_section plainlinks metadata ambox ambox-content ambox-Unreferenced" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Question_book-new.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>does not <a href="/wiki/Wikipedia:Citing_sources" title="Wikipedia:Citing sources">cite</a> any <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">sources</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/64-bit_computing" title="Special:EditPage/64-bit computing">improve this section</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>. Unsourced material may be challenged and <a href="/wiki/Wikipedia:Verifiability#Burden_of_evidence" title="Wikipedia:Verifiability">removed</a>.</span> <span class="date-container"><i>(<span class="date">April 2023</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p>Processor registers are typically divided into several groups: <i>integer</i>, <i>floating-point</i>, <i><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">single instruction, multiple data</a></i> (SIMD), <i>control</i>, and often special registers for address arithmetic which may have various uses and names such as <i>address</i>, <i>index</i>, or <i>base registers</i>. However, in modern designs, these functions are often performed by more general purpose <i>integer</i> registers. In most processors, only integer or address-registers can be used to address data in memory; the other types of registers cannot. The size of these registers therefore normally limits the amount of directly addressable memory, even if there are registers, such as floating-point registers, that are wider. </p><p>Most high performance 32-bit and 64-bit processors (some notable exceptions are older or embedded <a href="/wiki/ARM_architecture" class="mw-redirect" title="ARM architecture">ARM architecture</a> (ARM) and 32-bit <a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS architecture</a> (MIPS) CPUs) have integrated floating point hardware, which is often, but not always, based on 64-bit units of data. For example, although the <a href="/wiki/X86" title="X86">x86</a>/<a href="/wiki/X87" title="X87">x87</a> architecture has instructions able to load and store 64-bit (and 32-bit) floating-point values in memory, the internal floating-point data and register format is 80 bits wide, while the general-purpose registers are 32 bits wide. In contrast, the 64-bit <a href="/wiki/DEC_Alpha" title="DEC Alpha">Alpha</a> family uses a 64-bit floating-point data and register format, and 64-bit integer registers. </p> <div class="mw-heading mw-heading2"><h2 id="History">History</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=2" title="Edit section: History"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Many computer <a href="/wiki/Instruction_set" class="mw-redirect" title="Instruction set">instruction sets</a> are designed so that a single integer register can store the <a href="/wiki/Memory_address" title="Memory address">memory address</a> to any location in the computer's physical or <a href="/wiki/Virtual_memory" title="Virtual memory">virtual memory</a>. Therefore, the total number of addresses to memory is often determined by the width of these registers. The <a href="/wiki/IBM" title="IBM">IBM</a> <a href="/wiki/System/360" class="mw-redirect" title="System/360">System/360</a> of the 1960s was an early 32-bit computer; it had 32-bit integer registers, although it only used the low order 24 bits of a word for addresses, resulting in a 16 <a href="/wiki/Mebibyte" class="mw-redirect" title="Mebibyte">MiB</a> (<span class="nowrap">16 × 1024<sup>2</sup> bytes</span>) address space. 32-bit <a href="/wiki/Superminicomputer" title="Superminicomputer">superminicomputers</a>, such as the <a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">DEC</a> <a href="/wiki/VAX" title="VAX">VAX</a>, became common in the 1970s, and 32-bit microprocessors, such as the <a href="/wiki/Motorola_68000_family" class="mw-redirect" title="Motorola 68000 family">Motorola 68000 family</a> and the <a href="/wiki/IA-32" title="IA-32">32-bit members of the x86 family</a> starting with the <a href="/wiki/Intel_80386" class="mw-redirect" title="Intel 80386">Intel 80386</a>, appeared in the mid-1980s, making 32 bits something of a <i>de facto</i> consensus as a convenient register size. </p><p>A 32-bit <a href="/wiki/Address_register" class="mw-redirect" title="Address register">address register</a> meant that 2<sup>32</sup> addresses, or 4 <a href="/wiki/Gigabyte" title="Gigabyte">GB</a> of <a href="/wiki/Random-access_memory" title="Random-access memory">random-access memory</a> (RAM), could be referenced. When these architectures were devised, 4 GB of memory was so far beyond the typical amounts (4 MiB) in installations, that this was considered to be enough <i>headroom</i> for addressing. 4.29 billion addresses were considered an appropriate size to work with for another important reason: 4.29 billion integers are enough to assign unique references to most entities in applications like <a href="/wiki/Database" title="Database">databases</a>. </p><p>Some <a href="/wiki/Supercomputer" title="Supercomputer">supercomputer</a> architectures of the 1970s and 1980s, such as the <a href="/wiki/Cray-1" title="Cray-1">Cray-1</a>,<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> used registers up to 64 bits wide, and supported 64-bit integer arithmetic, although they did not support 64-bit addressing. In the mid-1980s, <a href="/wiki/Intel_i860" title="Intel i860">Intel i860</a><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> development began culminating in a 1989 release; the i860 had 32-bit integer registers and 32-bit addressing, so it was not a fully 64-bit processor, although its graphics unit supported 64-bit integer arithmetic.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> However, 32 bits remained the norm until the early 1990s, when the continual reductions in the cost of memory led to installations with amounts of RAM approaching 4 GB, and the use of virtual memory spaces exceeding the 4 GB ceiling became desirable for handling certain types of problems. In response, MIPS and DEC developed 64-bit microprocessor architectures, initially for high-end <a href="/wiki/Workstation" title="Workstation">workstation</a> and <a href="/wiki/Server_(computing)" title="Server (computing)">server</a> machines. By the mid-1990s, <a href="/wiki/HAL_Computer_Systems" title="HAL Computer Systems">HAL Computer Systems</a>, <a href="/wiki/Sun_Microsystems" title="Sun Microsystems">Sun Microsystems</a>, <a href="/wiki/IBM" title="IBM">IBM</a>, <a href="/wiki/Silicon_Graphics" title="Silicon Graphics">Silicon Graphics</a>, and <a href="/wiki/Hewlett-Packard" title="Hewlett-Packard">Hewlett-Packard</a> had developed 64-bit architectures for their workstation and server systems. A notable exception to this trend were <a href="/wiki/Mainframe_computer" title="Mainframe computer">mainframes</a> from IBM, which then used 32-bit data and 31-bit address sizes; the IBM mainframes did not include 64-bit processors until 2000. During the 1990s, several low-cost 64-bit microprocessors were used in consumer electronics and embedded applications. Notably, the <a href="/wiki/Nintendo_64" title="Nintendo 64">Nintendo 64</a><sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> and the <a href="/wiki/PlayStation_2" title="PlayStation 2">PlayStation 2</a> had 64-bit microprocessors before their introduction in personal computers. High-end printers, network equipment, and industrial computers also used 64-bit microprocessors, such as the <a href="/wiki/Quantum_Effect_Devices" title="Quantum Effect Devices">Quantum Effect Devices</a> <a href="/wiki/R5000" title="R5000">R5000</a>.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> 64-bit computing started to trickle down to the personal computer desktop from 2003 onward, when some models in <a href="/wiki/Apple_Inc." title="Apple Inc.">Apple</a>'s Macintosh lines switched to <a href="/wiki/PowerPC_970" title="PowerPC 970">PowerPC 970</a> processors (termed <i>G5</i> by Apple), and <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">Advanced Micro Devices</a> (AMD) released its first 64-bit <a href="/wiki/X86-64" title="X86-64">x86-64</a> processor. Physical memory eventually caught up with 32-bit limits. In 2023, laptop computers were commonly equipped with 16GB and servers starting from 64 GB of memory,<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> greatly exceeding the 4 GB address capacity of 32 bits. </p> <div class="mw-heading mw-heading3"><h3 id="64-bit_data_timeline">64-bit data timeline</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=3" title="Edit section: 64-bit data timeline"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <dl><dt>1961</dt> <dd>IBM delivers the <a href="/wiki/IBM_7030_Stretch" title="IBM 7030 Stretch">IBM 7030 Stretch</a> <a href="/wiki/Supercomputer" title="Supercomputer">supercomputer</a>, which uses 64-bit data words and 32- or 64-bit instruction words.</dd> <dt>1974</dt> <dd><a href="/wiki/Control_Data_Corporation" title="Control Data Corporation">Control Data Corporation</a> launches the <a href="/wiki/CDC_Star-100" class="mw-redirect" title="CDC Star-100">CDC Star-100</a> vector supercomputer, which uses a 64-bit word architecture (prior CDC systems were based on a 60-bit architecture).</dd> <dd><a href="/wiki/International_Computers_Limited" title="International Computers Limited">International Computers Limited</a> launches the <a href="/wiki/ICL_2900_Series" title="ICL 2900 Series">ICL 2900 Series</a> with 32-bit, 64-bit, and 128-bit <a href="/wiki/Two%27s_complement" title="Two's complement">two's complement</a> integers; 64-bit and 128-bit floating point; 32-bit, 64-bit, and 128-bit packed decimal and a 128-bit accumulator register. The architecture has survived through a succession of ICL and Fujitsu machines. The latest is the Fujitsu Supernova, which emulates the original environment on 64-bit Intel processors.</dd> <dt>1976</dt> <dd><a href="/wiki/Cray_Research" class="mw-redirect" title="Cray Research">Cray Research</a> delivers the first <a href="/wiki/Cray-1" title="Cray-1">Cray-1</a> supercomputer, which is based on a 64-bit word architecture and will form the basis for later Cray vector supercomputers.</dd> <dt>1983</dt> <dd><a href="/wiki/Elxsi" title="Elxsi">Elxsi</a> launches the Elxsi 6400 parallel <a href="/wiki/Minisupercomputer" title="Minisupercomputer">minisupercomputer</a>. The Elxsi architecture has 64-bit data registers but a 32-bit address space.</dd> <dt>1989</dt> <dd><a href="/wiki/Intel" title="Intel">Intel</a> introduces the <a href="/wiki/Intel_i860" title="Intel i860">Intel i860</a> <a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">reduced instruction set computer</a> (RISC) processor. Marketed as a "64-Bit Microprocessor", it had essentially a 32-bit architecture, enhanced with a 3D graphics unit capable of 64-bit integer operations.<sup id="cite_ref-smithsonian-i860_9-0" class="reference"><a href="#cite_note-smithsonian-i860-9"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup></dd> <dt>1993</dt> <dd><a href="/wiki/Atari" title="Atari">Atari</a> introduces the <a href="/wiki/Atari_Jaguar" title="Atari Jaguar">Atari Jaguar</a> <a href="/wiki/Video_game_console" title="Video game console">video game console</a>, which includes some 64-bit wide data paths in its architecture.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup></dd></dl> <div class="mw-heading mw-heading3"><h3 id="64-bit_address_timeline">64-bit address timeline</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=4" title="Edit section: 64-bit address timeline"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <dl><dt>1991</dt> <dd><a href="/wiki/MIPS_Computer_Systems" class="mw-redirect" title="MIPS Computer Systems">MIPS Computer Systems</a> produces the first 64-bit microprocessor, the <a href="/wiki/R4000" title="R4000">R4000</a>, which implements the <a href="/wiki/MIPS_architecture#MIPS_III" title="MIPS architecture">MIPS III</a> architecture, the third revision of its <a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS architecture</a>.<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> The CPU is used in <a href="/wiki/Silicon_Graphics" title="Silicon Graphics">SGI</a> graphics workstations starting with the <a href="/wiki/SGI_Crimson" title="SGI Crimson">IRIS Crimson</a>. <a href="/wiki/Kendall_Square_Research" title="Kendall Square Research">Kendall Square Research</a> deliver their first KSR1 supercomputer, based on a proprietary 64-bit RISC processor architecture running <a href="/wiki/Tru64_UNIX#OSF/1" title="Tru64 UNIX">OSF/1</a>.</dd> <dt>1992</dt> <dd><a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">Digital Equipment Corporation</a> (DEC) introduces the pure 64-bit <a href="/wiki/DEC_Alpha" title="DEC Alpha">Alpha</a> architecture which was born from the <a href="/wiki/DEC_PRISM" title="DEC PRISM">PRISM</a> project.<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup></dd> <dt>1994</dt> <dd><a href="/wiki/Intel" title="Intel">Intel</a> announces plans for the 64-bit <a href="/wiki/IA-64" title="IA-64">IA-64</a> architecture (jointly developed with <a href="/wiki/Hewlett-Packard" title="Hewlett-Packard">Hewlett-Packard</a>) as a successor to its 32-bit <a href="/wiki/IA-32" title="IA-32">IA-32</a> processors. A 1998 to 1999 launch date was targeted.</dd> <dt>1995</dt> <dd><a href="/wiki/Sun_Microsystems" title="Sun Microsystems">Sun</a> launches a 64-bit <a href="/wiki/SPARC" title="SPARC">SPARC</a> processor, the <a href="/wiki/UltraSPARC" title="UltraSPARC">UltraSPARC</a>.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> <a href="/wiki/Fujitsu" title="Fujitsu">Fujitsu</a>-owned <a href="/wiki/HAL_Computer_Systems" title="HAL Computer Systems">HAL Computer Systems</a> launches workstations based on a 64-bit CPU, HAL's independently designed first-generation <a href="/wiki/HAL_SPARC64" title="HAL SPARC64">SPARC64</a>. IBM releases the A10 and A30 microprocessors, the first 64-bit PowerPC AS processors.<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> IBM also releases a 64-bit AS/400 system upgrade, which can convert the operating system, database and applications.</dd> <dt>1996</dt> <dd><a href="/wiki/Nintendo" title="Nintendo">Nintendo</a> introduces the <a href="/wiki/Nintendo_64" title="Nintendo 64">Nintendo 64</a> video game console, built around a low-cost variant of the MIPS R4000. HP releases the first implementation of its 64-bit <a href="/wiki/PA-RISC" title="PA-RISC">PA-RISC 2.0</a> architecture, the <a href="/wiki/PA-8000" title="PA-8000">PA-8000</a>.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup></dd> <dt>1998</dt> <dd>IBM releases the <a href="/wiki/POWER3" title="POWER3">POWER3</a> line of full-64-bit PowerPC/<a href="/wiki/IBM_POWER_architecture" title="IBM POWER architecture">POWER</a> processors.<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup></dd> <dt>1999</dt> <dd>Intel releases the <a href="/wiki/Instruction_set" class="mw-redirect" title="Instruction set">instruction set</a> for the <a href="/wiki/IA-64" title="IA-64">IA-64</a> architecture. <a href="/wiki/AMD" title="AMD">AMD</a> publicly discloses its set of 64-bit extensions to IA-32, called <a href="/wiki/X86-64" title="X86-64">x86-64</a> (later branded AMD64).</dd> <dt>2000</dt> <dd>IBM ships its first 64-bit <a href="/wiki/Z/Architecture" title="Z/Architecture">z/Architecture</a> <a href="/wiki/Mainframe_computer" title="Mainframe computer">mainframe</a>, the <a href="/wiki/ZSeries" class="mw-redirect" title="ZSeries">zSeries</a> z900. z/Architecture is a 64-bit version of the 32-bit <a href="/wiki/ESA/390" class="mw-redirect" title="ESA/390">ESA/390</a> architecture, a descendant of the 32-bit <a href="/wiki/System/360" class="mw-redirect" title="System/360">System/360</a> architecture.</dd> <dt>2001</dt> <dd>Intel ships its IA-64 processor line, after repeated delays in getting to market. Now branded <a href="/wiki/Itanium" title="Itanium">Itanium</a> and targeting high-end servers, sales fail to meet expectations.</dd> <dt>2003</dt> <dd>AMD introduces its <a href="/wiki/Opteron" title="Opteron">Opteron</a> and <a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> processor lines, based on its <a href="/wiki/X86-64" title="X86-64">AMD64</a> architecture which is the first x86-based 64-bit processor architecture. <a href="/wiki/Apple_Inc." title="Apple Inc.">Apple</a> also ships the 64-bit "G5" <a href="/wiki/PowerPC_970" title="PowerPC 970">PowerPC 970</a> CPU produced by IBM. Intel maintains that its Itanium chips would remain its only 64-bit processors.</dd> <dt>2004</dt> <dd>Intel, reacting to the market success of AMD, admits it has been developing a clone of the AMD64 extensions named IA-32e (later renamed EM64T, then yet again renamed to Intel 64). Intel ships updated versions of its <a href="/wiki/Xeon" title="Xeon">Xeon</a> and <a href="/wiki/Pentium_4" title="Pentium 4">Pentium 4</a> processor families supporting the new 64-bit instruction set.</dd> <dd><a href="/wiki/VIA_Technologies" title="VIA Technologies">VIA Technologies</a> announces the <a href="/wiki/VIA_Isaiah" class="mw-redirect" title="VIA Isaiah">Isaiah</a> 64-bit processor.<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup></dd> <dt>2006</dt> <dd>Sony, IBM, and Toshiba begin manufacturing the 64-bit <a href="/wiki/Cell_(processor)" title="Cell (processor)">Cell processor</a> for use in the <a href="/wiki/PlayStation_3" title="PlayStation 3">PlayStation 3</a>, servers, workstations, and other appliances. Intel released <a href="/wiki/Intel_Core_(microarchitecture)" title="Intel Core (microarchitecture)">Core 2 Duo</a> as the first mainstream x86-64 processor for its mobile, desktop, and workstation line. Prior 64-bit extension processor lines were not widely available in the consumer retail market (most of 64-bit Pentium 4/D were OEM), 64-bit Pentium 4, Pentium D, and Celeron were not into mass production until late 2006 due to poor yield issue (most of good yield wafers were targeted at server and mainframe while mainstream still remain 130 nm 32-bit processor line until 2006) and soon became low end after Core 2 debuted. AMD released their first 64-bit mobile processor and manufactured in 90 nm.</dd> <dt>2011</dt> <dd><a href="/wiki/ARM_Holdings" class="mw-redirect" title="ARM Holdings">ARM Holdings</a> announces ARMv8-A, the first 64-bit version of the <a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM architecture family</a>.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup></dd> <dt>2012</dt> <dd>ARM Holdings announced their Cortex-A53 and Cortex-A57 cores, their first cores based on their 64-bit architecture, on 30 October 2012.<sup id="cite_ref-cortex-a50_announce_19-0" class="reference"><a href="#cite_note-cortex-a50_announce-19"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-ARM64bKeynote_20-0" class="reference"><a href="#cite_note-ARM64bKeynote-20"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup></dd> <dt>2013</dt> <dd>Apple announces the <a href="/wiki/IPhone_5S" class="mw-redirect" title="IPhone 5S">iPhone 5S</a>, with the world's first 64-bit processor in a smartphone, which uses their <a href="/wiki/Apple_A7" title="Apple A7">A7</a> ARMv8-A-based system-on-a-chip alongside the <a href="/wiki/IPad_Air" class="mw-redirect" title="IPad Air">iPad Air</a> and <a href="/wiki/IPad_Mini_2" title="IPad Mini 2">iPad Mini 2</a> which are the world's first 64-bit processor in a tablet.</dd> <dt>2014</dt> <dd>Google announces the <a href="/wiki/Nexus_9" title="Nexus 9">Nexus 9</a> tablet, the first Android device to run on the 64-bit Tegra K1 chip.</dd> <dt>2015</dt> <dd>Apple announces the <a href="/wiki/IPod_Touch_(6th_generation)" title="IPod Touch (6th generation)">iPod Touch (6th generation)</a>, the first iPod Touch to use the 64-bit processor <a href="/wiki/Apple_A8" title="Apple A8">A8</a> ARMv8-A-based system-on-a-chip alongside the <a href="/wiki/Apple_TV" title="Apple TV">Apple TV (4th generation)</a> which is the world's first 64-bit processor in an Apple TV.</dd> <dt>2018</dt> <dd>Apple announces the <a href="/wiki/Apple_Watch" title="Apple Watch">Apple Watch Series 4</a>, the first Apple Watch to use the 64-bit processor <a href="/wiki/Apple_S4" class="mw-redirect" title="Apple S4">S4</a> ARMv8-A-based system-on-a-chip.</dd> <dt>2020</dt> <dd>Synopsis announce the ARCv3 ISA, the first 64-bit version of the <a href="/wiki/ARC_(processor)" title="ARC (processor)">ARC ISA</a>.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup></dd></dl> <div class="mw-heading mw-heading3"><h3 id="64-bit_operating_system_timeline">64-bit operating system timeline</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=5" title="Edit section: 64-bit operating system timeline"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <dl><dt>1985</dt> <dd><a href="/wiki/Cray" title="Cray">Cray</a> releases <a href="/wiki/UNICOS" title="UNICOS">UNICOS</a>, the first 64-bit implementation of the <a href="/wiki/Unix" title="Unix">Unix</a> operating system.<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup></dd> <dt>1993</dt> <dd>DEC releases the 64-bit <a href="/wiki/Tru64_UNIX#OSF/1" title="Tru64 UNIX">DEC OSF/1 AXP</a> <a href="/wiki/Unix-like" title="Unix-like">Unix-like</a> operating system (later renamed Tru64 UNIX) for its systems based on the <a href="/wiki/DEC_Alpha" title="DEC Alpha">Alpha</a> architecture.</dd> <dt>1994</dt> <dd>Support for the <a href="/wiki/R8000" title="R8000">R8000</a> processor is added by <a href="/wiki/Silicon_Graphics" title="Silicon Graphics">Silicon Graphics</a> to the <a href="/wiki/IRIX" title="IRIX">IRIX</a> <a href="/wiki/Operating_system" title="Operating system">operating system</a> in release 6.0.</dd> <dt>1995</dt> <dd>DEC releases <a href="/wiki/OpenVMS" title="OpenVMS">OpenVMS</a> 7.0, the first full 64-bit version of OpenVMS for Alpha. First 64-bit <a href="/wiki/Linux_distribution" title="Linux distribution">Linux distribution</a> for the Alpha architecture is released.<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup></dd> <dt>1996</dt> <dd>Support for the R4x00 processors in 64-bit mode is added by <a href="/wiki/Silicon_Graphics" title="Silicon Graphics">Silicon Graphics</a> to the <a href="/wiki/IRIX" title="IRIX">IRIX</a> <a href="/wiki/Operating_system" title="Operating system">operating system</a> in release 6.2.</dd> <dt>1998</dt> <dd>Sun releases <a href="/wiki/Solaris_(operating_system)" class="mw-redirect" title="Solaris (operating system)">Solaris</a> 7, with full 64-bit <a href="/wiki/UltraSPARC" title="UltraSPARC">UltraSPARC</a> support.</dd> <dt>2000</dt> <dd>IBM releases <a href="/wiki/Z/OS" title="Z/OS">z/OS</a>, a 64-bit operating system descended from <a href="/wiki/MVS" title="MVS">MVS</a>, for the new <a href="/wiki/ZSeries" class="mw-redirect" title="ZSeries">zSeries</a> 64-bit mainframes; 64-bit <a href="/wiki/Linux_on_z_Systems" class="mw-redirect" title="Linux on z Systems">Linux on z Systems</a> follows the CPU release almost immediately.</dd> <dt>2001</dt> <dd>Linux becomes the first OS kernel to fully support <a href="/wiki/X86-64" title="X86-64">x86-64</a> (on a simulator, as no x86-64 processors had been released yet).<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup></dd> <dt>2001</dt> <dd>Microsoft releases <a href="/wiki/Windows_XP_64-Bit_Edition" class="mw-redirect" title="Windows XP 64-Bit Edition">Windows XP 64-Bit Edition</a> for the <a href="/wiki/Itanium" title="Itanium">Itanium</a>'s IA-64 architecture; it could run <a href="/wiki/32-bit_application" class="mw-redirect" title="32-bit application">32-bit applications</a> through an execution layer.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2003</dt> <dd>Apple releases its <a href="/wiki/Mac_OS_X_Panther" title="Mac OS X Panther">Mac OS X 10.3</a> "Panther" operating system which adds support for native 64-bit integer arithmetic on <a href="/wiki/PowerPC_970" title="PowerPC 970">PowerPC 970</a> processors.<sup id="cite_ref-ars-macosx_25-0" class="reference"><a href="#cite_note-ars-macosx-25"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> Several <a href="/wiki/Linux" title="Linux">Linux</a> <a href="/wiki/Linux_distribution" title="Linux distribution">distributions</a> release with support for <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>. <a href="/wiki/FreeBSD" title="FreeBSD">FreeBSD</a> releases with support for AMD64.</dd> <dt>2005</dt> <dd>On January 4, Microsoft discontinues Windows XP 64-Bit Edition, as no PCs with IA-64 processors had been available since the previous September, and announces that it is developing x86-64 versions of Windows to replace it.<sup id="cite_ref-XPIA64-nixed_26-0" class="reference"><a href="#cite_note-XPIA64-nixed-26"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> On January 31, Sun releases <a href="/wiki/Solaris_(operating_system)" class="mw-redirect" title="Solaris (operating system)">Solaris 10</a> with support for AMD64 and EM64T processors. On April 29, Apple releases <a href="/wiki/Mac_OS_X_Tiger" title="Mac OS X Tiger">Mac OS X 10.4</a> "Tiger" which provides limited support for 64-bit command-line applications on machines with PowerPC 970 processors; later versions for Intel-based Macs supported 64-bit command-line applications on Macs with EM64T processors. On April 30, Microsoft releases <a href="/wiki/Windows_XP_Professional_x64_Edition" title="Windows XP Professional x64 Edition">Windows XP Professional x64 Edition</a> and <a href="/wiki/Windows_Server_2003" title="Windows Server 2003">Windows Server 2003</a> x64 Edition for AMD64 and EM64T processors.<sup id="cite_ref-27" class="reference"><a href="#cite_note-27"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup></dd> <dt>2006</dt> <dd>Microsoft releases <a href="/wiki/Windows_Vista" title="Windows Vista">Windows Vista</a>, including a 64-bit version for AMD64/EM64T processors that retains 32-bit compatibility. In the 64-bit version, all Windows applications and components are 64-bit, although many also have their 32-bit versions included for compatibility with <a href="/wiki/Plug-in_(computing)" title="Plug-in (computing)">plug-ins</a>.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2007</dt> <dd>Apple releases <a href="/wiki/Mac_OS_X_Leopard" title="Mac OS X Leopard">Mac OS X 10.5</a> "Leopard", which fully supports 64-bit applications on machines with PowerPC 970 or EM64T processors.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2009</dt> <dd>Microsoft releases <a href="/wiki/Windows_7" title="Windows 7">Windows 7</a>, which, like Windows Vista, includes a full 64-bit version for AMD64/Intel 64 processors; most new computers are loaded by default with a 64-bit version. Microsoft also releases <a href="/wiki/Windows_Server_2008_R2" title="Windows Server 2008 R2">Windows Server 2008 R2</a>, which is the first 64-bit only server operating system. Apple releases <a href="/wiki/Mac_OS_X_Snow_Leopard" title="Mac OS X Snow Leopard">Mac OS X 10.6</a>, "Snow Leopard", which ships with a 64-bit kernel for AMD64/Intel64 processors, although only certain recent models of Apple computers will run the 64-bit kernel by default. Most applications bundled with Mac OS X 10.6 are now also 64-bit.<sup id="cite_ref-ars-macosx_25-1" class="reference"><a href="#cite_note-ars-macosx-25"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup></dd> <dt>2011</dt> <dd>Apple releases <a href="/wiki/Mac_OS_X_Lion" class="mw-redirect" title="Mac OS X Lion">Mac OS X 10.7</a>, "Lion", which runs the 64-bit kernel by default on supported machines. Older machines that are unable to run the 64-bit kernel run the 32-bit kernel, but, as with earlier releases, can still run 64-bit applications; Lion does not support machines with 32-bit processors. Nearly all applications bundled with Mac OS X 10.7 are now also 64-bit, including iTunes.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2012</dt> <dd>Microsoft releases <a href="/wiki/Windows_8" title="Windows 8">Windows 8</a> which supports UEFI Class 3 (<a href="/wiki/UEFI" title="UEFI">UEFI</a> without CSM) and <a href="/wiki/Secure_Boot" class="mw-redirect" title="Secure Boot">Secure Boot</a>.<sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup></dd> <dt>2013</dt> <dd>Apple releases <a href="/wiki/IOS_7" title="IOS 7">iOS 7</a>, which, on machines with AArch64 processors, has a 64-bit kernel that supports 64-bit applications.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2014</dt> <dd>Google releases <a href="/wiki/Android_Lollipop" title="Android Lollipop">Android Lollipop</a>, the first version of the <a href="/wiki/Android_(operating_system)" title="Android (operating system)">Android</a> operating system with support for 64-bit processors.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2017</dt> <dd>Apple releases <a href="/wiki/IOS_11" title="IOS 11">iOS 11</a>, supporting only machines with AArch64 processors. It has a 64-bit kernel that only supports 64-bit applications. 32-bit applications are no longer compatible.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2018</dt> <dd>Apple releases <a href="/wiki/WatchOS_5" class="mw-redirect" title="WatchOS 5">watchOS 5</a>, the first watchOS version to bring the 64-bit support.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2019</dt> <dd>Apple releases <a href="/wiki/MacOS_Catalina" title="MacOS Catalina">macOS 10.15</a> "Catalina", dropping support for 32-bit Intel applications.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2021</dt> <dd>Microsoft releases <a href="/wiki/Windows_11" title="Windows 11">Windows 11</a> on October 5, which only supports 64-bit systems, dropping support for IA-32 and AArch32 systems.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2022</dt> <dd>Google releases the <a href="/wiki/Pixel_7" title="Pixel 7">Pixel 7</a>, which drops support for 32-bit applications. Apple releases <a href="/wiki/WatchOS_9" class="mw-redirect" title="WatchOS 9">watchOS 9</a>, the first watchOS version to run exclusively on the Apple Watch models with 64-bit processors (including Apple Watch Series 4 or newer, <a href="/wiki/Apple_Watch" title="Apple Watch">Apple Watch SE (1st generation)</a> or newer and the newly introduced <a href="/wiki/Apple_Watch" title="Apple Watch">Apple Watch Ultra</a>), dropping support for <a href="/wiki/Apple_Watch" title="Apple Watch">Apple Watch Series 3</a> as the final Apple Watch model with 32-bit processor.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2024)">citation needed</span></a></i>]</sup></dd> <dt>2024</dt> <dd>Microsoft releases <a href="/wiki/Windows_11,_version_24H2" title="Windows 11, version 24H2">Windows 11 2024 Update</a>, ARM versions of which drop support for 32-bit ARM applications.</dd></dl> <div class="mw-heading mw-heading2"><h2 id="Limits_of_processors">Limits of processors</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=6" title="Edit section: Limits of processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In principle, a 64-bit microprocessor can address 16 EB (<span class="nowrap">16 × 1024<sup>6</sup> = 2<sup>64</sup> = 18,446,744,073,709,551,616 bytes</span>) of memory. However, not all instruction sets, and not all processors implementing those instruction sets, support a full 64-bit virtual or physical address space. </p><p>The <a href="/wiki/X86-64" title="X86-64">x86-64 architecture</a> (as of March 2024<sup class="plainlinks noexcerpt noprint asof-tag update" style="display:none;"><a class="external text" href="https://en.wikipedia.org/w/index.php?title=64-bit_computing&action=edit">[update]</a></sup>) allows 48 bits for virtual memory and, for any given processor, up to 52 bits for physical memory.<sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-30" class="reference"><a href="#cite_note-30"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup> These limits allow memory sizes of 256 <a href="/wiki/Terabyte" class="mw-redirect" title="Terabyte">TB</a> (<span class="nowrap">256 × 1024<sup>4</sup> bytes</span>) and 4 <a href="/wiki/Petabyte" class="mw-redirect" title="Petabyte">PB</a> (<span class="nowrap">4 × 1024<sup>5</sup> bytes</span>), respectively. A PC cannot currently contain 4 <a href="/wiki/Petabyte" class="mw-redirect" title="Petabyte">petabytes</a> of memory (due to the physical size of the memory chips), but AMD envisioned large servers, shared memory clusters, and other uses of physical address space that might approach this in the foreseeable future. Thus the 52-bit physical address provides ample room for expansion while not incurring the cost of implementing full 64-bit physical addresses. Similarly, the 48-bit virtual address space was designed to provide 65,536 (2<sup>16</sup>) times the 32-bit limit of 4 GB (<span class="nowrap">4 × 1024<sup>3</sup> bytes</span>), allowing room for later expansion and incurring no overhead of translating full 64-bit addresses. </p><p>The <a href="/wiki/Power_ISA#Power_ISA_v.3.0" title="Power ISA">Power ISA v3.0</a> allows 64 bits for an effective address, mapped to a segmented address with between 65 and 78 bits allowed, for virtual memory, and, for any given processor, up to 60 bits for physical memory.<sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>The Oracle <a href="/wiki/SPARC" title="SPARC">SPARC</a> Architecture 2015 allows 64 bits for virtual memory and, for any given processor, between 40 and 56 bits for physical memory.<sup id="cite_ref-32" class="reference"><a href="#cite_note-32"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup> </p><p>The ARM <a href="/wiki/AArch64" title="AArch64">AArch64</a> Virtual Memory System Architecture allows from 48 to 56 bits for virtual memory and, for any given processor, from 32 to 56 bits for physical memory.<sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup> </p><p>The <a href="/wiki/DEC_Alpha" title="DEC Alpha">DEC Alpha</a> specification requires minimum of 43 bits of virtual memory address space (8 TB) to be supported, and hardware need to check and trap if the remaining unsupported bits are zero (to support compatibility on future processors). <a href="/wiki/Alpha_21064" title="Alpha 21064">Alpha 21064</a> supported 43 bits of virtual memory address space (8 TB) and 34 bits of physical memory address space (16 GB). <a href="/wiki/Alpha_21164" title="Alpha 21164">Alpha 21164</a> supported 43 bits of virtual memory address space (8 TB) and 40 bits of physical memory address space (1 TB). <a href="/wiki/Alpha_21264" title="Alpha 21264">Alpha 21264</a> supported user-configurable 43 or 48 bits of virtual memory address space (8 TB or 256 TB) and 44 bits of physical memory address space (16 TB). </p> <div class="mw-heading mw-heading2"><h2 id="64-bit_applications">64-bit applications</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=7" title="Edit section: 64-bit applications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="32-bit_vs_64-bit">32-bit vs 64-bit</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=8" title="Edit section: 32-bit vs 64-bit"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A change from a <a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> to a 64-bit architecture is a fundamental alteration, as most <a href="/wiki/Operating_system" title="Operating system">operating systems</a> must be extensively modified to take advantage of the new architecture, because that software has to manage the actual memory addressing hardware.<sup id="cite_ref-34" class="reference"><a href="#cite_note-34"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup> Other software must also be <a href="/wiki/Porting" title="Porting">ported</a> to use the new abilities; older 32-bit software may be supported either by virtue of the 64-bit instruction set being a superset of the 32-bit instruction set, so that processors that support the 64-bit instruction set can also run code for the 32-bit instruction set, or through software <a href="/wiki/Emulator" title="Emulator">emulation</a>, or by the actual implementation of a 32-bit processor core within the 64-bit processor, as with some <a href="/wiki/Itanium" title="Itanium">Itanium</a> processors from Intel, which included an <a href="/wiki/IA-32" title="IA-32">IA-32</a> processor core to run 32-bit <a href="/wiki/X86" title="X86">x86</a> applications. The operating systems for those 64-bit architectures generally support both 32-bit and 64-bit applications.<sup id="cite_ref-35" class="reference"><a href="#cite_note-35"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> </p><p>One significant exception to this is the <a href="/wiki/IBM_AS/400" title="IBM AS/400">IBM AS/400</a>, software for which is compiled into a virtual <a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">instruction set architecture</a> (ISA) called <i>Technology Independent Machine Interface</i> (TIMI); TIMI code is then translated to native machine code by low-level software before being executed. The translation software is all that must be rewritten to move the full OS and all software to a new platform, as when IBM transitioned the native instruction set for AS/400 from the older 32/48-bit <i>IMPI</i> to the newer 64-bit <i>PowerPC-AS</i>, codenamed <i>Amazon</i>. The IMPI instruction set was quite different from even 32-bit PowerPC, so this transition was even bigger than moving a given instruction set from 32 to 64 bits. </p><p>On 64-bit hardware with <a href="/wiki/X86-64" title="X86-64">x86-64</a> architecture (AMD64), most 32-bit operating systems and applications can run with no compatibility issues. While the larger address space of 64-bit architectures makes working with large data sets in applications such as <a href="/wiki/Digital_video" title="Digital video">digital video</a>, scientific computing, and large <a href="/wiki/Database" title="Database">databases</a> easier, there has been considerable debate on whether they or their 32-bit <a href="/wiki/Compatibility_mode" title="Compatibility mode">compatibility modes</a> will be faster than comparably priced 32-bit systems for other tasks. </p><p>A compiled Java program can run on a 32- or 64-bit Java virtual machine with no modification. The lengths and precision of all the built-in types, such as <code>char</code>, <code>short</code>, <code>int</code>, <code>long</code>, <code>float</code>, and <code>double</code>, and the types that can be used as array indices, are specified by the standard and are not dependent on the underlying architecture. Java programs that run on a 64-bit Java virtual machine have access to a larger address space.<sup id="cite_ref-36" class="reference"><a href="#cite_note-36"><span class="cite-bracket">[</span>35<span class="cite-bracket">]</span></a></sup> </p><p>Speed is not the only factor to consider in comparing 32-bit and 64-bit processors. Applications such as multi-tasking, stress testing, and clustering – for <a href="/wiki/High-performance_computing" title="High-performance computing">high-performance computing</a> (HPC) – may be more suited to a 64-bit architecture when deployed appropriately. For this reason, 64-bit clusters have been widely deployed in large organizations, such as IBM, HP, and Microsoft. </p><p><b>Summary:</b> </p> <ul><li>A 64-bit processor performs best with 64-bit software.</li> <li>A 64-bit processor may have <a href="/wiki/Backward_compatibility" title="Backward compatibility">backward compatibility</a>, allowing it to run 32-bit application software for the 32-bit version of its instruction set, and may also support running 32-bit operating systems for the 32-bit version of its instruction set.</li> <li>A 32-bit processor is incompatible with 64-bit software.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Pros_and_cons">Pros and cons</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=9" title="Edit section: Pros and cons"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A common misconception is that 64-bit architectures are no better than 32-bit architectures unless the computer has more than 4 GB of <a href="/wiki/Random-access_memory" title="Random-access memory">random-access memory</a>.<sup id="cite_ref-37" class="reference"><a href="#cite_note-37"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup> This is not entirely true: </p> <ul><li>Some operating systems and certain hardware configurations limit the physical memory space to 3 GB on <a href="/wiki/IA-32" title="IA-32">IA-32</a> systems, due to much of the 3–4 GB region being reserved for hardware addressing; see <a href="/wiki/3_GB_barrier" title="3 GB barrier">3 GB barrier</a>; 64-bit architectures can address far more than 4 GB. However, IA-32 processors from the <a href="/wiki/Pentium_Pro" title="Pentium Pro">Pentium Pro</a> onward allow a 36-bit <i>physical</i> memory address space, using <a href="/wiki/Physical_Address_Extension" title="Physical Address Extension">Physical Address Extension</a> (PAE), which gives a 64 GB physical address range, of which up to 62 GB may be used by main memory; operating systems that support PAE may not be limited to 4 GB of physical memory, even on IA-32 processors. However, drivers and other kernel mode software, more so older versions, may be incompatible with PAE; this has been cited as the reason for 32-bit versions of <a href="/wiki/Microsoft_Windows" title="Microsoft Windows">Microsoft Windows</a> being limited to 4 GB of physical RAM<sup id="cite_ref-markr200807_38-0" class="reference"><a href="#cite_note-markr200807-38"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup> (although the validity of this explanation has been disputed<sup id="cite_ref-geoffchappell.com_39-0" class="reference"><a href="#cite_note-geoffchappell.com-39"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup>).</li> <li>Some operating systems reserve portions of <a href="/wiki/Process_(computing)" title="Process (computing)">process</a> <a href="/wiki/Address_space" title="Address space">address space</a> for OS use, effectively reducing the total address space available for mapping memory for user programs. For instance, 32-bit Windows reserves 1 or 2 GB (depending on the settings) of the total address space for the kernel, which leaves only 3 or 2 GB (respectively) of the address space available for user mode. This limit is much higher on 64-bit operating systems.</li> <li><a href="/wiki/Memory-mapped_file" title="Memory-mapped file">Memory-mapped files</a> are becoming more difficult to implement in 32-bit architectures as files of over 4 GB become more common; such large files cannot be memory-mapped easily to 32-bit architectures, as only part of the file can be mapped into the address space at a time, and to access such a file by memory mapping, the parts mapped must be swapped into and out of the address space as needed. This is a problem, as memory mapping, if properly implemented by the OS, is one of the most efficient disk-to-memory methods.</li> <li>Some 64-bit programs, such as encoders, decoders and encryption software, can benefit greatly from 64-bit registers,<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (February 2015)">citation needed</span></a></i>]</sup> while the performance of other programs, such as 3D graphics-oriented ones, remains unaffected when switching from a 32-bit to a 64-bit environment.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (February 2015)">citation needed</span></a></i>]</sup></li> <li>Some 64-bit architectures, such as <a href="/wiki/X86-64" title="X86-64">x86-64</a> and <a href="/wiki/AArch64" title="AArch64">AArch64</a>, support more general-purpose registers than their 32-bit counterparts (although this is not due specifically to the word length). This leads to a significant speed increase for tight loops since the processor does not have to fetch data from the cache or main memory if the data can fit in the available registers.</li></ul> <dl><dd>Example in <a href="/wiki/C_(programming_language)" title="C (programming language)">C</a>:</dd></dl> <div class="mw-highlight mw-highlight-lang-c mw-content-ltr" dir="ltr"><pre><span></span><span class="kt">int</span><span class="w"> </span><span class="n">a</span><span class="p">,</span><span class="w"> </span><span class="n">b</span><span class="p">,</span><span class="w"> </span><span class="n">c</span><span class="p">,</span><span class="w"> </span><span class="n">d</span><span class="p">,</span><span class="w"> </span><span class="n">e</span><span class="p">;</span> <span class="k">for</span><span class="w"> </span><span class="p">(</span><span class="n">a</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="mi">0</span><span class="p">;</span><span class="w"> </span><span class="n">a</span><span class="w"> </span><span class="o"><</span><span class="w"> </span><span class="mi">100</span><span class="p">;</span><span class="w"> </span><span class="n">a</span><span class="o">++</span><span class="p">)</span><span class="w"> </span><span class="p">{</span> <span class="w"> </span><span class="n">b</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="n">a</span><span class="p">;</span> <span class="w"> </span><span class="n">c</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="n">b</span><span class="p">;</span> <span class="w"> </span><span class="n">d</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="n">c</span><span class="p">;</span> <span class="w"> </span><span class="n">e</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="n">d</span><span class="p">;</span> <span class="p">}</span> </pre></div> <dl><dd>This code first creates 5 values: a, b, c, d and e; and then puts them in a loop. During the loop, this code changes the value of b to the value of a, the value of c to the value of b, the value of d to the value of c and the value of e to the value of d. This has the same effect as changing all the values to a.</dd> <dd>If a processor can keep only two or three values or variables in registers, it would need to move some values between memory and registers to be able to process variables d and e also; this is a process that takes many CPU cycles. A processor that can hold all values and variables in registers can loop through them with no need to move data between registers and memory for each iteration. This behavior can easily be compared with virtual memory, although any effects are contingent on the compiler.</dd></dl> <p>The main disadvantage of 64-bit architectures is that, relative to 32-bit architectures, the same data occupies more space in memory (due to longer pointers and possibly other types, and alignment padding). This increases the memory requirements of a given process and can have implications for efficient processor cache use. Maintaining a partial 32-bit model is one way to handle this, and is in general reasonably effective. For example, the <a href="/wiki/Z/OS" title="Z/OS">z/OS</a> operating system takes this approach, requiring program code to reside in 31-bit address spaces (the high order bit is not used in address calculation on the underlying hardware platform) while data objects can optionally reside in 64-bit regions. Not all such applications require a large address space or manipulate 64-bit data items, so these applications do not benefit from these features. </p> <div class="mw-heading mw-heading3"><h3 id="Software_availability">Software availability</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=10" title="Edit section: Software availability"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>x86-based 64-bit systems sometimes lack equivalents of <a href="/wiki/Software" title="Software">software</a> that is written for 32-bit architectures. The most severe problem in Microsoft Windows is incompatible <a href="/wiki/Device_driver" title="Device driver">device drivers</a> for obsolete hardware. Most 32-bit application software can run on a 64-bit operating system in a <a href="/wiki/Compatibility_mode" title="Compatibility mode">compatibility mode</a>, also termed an <a href="/wiki/Emulator" title="Emulator">emulation</a> mode, e.g., Microsoft <a href="/wiki/WoW64" title="WoW64">WoW64</a> Technology for IA-64 and AMD64. The 64-bit Windows Native Mode<sup id="cite_ref-40" class="reference"><a href="#cite_note-40"><span class="cite-bracket">[</span>39<span class="cite-bracket">]</span></a></sup> driver environment runs atop 64-bit <style data-mw-deduplicate="TemplateStyles:r886049734">.mw-parser-output .monospaced{font-family:monospace,monospace}</style><span class="monospaced">NTDLL.DLL</span>, which cannot call 32-bit Win32 subsystem code (often devices whose actual hardware function is emulated in user mode software, like Winprinters). Because 64-bit drivers for most devices were unavailable until early 2007 (Vista x64), using a 64-bit version of Windows was considered a challenge. However, the trend has since moved toward 64-bit computing, more so as memory prices dropped and the use of more than 4 GB of RAM increased. Most manufacturers started to provide both 32-bit and 64-bit drivers for new devices, so unavailability of 64-bit drivers ceased to be a problem. 64-bit drivers were not provided for many older devices, which could consequently not be used in 64-bit systems. </p><p>Driver compatibility was less of a problem with open-source drivers, as 32-bit ones could be modified for 64-bit use. Support for hardware made before early 2007, was problematic for open-source platforms,<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (February 2013)">citation needed</span></a></i>]</sup> due to the relatively small number of users. </p><p>64-bit versions of Windows cannot run <a href="/wiki/16-bit#16-bit_application" class="mw-redirect" title="16-bit">16-bit software</a>. However, most 32-bit applications will work well. 64-bit users are forced to install a <a href="/wiki/Virtual_machine" title="Virtual machine">virtual machine</a> of a 16- or 32-bit operating system to run 16-bit applications or use one of the alternatives for <a href="/wiki/NTVDM" class="mw-redirect" title="NTVDM">NTVDM</a>.<sup id="cite_ref-41" class="reference"><a href="#cite_note-41"><span class="cite-bracket">[</span>40<span class="cite-bracket">]</span></a></sup> </p><p><a href="/wiki/Mac_OS_X_Tiger" title="Mac OS X Tiger">Mac OS X 10.4</a> "Tiger" and <a href="/wiki/Mac_OS_X_Leopard" title="Mac OS X Leopard">Mac OS X 10.5</a> "Leopard" had only a 32-bit kernel, but they can run 64-bit user-mode code on 64-bit processors. <a href="/wiki/Mac_OS_X_Snow_Leopard" title="Mac OS X Snow Leopard">Mac OS X 10.6</a> "Snow Leopard" had both 32- and 64-bit kernels, and, on most Macs, used the 32-bit kernel even on 64-bit processors. This allowed those Macs to support 64-bit processes while still supporting 32-bit device drivers; although not 64-bit drivers and performance advantages that can come with them. <a href="/wiki/Mac_OS_X_Lion" class="mw-redirect" title="Mac OS X Lion">Mac OS X 10.7</a> "Lion" ran with a 64-bit kernel on more Macs, and <a href="/wiki/OS_X_Mountain_Lion" title="OS X Mountain Lion">OS X 10.8</a> "Mountain Lion" and later <a href="/wiki/MacOS" title="MacOS">macOS</a> releases only have a 64-bit kernel. On systems with 64-bit processors, both the 32- and 64-bit macOS kernels can run 32-bit user-mode code, and all versions of macOS up to macOS Mojave (10.14) include 32-bit versions of libraries that 32-bit applications would use, so 32-bit user-mode software for macOS will run on those systems. The 32-bit versions of libraries have been removed by Apple in macOS Catalina (10.15). </p><p><a href="/wiki/Linux" title="Linux">Linux</a> and most other <a href="/wiki/Unix-like" title="Unix-like">Unix-like</a> operating systems, and the <a href="/wiki/C_(programming_language)" title="C (programming language)">C</a> and <a href="/wiki/C%2B%2B" title="C++">C++</a> <a href="/wiki/Toolchain" title="Toolchain">toolchains</a> for them, have supported 64-bit processors for many years. Many applications and libraries for those platforms are <a href="/wiki/Open-source_software" title="Open-source software">open-source software</a>, written in C and C++, so that if they are 64-bit-safe, they can be compiled into 64-bit versions. This source-based distribution model, with an emphasis on frequent releases, makes availability of application software for those operating systems less of an issue. </p> <div class="mw-heading mw-heading2"><h2 id="64-bit_data_models">64-bit data models</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=11" title="Edit section: 64-bit data models"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In 32-bit programs, <a href="/wiki/Pointer_(computer_programming)" title="Pointer (computer programming)">pointers</a> and data types such as integers generally have the same length. This is not necessarily true on 64-bit machines.<sup id="cite_ref-42" class="reference"><a href="#cite_note-42"><span class="cite-bracket">[</span>41<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-43" class="reference"><a href="#cite_note-43"><span class="cite-bracket">[</span>42<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-44" class="reference"><a href="#cite_note-44"><span class="cite-bracket">[</span>43<span class="cite-bracket">]</span></a></sup> Mixing data types in programming languages such as <a href="/wiki/C_(programming_language)" title="C (programming language)">C</a> and its descendants such as <a href="/wiki/C%2B%2B" title="C++">C++</a> and <a href="/wiki/Objective-C" title="Objective-C">Objective-C</a> may thus work on 32-bit implementations but not on 64-bit implementations. </p><p>In many programming environments for C and C-derived languages on 64-bit machines, <code>int</code> variables are still 32 bits wide, but long integers and pointers are 64 bits wide. These are described as having an <i>LP64</i> <a href="/wiki/Data_model" title="Data model">data model</a>, which is an abbreviation of "Long, Pointer, 64".<sup id="cite_ref-45" class="reference"><a href="#cite_note-45"><span class="cite-bracket">[</span>44<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-why-lp64_46-0" class="reference"><a href="#cite_note-why-lp64-46"><span class="cite-bracket">[</span>45<span class="cite-bracket">]</span></a></sup> Other models are the <i>ILP64</i> data model in which all three data types are 64 bits wide,<sup id="cite_ref-47" class="reference"><a href="#cite_note-47"><span class="cite-bracket">[</span>46<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-why-lp64_46-1" class="reference"><a href="#cite_note-why-lp64-46"><span class="cite-bracket">[</span>45<span class="cite-bracket">]</span></a></sup> and even the <i>SILP64</i> model where <i>short</i> integers are also 64 bits wide.<sup id="cite_ref-SILP64_48-0" class="reference"><a href="#cite_note-SILP64-48"><span class="cite-bracket">[</span>47<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-SIPL64-2_49-0" class="reference"><a href="#cite_note-SIPL64-2-49"><span class="cite-bracket">[</span>48<span class="cite-bracket">]</span></a></sup> However, in most cases the modifications required are relatively minor and straightforward, and many well-written programs can simply be recompiled for the new environment with no changes. Another alternative is the <i>LLP64</i> model, which maintains compatibility with 32-bit code by leaving both <code>int</code> and <code>long</code> as 32-bit.<sup id="cite_ref-50" class="reference"><a href="#cite_note-50"><span class="cite-bracket">[</span>49<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-why-lp64_46-2" class="reference"><a href="#cite_note-why-lp64-46"><span class="cite-bracket">[</span>45<span class="cite-bracket">]</span></a></sup> <i>LL</i> refers to the <i>long long integer</i> type, which is at least 64 bits on all platforms, including 32-bit environments. </p><p>There are also systems with 64-bit processors using an <i>ILP32</i> data model, with the addition of 64-bit long long integers; this is also used on many platforms with 32-bit processors. This model reduces code size and the size of data structures containing pointers, at the cost of a much smaller address space, a good choice for some embedded systems. For instruction sets such as x86 and ARM in which the 64-bit version of the instruction set has more registers than does the 32-bit version, it provides access to the additional registers without the space penalty. It is common in 64-bit RISC machines,<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (February 2021)">citation needed</span></a></i>]</sup> explored in x86 as <a href="/wiki/X32_ABI" title="X32 ABI">x32 ABI</a>, and has recently been used in the <a href="/wiki/Apple_Watch_Series_4" class="mw-redirect" title="Apple Watch Series 4">Apple Watch Series 4</a> and 5.<sup id="cite_ref-51" class="reference"><a href="#cite_note-51"><span class="cite-bracket">[</span>50<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-auto_52-0" class="reference"><a href="#cite_note-auto-52"><span class="cite-bracket">[</span>51<span class="cite-bracket">]</span></a></sup> </p> <table class="wikitable sortable" style="text-align:right;"> <caption>64-bit data models </caption> <tbody><tr style="line-height:133%"> <th>Data<br />model </th> <th><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">short</span><br /><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">int</span> </th> <th><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">int</span> </th> <th><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">long</span><br /><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">int</span> </th> <th><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">long<br />long</span> </th> <th>Pointer,<br /><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">size_t</span> </th> <th>Sample operating systems </th></tr> <tr> <th style="background: #ececec; color: black; font-weight: bold; vertical-align: middle; text-align: right;" class="table-rh">ILP32 </th> <td>16 </td> <td><b>32</b> </td> <td><b>32</b> </td> <td>64 </td> <td><b>32</b> </td> <td style="text-align:left;">x32 and <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r886049734" /><span class="monospaced">arm64ilp32</span> ABIs on Linux systems; MIPS N32 ABI. </td></tr> <tr> <th style="background: #ececec; color: black; font-weight: bold; vertical-align: middle; text-align: right;" class="table-rh">LLP64 </th> <td>16 </td> <td>32 </td> <td>32 </td> <td><b>64</b> </td> <td><b>64</b> </td> <td style="text-align:left;"><a href="/wiki/Microsoft_Windows" title="Microsoft Windows">Microsoft Windows</a> (x86-64, IA-64, and ARM64) using <a href="/wiki/Visual_C%2B%2B" class="mw-redirect" title="Visual C++">Visual C++</a>; and <a href="/wiki/MinGW" title="MinGW">MinGW</a> </td></tr> <tr> <th style="background: #ececec; color: black; font-weight: bold; vertical-align: middle; text-align: right;" class="table-rh">LP64 </th> <td>16 </td> <td>32 </td> <td><b>64</b> </td> <td><b>64</b> </td> <td><b>64</b> </td> <td style="text-align:left;">Most <a href="/wiki/Unix" title="Unix">Unix</a> and <a href="/wiki/Unix-like" title="Unix-like">Unix-like</a> systems, e.g., <a href="/wiki/Solaris_(operating_system)" class="mw-redirect" title="Solaris (operating system)">Solaris</a>, <a href="/wiki/Linux" title="Linux">Linux</a>, <a href="/wiki/BSD" class="mw-redirect" title="BSD">BSD</a>, <a href="/wiki/MacOS" title="MacOS">macOS</a>. <a href="/wiki/Windows" class="mw-redirect" title="Windows">Windows</a> when using <a href="/wiki/Cygwin" title="Cygwin">Cygwin</a>; <a href="/wiki/Z/OS" title="Z/OS">z/OS</a> </td></tr> <tr> <th style="background: #ececec; color: black; font-weight: bold; vertical-align: middle; text-align: right;" class="table-rh">ILP64 </th> <td>16 </td> <td><b>64</b> </td> <td><b>64</b> </td> <td><b>64</b> </td> <td><b>64</b> </td> <td style="text-align:left;"><a href="/wiki/HAL_Computer_Systems" title="HAL Computer Systems">HAL Computer Systems</a> port of Solaris to the <a href="/wiki/HAL_SPARC64" title="HAL SPARC64">SPARC64</a> </td></tr> <tr> <th style="background: #ececec; color: black; font-weight: bold; vertical-align: middle; text-align: right;" class="table-rh">SILP64 </th> <td><b>64</b> </td> <td><b>64</b> </td> <td><b>64</b> </td> <td><b>64</b> </td> <td><b>64</b> </td> <td style="text-align:left;"><i>Classic</i> <a href="/wiki/UNICOS" title="UNICOS">UNICOS</a><sup id="cite_ref-SILP64_48-1" class="reference"><a href="#cite_note-SILP64-48"><span class="cite-bracket">[</span>47<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-SIPL64-2_49-1" class="reference"><a href="#cite_note-SIPL64-2-49"><span class="cite-bracket">[</span>48<span class="cite-bracket">]</span></a></sup> (versus UNICOS/mp, etc.) </td></tr></tbody></table> <p>Many 64-bit platforms today use an <i>LP64</i> model (including Solaris, <a href="/wiki/AIX" class="mw-redirect" title="AIX">AIX</a>, <a href="/wiki/HP-UX" title="HP-UX">HP-UX</a>, Linux, macOS, BSD, and IBM z/OS). Microsoft Windows uses an <i>LLP64</i> model. The disadvantage of the LP64 model is that storing a <code>long</code> into an <code>int</code> truncates. On the other hand, converting a pointer to a <code>long</code> will "work" in LP64. In the LLP64 model, the reverse is true. These are not problems which affect fully standard-compliant code, but code is often written with implicit assumptions about the widths of data types. C code should prefer (<code>u</code>)<code>intptr_t</code> instead of <code>long</code> when casting pointers into integer objects. </p><p>A programming model is a choice made to suit a given compiler, and several can coexist on the same OS. However, the programming model chosen as the primary model for the OS <a href="/wiki/Application_programming_interface" class="mw-redirect" title="Application programming interface">application programming interface</a> (API) typically dominates. </p><p>Another consideration is the data model used for <a href="/wiki/Device_driver" title="Device driver">device drivers</a>. Drivers make up the majority of the operating system code in most modern operating systems<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (May 2011)">citation needed</span></a></i>]</sup> (although many may not be loaded when the operating system is running). Many drivers use pointers heavily to manipulate data, and in some cases have to load pointers of a certain size into the hardware they support for <a href="/wiki/Direct_memory_access" title="Direct memory access">direct memory access</a> (DMA). As an example, a driver for a 32-bit PCI device asking the device to DMA data into upper areas of a 64-bit machine's memory could not satisfy requests from the operating system to load data from the device to memory above the 4 <a href="/wiki/Gigabyte" title="Gigabyte">gigabyte</a> barrier, because the pointers for those addresses would not fit into the DMA registers of the device. This problem is solved by having the OS take the memory restrictions of the device into account when generating requests to drivers for DMA, or by using an <a href="/wiki/Input%E2%80%93output_memory_management_unit" title="Input–output memory management unit">input–output memory management unit</a> (IOMMU). </p> <div class="mw-heading mw-heading2"><h2 id="Current_64-bit_architectures">Current 64-bit architectures</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=12" title="Edit section: Current 64-bit architectures"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444" /><table class="box-Unreferenced_section plainlinks metadata ambox ambox-content ambox-Unreferenced" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Question_book-new.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>does not <a href="/wiki/Wikipedia:Citing_sources" title="Wikipedia:Citing sources">cite</a> any <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">sources</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/64-bit_computing" title="Special:EditPage/64-bit computing">improve this section</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>. Unsourced material may be challenged and <a href="/wiki/Wikipedia:Verifiability#Burden_of_evidence" title="Wikipedia:Verifiability">removed</a>.</span> <span class="date-container"><i>(<span class="date">April 2023</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p>As of August 2023<sup class="plainlinks noexcerpt noprint asof-tag update" style="display:none;"><a class="external text" href="https://en.wikipedia.org/w/index.php?title=64-bit_computing&action=edit">[update]</a></sup>, 64-bit architectures for which processors are being manufactured include: </p> <ul><li>The 64-bit extension created by <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">Advanced Micro Devices</a> (AMD) to Intel's <a href="/wiki/X86" title="X86">x86</a> architecture (later licensed by Intel); commonly termed <i><a href="/wiki/X86-64" title="X86-64">x86-64</a></i>, <i>AMD64</i>, or <i>x64</i>: <ul><li>AMD's <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a> extensions (used in <a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a>, <a href="/wiki/Opteron" title="Opteron">Opteron</a>, <a href="/wiki/Sempron" title="Sempron">Sempron</a>, <a href="/wiki/Turion_64" class="mw-redirect" title="Turion 64">Turion 64</a>, <a href="/wiki/Phenom_(processor)" class="mw-redirect" title="Phenom (processor)">Phenom</a>, <a href="/wiki/Athlon_II" title="Athlon II">Athlon II</a>, <a href="/wiki/Phenom_II" title="Phenom II">Phenom II</a>, <a href="/wiki/AMD_Accelerated_Processing_Unit" class="mw-redirect" title="AMD Accelerated Processing Unit">APU</a>, <a href="/wiki/AMD_FX" title="AMD FX">FX</a>, <a href="/wiki/Ryzen" title="Ryzen">Ryzen</a>, and <a href="/wiki/Epyc" title="Epyc">Epyc</a> processors)</li> <li><a href="/wiki/Intel" title="Intel">Intel</a>'s <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">Intel 64</a> extensions, used in <a href="/wiki/Intel_Core" title="Intel Core">Intel Core</a> 2/i3/i5/i7/i9, some <a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a>, and newer <a href="/wiki/Celeron" title="Celeron">Celeron</a>, <a href="/wiki/Pentium" title="Pentium">Pentium</a>, and <a href="/wiki/Xeon" title="Xeon">Xeon</a> processors <ul><li><a href="/wiki/Intel" title="Intel">Intel</a>'s K1OM architecture, a variant of <i>Intel 64</i> with no CMOV, MMX, and SSE instructions, used in first-generation <a href="/wiki/Xeon_Phi" title="Xeon Phi">Xeon Phi</a> (Knights Corner) coprocessors, binary incompatible with x86-64 programs</li></ul></li> <li><a href="/wiki/VIA_Technologies" title="VIA Technologies">VIA Technologies</a>' 64-bit extensions, used in the <a href="/wiki/VIA_Nano" title="VIA Nano">VIA Nano</a> processors</li></ul></li> <li><a href="/wiki/ARM_Holdings" class="mw-redirect" title="ARM Holdings">ARM Holdings</a>' <a href="/wiki/AArch64" title="AArch64">AArch64</a> architecture</li> <li>IBM's <a href="/wiki/PowerPC" title="PowerPC">PowerPC</a>/<a href="/wiki/Power_ISA" title="Power ISA">Power ISA</a>: <ul><li>IBM's <a href="/wiki/Power10" title="Power10">Power10</a> processor and predecessors, and the <a href="/wiki/IBM_A2" title="IBM A2">IBM A2</a> processors</li></ul></li> <li>IBM's <a href="/wiki/Z/Architecture" title="Z/Architecture">z/Architecture</a>, a 64-bit version of the <a href="/wiki/ESA/390" class="mw-redirect" title="ESA/390">ESA/390</a> architecture, used in IBM's <a href="/wiki/IBM_Z" title="IBM Z">IBM Z</a> <a href="/wiki/IBM_mainframes" class="mw-redirect" title="IBM mainframes">mainframes</a>: <ul><li><a href="/wiki/IBM_Telum_(microprocessor)" class="mw-redirect" title="IBM Telum (microprocessor)">IBM Telum</a> II processor and predecessors</li> <li><a href="/wiki/Hitachi" title="Hitachi">Hitachi</a> AP8000E</li></ul></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a> V9 architecture: <ul><li><a href="/wiki/Oracle_Corporation" title="Oracle Corporation">Oracle</a>'s M8 and S7 processors and predecessors</li> <li><a href="/wiki/Fujitsu" title="Fujitsu">Fujitsu</a>'s SPARC64 XII and <a href="/wiki/SPARC64_V#SPARC64_XIfx" title="SPARC64 V">SPARC64 XIfx</a> processors and predecessors</li></ul></li> <li><a href="/wiki/MIPS_Technologies" title="MIPS Technologies">MIPS Technologies</a>' <a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS64</a> architecture</li> <li><a href="/wiki/NEC_SX_architecture" class="mw-redirect" title="NEC SX architecture">NEC SX architecture</a> <ul><li><a href="/wiki/SX-Aurora_TSUBASA" class="mw-redirect" title="SX-Aurora TSUBASA">SX-Aurora TSUBASA</a></li></ul></li> <li><a href="/wiki/Elbrus_(computer)" title="Elbrus (computer)">Elbrus</a> architecture: <ul><li><a href="/wiki/Elbrus-8S" title="Elbrus-8S">Elbrus-8S</a></li></ul></li> <li><a href="/wiki/ARC_(processor)" title="ARC (processor)">ARC</a></li></ul> <p>Most architectures of 64 bits that are derived from the same architecture of 32 bits can execute code written for the 32-bit versions natively, with no performance penalty.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (September 2010)">citation needed</span></a></i>]</sup> This kind of support is commonly called <i>bi-arch support</i> or more generally <i>multi-arch support</i>. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=13" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Computer_memory" title="Computer memory">Computer memory</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=14" title="Edit section: Notes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">such as <a href="/wiki/Floating-point_arithmetic" title="Floating-point arithmetic">floating-point</a> numbers.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=64-bit_computing&action=edit&section=15" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626" /><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and 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Archived from <a rel="nofollow" class="external text" href="https://software.intel.com/content/www/us/en/develop/articles/a-collection-of-examples-of-64-bit-errors-in-real-programs.html">the original</a> on September 23, 2021.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=A+Collection+of+Examples+of+64-bit+Errors+in+Real+Programs&rft.aulast=Karpov&rft.aufirst=Andrey&rft_id=https%3A%2F%2Fsoftware.intel.com%2Fcontent%2Fwww%2Fus%2Fen%2Fdevelop%2Farticles%2Fa-collection-of-examples-of-64-bit-errors-in-real-programs.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3A64-bit+computing" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite id="CITEREFKilgard" class="citation web cs1"><a href="/wiki/Mark_Kilgard" title="Mark Kilgard">Kilgard, Mark J.</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20010603003655/https://reality.sgi.com/mjk/64bit/64bit.html">"Is your X code ready for 64-bit?"</a>. Archived from <a rel="nofollow" class="external text" href="https://reality.sgi.com/mjk/64bit/64bit.html">the original</a> on June 3, 2001<span class="reference-accessdate">. Retrieved <span class="nowrap">September 26,</span> 2012</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Is+your+X+code+ready+for+64-bit%3F&rft.aulast=Kilgard&rft.aufirst=Mark+J.&rft_id=https%3A%2F%2Freality.sgi.com%2Fmjk%2F64bit%2F64bit.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3A64-bit+computing" class="Z3988"></span></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20210414000114/https://software.intel.com/content/www/us/en/develop/articles/lessons-on-development-of-64-bit-cc-applications.html">Lessons on development of 64-bit C/C++ applications</a> at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (archived April 14, 2021)</li> <li><a rel="nofollow" class="external text" href="https://archive.opengroup.org/public/tech/aspen/lp64_wp.htm">64-Bit Programming Models: Why LP64?</a></li> <li><a rel="nofollow" class="external text" href="https://www.codeproject.com/KB/system/AMD64_EM64T_architectur.aspx">AMD64 (EM64T) architecture</a></li></ul> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374" /><style data-mw-deduplicate="TemplateStyles:r1236075235">.mw-parser-output .navbox{box-sizing:border-box;border:1px solid #a2a9b1;width:100%;clear:both;font-size:88%;text-align:center;padding:1px;margin:1em auto 0}.mw-parser-output .navbox .navbox{margin-top:0}.mw-parser-output .navbox+.navbox,.mw-parser-output .navbox+.navbox-styles+.navbox{margin-top:-1px}.mw-parser-output .navbox-inner,.mw-parser-output .navbox-subgroup{width:100%}.mw-parser-output .navbox-group,.mw-parser-output .navbox-title,.mw-parser-output .navbox-abovebelow{padding:0.25em 1em;line-height:1.5em;text-align:center}.mw-parser-output .navbox-group{white-space:nowrap;text-align:right}.mw-parser-output .navbox,.mw-parser-output .navbox-subgroup{background-color:#fdfdfd}.mw-parser-output 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title="Stored-program computer">Stored-program computer</a></li> <li><a href="/wiki/Finite-state_machine" title="Finite-state machine">Finite-state machine</a> <ul><li><a href="/wiki/Finite-state_machine_with_datapath" class="mw-redirect" title="Finite-state machine with datapath">with datapath</a></li> <li><a href="/wiki/Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical</a></li> <li><a href="/wiki/Deterministic_finite_automaton" title="Deterministic finite automaton">Deterministic finite automaton</a></li> <li><a href="/wiki/Queue_automaton" title="Queue automaton">Queue automaton</a></li> <li><a href="/wiki/Cellular_automaton" title="Cellular automaton">Cellular automaton</a></li> <li><a href="/wiki/Quantum_cellular_automaton" title="Quantum cellular automaton">Quantum cellular automaton</a></li></ul></li> <li><a href="/wiki/Turing_machine" title="Turing machine">Turing machine</a> <ul><li><a href="/wiki/Alternating_Turing_machine" title="Alternating Turing machine">Alternating Turing machine</a></li> <li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal</a></li> <li><a href="/wiki/Post%E2%80%93Turing_machine" title="Post–Turing machine">Post–Turing</a></li> <li><a href="/wiki/Quantum_Turing_machine" title="Quantum Turing machine">Quantum</a></li> <li><a href="/wiki/Nondeterministic_Turing_machine" title="Nondeterministic Turing machine">Nondeterministic Turing machine</a></li> <li><a href="/wiki/Probabilistic_Turing_machine" title="Probabilistic Turing machine">Probabilistic Turing machine</a></li> <li><a href="/wiki/Hypercomputation" title="Hypercomputation">Hypercomputation</a></li> <li><a href="/wiki/Zeno_machine" title="Zeno machine">Zeno machine</a></li></ul></li> <li><a href="/wiki/History_of_general-purpose_CPUs#Belt_machine_architecture" title="History of general-purpose CPUs">Belt machine</a></li> <li><a href="/wiki/Stack_machine" title="Stack machine">Stack machine</a></li> <li><a href="/wiki/Register_machine" title="Register machine">Register machines</a> <ul><li><a href="/wiki/Counter_machine" title="Counter machine">Counter</a></li> <li><a href="/wiki/Pointer_machine" title="Pointer machine">Pointer</a></li> <li><a href="/wiki/Random-access_machine" title="Random-access machine">Random-access</a></li> <li><a href="/wiki/Random-access_stored-program_machine" title="Random-access stored-program machine">Random-access stored program</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architecture</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></li> <li><a href="/wiki/Von_Neumann_architecture" title="Von Neumann architecture">Von Neumann</a></li> <li><a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard</a> <ul><li><a href="/wiki/Modified_Harvard_architecture" title="Modified Harvard architecture">modified</a></li></ul></li> <li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport-triggered</a></li> <li><a href="/wiki/Cellular_architecture" title="Cellular architecture">Cellular</a></li> <li><a href="/wiki/Endianness" title="Endianness">Endianness</a></li> <li><a href="/wiki/Computer_data_storage" title="Computer data storage">Memory access</a> <ul><li><a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></li> <li><a href="/wiki/Uniform_memory_access" title="Uniform memory access">HUMA</a></li> <li><a href="/wiki/Load%E2%80%93store_architecture" title="Load–store architecture">Load–store</a></li> <li><a href="/wiki/Register%E2%80%93memory_architecture" title="Register–memory architecture">Register/memory</a></li></ul></li> <li><a href="/wiki/Cache_hierarchy" title="Cache hierarchy">Cache hierarchy</a></li> <li><a href="/wiki/Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a> <ul><li><a href="/wiki/Virtual_memory" title="Virtual memory">Virtual memory</a></li> <li><a href="/wiki/Secondary_storage" class="mw-redirect" title="Secondary storage">Secondary storage</a></li></ul></li> <li><a href="/wiki/Heterogeneous_System_Architecture" title="Heterogeneous System Architecture">Heterogeneous</a></li> <li><a href="/wiki/Fabric_computing" title="Fabric computing">Fabric</a></li> <li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessing</a></li> <li><a href="/wiki/Cognitive_computing" title="Cognitive computing">Cognitive</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set<br />architectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Orthogonal_instruction_set" title="Orthogonal instruction set">Orthogonal instruction set</a></li> <li><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></li> <li><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific</a></li> <li><a href="/wiki/Explicit_data_graph_execution" title="Explicit data graph execution">EDGE</a> <ul><li><a href="/wiki/TRIPS_architecture" title="TRIPS architecture">TRIPS</a></li></ul></li> <li><a href="/wiki/Very_long_instruction_word" title="Very long instruction word">VLIW</a> <ul><li><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></li></ul></li> <li><a href="/wiki/Minimal_instruction_set_computer" title="Minimal instruction set computer">MISC</a></li> <li><a href="/wiki/One-instruction_set_computer" title="One-instruction set computer">OISC</a></li> <li><a href="/wiki/No_instruction_set_computing" title="No instruction set computing">NISC</a></li> <li><a href="/wiki/Zero_instruction_set_computer" class="mw-redirect" title="Zero instruction set computer">ZISC</a></li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Quantum_computing" title="Quantum computing">Quantum computing</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Comparison</a> <ul><li><a href="/wiki/Addressing_mode" title="Addressing mode">Addressing modes</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instruction<br />sets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Motorola_68000_series" title="Motorola 68000 series">Motorola 68000 series</a></li> <li><a href="/wiki/VAX" title="VAX">VAX</a></li> <li><a href="/wiki/PDP-11_architecture" title="PDP-11 architecture">PDP-11</a></li> <li><a href="/wiki/X86" title="X86">x86</a></li> <li><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a></li> <li><a href="/wiki/Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li> <li><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a></li> <li><a href="/wiki/MIPS-X" title="MIPS-X">MIPS-X</a></li> <li>Power <ul><li><a href="/wiki/IBM_POWER_architecture" title="IBM POWER architecture">POWER</a></li> <li><a href="/wiki/PowerPC" title="PowerPC">PowerPC</a></li> <li><a href="/wiki/Power_ISA" title="Power ISA">Power ISA</a></li></ul></li> <li><a href="/wiki/Clipper_architecture" title="Clipper architecture">Clipper architecture</a></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a></li> <li><a href="/wiki/SuperH" title="SuperH">SuperH</a></li> <li><a href="/wiki/DEC_Alpha" title="DEC Alpha">DEC Alpha</a></li> <li><a href="/wiki/ETRAX_CRIS" title="ETRAX CRIS">ETRAX CRIS</a></li> <li><a href="/wiki/M32R" title="M32R">M32R</a></li> <li><a href="/wiki/Unicore" title="Unicore">Unicore</a></li> <li><a href="/wiki/IA-64" title="IA-64">Itanium</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a></li> <li><a href="/wiki/Little_man_computer" title="Little man computer">LMC</a></li> <li>System/3x0 <ul><li><a href="/wiki/IBM_System/360_architecture" title="IBM System/360 architecture">S/360</a></li> <li><a href="/wiki/IBM_System/370" title="IBM System/370">S/370</a></li> <li><a href="/wiki/IBM_System/390" title="IBM System/390">S/390</a></li> <li><a href="/wiki/Z/Architecture" title="Z/Architecture">z/Architecture</a></li></ul></li> <li>Tilera ISA</li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Adapteva#Products" class="mw-redirect" title="Adapteva">Epiphany architecture</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Others</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_cycle" title="Instruction cycle">Execution</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Instruction pipelining</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Pipeline_stall" title="Pipeline stall">Pipeline stall</a></li> <li><a href="/wiki/Operand_forwarding" title="Operand forwarding">Operand forwarding</a></li> <li><a href="/wiki/Classic_RISC_pipeline" title="Classic RISC pipeline">Classic RISC pipeline</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hazard_(computer_architecture)" title="Hazard (computer architecture)">Hazards</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Data_dependency" title="Data dependency">Data dependency</a></li> <li><a href="/wiki/Structural_hazard" class="mw-redirect" title="Structural hazard">Structural</a></li> <li><a href="/wiki/Control_hazard" class="mw-redirect" title="Control hazard">Control</a></li> <li><a href="/wiki/False_sharing" title="False sharing">False sharing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Out-of-order_execution" title="Out-of-order execution">Out-of-order</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Scoreboarding" title="Scoreboarding">Scoreboarding</a></li> <li><a href="/wiki/Tomasulo%27s_algorithm" title="Tomasulo's algorithm">Tomasulo's algorithm</a> <ul><li><a href="/wiki/Reservation_station" title="Reservation station">Reservation station</a></li> <li><a href="/wiki/Re-order_buffer" title="Re-order buffer">Re-order buffer</a></li></ul></li> <li><a href="/wiki/Register_renaming" title="Register renaming">Register renaming</a></li> <li><a href="/wiki/Wide-issue" title="Wide-issue">Wide-issue</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Speculative_execution" title="Speculative execution">Speculative</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch prediction</a></li> <li><a href="/wiki/Memory_dependence_prediction" title="Memory dependence prediction">Memory dependence prediction</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Parallel_computing" title="Parallel computing">Parallelism</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Level</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bit-level_parallelism" title="Bit-level parallelism">Bit</a> <ul><li><a href="/wiki/Bit-serial_architecture" title="Bit-serial architecture">Bit-serial</a></li> <li><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word</a></li></ul></li> <li><a href="/wiki/Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li> <li><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Pipelining</a> <ul><li><a href="/wiki/Scalar_processor" title="Scalar processor">Scalar</a></li> <li><a href="/wiki/Superscalar_processor" title="Superscalar processor">Superscalar</a></li></ul></li> <li><a href="/wiki/Task_parallelism" title="Task parallelism">Task</a> <ul><li><a href="/wiki/Thread_(computing)" title="Thread (computing)">Thread</a></li> <li><a href="/wiki/Process_(computing)" title="Process (computing)">Process</a></li></ul></li> <li><a href="/wiki/Data_parallelism" title="Data parallelism">Data</a> <ul><li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li></ul></li> <li><a href="/wiki/Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li> <li><a href="/wiki/Distributed_architecture" class="mw-redirect" title="Distributed architecture">Distributed</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Temporal_multithreading" title="Temporal multithreading">Temporal</a></li> <li><a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a> <ul><li><a href="/wiki/Hyper-threading" title="Hyper-threading">Hyperthreading</a></li> <li><a href="/wiki/Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li></ul></li> <li><a href="/wiki/Speculative_multithreading" title="Speculative multithreading">Speculative</a></li> <li><a href="/wiki/Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li> <li><a href="/wiki/Cooperative_multitasking" title="Cooperative multitasking">Cooperative</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Flynn%27s_taxonomy" title="Flynn's taxonomy">Flynn's taxonomy</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single_instruction,_single_data" title="Single instruction, single data">SISD</a></li> <li><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> <ul><li><a href="/wiki/Single_instruction,_multiple_threads" title="Single instruction, multiple threads">Array processing (SIMT)</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Pipelined_processor" title="Flynn's taxonomy">Pipelined processing</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Associative_processor" title="Flynn's taxonomy">Associative processing</a></li> <li><a href="/wiki/SWAR" title="SWAR">SWAR</a></li></ul></li> <li><a href="/wiki/Multiple_instruction,_single_data" title="Multiple instruction, single data">MISD</a></li> <li><a href="/wiki/Multiple_instruction,_multiple_data" title="Multiple instruction, multiple data">MIMD</a> <ul><li><a href="/wiki/Single_program,_multiple_data" title="Single program, multiple data">SPMD</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_performance" title="Computer performance">Processor<br />performance</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transistor_count" title="Transistor count">Transistor count</a></li> <li><a href="/wiki/Instructions_per_cycle" title="Instructions per cycle">Instructions per cycle</a> (IPC) <ul><li><a href="/wiki/Cycles_per_instruction" title="Cycles per instruction">Cycles per instruction</a> (CPI)</li></ul></li> <li><a href="/wiki/Instructions_per_second" title="Instructions per second">Instructions per second</a> (IPS)</li> <li><a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">Floating-point operations per second</a> (FLOPS)</li> <li><a href="/wiki/Transactions_per_second" title="Transactions per second">Transactions per second</a> (TPS)</li> <li><a href="/wiki/SUPS" title="SUPS">Synaptic updates per second</a> (SUPS)</li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li> <li><a href="/wiki/Cache_performance_measurement_and_metric" title="Cache performance measurement and metric">Cache performance metrics</a></li> <li><a href="/wiki/Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Types</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Central processing unit</a> (CPU)</li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU) <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li></ul></li> <li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li> <li><a href="/wiki/Barrel_processor" title="Barrel processor">Barrel</a></li> <li><a href="/wiki/Stream_processing" title="Stream processing">Stream</a></li> <li><a href="/wiki/Tile_processor" title="Tile processor">Tile processor</a></li> <li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Field-programmable_object_array" title="Field-programmable object array">FPOA</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a> (SiP)</li> <li><a href="/wiki/Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">By application</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Embedded_system" title="Embedded system">Embedded system</a></li> <li><a href="/wiki/Microprocessor" title="Microprocessor">Microprocessor</a></li> <li><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a></li> <li><a href="/wiki/Mobile_processor" title="Mobile processor">Mobile</a></li> <li><a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">Ultra-low-voltage</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">ASIP</a></li> <li><a href="/wiki/Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Systems<br />on chip</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> (SoC)</li> <li><a href="/wiki/Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor</a> (MPSoC)</li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a> (NoC)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware<br />accelerators</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/AI_accelerator" class="mw-redirect" title="AI accelerator">AI accelerator</a></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li> <li><a href="/wiki/Image_processor" title="Image processor">Image processor</a></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Vision processing unit</a> (VPU)</li> <li><a href="/wiki/Physics_processing_unit" title="Physics processing unit">Physics processing unit</a> (PPU)</li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li> <li><a href="/wiki/Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li> <li><a href="/wiki/Secure_cryptoprocessor" title="Secure cryptoprocessor">Secure cryptoprocessor</a></li> <li><a href="/wiki/Network_processor" title="Network processor">Network processor</a></li> <li><a href="/wiki/Baseband_processor" title="Baseband processor">Baseband processor</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word size</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/1-bit_computing" title="1-bit computing">1-bit</a></li> <li><a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a></li> <li><a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a></li> <li><a href="/wiki/12-bit_computing" title="12-bit computing">12-bit</a></li> <li><a href="/wiki/Apollo_Guidance_Computer" title="Apollo Guidance Computer">15-bit</a></li> <li><a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a></li> <li><a href="/wiki/24-bit_computing" title="24-bit computing">24-bit</a></li> <li><a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a></li> <li><a href="/wiki/48-bit_computing" title="48-bit computing">48-bit</a></li> <li><a class="mw-selflink selflink">64-bit</a></li> <li><a href="/wiki/128-bit_computing" title="128-bit computing">128-bit</a></li> <li><a href="/wiki/256-bit_computing" title="256-bit computing">256-bit</a></li> <li><a href="/wiki/512-bit_computing" title="512-bit computing">512-bit</a></li> <li><a href="/wiki/Bit_slicing" title="Bit slicing">bit slicing</a></li> <li><a href="/wiki/Word_(computer_architecture)#Table_of_word_sizes" title="Word (computer architecture)">others</a> <ul><li><a href="/wiki/Word_(computer_architecture)#Variable-word_architectures" title="Word (computer architecture)">variable</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Core count</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single-core" title="Single-core">Single-core</a></li> <li><a href="/wiki/Multi-core_processor" title="Multi-core processor">Multi-core</a></li> <li><a href="/wiki/Manycore_processor" title="Manycore processor">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous architecture</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Core</a></li> <li><a href="/wiki/Cache_(computing)" title="Cache (computing)">Cache</a> <ul><li><a href="/wiki/CPU_cache" title="CPU cache">CPU cache</a></li> <li><a href="/wiki/Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li> <li><a href="/wiki/Data_cache" class="mw-redirect" title="Data cache">Data cache</a></li> <li><a href="/wiki/Instruction_cache" class="mw-redirect" title="Instruction cache">Instruction cache</a></li> <li><a href="/wiki/Cache_replacement_policies" title="Cache replacement policies">replacement policies</a></li> <li><a href="/wiki/Cache_coherence" title="Cache coherence">coherence</a></li></ul></li> <li><a href="/wiki/Bus_(computing)" title="Bus (computing)">Bus</a></li> <li><a href="/wiki/Clock_rate" title="Clock rate">Clock rate</a></li> <li><a href="/wiki/Clock_signal" title="Clock signal">Clock signal</a></li> <li><a href="/wiki/FIFO_(computing_and_electronics)" title="FIFO (computing and electronics)">FIFO</a></li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Execution_unit" title="Execution unit">Functional<br />units</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">Arithmetic logic unit</a> (ALU)</li> <li><a href="/wiki/Address_generation_unit" title="Address generation unit">Address generation unit</a> (AGU)</li> <li><a href="/wiki/Floating-point_unit" title="Floating-point unit">Floating-point unit</a> (FPU)</li> <li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a> (MMU) <ul><li><a href="/wiki/Load%E2%80%93store_unit" title="Load–store unit">Load–store unit</a></li> <li><a href="/wiki/Translation_lookaside_buffer" title="Translation lookaside buffer">Translation lookaside buffer</a> (TLB)</li></ul></li> <li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch predictor</a></li> <li><a href="/wiki/Branch_target_predictor" title="Branch target predictor">Branch target predictor</a></li> <li><a href="/wiki/Memory_controller" title="Memory controller">Integrated memory controller</a> (IMC) <ul><li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a></li></ul></li> <li><a href="/wiki/Instruction_decoder" class="mw-redirect" title="Instruction decoder">Instruction decoder</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Logic_gate" title="Logic gate">Logic</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Combinational_logic" title="Combinational logic">Combinational</a></li> <li><a href="/wiki/Sequential_logic" title="Sequential logic">Sequential</a></li> <li><a href="/wiki/Glue_logic" title="Glue logic">Glue</a></li> <li><a href="/wiki/Logic_gate" title="Logic gate">Logic gate</a> <ul><li><a href="/wiki/Quantum_logic_gate" title="Quantum logic gate">Quantum</a></li> <li><a href="/wiki/Gate_array" title="Gate array">Array</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_register" title="Hardware register">Registers</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Processor_register" title="Processor register">Processor register</a></li> <li><a href="/wiki/Status_register" title="Status register">Status register</a></li> <li><a href="/wiki/Stack_register" title="Stack register">Stack register</a></li> <li><a href="/wiki/Register_file" title="Register file">Register file</a></li> <li><a href="/wiki/Memory_buffer_register" title="Memory buffer register">Memory buffer</a></li> <li><a href="/wiki/Memory_address_register" title="Memory address register">Memory address register</a></li> <li><a href="/wiki/Program_counter" title="Program counter">Program counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Control_unit" title="Control unit">Control unit</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Hardwired_control_unit" class="mw-redirect" title="Hardwired control unit">Hardwired control unit</a></li> <li><a href="/wiki/Instruction_unit" title="Instruction unit">Instruction unit</a></li> <li><a href="/wiki/Data_buffer" title="Data buffer">Data buffer</a></li> <li><a href="/wiki/Write_buffer" title="Write buffer">Write buffer</a></li> <li><a href="/wiki/Microcode" title="Microcode">Microcode</a> <a href="/wiki/ROM_image" title="ROM image">ROM</a></li> <li><a href="/wiki/Counter_(digital)" title="Counter (digital)">Counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Datapath" title="Datapath">Datapath</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multiplexer" title="Multiplexer">Multiplexer</a></li> <li><a href="/wiki/Demultiplexer" class="mw-redirect" title="Demultiplexer">Demultiplexer</a></li> <li><a href="/wiki/Adder_(electronics)" title="Adder (electronics)">Adder</a></li> <li><a href="/wiki/Binary_multiplier" title="Binary multiplier">Multiplier</a> <ul><li><a href="/wiki/CPU_multiplier" title="CPU multiplier">CPU</a></li></ul></li> <li><a href="/wiki/Binary_decoder" title="Binary decoder">Binary decoder</a> <ul><li><a href="/wiki/Address_decoder" title="Address decoder">Address decoder</a></li> <li><a href="/wiki/Sum-addressed_decoder" title="Sum-addressed decoder">Sum-addressed decoder</a></li></ul></li> <li><a href="/wiki/Barrel_shifter" title="Barrel shifter">Barrel shifter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Electronic_circuit" title="Electronic circuit">Circuitry</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> <ul><li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D</a></li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal</a></li> <li><a href="/wiki/Power_management_integrated_circuit" title="Power management integrated circuit">Power management</a></li></ul></li> <li><a href="/wiki/Boolean_circuit" title="Boolean circuit">Boolean</a></li> <li><a href="/wiki/Circuit_(computer_science)" title="Circuit (computer science)">Digital</a></li> <li><a href="/wiki/Analogue_electronics" title="Analogue electronics">Analog</a></li> <li><a href="/wiki/Quantum_circuit" title="Quantum circuit">Quantum</a></li> <li><a href="/wiki/Switch#Electronic_switches" title="Switch">Switch</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Power_management" title="Power management">Power<br />management</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Power_Management_Unit" title="Power Management Unit">PMU</a></li> <li><a href="/wiki/Advanced_Power_Management" title="Advanced Power Management">APM</a></li> <li><a href="/wiki/ACPI" title="ACPI">ACPI</a></li> <li><a href="/wiki/Dynamic_frequency_scaling" title="Dynamic frequency scaling">Dynamic frequency scaling</a></li> <li><a href="/wiki/Dynamic_voltage_scaling" title="Dynamic voltage scaling">Dynamic voltage scaling</a></li> <li><a href="/wiki/Clock_gating" title="Clock gating">Clock gating</a></li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/History_of_general-purpose_CPUs" title="History of general-purpose CPUs">History of general-purpose CPUs</a></li> <li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">Microprocessor chronology</a></li> <li><a href="/wiki/Processor_design" title="Processor design">Processor design</a></li> <li><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></li> <li><a href="/wiki/Hardware_security_module" title="Hardware security module">Hardware security module</a></li> <li><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li> <li><a href="/wiki/Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li> <li><a href="/wiki/Pin_grid_array" title="Pin grid array">Pin grid array</a></li> <li><a href="/wiki/Chip_carrier" title="Chip carrier">Chip carrier</a></li></ul> </div></td></tr></tbody></table></div>    </div><noscript><img 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