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Clock signal - Wikipedia

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</ul> </li> <li id="toc-Clock_multiplier" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Clock_multiplier"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.4</span> <span>Clock multiplier</span> </div> </a> <ul id="toc-Clock_multiplier-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Dynamic_frequency_change" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Dynamic_frequency_change"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.5</span> <span>Dynamic frequency change</span> </div> </a> <ul id="toc-Dynamic_frequency_change-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Other_circuits" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Other_circuits"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Other circuits</span> </div> </a> <ul id="toc-Other_circuits-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Distribution" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Distribution"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Distribution</span> </div> </a> <ul id="toc-Distribution-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Further_reading" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Further_reading"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>Further reading</span> </div> </a> <ul id="toc-Further_reading-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" 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mw-list-item"><a href="https://bg.wikipedia.org/wiki/%D0%A2%D0%B0%D0%BA%D1%82%D0%BE%D0%B2_%D1%81%D0%B8%D0%B3%D0%BD%D0%B0%D0%BB" title="Тактов сигнал – Bulgarian" lang="bg" hreflang="bg" data-title="Тактов сигнал" data-language-autonym="Български" data-language-local-name="Bulgarian" class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Senyal_de_rellotge" title="Senyal de rellotge – Catalan" lang="ca" hreflang="ca" data-title="Senyal de rellotge" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/Hodinov%C3%BD_sign%C3%A1l" title="Hodinový signál – Czech" lang="cs" hreflang="cs" data-title="Hodinový signál" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Taktsignal" title="Taktsignal – German" lang="de" hreflang="de" data-title="Taktsignal" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/Taktsignaal" title="Taktsignaal – Estonian" lang="et" hreflang="et" data-title="Taktsignaal" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Se%C3%B1al_de_reloj" title="Señal de reloj – Spanish" lang="es" hreflang="es" data-title="Señal de reloj" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%D8%B3%DB%8C%DA%AF%D9%86%D8%A7%D9%84_%D8%B3%D8%A7%D8%B9%D8%AA" title="سیگنال ساعت – Persian" lang="fa" hreflang="fa" data-title="سیگنال ساعت" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Signal_d%27horloge" title="Signal d&#039;horloge – French" lang="fr" hreflang="fr" data-title="Signal d&#039;horloge" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%ED%81%B4%EB%9F%AD_%EC%8B%A0%ED%98%B8" title="클럭 신호 – Korean" lang="ko" hreflang="ko" data-title="클럭 신호" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Clock" title="Clock – Italian" lang="it" hreflang="it" data-title="Clock" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-he mw-list-item"><a href="https://he.wikipedia.org/wiki/%D7%90%D7%95%D7%AA_%D7%A9%D7%A2%D7%95%D7%9F" title="אות שעון – Hebrew" lang="he" hreflang="he" data-title="אות שעון" data-language-autonym="עברית" data-language-local-name="Hebrew" class="interlanguage-link-target"><span>עברית</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/%C3%93rajel" title="Órajel – Hungarian" lang="hu" hreflang="hu" data-title="Órajel" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/%E3%82%AF%E3%83%AD%E3%83%83%E3%82%AF" title="クロック – Japanese" lang="ja" hreflang="ja" data-title="クロック" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/Klokke_(elektronikk)" title="Klokke (elektronikk) – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="Klokke (elektronikk)" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Taktowanie" title="Taktowanie – Polish" lang="pl" hreflang="pl" data-title="Taktowanie" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Sinal_de_clock" title="Sinal de clock – Portuguese" lang="pt" hreflang="pt" data-title="Sinal de clock" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/%D0%A2%D0%B0%D0%BA%D1%82%D0%BE%D0%B2%D1%8B%D0%B9_%D1%81%D0%B8%D0%B3%D0%BD%D0%B0%D0%BB" title="Тактовый сигнал – Russian" lang="ru" hreflang="ru" data-title="Тактовый сигнал" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Hodinov%C3%BD_sign%C3%A1l" title="Hodinový signál – Slovak" lang="sk" hreflang="sk" data-title="Hodinový signál" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-sr mw-list-item"><a href="https://sr.wikipedia.org/wiki/%D0%A2%D0%B0%D0%BA%D1%82%D0%BD%D0%B8_%D1%81%D0%B8%D0%B3%D0%BD%D0%B0%D0%BB" title="Тактни сигнал – Serbian" lang="sr" hreflang="sr" data-title="Тактни сигнал" data-language-autonym="Српски / srpski" data-language-local-name="Serbian" class="interlanguage-link-target"><span>Српски / srpski</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Klockcykel" title="Klockcykel – Swedish" lang="sv" hreflang="sv" data-title="Klockcykel" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-tr mw-list-item"><a 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data-event-name="pinnable-header.vector-appearance.unpin">hide</button> </div> </div> </div> </nav> </div> </div> <div id="bodyContent" class="vector-body" aria-labelledby="firstHeading" data-mw-ve-target-container> <div class="vector-body-before-content"> <div class="mw-indicators"> </div> <div id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Timing of electronic circuits</div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Clock_signal.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/0/0e/Clock_signal.png/220px-Clock_signal.png" decoding="async" width="220" height="165" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/0/0e/Clock_signal.png/330px-Clock_signal.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/0/0e/Clock_signal.png/440px-Clock_signal.png 2x" data-file-width="560" data-file-height="420" /></a><figcaption>Clock signal and legend</figcaption></figure> <p>In <a href="/wiki/Electronics" title="Electronics">electronics</a> and especially synchronous <a href="/wiki/Digital_circuit" class="mw-redirect" title="Digital circuit">digital circuits</a>, a <b>clock signal</b> (historically also known as <i>logic beat</i>)<sup id="cite_ref-Ferranti_1968_1-0" class="reference"><a href="#cite_note-Ferranti_1968-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> is an electronic <a href="/wiki/Logic_signal" class="mw-redirect" title="Logic signal">logic signal</a> (<a href="/wiki/Voltage" title="Voltage">voltage</a> or <a href="/wiki/Electric_current" title="Electric current">current</a>) which oscillates between a high and a low state at a constant <a href="/wiki/Frequency" title="Frequency">frequency</a> and is used like a <a href="/wiki/Metronome" title="Metronome">metronome</a> to synchronize actions of digital <a href="/wiki/Electronic_circuit" title="Electronic circuit">circuits</a>. In a <a href="/wiki/Synchronous_logic" class="mw-redirect" title="Synchronous logic">synchronous logic</a> circuit, the most common type of digital circuit, the clock signal is applied to all storage devices, <a href="/wiki/Flip-flop_(electronics)" title="Flip-flop (electronics)">flip-flops</a> and latches, and causes them all to change state simultaneously, preventing <a href="/wiki/Race_condition" title="Race condition">race conditions</a>. </p><p>A clock <a href="/wiki/Signal_(electrical_engineering)" class="mw-redirect" title="Signal (electrical engineering)">signal</a> is produced by an <a href="/wiki/Electronic_oscillator" title="Electronic oscillator">electronic oscillator</a> called a <a href="/wiki/Clock_generator" title="Clock generator">clock generator</a>. The most common clock signal is in the form of a <a href="/wiki/Square_wave" title="Square wave">square wave</a> with a 50% <a href="/wiki/Duty_cycle" title="Duty cycle">duty cycle</a>. Circuits using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of <a href="/wiki/Double_data_rate" title="Double data rate">double data rate</a>, both in the rising and in the falling edges of the clock cycle. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Digital_circuits">Digital circuits</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=1" title="Edit section: Digital circuits"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Most <a href="/wiki/Integrated_circuit" title="Integrated circuit">integrated circuits</a> (ICs) of sufficient complexity use a clock signal in order to synchronize different parts of the circuit, cycling at a rate slower than the worst-case internal <a href="/wiki/Propagation_delay" title="Propagation delay">propagation delays</a>. In some cases, more than one clock cycle is required to perform a predictable action. As ICs become more complex, the problem of supplying accurate and synchronized clocks to all the circuits becomes increasingly difficult. The preeminent example of such complex chips is the <a href="/wiki/Microprocessor" title="Microprocessor">microprocessor</a>, the central component of modern computers, which relies on a clock from a <a href="/wiki/Crystal_oscillator" title="Crystal oscillator">crystal oscillator</a>. The only exceptions are <a href="/wiki/Asynchronous_circuit" title="Asynchronous circuit">asynchronous circuits</a> such as <a href="/wiki/Asynchronous_Processor" class="mw-redirect" title="Asynchronous Processor">asynchronous CPUs</a>. </p><p>A clock signal might also be gated, that is, combined with a controlling signal that enables or disables the clock signal for a certain part of a circuit. This technique is often used to save power by effectively shutting down portions of a digital circuit when they are not in use, but comes at a cost of increased complexity in timing analysis. </p> <div class="mw-heading mw-heading3"><h3 id="Single-phase_clock">Single-phase clock</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=2" title="Edit section: Single-phase clock"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Most modern <a href="/wiki/Synchronous_circuit" title="Synchronous circuit">synchronous circuits</a> use only a "single phase clock" – in other words, all clock signals are (effectively) transmitted on 1 wire. </p> <div class="mw-heading mw-heading3"><h3 id="Two-phase_clock">Two-phase clock</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=3" title="Edit section: Two-phase clock"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In <a href="/wiki/Synchronous_circuit" title="Synchronous circuit">synchronous circuits</a>, a "two-phase clock" refers to clock signals distributed on 2 wires, each with non-overlapping pulses. Traditionally one wire is called "phase 1" or "φ1" (<a href="/wiki/Phi" title="Phi">phi</a>1), the other wire carries the "phase 2" or "φ2" signal.<sup id="cite_ref-Two-phase_2-0" class="reference"><a href="#cite_note-Two-phase-2"><span class="cite-bracket">&#91;</span>2<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">&#91;</span>4<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">&#91;</span>5<span class="cite-bracket">&#93;</span></a></sup> Because the two phases are guaranteed non-overlapping, <a href="/wiki/Gated_latch" class="mw-redirect" title="Gated latch">gated latches</a> rather than <a href="/wiki/Edge-triggered_flip-flop" class="mw-redirect" title="Edge-triggered flip-flop">edge-triggered flip-flops</a> can be used to store <a href="/wiki/State_(computer_science)#Digital_logic_circuit_state" title="State (computer science)">state information</a> so long as the inputs to latches on one phase only depend on outputs from latches on the other phase. Since a gated latch uses only four gates versus six gates for an edge-triggered flip-flop, a two phase clock can lead to a design with a smaller overall gate count but usually at some penalty in design difficulty and performance. </p><p><a href="/wiki/Metal_oxide_semiconductor" class="mw-redirect" title="Metal oxide semiconductor">Metal oxide semiconductor</a> (MOS) ICs typically used dual clock signals (a two-phase clock) in the 1970s. These were generated externally for both the <a href="/wiki/Motorola_6800" title="Motorola 6800">Motorola 6800</a> and <a href="/wiki/Intel_8080" title="Intel 8080">Intel 8080</a> microprocessors.<sup id="cite_ref-MC6870_6-0" class="reference"><a href="#cite_note-MC6870-6"><span class="cite-bracket">&#91;</span>6<span class="cite-bracket">&#93;</span></a></sup> The next generation of microprocessors incorporated the clock generation on chip. The 8080 uses a 2&#160;MHz clock but the processing throughput is similar to the 1&#160;MHz 6800. The 8080 requires more clock cycles to execute a processor instruction. Due to their <a href="/wiki/Dynamic_logic_(digital_electronics)" title="Dynamic logic (digital electronics)">dynamic logic</a>, the 6800 has a minimum clock rate of 100&#160;kHz and the 8080 has a minimum clock rate of 500&#160;kHz. Higher speed versions of both microprocessors were released by 1976.<sup id="cite_ref-MD_Sep_1975_8080A_7-0" class="reference"><a href="#cite_note-MD_Sep_1975_8080A-7"><span class="cite-bracket">&#91;</span>7<span class="cite-bracket">&#93;</span></a></sup> </p><p>The <a href="/wiki/6501" class="mw-redirect" title="6501">6501</a> requires an external 2-phase clock generator. The <a href="/wiki/MOS_Technology_6502" title="MOS Technology 6502">MOS Technology 6502</a> uses the same 2-phase logic internally, but also includes a two-phase clock generator on-chip, so it only needs a single phase clock input, simplifying system design. </p> <div class="mw-heading mw-heading3"><h3 id="4-phase_clock">4-phase clock</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=4" title="Edit section: 4-phase clock"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/Four-phase_logic" title="Four-phase logic">Four-phase logic</a></div> <p>Some early integrated circuits use <a href="/wiki/Four-phase_logic" title="Four-phase logic">four-phase logic</a>, requiring a four phase clock input consisting of four separate, non-overlapping clock signals.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">&#91;</span>8<span class="cite-bracket">&#93;</span></a></sup> This was particularly common among early microprocessors such as the <a href="/wiki/National_Semiconductor" title="National Semiconductor">National Semiconductor</a> <a href="/wiki/IMP-16" title="IMP-16">IMP-16</a>, <a href="/wiki/Texas_Instruments_TMS9900" class="mw-redirect" title="Texas Instruments TMS9900">Texas Instruments TMS9900</a>, and the <a href="/wiki/Western_Digital" title="Western Digital">Western Digital</a> <a href="/wiki/MCP-1600" title="MCP-1600">MCP-1600</a> chipset used in the <a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">DEC</a> <a href="/wiki/PDP-11#LSI-11" title="PDP-11">LSI-11</a>. </p><p>Four phase clocks have only rarely been used in newer CMOS processors such as the DEC WRL MultiTitan microprocessor.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">&#91;</span>9<span class="cite-bracket">&#93;</span></a></sup> and in <a href="/wiki/Intrinsity" title="Intrinsity">Intrinsity</a>'s Fast14 technology. Most modern microprocessors and <a href="/wiki/Microcontroller" title="Microcontroller">microcontrollers</a> use a single-phase clock. </p> <div class="mw-heading mw-heading3"><h3 id="Clock_multiplier">Clock multiplier</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=5" title="Edit section: Clock multiplier"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">Clock multiplier</a></div> <p>Many modern <a href="/wiki/Microcomputer" title="Microcomputer">microcomputers</a> use a "<a href="/wiki/Clock_multiplier" class="mw-redirect" title="Clock multiplier">clock multiplier</a>" which multiplies a lower frequency external clock to the appropriate <a href="/wiki/Clock_rate" title="Clock rate">clock rate</a> of the microprocessor. This allows the CPU to operate at a much higher frequency than the rest of the computer, which affords performance gains in situations where the CPU does not need to wait on an external factor (like memory or <a href="/wiki/Input/output" title="Input/output">input/output</a>). </p> <div class="mw-heading mw-heading3"><h3 id="Dynamic_frequency_change">Dynamic frequency change</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=6" title="Edit section: Dynamic frequency change"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The vast majority of digital devices do not require a clock at a fixed, constant frequency. As long as the minimum and maximum clock periods are respected, the time between clock edges can vary widely from one edge to the next and back again. Such digital devices work just as well with a clock generator that dynamically changes its frequency, such as <a href="/wiki/Spread_spectrum_clock" class="mw-redirect" title="Spread spectrum clock">spread-spectrum clock generation</a>, <a href="/wiki/Dynamic_frequency_scaling" title="Dynamic frequency scaling">dynamic frequency scaling</a>, etc. Devices that use <a href="/wiki/Static_logic_(digital_logic)" class="mw-redirect" title="Static logic (digital logic)">static logic</a> do not even have a maximum clock period (or in other words, minimum clock frequency); such devices can be slowed and paused indefinitely, then resumed at full clock speed at any later time. </p> <div class="mw-heading mw-heading2"><h2 id="Other_circuits">Other circuits</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=7" title="Edit section: Other circuits"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Some sensitive <a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">mixed-signal circuits</a>, such as precision <a href="/wiki/Analog-to-digital_converter" title="Analog-to-digital converter">analog-to-digital converters</a>, use <a href="/wiki/Sine_wave" title="Sine wave">sine waves</a> rather than square waves as their clock signals, because square waves contain high-frequency <a href="/wiki/Harmonic" title="Harmonic">harmonics</a> that can interfere with the analog circuitry and cause <a href="/wiki/Signal_noise" class="mw-redirect" title="Signal noise">noise</a>. Such sine wave clocks are often <a href="/wiki/Differential_signaling" class="mw-redirect" title="Differential signaling">differential signals</a>, because this type of signal has twice the <a href="/wiki/Slew_rate" title="Slew rate">slew rate</a>, and therefore half the timing uncertainty, of a <a href="/wiki/Single-ended_signalling" class="mw-redirect" title="Single-ended signalling">single-ended signal</a> with the same voltage range. Differential signals radiate less strongly than a single line. Alternatively, a single line shielded by power and ground lines can be used. </p><p>In CMOS circuits, gate capacitances are charged and discharged continually. A capacitor does not dissipate energy, but energy is wasted in the driving transistors. In <a href="/wiki/Reversible_computing" title="Reversible computing">reversible computing</a>, <a href="/wiki/Inductor" title="Inductor">inductors</a> can be used to store this energy and reduce the energy loss, but they tend to be quite large. Alternatively, using a sine wave clock, CMOS <a href="/wiki/Transmission_gate" title="Transmission gate">transmission gates</a> and energy-saving techniques, the power requirements can be reduced.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (October 2008)">citation needed</span></a></i>&#93;</sup> </p> <div class="mw-heading mw-heading2"><h2 id="Distribution">Distribution</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=8" title="Edit section: Distribution"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The most effective way to get the clock signal to every part of a chip that needs it, with the lowest <a href="/wiki/Clock_skew" title="Clock skew">skew</a>, is a metal grid. In a large microprocessor, the power used to drive the clock signal can be over 30% of the total power used by the entire chip. The whole structure with the gates at the ends and all amplifiers in between have to be loaded and unloaded every cycle.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">&#91;</span>10<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">&#91;</span>11<span class="cite-bracket">&#93;</span></a></sup> To save energy, <a href="/wiki/Clock_gating" title="Clock gating">clock gating</a> temporarily shuts off part of the tree. </p><p>The <b>clock distribution network</b> (or <b>clock tree</b>, when this network forms a tree such as an <a href="/wiki/H-tree" class="mw-redirect" title="H-tree">H-tree</a>) distributes the clock signal(s) from a common point to all the elements that need it. Since this function is vital to the operation of a synchronous system, much attention has been given to the characteristics of these clock signals and the <a href="/wiki/Electrical_network" title="Electrical network">electrical networks</a> used in their distribution. Clock signals are often regarded as simple control signals; however, these signals have some very special characteristics and attributes. </p><p>Clock signals are typically loaded with the greatest <a href="/wiki/Fanout" class="mw-redirect" title="Fanout">fanout</a> and operate at the highest speeds of any signal within the synchronous system. Since the data signals are provided with a temporal reference by the clock signals, the clock <a href="/wiki/Waveform" title="Waveform">waveforms</a> must be particularly clean and sharp. Furthermore, these clock signals are particularly affected by technology scaling (see <a href="/wiki/Moore%27s_law" title="Moore&#39;s law">Moore's law</a>), in that long <a href="/wiki/Global_interconnect" class="mw-redirect" title="Global interconnect">global interconnect</a> lines become significantly more resistive as line dimensions are decreased. This increased line resistance is one of the primary reasons for the increasing significance of clock distribution on synchronous performance. Finally, the control of any differences and uncertainty in the arrival times of the clock signals can severely limit the maximum performance of the entire system and create catastrophic <a href="/wiki/Race_hazard" class="mw-redirect" title="Race hazard">race conditions</a> in which an incorrect data signal may latch within a register. </p><p>Most synchronous <i><a href="/wiki/Digital_data" title="Digital data">digital</a></i> systems consist of cascaded banks of sequential <a href="/wiki/Flip-flop_(electronics)" title="Flip-flop (electronics)">registers</a> with <a href="/wiki/Combinational_logic" title="Combinational logic">combinational logic</a> between each set of registers. The <a href="/wiki/Functional_requirements" class="mw-redirect" title="Functional requirements">functional requirements</a> of the digital system are satisfied by the logic stages. Each logic stage introduces delay that affects timing performance, and the timing performance of the digital design can be evaluated relative to the timing requirements by a timing analysis. Often special consideration must be made to meet the timing requirements. For example, the global performance and local timing requirements may be satisfied by the careful insertion of <a href="/wiki/Pipeline_(computing)" title="Pipeline (computing)">pipeline registers</a> into equally spaced time windows to satisfy critical worst-case <i><a href="/w/index.php?title=Timing_constraints&amp;action=edit&amp;redlink=1" class="new" title="Timing constraints (page does not exist)">timing constraints</a></i>. The proper design of the clock distribution network helps ensure that critical timing requirements are satisfied and that no race conditions exist (see also <a href="/wiki/Clock_skew" title="Clock skew">clock skew</a>). </p><p>The delay components that make up a general synchronous system are composed of the following three individual subsystems: the memory storage elements, the logic elements, and the clocking circuitry and distribution network. </p><p>Novel structures are currently under development to ameliorate these issues and provide effective solutions. Important areas of research include resonant clocking techniques ("resonant clock mesh"),<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">&#91;</span>14<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">&#91;</span>15<span class="cite-bracket">&#93;</span></a></sup> on-chip optical interconnect, and <a href="/wiki/Globally_asynchronous_locally_synchronous" title="Globally asynchronous locally synchronous"> local synchronization</a> methodologies. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=9" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Bit-synchronous_operation" title="Bit-synchronous operation">Bit-synchronous operation</a></li> <li><a href="/wiki/Clock_domain_crossing" title="Clock domain crossing">Clock domain crossing</a>&#160;– Crossing in digital electronic design</li> <li><a href="/wiki/Clock_rate" title="Clock rate">Clock rate</a>&#160;– Frequency at which a CPU chip or core is operating</li> <li><a href="/wiki/Design_flow_(EDA)" title="Design flow (EDA)">Design flow (EDA)</a>&#160;– Suite of electronic design tools</li> <li><a href="/wiki/Electronic_design_automation" title="Electronic design automation">Electronic design automation</a>&#160;– Software for designing electronic systems</li> <li><a href="/wiki/Four-phase_logic" title="Four-phase logic">Four-phase logic</a>&#160;– type of, and design methodology for dynamic logic<span style="display:none" class="category-wikidata-fallback-annotation">Pages displaying wikidata descriptions as a fallback</span></li> <li><a href="/wiki/Integrated_circuit_design" title="Integrated circuit design">Integrated circuit design</a>&#160;– Engineering process for electronic hardware</li> <li><a href="/wiki/Interface_Logic_Model" class="mw-redirect" title="Interface Logic Model">Interface Logic Model</a></li> <li><a href="/wiki/Jitter" title="Jitter">Jitter</a>&#160;– Clock deviation from perfect periodicity</li> <li><a href="/wiki/Pulse-per-second_signal" title="Pulse-per-second signal">Pulse-per-second signal</a>&#160;– Class of electrical signals</li> <li><a href="/wiki/Self-clocking_signal" title="Self-clocking signal">Self-clocking signal</a>&#160;– Signal able to be decoded without an outside source of synchronization</li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=10" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-Ferranti_1968-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-Ferranti_1968_1-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://www.sba.unipi.it/sites/default/files/2015_05_29_08_44_13.pdf"><i>FM1600B Microcircuit Computer Ferranti Digital Systems</i></a> <span class="cs1-format">(PDF)</span>. Bracknell, Berkshire, UK: <a href="/wiki/Ferranti_Limited" class="mw-redirect" title="Ferranti Limited">Ferranti Limited</a>, Digital Systems Department. October 1968 [September 1968]. List DSD 68/6. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20200519075443/https://www.sba.unipi.it/sites/default/files/2015_05_29_08_44_13.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on 2020-05-19<span class="reference-accessdate">. Retrieved <span class="nowrap">2020-05-19</span></span>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=FM1600B+Microcircuit+Computer+Ferranti+Digital+Systems&amp;rft.place=Bracknell%2C+Berkshire%2C+UK&amp;rft.pub=Ferranti+Limited%2C+Digital+Systems+Department&amp;rft.date=1968-10&amp;rft_id=https%3A%2F%2Fwww.sba.unipi.it%2Fsites%2Fdefault%2Ffiles%2F2015_05_29_08_44_13.pdf&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-Two-phase-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-Two-phase_2-0">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www.princeton.edu/~wolf/modern-vlsi/Overheads/CHAP5-2/sld010.htm">Two-phase clock</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20071109090150/http://www.princeton.edu/~wolf/modern-vlsi/Overheads/CHAP5-2/sld010.htm">Archived</a> November 9, 2007, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation cs2"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20111226073122/http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/12-gatedelay/40-tpcg/two-phase-clock-gen.html"><i>Two-phase non-overlapping clock generator</i></a>, Tams-www.informatik.uni-hamburg.de, archived from <a rel="nofollow" class="external text" href="http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/12-gatedelay/40-tpcg/two-phase-clock-gen.html">the original</a> on 2011-12-26<span class="reference-accessdate">, retrieved <span class="nowrap">2012-01-08</span></span></cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Two-phase+non-overlapping+clock+generator&amp;rft.pub=Tams-www.informatik.uni-hamburg.de&amp;rft_id=http%3A%2F%2Ftams-www.informatik.uni-hamburg.de%2Fapplets%2Fhades%2Fwebdemos%2F12-gatedelay%2F40-tpcg%2Ftwo-phase-clock-gen.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation cs2"><a rel="nofollow" class="external text" href="http://micro.magnet.fsu.edu/primer/digitalimaging/concepts/twophase.html"><i>Concepts in Digital Imaging - Two Phase CCD Clocking</i></a>, Micro.magnet.fsu.edu<span class="reference-accessdate">, retrieved <span class="nowrap">2012-01-08</span></span></cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Concepts+in+Digital+Imaging+-+Two+Phase+CCD+Clocking&amp;rft.pub=Micro.magnet.fsu.edu&amp;rft_id=http%3A%2F%2Fmicro.magnet.fsu.edu%2Fprimer%2Fdigitalimaging%2Fconcepts%2Ftwophase.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation cs2"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20120208054348/http://www.hpc.msstate.edu/mpl/distributions/scmos/scmos_doc/cells/cgf104.html"><i>Cell cgf104: Two phase non-overlapping clock generator</i></a>, Hpc.msstate.edu, archived from <a rel="nofollow" class="external text" href="http://www.hpc.msstate.edu/mpl/distributions/scmos/scmos_doc/cells/cgf104.html">the original</a> on 2012-02-08<span class="reference-accessdate">, retrieved <span class="nowrap">2012-01-08</span></span></cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Cell+cgf104%3A+Two+phase+non-overlapping+clock+generator&amp;rft.pub=Hpc.msstate.edu&amp;rft_id=http%3A%2F%2Fwww.hpc.msstate.edu%2Fmpl%2Fdistributions%2Fscmos%2Fscmos_doc%2Fcells%2Fcgf104.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-MC6870-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-MC6870_6-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation journal cs1"><a class="external text" href="https://commons.wikimedia.org/wiki/File:Motorola_MC6870_ad_April_1976.jpg">"How to drive a microprocessor"</a>. <i>Electronics</i>. <b>49</b> (8). New York: McGraw-Hill: 159. April 15, 1976.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=Electronics&amp;rft.atitle=How+to+drive+a+microprocessor&amp;rft.volume=49&amp;rft.issue=8&amp;rft.pages=159&amp;rft.date=1976-04-15&amp;rft_id=http%3A%2F%2Fcommons.wikimedia.org%2Fwiki%2FFile%3AMotorola_MC6870_ad_April_1976.jpg&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span> Motorola's Component Products Department sold hybrid ICs that included a quartz oscillator. These IC produced the two-phase non-overlapping waveforms the 6800 and 8080 required. Later Intel produced the 8224 clock generator and Motorola produced the MC6875. The Intel 8085 and the Motorola 6802 include this circuitry on the microprocessor chip.</span> </li> <li id="cite_note-MD_Sep_1975_8080A-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-MD_Sep_1975_8080A_7-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation journal cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20190123102914/http://bitsavers.org/pdf/microcomputerAssociates/Microcomputer_Digest_v02n03_Sep75.pdf">"Intel's Higher Speed 8080 μP"</a> <span class="cs1-format">(PDF)</span>. <i>Microcomputer Digest</i>. <b>2</b> (3). Cupertino CA: Microcomputer Associates: 7. September 1975. Archived from <a rel="nofollow" class="external text" href="http://www.bitsavers.org/pdf/microcomputerAssociates/Microcomputer_Digest_v02n03_Sep75.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2019-01-23<span class="reference-accessdate">. Retrieved <span class="nowrap">2011-01-24</span></span>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=Microcomputer+Digest&amp;rft.atitle=Intel%27s+Higher+Speed+8080+%CE%BCP&amp;rft.volume=2&amp;rft.issue=3&amp;rft.pages=7&amp;rft.date=1975-09&amp;rft_id=http%3A%2F%2Fwww.bitsavers.org%2Fpdf%2FmicrocomputerAssociates%2FMicrocomputer_Digest_v02n03_Sep75.pdf&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation cs2"><a rel="nofollow" class="external text" href="http://micro.magnet.fsu.edu/primer/digitalimaging/concepts/fourphase.html"><i>Concepts in digital imaging - Four Phase CCD Clocking</i></a>, Micro.magnet.fsu.edu<span class="reference-accessdate">, retrieved <span class="nowrap">2012-01-08</span></span></cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Concepts+in+digital+imaging+-+Four+Phase+CCD+Clocking&amp;rft.pub=Micro.magnet.fsu.edu&amp;rft_id=http%3A%2F%2Fmicro.magnet.fsu.edu%2Fprimer%2Fdigitalimaging%2Fconcepts%2Ffourphase.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFJouppiTang1989" class="citation journal cs1"><a href="/wiki/Norman_P._Jouppi" class="mw-redirect" title="Norman P. Jouppi">Jouppi, N.P.</a>; Tang, J.F. (1989). "A 20-MIPS sustained 32-bit CMOS microprocessor with high ratio of sustained to peak performance". <i>IEEE Journal of Solid-State Circuits</i>. <b>24</b> (5): 1348–59. <a href="/wiki/Bibcode_(identifier)" class="mw-redirect" title="Bibcode (identifier)">Bibcode</a>:<a rel="nofollow" class="external text" href="https://ui.adsabs.harvard.edu/abs/1989IJSSC..24.1348J">1989IJSSC..24.1348J</a>. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FJSSC.1989.572612">10.1109/JSSC.1989.572612</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=IEEE+Journal+of+Solid-State+Circuits&amp;rft.atitle=A+20-MIPS+sustained+32-bit+CMOS+microprocessor+with+high+ratio+of+sustained+to+peak+performance&amp;rft.volume=24&amp;rft.issue=5&amp;rft.pages=1348-59&amp;rft.date=1989&amp;rft_id=info%3Adoi%2F10.1109%2FJSSC.1989.572612&amp;rft_id=info%3Abibcode%2F1989IJSSC..24.1348J&amp;rft.aulast=Jouppi&amp;rft.aufirst=N.P.&amp;rft.au=Tang%2C+J.F.&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFAnand_Lal_Shimpi2008" class="citation cs2">Anand Lal Shimpi (2008), <a rel="nofollow" class="external text" href="http://www.anandtech.com/showdoc.aspx?i=3276&amp;p=14"><i>Intel's Atom Architecture: The Journey Begins</i></a></cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Intel%27s+Atom+Architecture%3A+The+Journey+Begins&amp;rft.date=2008&amp;rft.au=Anand+Lal+Shimpi&amp;rft_id=http%3A%2F%2Fwww.anandtech.com%2Fshowdoc.aspx%3Fi%3D3276%26p%3D14&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFPaul_V._Bolotoff2007" class="citation cs2">Paul V. Bolotoff (2007), <a rel="nofollow" class="external text" href="https://web.archive.org/web/20120218005309/http://alasir.com/articles/alpha_history/alpha_21264.html"><i>Alpha: The history in facts and comments</i></a>, archived from <a rel="nofollow" class="external text" href="http://alasir.com/articles/alpha_history/alpha_21264.html">the original</a> on 2012-02-18<span class="reference-accessdate">, retrieved <span class="nowrap">2012-01-03</span></span>, <q>power consumed by the clock subsystem of EV6 was about 32% of the total core power. To compare, it was about 25% for EV56, about 37% for EV5 and about 40% for EV4.</q></cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Alpha%3A+The+history+in+facts+and+comments&amp;rft.date=2007&amp;rft.au=Paul+V.+Bolotoff&amp;rft_id=http%3A%2F%2Falasir.com%2Farticles%2Falpha_history%2Falpha_21264.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFChanShepardRestle2005" class="citation journal cs1">Chan, S. C.; Shepard, K. L.; Restle, P. J. (2005). "Uniform-phase uniform-amplitude resonant-load global clock distributions". <i>IEEE Journal of Solid-State Circuits</i>. <b>40</b> (1): 102. <a href="/wiki/Bibcode_(identifier)" class="mw-redirect" title="Bibcode (identifier)">Bibcode</a>:<a rel="nofollow" class="external text" href="https://ui.adsabs.harvard.edu/abs/2005IJSSC..40..102C">2005IJSSC..40..102C</a>. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FJSSC.2004.838005">10.1109/JSSC.2004.838005</a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a>&#160;<a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:16239014">16239014</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=IEEE+Journal+of+Solid-State+Circuits&amp;rft.atitle=Uniform-phase+uniform-amplitude+resonant-load+global+clock+distributions&amp;rft.volume=40&amp;rft.issue=1&amp;rft.pages=102&amp;rft.date=2005&amp;rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A16239014%23id-name%3DS2CID&amp;rft_id=info%3Adoi%2F10.1109%2FJSSC.2004.838005&amp;rft_id=info%3Abibcode%2F2005IJSSC..40..102C&amp;rft.aulast=Chan&amp;rft.aufirst=S.+C.&amp;rft.au=Shepard%2C+K.+L.&amp;rft.au=Restle%2C+P.+J.&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3AClock+signal" class="Z3988"></span></span> </li> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"> David Shan et. al. <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/abstract/document/7231308">"Resonant clock mega-mesh for the IBM z13"</a>. 2015.</span> </li> <li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text"> Wulong Liu; Guoqing Chen; Yu Wang; Huazhong Yang. <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/7059052">"Modeling and optimization of low power resonant clock mesh"</a>. 2015.</span> </li> <li id="cite_note-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-15">^</a></b></span> <span class="reference-text"> <a rel="nofollow" class="external text" href="https://www.techdesignforums.com/practice/guides/clock-tree-synthesis-distribution-strategies/">"Clock tree synthesis"</a>.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Clock_signal&amp;action=edit&amp;section=11" title="Edit section: Further reading"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Eby_Friedman" title="Eby Friedman">Eby G. Friedman</a> (Ed.), <i>Clock Distribution Networks in VLSI Circuits and Systems</i>, <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/0-7803-1058-6" title="Special:BookSources/0-7803-1058-6">0-7803-1058-6</a>, IEEE Press. 1995.</li> <li><a href="/wiki/Eby_Friedman" title="Eby Friedman">Eby G. Friedman</a>, <a rel="nofollow" class="external text" href="https://doi.org/10.1109%2F5.929649">"Clock Distribution Networks in Synchronous Digital Integrated Circuits"</a>&#160;, <i>Proceedings of the IEEE</i>, Vol. 89, No. 5, pp.&#160;665–692, May 2001.</li> <li><a rel="nofollow" class="external text" href="http://archive.sigda.org/ispd/contests/10/ispd10cns.html">"ISPD 2010 High Performance Clock Network Synthesis Contest"</a>, International Symposium on Physical Design, Intel, IBM, 2010.</li> <li>D.-J. Lee, <a rel="nofollow" class="external text" href="http://www.eecs.umich.edu/~imarkov/pubs/diss/DJdiss.pdf">"High-performance and Low-power Clock Network Synthesis in the Presence of Variation"</a>, Ph.D. dissertation, University of Michigan, 2011.</li> <li><a href="/wiki/Igor_L._Markov" title="Igor L. Markov">I. L. Markov</a>, D.-J. Lee, <a rel="nofollow" class="external text" href="http://www.eecs.umich.edu/~imarkov/pubs/conf/iccad11-tuto.pdf">"Algorithmic Tuning of Clock Trees and Derived Non-Tree Structures"</a>, in Proc. Int'l. Conf. Comp.-Aided Design (ICCAD), 2011.</li> <li>V. G. Oklobdzija, V. M. Stojanovic, D. M. Markovic, and N. M. Nedovic, <i>Digital System Clocking: High-Performance and Low-Power Aspects</i>, <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/0-471-27447-X" title="Special:BookSources/0-471-27447-X">0-471-27447-X</a>, IEEE Press/Wiley-Interscience, 2003.</li> <li>Mitch Dale, <a rel="nofollow" class="external text" href="https://web.archive.org/web/20131224102708/http://chipdesignmag.com/display.php?articleId=915">"The power of RTL Clock-gating"</a>, <i>Electronic Systems Design Engineering Incorporating Chip Design</i>, January 20, 2007.</li></ul> <hr /> <p>Adapted from <a rel="nofollow" class="external text" href="http://www.ece.rochester.edu/users/friedman/">Eby Friedman</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20140812225312/http://www.ece.rochester.edu/users/friedman/">Archived</a> 2014-08-12 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>'s column in the ACM <a rel="nofollow" class="external text" href="http://www.sigda.org">SIGDA</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20070208034716/http://www.sigda.org/newsletter/index.html">e-newsletter</a> by <a rel="nofollow" class="external text" href="http://www.eecs.umich.edu/~imarkov/">Igor Markov</a><br /> Original text is available at <a rel="nofollow" class="external free" href="https://web.archive.org/web/20100711135550/http://www.sigda.org/newsletter/2005/eNews_051201.html">https://web.archive.org/web/20100711135550/http://www.sigda.org/newsletter/2005/eNews_051201.html</a> </p> <!-- NewPP limit report Parsed by mw‐web.codfw.main‐5c59558b9d‐kx5g7 Cached time: 20241130024045 Cache expiry: 2592000 Reduced expiry: false Complications: [vary‐revision‐sha1, show‐toc] CPU time usage: 0.382 seconds Real time usage: 0.550 seconds Preprocessor visited node count: 3106/1000000 Post‐expand include size: 28587/2097152 bytes Template argument size: 1631/2097152 bytes Highest expansion depth: 14/100 Expensive parser function count: 4/500 Unstrip recursion depth: 1/20 Unstrip post‐expand size: 47402/5000000 bytes Lua time usage: 0.249/10.000 seconds Lua memory usage: 15850794/52428800 bytes Number of Wikibase entities loaded: 0/400 --> <!-- Transclusion expansion time report (%,ms,calls,template) 100.00% 504.656 1 -total 43.18% 217.912 11 Template:Annotated_link 26.62% 134.319 1 Template:Reflist 13.26% 66.925 1 Template:Cite_book 12.11% 61.133 1 Template:Short_description 7.30% 36.821 2 Template:Pagetype 7.16% 36.127 1 Template:Citation_needed 6.19% 31.223 1 Template:Fix 4.48% 22.591 4 Template:Cite_journal 4.40% 22.192 2 Template:Category_handler --> <!-- Saved in parser cache with key enwiki:pcache:182693:|#|:idhash:canonical and timestamp 20241130024045 and revision id 1251765459. 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