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vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Afficher / masquer la sous-section Processeurs Intel Core I3</span> </button> <ul id="toc-Processeurs_Intel_Core_I3-sublist" class="vector-toc-list"> <li id="toc-Gamme_pour_PC_de_bureau" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Gamme_pour_PC_de_bureau"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1</span> <span>Gamme pour PC de bureau</span> </div> </a> <ul id="toc-Gamme_pour_PC_de_bureau-sublist" class="vector-toc-list"> <li id="toc-Clarkdale" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Clarkdale"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.1</span> <span>Clarkdale</span> </div> </a> <ul id="toc-Clarkdale-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Sandy_Bridge" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Sandy_Bridge"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.2</span> <span>Sandy Bridge</span> </div> </a> <ul id="toc-Sandy_Bridge-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Ivy_Bridge" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Ivy_Bridge"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.3</span> <span>Ivy Bridge</span> </div> </a> <ul id="toc-Ivy_Bridge-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Haswell" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Haswell"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.4</span> <span>Haswell</span> </div> </a> <ul id="toc-Haswell-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Skylake" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Skylake"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.5</span> <span>Skylake</span> </div> </a> <ul id="toc-Skylake-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Kaby_Lake" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Kaby_Lake"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1.6</span> <span>Kaby Lake</span> </div> </a> <ul id="toc-Kaby_Lake-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-La_gamme_pour_PC_portables" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#La_gamme_pour_PC_portables"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2</span> <span>La gamme pour PC portables</span> </div> </a> <ul id="toc-La_gamme_pour_PC_portables-sublist" class="vector-toc-list"> <li id="toc-Arrandale" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Arrandale"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.1</span> <span>Arrandale</span> </div> </a> <ul id="toc-Arrandale-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Sandy_Bridge_2" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Sandy_Bridge_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.2</span> <span>Sandy Bridge</span> </div> </a> <ul id="toc-Sandy_Bridge_2-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Haswell_2" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Haswell_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.2.3</span> <span>Haswell</span> </div> </a> <ul id="toc-Haswell_2-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Sky_Lake" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Sky_Lake"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.3</span> <span>Sky Lake</span> </div> </a> <ul id="toc-Sky_Lake-sublist" class="vector-toc-list"> <li id="toc-Kaby_Lake_2" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Kaby_Lake_2"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.3.1</span> <span>Kaby Lake</span> </div> </a> <ul id="toc-Kaby_Lake_2-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Notes" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Notes"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Notes</span> </div> </a> <ul id="toc-Notes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Références" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Références"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Références</span> </div> </a> <ul id="toc-Références-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Sommaire" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table des matières" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Basculer la table des matières" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Basculer la table des matières</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">Intel Core i3</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Aller à un article dans une autre langue. Disponible en 20 langues." > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-20" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">20 langues</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D8%A5%D9%86%D8%AA%D9%84_%D9%83%D9%88%D8%B1_%D8%A2%D9%8A_3" title="إنتل كور آي 3 – arabe" lang="ar" hreflang="ar" data-title="إنتل كور آي 3" data-language-autonym="العربية" data-language-local-name="arabe" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-de badge-Q70894304 mw-list-item" title=""><a href="https://de.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – allemand" lang="de" hreflang="de" data-title="Intel Core i3" data-language-autonym="Deutsch" data-language-local-name="allemand" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-en mw-list-item"><a href="https://en.wikipedia.org/wiki/Intel_Core#Core_i3" title="Intel Core – anglais" lang="en" hreflang="en" data-title="Intel Core" data-language-autonym="English" data-language-local-name="anglais" class="interlanguage-link-target"><span>English</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Intel_Core_i3_(Nehalem)" title="Intel Core i3 (Nehalem) – espagnol" lang="es" hreflang="es" data-title="Intel Core i3 (Nehalem)" data-language-autonym="Español" data-language-local-name="espagnol" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/Core_i3" title="Core i3 – estonien" lang="et" hreflang="et" data-title="Core i3" data-language-autonym="Eesti" data-language-local-name="estonien" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-eu mw-list-item"><a href="https://eu.wikipedia.org/wiki/Intel_Core_i3_(Nehalem)" title="Intel Core i3 (Nehalem) – basque" lang="eu" hreflang="eu" data-title="Intel Core i3 (Nehalem)" data-language-autonym="Euskara" data-language-local-name="basque" class="interlanguage-link-target"><span>Euskara</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – finnois" lang="fi" hreflang="fi" data-title="Intel Core i3" data-language-autonym="Suomi" data-language-local-name="finnois" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Core_i3" title="Core i3 – italien" lang="it" hreflang="it" data-title="Core i3" data-language-autonym="Italiano" data-language-local-name="italien" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – japonais" lang="ja" hreflang="ja" data-title="Intel Core i3" data-language-autonym="日本語" data-language-local-name="japonais" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EC%9D%B8%ED%85%94_%EC%BD%94%EC%96%B4_i3" title="인텔 코어 i3 – coréen" lang="ko" hreflang="ko" data-title="인텔 코어 i3" data-language-autonym="한국어" data-language-local-name="coréen" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – néerlandais" lang="nl" hreflang="nl" data-title="Intel Core i3" data-language-autonym="Nederlands" data-language-local-name="néerlandais" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-oc mw-list-item"><a href="https://oc.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – occitan" lang="oc" hreflang="oc" data-title="Intel Core i3" data-language-autonym="Occitan" data-language-local-name="occitan" class="interlanguage-link-target"><span>Occitan</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – polonais" lang="pl" hreflang="pl" data-title="Intel Core i3" data-language-autonym="Polski" data-language-local-name="polonais" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – portugais" lang="pt" hreflang="pt" data-title="Intel Core i3" data-language-autonym="Português" data-language-local-name="portugais" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Core_i3" title="Core i3 – russe" lang="ru" hreflang="ru" data-title="Core i3" data-language-autonym="Русский" data-language-local-name="russe" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – suédois" lang="sv" hreflang="sv" data-title="Intel Core i3" data-language-autonym="Svenska" data-language-local-name="suédois" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-tr mw-list-item"><a href="https://tr.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – turc" lang="tr" hreflang="tr" data-title="Intel Core i3" data-language-autonym="Türkçe" data-language-local-name="turc" class="interlanguage-link-target"><span>Türkçe</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – ukrainien" lang="uk" hreflang="uk" data-title="Intel Core i3" data-language-autonym="Українська" data-language-local-name="ukrainien" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/Intel_Core_i3" title="Intel Core i3 – chinois" lang="zh" hreflang="zh" data-title="Intel Core i3" data-language-autonym="中文" data-language-local-name="chinois" class="interlanguage-link-target"><span>中文</span></a></li><li class="interlanguage-link interwiki-zh-yue mw-list-item"><a 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class="nomobile"> Vous pouvez partager vos connaissances en l’améliorant (<b><a href="/wiki/Aide:Comment_modifier_une_page" title="Aide:Comment modifier une page">comment ?</a></b>) selon les recommandations des <a href="/wiki/Projet:Accueil" title="Projet:Accueil">projets correspondants</a>.</div> </div></div> <figure class="mw-halign-right" typeof="mw:File"><a href="/wiki/Fichier:Intel_inside_core_i3.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/fr/thumb/7/7d/Intel_inside_core_i3.png/150px-Intel_inside_core_i3.png" decoding="async" width="150" height="150" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/fr/7/7d/Intel_inside_core_i3.png 1.5x" data-file-width="225" data-file-height="225" /></a><figcaption></figcaption></figure> <figure typeof="mw:File/Thumb"><a href="/wiki/Fichier:Intel_Core_i3-380M_SLBZX.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/9/94/Intel_Core_i3-380M_SLBZX.jpg/290px-Intel_Core_i3-380M_SLBZX.jpg" decoding="async" width="290" height="218" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/9/94/Intel_Core_i3-380M_SLBZX.jpg/435px-Intel_Core_i3-380M_SLBZX.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/9/94/Intel_Core_i3-380M_SLBZX.jpg/580px-Intel_Core_i3-380M_SLBZX.jpg 2x" data-file-width="2048" data-file-height="1536" /></a><figcaption>Intel Core i3-380M pour ordinateur portable</figcaption></figure> <p>La marque <b>Core i3</b> d'<a href="/wiki/Intel" title="Intel">Intel</a> est utilisée pour ses <a href="/wiki/Microprocesseur" title="Microprocesseur">microprocesseurs</a> de milieu de gamme depuis <a href="/wiki/2010_en_informatique" title="2010 en informatique">2010</a>. Les gammes supérieures sont (dans l'ordre croissant) <a href="/wiki/Intel_Core_i5" title="Intel Core i5">Core i5</a>, <a href="/wiki/Intel_Core_i7" title="Intel Core i7">Core i7</a> et <a href="/wiki/Intel_Core_i9" title="Intel Core i9">Core i9</a> (et <a href="/wiki/Xeon" title="Xeon">Xeon</a> pour serveurs et <a href="/wiki/Station_de_travail" title="Station de travail">station de travail</a>), et les gammes inférieures sont (dans l'ordre décroissant) <a href="/wiki/Pentium_(marque)" title="Pentium (marque)">Pentium</a> et <a href="/wiki/Celeron" title="Celeron">Celeron</a> (et <a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> pour une utilisation généralement <a href="/wiki/Ultra-Mobile_PC" class="mw-redirect" title="Ultra-Mobile PC">ultra-mobile</a>). </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Processeurs_Intel_Core_I3">Processeurs Intel Core I3</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=1" title="Modifier la section : Processeurs Intel Core I3" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=1" title="Modifier le code source de la section : Processeurs Intel Core I3"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Gamme_pour_PC_de_bureau">Gamme pour PC de bureau</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=2" title="Modifier la section : Gamme pour PC de bureau" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=2" title="Modifier le code source de la section : Gamme pour PC de bureau"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id="Clarkdale">Clarkdale</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=3" title="Modifier la section : Clarkdale" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=3" title="Modifier le code source de la section : Clarkdale"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Articles détaillés : <a href="/wiki/Clarkdale_(microprocesseur)" title="Clarkdale (microprocesseur)">Clarkdale (microprocesseur)</a> et <a href="/wiki/LGA_1156" title="LGA 1156">LGA 1156</a>.</div></div> <p>Les processeurs Core i3 Clarkdale se connectent sur un <a href="/wiki/Socket_(processeur)" title="Socket (processeur)">socket</a> <a href="/wiki/LGA_1156" title="LGA 1156">LGA 1156</a>. </p> <table class="wikitable centre"> <tbody><tr> <th rowspan="2">Modèle</th> <th rowspan="2">Cœurs</th> <th rowspan="2">Threads</th> <th colspan="3">Fréquence</th> <th colspan="3" style="text-align:center;">Cache</th> <th rowspan="2">Mult.</th> <th rowspan="2">Tension</th> <th rowspan="2">Révision</th> <th rowspan="2" width="35"><a href="/wiki/Enveloppe_thermique" title="Enveloppe thermique">TDP</a></th> <th rowspan="2">Bus</th> <th rowspan="2">Socket</th> <th rowspan="2">Référence</th> <th colspan="3" style="text-align:center;">Commercialisation </th></tr> <tr> <th>Cœurs</th> <th>Turbo</th> <th>IGP</th> <th width="50">L1</th> <th width="50">L2</th> <th width="50">L3</th> <th>Début</th> <th>Fin </th></tr> <tr align="center"> <td align="left" colspan="18" style="background:#127cc1;color: white"><b>Core i3 500</b> </td></tr> <tr align="center"> <td align="center">560</td> <td>2</td> <td>4</td> <td>3,33 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>733 MHz</td> <td>2 × 64 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>2 × 256 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>4 <abbr class="abbr" title="million">Mio</abbr></td> <td>×25</td> <td>0.65 - 1.40 V</td> <td>K0 (SLBY2)</td> <td>73 W</td> <td rowspan="4">DMI + FDI + 2×DDR3 + 16×PCI-express 2.0</td> <td>LGA 1156</td> <td><small>CM80616003177AH<br />BX80616I3560</small></td> <td>T3 2010</td> <td> </td></tr> <tr align="center"> <td align="center">550</td> <td>2</td> <td>4</td> <td>3,20 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>733 MHz</td> <td>2 × 64 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>2 × 256 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>4 <abbr class="abbr" title="million">Mio</abbr></td> <td>×24</td> <td>0.65 - 1.40 V</td> <td>K0 (SLBUD)</td> <td>73 W</td> <td>LGA 1156</td> <td><small>CM80616003174AJ<br />BX80616I3550</small></td> <td>T2 2010</td> <td> </td></tr> <tr align="center"> <td align="center">540</td> <td>2</td> <td>4</td> <td>3,06 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>733 MHz</td> <td>2 × 64 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>2 × 256 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>4 <abbr class="abbr" title="million">Mio</abbr></td> <td>×23</td> <td>0.65 - 1.40 V</td> <td>C2 - K0<sup id="cite_ref-THFR_1_1-0" class="reference"><a href="#cite_note-THFR_1-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><br />(SLBMQ - SLBTD)</td> <td>73 W</td> <td>LGA 1156</td> <td><small>CM80616003060AE<br />BX80616I3540</small></td> <td><time class="nowrap" datetime="2010-01-05" data-sort-value="2010-01-05">5 janvier 2010</time></td> <td> </td></tr> <tr align="center"> <td align="center">530</td> <td>2</td> <td>4</td> <td>2,93 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>733 MHz</td> <td>2 × 64 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>2 × 256 <abbr class="abbr" title="kibioctet">Kio</abbr></td> <td>4 <abbr class="abbr" title="million">Mio</abbr></td> <td>×22</td> <td>0.65 - 1.40 V</td> <td>C2 - K0<sup id="cite_ref-THFR_1_1-1" class="reference"><a href="#cite_note-THFR_1-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><br />(SLBLR - SLBX7)</td> <td>73 W</td> <td>LGA 1156</td> <td><small>CM80616003180AG<br />BX80616I3530</small></td> <td><time class="nowrap" datetime="2010-01-05" data-sort-value="2010-01-05">5 janvier 2010</time></td> <td><time class="nowrap" datetime="2011-10" data-sort-value="2011-10">octobre 2011</time><sup id="cite_ref-THFR_2_2-0" class="reference"><a href="#cite_note-THFR_2-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> </td></tr> </tbody></table> <div class="mw-heading mw-heading4"><h4 id="Sandy_Bridge">Sandy Bridge</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=4" title="Modifier la section : Sandy Bridge" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=4" title="Modifier le code source de la section : Sandy Bridge"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Sandy_Bridge#Famille_Sandy_Bridge" title="Sandy Bridge">Sandy Bridge#Famille Sandy Bridge</a>.</div></div> <p>Les processeurs Core i3 <a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a> se connectent sur un socket <a href="/wiki/LGA_1155" title="LGA 1155">LGA 1155</a>. </p> <table class="wikitable centre"> <tbody><tr> <th rowspan="2">Modèle</th> <th rowspan="2" style="text-align:center;" width="35">Cœurs (threads)</th> <th colspan="3" width="35">Fréquence</th> <th colspan="3" style="text-align:center;">Cache</th> <th rowspan="2">Mult.</th> <th rowspan="2">Tension</th> <th rowspan="2" width="35">Révision (Sspec)</th> <th rowspan="2" width="35"><a href="/wiki/Enveloppe_thermique" title="Enveloppe thermique">TDP</a></th> <th rowspan="2" width="70">bus</th> <th rowspan="2" width="30">Socket</th> <th rowspan="2">Référence</th> <th colspan="3" style="text-align:center;">Commercialisation </th></tr> <tr> <th>Cœurs</th> <th>Turbo</th> <th width="60">IGP</th> <th width="45">L1 (ko)</th> <th width="45">L2 (ko)</th> <th width="40">L3 (Mo)</th> <th>Début</th> <th>Fin </th></tr> <tr align="center"> <td align="left" colspan="18" style="background:#127cc1;color: white"><b>Core i3 2100T</b> </td></tr> <tr align="center"> <td align="left">2100T</td> <td>2 (4)</td> <td>2,5 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>650 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×25</td> <td></td> <td>Q0 (SR05Z)</td> <td>35 W</td> <td rowspan="2">2×DDR3 + DMI + FDI + 16×PCI-express 2.0</td> <td><a href="/wiki/LGA_1155" title="LGA 1155">LGA 1155</a></td> <td><small>CM8062301045908<br />BX80623I32100T</small></td> <td>T1 2011</td> <td> </td></tr> <tr align="center"> <td align="left">2120T</td> <td>2 (4)</td> <td>2,6 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>650 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×26</td> <td></td> <td>Q0 (SR060)</td> <td>35 W</td> <td>LGA 1155</td> <td><small>CM8062301046008<br />BX80623I32120T</small></td> <td><time class="nowrap" datetime="2011-09" data-sort-value="2011-09">septembre 2011</time><sup id="cite_ref-THFR_4_3-0" class="reference"><a href="#cite_note-THFR_4-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup></td> <td>23 aout 2013<sup id="cite_ref-THFR06022013_4-0" class="reference"><a href="#cite_note-THFR06022013-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr align="center"> <td align="left" colspan="18" style="background:#127cc1;color: white"><b>Core i3 2100</b> </td></tr> <tr align="center"> <td align="left">2100</td> <td>2 (4)</td> <td>3,1 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>850 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×31</td> <td></td> <td>Q0 (SR05C)</td> <td>65 W</td> <td rowspan="6">2×DDR3 + DMI + FDI + 16×PCI-express 2.0</td> <td>LGA 1155</td> <td><small>CM8062301061600<br />BX80623I32100</small></td> <td><time class="nowrap" datetime="2011-02-20" data-sort-value="2011-02-20">20 février 2011</time></td> <td>23 aout 2013<sup id="cite_ref-THFR06022013_4-1" class="reference"><a href="#cite_note-THFR06022013-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr align="center"> <td align="left">2102<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>Note 1<span class="cite-bracket">]</span></a></sup></td> <td>2 (4)</td> <td>3,1 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>850 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×31</td> <td></td> <td>Q0 (SR05D)</td> <td>65 W</td> <td>LGA 1155</td> <td><small>CM8062301061700<br />BX80623I32102</small></td> <td>T2 2011</td> <td>23 aout 2013<sup id="cite_ref-THFR06022013_4-2" class="reference"><a href="#cite_note-THFR06022013-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr align="center"> <td align="left">2105<sup id="cite_ref-HD3000_6-0" class="reference"><a href="#cite_note-HD3000-6"><span class="cite-bracket">[</span>Note 2<span class="cite-bracket">]</span></a></sup></td> <td>2 (4)</td> <td>3,1 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>850 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×31</td> <td></td> <td>J1 (SR0BA)</td> <td>65 W</td> <td>LGA 1155</td> <td><small>CM8062301090600<br />BX80623I32105</small></td> <td><time class="nowrap" datetime="2011-05" data-sort-value="2011-05">mai 2011</time><sup id="cite_ref-THFR_3_7-0" class="reference"><a href="#cite_note-THFR_3-7"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup></td> <td> </td></tr> <tr align="center"> <td align="left">2120</td> <td>2 (4)</td> <td>3,3 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>850 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×33</td> <td></td> <td>Q0 (SR05Y)</td> <td>65 W</td> <td>LGA 1155</td> <td><small>CM8062301044204<br />BX80623I32120</small></td> <td>T1 2011</td> <td>23 août 2013<sup id="cite_ref-THFR06022013_4-3" class="reference"><a href="#cite_note-THFR06022013-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr align="center"> <td align="left">2125<sup id="cite_ref-HD3000_6-1" class="reference"><a href="#cite_note-HD3000-6"><span class="cite-bracket">[</span>Note 2<span class="cite-bracket">]</span></a></sup></td> <td>2 (4)</td> <td>3,3 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>850 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×33</td> <td></td> <td>J1 (SR0AY)</td> <td>65 W</td> <td>LGA 1155</td> <td><small>CM8062301090500<br />BX80623I32125</small></td> <td><time class="nowrap" datetime="2011-09" data-sort-value="2011-09">septembre 2011</time><sup id="cite_ref-THFR_4_3-1" class="reference"><a href="#cite_note-THFR_4-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup></td> <td>23 aout 2013<sup id="cite_ref-THFR06022013_4-4" class="reference"><a href="#cite_note-THFR06022013-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr> <tr align="center"> <td align="left">2130</td> <td>2 (4)</td> <td>3,4 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>-</td> <td>850 MHz<br />(1,1 GHz)</td> <td>2 × 64</td> <td>2 × 256</td> <td>3</td> <td>×34</td> <td></td> <td>Q0 (SR05W)</td> <td>65 W</td> <td>LGA 1155</td> <td><small>CM8062301043904<br />BX80623I32130</small></td> <td><time class="nowrap" datetime="2011-09" data-sort-value="2011-09">septembre 2011</time><sup id="cite_ref-THFR_4_3-2" class="reference"><a href="#cite_note-THFR_4-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup></td> <td>23 aout 2013<sup id="cite_ref-THFR06022013_4-5" class="reference"><a href="#cite_note-THFR06022013-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id="Ivy_Bridge">Ivy Bridge</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=5" title="Modifier la section : Ivy Bridge" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=5" title="Modifier le code source de la section : Ivy Bridge"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Sandy_Bridge#Famille_Ivy_Bridge" title="Sandy Bridge">Sandy Bridge#Famille Ivy Bridge</a>.</div></div> <p>Sorti en 2012. </p> <div class="mw-heading mw-heading4"><h4 id="Haswell">Haswell</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=6" title="Modifier la section : Haswell" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=6" title="Modifier le code source de la section : Haswell"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell (microarchitecture)</a>.</div></div> <p>Sorti en 2013. </p> <div class="mw-heading mw-heading4"><h4 id="Skylake">Skylake</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=7" title="Modifier la section : Skylake" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=7" title="Modifier le code source de la section : Skylake"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Skylake" title="Skylake">Skylake</a>.</div></div> <p>Sorti en 2015. </p> <div class="mw-heading mw-heading4"><h4 id="Kaby_Lake">Kaby Lake</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=8" title="Modifier la section : Kaby Lake" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=8" title="Modifier le code source de la section : Kaby Lake"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Kaby_Lake" title="Kaby Lake">Kaby Lake</a>.</div></div> <p>Sorti en <time class="nowrap" datetime="2017-01" data-sort-value="2017-01">janvier 2017</time>. </p> <div class="mw-heading mw-heading3"><h3 id="La_gamme_pour_PC_portables">La gamme pour PC portables</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=9" title="Modifier la section : La gamme pour PC portables" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=9" title="Modifier le code source de la section : La gamme pour PC portables"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id="Arrandale">Arrandale</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=10" title="Modifier la section : Arrandale" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=10" title="Modifier le code source de la section : Arrandale"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Arrandale" title="Arrandale">Arrandale</a>.</div></div> <p>Les processeurs Core i3 <a href="/wiki/Arrandale" title="Arrandale">Arrandale</a> se connectent sur un socket BGA1288 ou PGA988. </p> <table class="wikitable centre"> <tbody><tr> <th rowspan="2">Modèle</th> <th rowspan="2">Cœurs</th> <th rowspan="2">Threads</th> <th colspan="3">Fréquence</th> <th colspan="3" style="text-align:center;">Cache</th> <th rowspan="2">Mult.</th> <th rowspan="2">Tension</th> <th rowspan="2">Révision</th> <th rowspan="2"><a href="/wiki/Enveloppe_thermique" title="Enveloppe thermique">TDP</a></th> <th rowspan="2">Bus</th> <th rowspan="2">Socket</th> <th rowspan="2">Référence</th> <th colspan="3" style="text-align:center;">Commercialisation </th></tr> <tr> <th>Cœurs</th> <th>Turbo</th> <th>IGP</th> <th width="70">L1</th> <th width="70">L2</th> <th width="70">L3</th> <th>Début</th> <th>Fin </th></tr> <tr align="center"> <td align="left" colspan="18" style="background:#127cc1;color: white"><b>Core i3 300M</b> </td></tr> <tr align="center"> <td align="left">380M</td> <td>2</td> <td>4</td> <td>2,53 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>500 MHz</td> <td>2 × 64 Kio</td> <td>2 × 256 Kio</td> <td>3 <abbr class="abbr" title="million">Mio</abbr></td> <td>19</td> <td></td> <td></td> <td>35 W</td> <td rowspan="4"><a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">DMI</a> 4,8 GT/s + FDI + 2×DDR3 + 16×PCI-express 2.0</td> <td>PGA988</td> <td><small></small></td> <td></td> <td> </td></tr> <tr align="center"> <td align="left">370M</td> <td>2</td> <td>4</td> <td>2,40 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>500 MHz</td> <td>2 × 64 Kio</td> <td>2 × 256 Kio</td> <td>3 <abbr class="abbr" title="million">Mio</abbr></td> <td>18</td> <td></td> <td></td> <td>35 W</td> <td>PGA988</td> <td><small></small></td> <td><abbr class="abbr" title="Troisième">3<sup>e</sup></abbr> trimestre 2010</td> <td> </td></tr> <tr align="center"> <td align="left">350M</td> <td>2</td> <td>4</td> <td>2,26 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>500 MHz</td> <td>2 × 64 Kio</td> <td>2 × 256 Kio</td> <td>3 <abbr class="abbr" title="million">Mio</abbr></td> <td>17</td> <td></td> <td></td> <td>35 W</td> <td>BGA1288 PGA988</td> <td><small></small></td> <td><time class="nowrap" datetime="2010-01-07" data-sort-value="2010-01-07">7 janvier 2010</time></td> <td> </td></tr> <tr align="center"> <td align="left">330M</td> <td>2</td> <td>4</td> <td>2,13 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>500 MHz</td> <td>2 × 64 Kio</td> <td>2 × 256 Kio</td> <td>3 <abbr class="abbr" title="million">Mio</abbr></td> <td>16</td> <td></td> <td></td> <td>35 W</td> <td>BGA1288 PGA988</td> <td><small></small></td> <td><time class="nowrap" datetime="2010-01-07" data-sort-value="2010-01-07">7 janvier 2010</time></td> <td> </td></tr> <tr align="center"> <td align="left" colspan="18" style="background:#127cc1;color: white"><b>Core i3 300UM</b> </td></tr> <tr align="center"> <td align="left">330UM</td> <td>2</td> <td>4</td> <td>1,20 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>166 MHz</td> <td>2 × 64 Kio</td> <td>2 × 256 Kio</td> <td>3 <abbr class="abbr" title="million">Mio</abbr></td> <td>9</td> <td></td> <td></td> <td>18 W</td> <td>DMI 2,5 GT/s</td> <td>BGA1288</td> <td><small></small></td> <td><time class="nowrap" datetime="2010-05-25" data-sort-value="2010-05-25">25 mai 2010</time></td> <td> </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id="Sandy_Bridge_2">Sandy Bridge</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=11" title="Modifier la section : Sandy Bridge" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=11" title="Modifier le code source de la section : Sandy Bridge"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a>.</div></div> <table class="wikitable centre"> <tbody><tr> <th rowspan="2">Modèle</th> <th rowspan="2">Cœurs</th> <th rowspan="2">Threads</th> <th colspan="3">Fréquence</th> <th colspan="3" style="text-align:center;">Cache</th> <th rowspan="2">Mult.</th> <th rowspan="2">Tension</th> <th rowspan="2">Révision</th> <th rowspan="2"><a href="/wiki/Enveloppe_thermique" title="Enveloppe thermique">TDP</a></th> <th rowspan="2">Bus</th> <th rowspan="2">Socket</th> <th rowspan="2">Référence</th> <th colspan="3" style="text-align:center;">Commercialisation </th></tr> <tr> <th>Cœurs</th> <th>Turbo</th> <th>IGP</th> <th width="70">L1</th> <th width="70">L2</th> <th width="70">L3</th> <th>Début</th> <th>Fin </th></tr> <tr align="center"> <td align="left" colspan="18" style="background:#127cc1;color: white"><b>Core i3 2300M</b> </td></tr> <tr align="center"> <td align="left">2310M</td> <td>2</td> <td>4</td> <td>2,1 <abbr class="abbr" title="gigahertz">GHz</abbr></td> <td>non</td> <td>650 MHz</td> <td>2 × 64 Kio</td> <td>2 × 256 Kio</td> <td>3 <abbr class="abbr" title="million">Mio</abbr></td> <td>21</td> <td></td> <td></td> <td>35 W</td> <td></td> <td></td> <td><small></small></td> <td></td> <td> </td></tr></tbody></table> <div class="mw-heading mw-heading4"><h4 id="Haswell_2">Haswell</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=12" title="Modifier la section : Haswell" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=12" title="Modifier le code source de la section : Haswell"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell (microarchitecture)</a>.</div></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone"><span class="mw-valign-text-top noviewer" typeof="mw:File"><a href="/wiki/Fichier:Logo_travaux_orange-simple.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d5/Logo_travaux_orange-simple.svg/20px-Logo_travaux_orange-simple.svg.png" decoding="async" width="15" height="17" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/d5/Logo_travaux_orange-simple.svg/40px-Logo_travaux_orange-simple.svg.png 1.5x" data-file-width="190" data-file-height="219" /></a></span></div><div class="bandeau-cell">Cette section est vide, insuffisamment détaillée ou incomplète. <a href="/wiki/Sp%C3%A9cial:EditPage/Intel_Core_i3" title="Spécial:EditPage/Intel Core i3">Votre aide</a> est la bienvenue ! <a href="/wiki/Aide:Comment_modifier_une_page" title="Aide:Comment modifier une page">Comment faire ?</a></div></div> <div class="mw-heading mw-heading3"><h3 id="Sky_Lake">Sky Lake</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=13" title="Modifier la section : Sky Lake" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=13" title="Modifier le code source de la section : Sky Lake"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Skylake" title="Skylake">Skylake</a>.</div></div> <p><a href="/wiki/Skylake" title="Skylake">Skylake</a> est la micro-architecture de processeurs <a href="/wiki/X86" title="X86">x86</a> d'Intel qui succède à la micro-architecture Haswell à partir d'<time class="nowrap" datetime="2015-08" data-sort-value="2015-08">août 2015</time>. Avec cette nouvelle micro-architecture, Intel abandonne sa traditionnelle <a href="/wiki/Intel#Tic-tac" title="Intel">stratégie tic-tac</a>. </p> <div class="mw-heading mw-heading4"><h4 id="Kaby_Lake_2">Kaby Lake</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=14" title="Modifier la section : Kaby Lake" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=14" title="Modifier le code source de la section : Kaby Lake"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Kaby_Lake" title="Kaby Lake">Kaby Lake</a>.</div></div> <p><a href="/wiki/Kaby_Lake" title="Kaby Lake">Kaby Lake</a> est une légère amélioration de la <a href="/wiki/Microarchitecture" title="Microarchitecture">microarchitecture</a> Skylake. </p><p><b>Coffee Lake</b> </p> <div class="bandeau-container bandeau-section metadata bandeau-niveau-information"><div class="bandeau-cell bandeau-icone-css loupe">Article détaillé : <a href="/wiki/Coffee_Lake" title="Coffee Lake">Coffee Lake</a>.</div></div> <p><a href="/wiki/Coffee_Lake" title="Coffee Lake">Coffee Lake</a> est le nom de code d'Intel pour le troisième raffinement du procédé 14 <abbr class="abbr" title="nanomètre">nm</abbr> après Broadwell, Skylake et Kaby Lake. Les graphiques intégrés sur les puces Coffee Lake permettent la prise en charge de la connectivité DP 1.2 vers <a href="/wiki/High-Definition_Multimedia_Interface" title="High-Definition Multimedia Interface">HDMI</a> 2.0 et <a href="/wiki/High-bandwidth_Digital_Content_Protection" title="High-bandwidth Digital Content Protection">HDCP</a> 2.2. Coffee Lake supporte nativement la mémoire <a href="/wiki/DDR4_SDRAM" title="DDR4 SDRAM">DDR4</a>-2666 MHz en mode double canal. </p> <div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=15" title="Modifier la section : Notes" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=15" title="Modifier le code source de la section : Notes"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-5"><span class="mw-cite-backlink"><a href="#cite_ref-5">↑</a> </span><span class="reference-text">Peut être mis à jour vers un Core i3-2153 (3,6 GHz) en achetant une <i>mise à jour logicielle</i> chez Intel</span> </li> <li id="cite_note-HD3000-6"><span class="mw-cite-backlink noprint">↑ <sup><a href="#cite_ref-HD3000_6-0">a</a> et <a href="#cite_ref-HD3000_6-1">b</a></sup> </span><span class="reference-text">Embarquent un IGP Intel HD Graphics 3000 à la place de l'HD Graphics 2000 des autres Core i3 21xx</span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="Références"><span id="R.C3.A9f.C3.A9rences"></span>Références</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Core_i3&veaction=edit&section=16" title="Modifier la section : Références" class="mw-editsection-visualeditor"><span>modifier</span></a><span class="mw-editsection-divider"> | </span><a href="/w/index.php?title=Intel_Core_i3&action=edit&section=16" title="Modifier le code source de la section : Références"><span>modifier le code</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-THFR_1-1"><span class="mw-cite-backlink noprint">↑ <sup><a href="#cite_ref-THFR_1_1-0">a</a> et <a href="#cite_ref-THFR_1_1-1">b</a></sup> </span><span class="reference-text"><a rel="nofollow" class="external text" href="http://www.presence-pc.com/actualite/Core-stepping-K0-40704/">Nouveau stepping pour des Core i3 et i5</a>, Tom's Hardware (20 septembre 2010).</span> </li> <li id="cite_note-THFR_2-2"><span class="mw-cite-backlink"><a href="#cite_ref-THFR_2_2-0">↑</a> </span><span class="reference-text"><a rel="nofollow" class="external text" href="http://www.presence-pc.com/actualite/EoL-Core-i5-661-i3-530-45220/">Ménage d’automne au catalogue CPU d’Intel</a>, Tom's Hardware (6 octobre 2011).</span> </li> <li id="cite_note-THFR_4-3"><span class="mw-cite-backlink noprint">↑ <sup><a href="#cite_ref-THFR_4_3-0">a</a> <a href="#cite_ref-THFR_4_3-1">b</a> et <a href="#cite_ref-THFR_4_3-2">c</a></sup> </span><span class="reference-text"><span class="ouvrage" id="2011">« <a rel="nofollow" class="external text" href="http://www.presence-pc.com/actualite/intel-cpu-44862/"><cite style="font-style:normal;">Le plein de nouveautés chez Intel</cite></a> », sur <span class="italique">Tom's Hardware</span>, <time class="nowrap" datetime="2011-09-05" data-sort-value="2011-09-05">5 septembre 2011</time></span>.</span> </li> <li id="cite_note-THFR06022013-4"><span class="mw-cite-backlink noprint">↑ <sup><a href="#cite_ref-THFR06022013_4-0">a</a> <a href="#cite_ref-THFR06022013_4-1">b</a> <a href="#cite_ref-THFR06022013_4-2">c</a> <a href="#cite_ref-THFR06022013_4-3">d</a> <a href="#cite_ref-THFR06022013_4-4">e</a> et <a href="#cite_ref-THFR06022013_4-5">f</a></sup> </span><span class="reference-text"><span class="ouvrage" id="Guerrini"><span class="ouvrage" id="Yannick_Guerrini">Yannick Guerrini, « <a rel="nofollow" class="external text" href="http://www.tomshardware.fr/articles/cpu-processeur-celeron-core-pentium,1-36886.html"><cite style="font-style:normal;">Intel fait le ménage dans son catalogue CPU</cite></a> », sur <span class="italique">Tom's Hardware</span>, <time class="nowrap" datetime="2013-02-06" data-sort-value="2013-02-06">6 février 2013</time> <small style="line-height:1em;">(consulté le <time class="nowrap" datetime="2013-02-06" data-sort-value="2013-02-06">6 février 2013</time>)</small></span></span></span> </li> <li id="cite_note-THFR_3-7"><span class="mw-cite-backlink"><a href="#cite_ref-THFR_3_7-0">↑</a> </span><span class="reference-text"><a rel="nofollow" class="external text" href="http://www.presence-pc.com/actualite/Sandy-Bridge-Pentium-43768/">Les Pentium au Sandy Bridge sont enfin là</a>, Tom's Hardware (23 mai 2011).</span> </li> </ol></div> <div class="navbox-container" style="clear:both;"> <table class="navbox collapsible noprint autocollapse" style="background:#fdfdfd;"> <tbody><tr><th class="navbox-title" colspan="2" style=""><div style="float:left; width:6em; text-align:left"><div class="noprint plainlinks nowrap tnavbar" style="padding:0; font-size:xx-small; color:var(--color-emphasized, #000000);"><a href="/wiki/Mod%C3%A8le:Palette_Microprocesseurs_Intel" title="Modèle:Palette Microprocesseurs Intel"><abbr class="abbr" title="Voir ce modèle.">v</abbr></a> · <a class="external text" href="https://fr.wikipedia.org/w/index.php?title=Mod%C3%A8le:Palette_Microprocesseurs_Intel&action=edit"><abbr class="abbr" title="Modifier ce modèle. Merci de prévisualiser avant de sauvegarder.">m</abbr></a></div></div><div style="font-size:110%"><a href="/wiki/Liste_des_microprocesseurs_Intel" title="Liste des microprocesseurs Intel">Processeurs</a> <a href="/wiki/Intel" title="Intel">Intel</a></div></th> </tr> <tr> <th class="navbox-group" style="width:10em; text-align:right;">Abandonnés</th> <td class="navbox-list" style=""><table class="navbox-subgroup" style=""> <tbody><tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;">4 bits</th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Intel_4004" title="Intel 4004">4004</a></li> <li><a href="/wiki/Intel_4040" title="Intel 4040">4040</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;">Pré-x86 (<a href="/wiki/Architecture_8_bits" title="Architecture 8 bits">8-bits</a>)</th> <td class="navbox-list navbox-even" style="text-align:left;;background:#f7f7f7;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Intel_8008" title="Intel 8008">8008</a></li> <li><a href="/wiki/Intel_8080" title="Intel 8080">8080</a></li> <li><a href="/wiki/Intel_8085" title="Intel 8085">8085</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;"><a href="/wiki/X86" title="X86">x86</a>-16 (<a href="/wiki/Architecture_16_bits" title="Architecture 16 bits">16-bits</a>)</th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Intel_8086" title="Intel 8086">8086</a></li> <li><a href="/wiki/Intel_8088" title="Intel 8088">8088</a></li> <li><a href="/wiki/Intel_80186" title="Intel 80186">80186</a></li> <li><a href="/wiki/Intel_80188" title="Intel 80188">80188</a></li> <li><a href="/wiki/Intel_80286" title="Intel 80286">80286</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;"><a href="/wiki/X87" title="X87">x87</a> (<a href="/wiki/Unit%C3%A9_de_calcul_en_virgule_flottante" title="Unité de calcul en virgule flottante">FPU</a> externes)</th> <td class="navbox-list navbox-even" style="text-align:left;;background:#f7f7f7;"><div class="liste-horizontale"> <ul><li>Bus 8/16 bits : <a href="/wiki/Intel_8087" title="Intel 8087">8087</a></li> <li>Bus 16 bits : <a href="/wiki/Intel_80287" title="Intel 80287">80287</a></li> <li>Bus 32 bits : <a href="/wiki/Intel_80387" title="Intel 80387">80387</a>, <a href="/wiki/Intel_80487" title="Intel 80487">80487</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;">x86-32/<a href="/wiki/X86" title="X86">IA-32</a> (<a href="/wiki/Architecture_32_bits" title="Architecture 32 bits">32-bit</a>)</th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Intel_80386" title="Intel 80386">80386</a> <ul><li><a href="/wiki/Intel_80386" title="Intel 80386">SX</a></li> <li><a href="/wiki/Intel_80376" title="Intel 80376">376</a></li> <li><a href="/wiki/Intel_80386EX" title="Intel 80386EX">EX</a></li></ul></li> <li><a href="/wiki/Intel_80486" title="Intel 80486">80486</a> <ul><li><a href="/wiki/Intel_80486DX" title="Intel 80486DX">DX</a></li> <li><a href="/wiki/Intel_80486SX" title="Intel 80486SX">SX</a></li> <li><a href="/wiki/Intel_80486" title="Intel 80486">DX2</a></li> <li><a href="/wiki/Intel_80486DX4" title="Intel 80486DX4">DX4</a></li> <li><a href="/wiki/Intel_80486SL" title="Intel 80486SL">SL</a></li> <li><a href="/w/index.php?title=RapidCAD&action=edit&redlink=1" class="new" title="RapidCAD (page inexistante)">RapidCAD</a> <a href="https://en.wikipedia.org/wiki/RapidCAD" class="extiw" title="en:RapidCAD"><span class="indicateur-langue" title="Article en anglais : « RapidCAD »">(en)</span></a></li> <li><a href="/w/index.php?title=Intel_80486_OverDrive&action=edit&redlink=1" class="new" title="Intel 80486 OverDrive (page inexistante)">80486 OverDrive</a> <a href="https://en.wikipedia.org/wiki/i486_OverDrive" class="extiw" title="en:i486 OverDrive"><span class="indicateur-langue" title="Article en anglais : « i486 OverDrive »">(en)</span></a></li></ul></li> <li><a href="/wiki/Pentium_(marque)" title="Pentium (marque)">Pentium</a> <ul><li><a href="/wiki/Intel_Pentium" title="Intel Pentium">Original</a></li> <li><a href="/w/index.php?title=Pentium_OverDrive&action=edit&redlink=1" class="new" title="Pentium OverDrive (page inexistante)">OverDrive</a> <a href="https://en.wikipedia.org/wiki/Pentium_OverDrive" class="extiw" title="en:Pentium OverDrive"><span class="indicateur-langue" title="Article en anglais : « Pentium OverDrive »">(en)</span></a></li> <li><a href="/wiki/Pentium_Pro" title="Pentium Pro">Pro</a></li> <li><a href="/wiki/Pentium_II" title="Pentium II">II</a></li> <li><a href="/w/index.php?title=Pentium_II_OverDrive&action=edit&redlink=1" class="new" title="Pentium II OverDrive (page inexistante)">II OverDrive</a></li> <li><a href="/wiki/Pentium_III" title="Pentium III">III</a></li> <li><a href="/wiki/Pentium_4" title="Pentium 4">4</a></li> <li><a href="/wiki/Pentium_4-M" title="Pentium 4-M">4-M</a></li> <li><a href="/wiki/Pentium_M" title="Pentium M">M</a></li> <li><a href="/wiki/Pentium_M#Celeron_M" title="Pentium M">Celeron M</a></li></ul></li> <li><a href="/wiki/Yonah" title="Yonah">Core Solo/Duo</a></li> <li><a href="/wiki/Celeron#Celeron_D" title="Celeron">Celeron D</a></li> <li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> <ul><li><a href="/wiki/Intel_Atom#Stealey" title="Intel Atom">A100/A110</a></li></ul></li> <li><a href="/w/index.php?title=EP80579&action=edit&redlink=1" class="new" title="EP80579 (page inexistante)">EP80579</a> <a href="https://en.wikipedia.org/wiki/Tolapai" class="extiw" title="en:Tolapai"><span class="indicateur-langue" title="Article en anglais : « Tolapai »">(en)</span></a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;"><span class="nowrap"><a href="/wiki/X64" title="X64">x86-64</a>/<a href="/wiki/Intel_64" title="Intel 64">EM64T</a> (<a href="/wiki/Processeur_64_bits" title="Processeur 64 bits">64-bit</a>)</span></th> <td class="navbox-list navbox-even" style="text-align:left;;background:#f7f7f7;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Pentium_4#Prescott_2M_(Extreme_Edition)" title="Pentium 4">Pentium 4</a></li> <li><a href="/wiki/Pentium_D" title="Pentium D">Pentium D</a></li> <li><a href="/wiki/Pentium_Extreme_Edition" title="Pentium Extreme Edition">Pentium Extreme Edition</a></li> <li><a href="/wiki/Celeron#Celeron_D" title="Celeron">Celeron D</a></li> <li><a href="/wiki/Intel_Core_2" title="Intel Core 2">Core 2</a></li> <li><a href="/wiki/Intel_Core_2_Extreme" title="Intel Core 2 Extreme">Core 2 Extreme</a></li> <li><a href="/wiki/Pentium_Dual-Core" title="Pentium Dual-Core">Pentium Dual-Core</a></li> <li><a href="/wiki/Xeon_Phi" title="Xeon Phi">Xeon Phi</a></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a></li> <li><a href="/wiki/Pentium_(marque)" title="Pentium (marque)">Pentium</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;"><a href="/wiki/Processeur_%C3%A0_jeu_d%27instructions_r%C3%A9duit" title="Processeur à jeu d'instructions réduit">RISC</a></th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Intel_i860" title="Intel i860">i860</a></li> <li><a href="/wiki/Intel_i960" title="Intel i960">i960</a></li> <li><a href="/wiki/StrongARM" title="StrongARM">StrongARM</a></li> <li><a href="/wiki/XScale" title="XScale">IOP et XScale</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;"><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a> (<a href="/wiki/IA-64" title="IA-64">IA-64</a>)</th> <td class="navbox-list navbox-even" style="text-align:left;;background:#f7f7f7;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Itanium" title="Itanium">Itanium</a></li> <li><a href="/wiki/Intel_Itanium_2" title="Intel Itanium 2">Itanium 2</a></li> <li><a href="/wiki/Montecito_(processeur)" title="Montecito (processeur)">Montecito</a></li> <li><a href="/wiki/Tukwila_(processeur)" title="Tukwila (processeur)">Itanium 3</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:120px; text-align:right; background:#e6e6ff;">Autres</th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Centrino" title="Centrino">Centrino</a></li></ul> </div></td> </tr> </tbody></table></td> </tr> <tr> <th class="navbox-group" style="width:10em; text-align:right;">Actuels</th> <td class="navbox-list navbox-even" style="background:#f7f7f7;"><table class="navbox-subgroup" style=""> <tbody><tr> <th class="navbox-group" style="width:50px; text-align:right; background:#e6e6ff;">x86-64</th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a></li> <li><a class="mw-selflink selflink">Core i3</a></li> <li><a href="/wiki/Intel_Core_i5" title="Intel Core i5">Core i5</a></li> <li><a href="/wiki/Intel_Core_i7" title="Intel Core i7">Core i7</a></li> <li><a href="/wiki/Intel_Core_i9" title="Intel Core i9">Core i9</a></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a></li> <li><a href="/wiki/Intel_Core_M" title="Intel Core M">Core M</a></li></ul> </div></td> </tr> </tbody></table></td> </tr> <tr> <th class="navbox-group" style="width:10em; text-align:right;"><a href="/wiki/Intel#Microprocesseurs_x86" title="Intel">Microarchitectures</a></th> <td class="navbox-list" style=""><table class="navbox-subgroup" style=""> <tbody><tr> <th class="navbox-group" style="width:50px; text-align:right; background:#e6e6ff;">x86-32</th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Intel_Pentium" title="Intel Pentium">P5</a></li> <li><a href="/wiki/Intel_P6" title="Intel P6">P6</a> <ul><li><a href="/wiki/Pentium_M" title="Pentium M">Pentium M</a></li> <li><a href="/wiki/Yonah" title="Yonah">Yonah</a></li></ul></li> <li><a href="/wiki/NetBurst" title="NetBurst">NetBurst</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:50px; text-align:right; background:#e6e6ff;"><a href="/wiki/X64" title="X64">x86-64</a></th> <td class="navbox-list navbox-even" style="text-align:left;;background:#f7f7f7;"><div class="liste-horizontale"> <ul><li><a href="/wiki/NetBurst" title="NetBurst">NetBurst</a></li> <li><a href="/wiki/Core_(microarchitecture)" title="Core (microarchitecture)">Core</a></li> <li><a href="/wiki/Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a></li> <li><a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a></li> <li><a href="/wiki/Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a></li> <li><a href="/wiki/Skylake" title="Skylake">Skylake</a> <ul><li><a href="/wiki/Kaby_Lake" title="Kaby Lake">Kaby Lake</a></li> <li><a href="/wiki/Coffee_Lake" title="Coffee Lake">Coffee Lake</a></li> <li><a href="/wiki/Whiskey_Lake" title="Whiskey Lake">Whiskey Lake</a></li> <li><a href="/wiki/Comet_Lake" title="Comet Lake">Comet Lake</a></li></ul></li> <li><a href="/wiki/Sunny_Cove" title="Sunny Cove">Sunny Cove</a> <ul><li><a href="/wiki/Ice_Lake" title="Ice Lake">Ice Lake</a></li></ul></li> <li><a href="/wiki/Willow_Cove" title="Willow Cove">Willow Cove</a> <ul><li><a href="/wiki/Tiger_Lake" title="Tiger Lake">Tiger Lake</a></li></ul></li> <li><a href="/w/index.php?title=CSunny_Cove&action=edit&redlink=1" class="new" title="CSunny Cove (page inexistante)">ypress Cove</a> <ul><li><a href="/wiki/Rocket_Lake" title="Rocket Lake">Rocket Lake</a></li></ul></li> <li><a href="/wiki/Golden_Cove" title="Golden Cove">Golden Cove</a> <ul><li><a href="/wiki/Alder_Lake" title="Alder Lake">Alder Lake</a></li></ul></li> <li><a href="/wiki/Golden_Cove#Raptor_Cove" title="Golden Cove">Raptor Cove</a> <ul><li><a href="/wiki/Raptor_Lake" title="Raptor Lake">Raptor Lake</a></li></ul></li> <li><a href="/wiki/Meteor_Lake" title="Meteor Lake">Meteor Lake</a></li> <li><a href="/wiki/Lunar_Lake" title="Lunar Lake">Lunar Lake</a></li></ul> </div></td> </tr> <tr> <th class="navbox-group" style="width:50px; text-align:right; background:#e6e6ff;">Faible consommation</th> <td class="navbox-list" style="text-align:left;;"><div class="liste-horizontale"> <ul><li><a href="/wiki/Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell</a> <ul><li><a href="/wiki/Bonnell_(microarchitecture)#Saltwell" title="Bonnell (microarchitecture)">Saltwell</a></li></ul></li> <li><a href="/wiki/Silvermont" title="Silvermont">Silvermont</a> <ul><li><a href="/wiki/Silvermont" title="Silvermont">Airmont</a></li></ul></li> <li><a href="/wiki/Goldmont" title="Goldmont">Goldmont</a> <ul><li><a href="/w/index.php?title=Goldmont_Plus&action=edit&redlink=1" class="new" title="Goldmont Plus (page inexistante)">Goldmont Plus</a> <a href="https://en.wikipedia.org/wiki/Goldmont_Plus" class="extiw" title="en:Goldmont Plus"><span class="indicateur-langue" title="Article en anglais : « Goldmont Plus »">(en)</span></a></li></ul></li> <li><a href="/w/index.php?title=Tremont_(microarchitecture)&action=edit&redlink=1" class="new" title="Tremont (microarchitecture) (page inexistante)">Tremont</a> <a href="https://en.wikipedia.org/wiki/Tremont_(microarchitecture)" class="extiw" title="en:Tremont (microarchitecture)"><span class="indicateur-langue" title="Article en anglais : « Tremont (microarchitecture) »">(en)</span></a></li> <li><a href="/w/index.php?title=Gracemont_(microarchitecture)&action=edit&redlink=1" class="new" title="Gracemont (microarchitecture) (page inexistante)">Gracemont</a> <a href="https://en.wikipedia.org/wiki/Gracemont_(microarchitecture)" class="extiw" title="en:Gracemont (microarchitecture)"><span class="indicateur-langue" title="Article en anglais : « Gracemont (microarchitecture) »">(en)</span></a></li></ul> </div></td> </tr> </tbody></table></td> </tr> <tr> <td class="navbox-banner" style="" colspan="2"><div class="liste-horizontale"> <ul><li><a href="/wiki/Socket_(processeur)" title="Socket (processeur)">Sockets</a></li> <li><a href="/wiki/Intel_I/O_Controller_Hub" title="Intel I/O Controller Hub">ICH</a></li> <li><a href="/wiki/Memory_Controller_Hub" title="Memory Controller Hub">MCH</a></li> <li><a href="/wiki/Platform_controller_hub" title="Platform controller hub">PCH</a></li> <li><a href="/wiki/Intel_microcode" title="Intel microcode">Intel microcode</a></li> <li>Listes <ul><li><a href="/wiki/Liste_de_chipsets_Intel" title="Liste de chipsets Intel">Chipsets</a></li> <li><a href="/wiki/Liste_des_microprocesseurs_Intel" title="Liste des microprocesseurs Intel">Microprocesseurs</a></li> <li><a href="/wiki/Liste_des_microprocesseurs_Intel_Celeron" title="Liste des microprocesseurs Intel Celeron">Celeron</a></li> <li><a href="/wiki/Liste_des_microprocesseurs_Intel_d%27architecture_Core" title="Liste des microprocesseurs Intel d'architecture Core">Core</a></li> <li><a href="/wiki/Liste_des_microprocesseurs_Intel_Xeon" title="Liste des microprocesseurs Intel Xeon">Xeon</a></li></ul></li></ul> </div></td></tr></tbody></table> </div> <ul id="bandeau-portail" class="bandeau-portail"><li><span class="bandeau-portail-element"><span class="bandeau-portail-icone"><span class="noviewer skin-invert-image" typeof="mw:File"><a href="/wiki/Portail:%C3%89lectricit%C3%A9_et_%C3%A9lectronique" title="Portail de l’électricité et de l’électronique"><img alt="icône décorative" src="//upload.wikimedia.org/wikipedia/commons/thumb/e/ea/Octicons-circuit-board.svg/40px-Octicons-circuit-board.svg.png" decoding="async" width="24" height="24" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/ea/Octicons-circuit-board.svg/60px-Octicons-circuit-board.svg.png 2x" data-file-width="1024" data-file-height="1024" /></a></span></span> <span class="bandeau-portail-texte"><a href="/wiki/Portail:%C3%89lectricit%C3%A9_et_%C3%A9lectronique" title="Portail:Électricité et électronique">Portail de l’électricité et de l’électronique</a></span> </span></li> <li><span class="bandeau-portail-element"><span class="bandeau-portail-icone"><span class="noviewer" typeof="mw:File"><a href="/wiki/Portail:Informatique" title="Portail de l’informatique"><img alt="icône décorative" src="//upload.wikimedia.org/wikipedia/commons/thumb/0/02/Circle-icons-computer.svg/24px-Circle-icons-computer.svg.png" decoding="async" width="24" height="24" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/0/02/Circle-icons-computer.svg/36px-Circle-icons-computer.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/0/02/Circle-icons-computer.svg/48px-Circle-icons-computer.svg.png 2x" data-file-width="512" data-file-height="512" /></a></span></span> <span class="bandeau-portail-texte"><a href="/wiki/Portail:Informatique" title="Portail:Informatique">Portail de l’informatique</a></span> </span></li> </ul>    </div><noscript><img src="https://auth.wikimedia.org/loginwiki/wiki/Special:CentralAutoLogin/start?useformat=desktop&type=1x1&usesul3=1" alt="" width="1" height="1" style="border: none; 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