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</div> </div> </div> </div> </div> </div> </nav> </div> </div> </div> <div class="vector-column-end"> <div class="vector-sticky-pinned-container"> <nav class="vector-page-tools-landmark" aria-label="Page tools"> <div id="vector-page-tools-pinned-container" class="vector-pinned-container"> </div> </nav> <nav class="vector-appearance-landmark" aria-label="Appearance"> <div id="vector-appearance-pinned-container" class="vector-pinned-container"> <div id="vector-appearance" class="vector-appearance vector-pinnable-element"> <div class="vector-pinnable-header vector-appearance-pinnable-header vector-pinnable-header-pinned" data-feature-name="appearance-pinned" data-pinnable-element-id="vector-appearance" data-pinned-container-id="vector-appearance-pinned-container" data-unpinned-container-id="vector-appearance-unpinned-container" > <div class="vector-pinnable-header-label">Appearance</div> <button class="vector-pinnable-header-toggle-button vector-pinnable-header-pin-button" data-event-name="pinnable-header.vector-appearance.pin">move to sidebar</button> <button class="vector-pinnable-header-toggle-button vector-pinnable-header-unpin-button" data-event-name="pinnable-header.vector-appearance.unpin">hide</button> </div> </div> </div> </nav> </div> </div> <div id="bodyContent" class="vector-body" aria-labelledby="firstHeading" data-mw-ve-target-container> <div class="vector-body-before-content"> <div class="mw-indicators"> </div> <div id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><p><b>Alchemy</b> is a family of ultra low power <a href="/wiki/Microprocessor#Embedded_applications" title="Microprocessor">embedded microprocessors</a> originally designed by Alchemy Semiconductor for communication and media devices. Alchemy processors are <a href="/wiki/System_on_a_chip" title="System on a chip">SoCs</a> integrating a CPU core, a memory controller, and a varying set of peripherals. All members of the family use the Au1 CPU core implementing the <a href="/wiki/MIPS_architecture#MIPS32/MIPS64" title="MIPS architecture">MIPS32</a> <a href="/wiki/Instruction_set" class="mw-redirect" title="Instruction set">instruction set</a> by <a href="/wiki/MIPS_Technologies" title="MIPS Technologies">MIPS Technologies</a>. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="History">History</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Alchemy_(processor)&action=edit&section=1" title="Edit section: History"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Alchemy Semiconductor was a <a href="/wiki/Fabless_manufacturing" title="Fabless manufacturing">fabless</a> <a href="/wiki/Semiconductor_industry" title="Semiconductor industry">semiconductor</a> company based in <a href="/wiki/Austin,_Texas" title="Austin, Texas">Austin, Texas</a>. Founded in 1999 with a seed investment by <a href="/wiki/Cadence_Design_Systems" title="Cadence Design Systems">Cadence Design Systems</a> it licensed the 32-bit MIPS architecture to design, develop, and market high performance, ultra low power SoCs for the Internet Edge Device market. Peripherals were licensed from third parties. The founding team included former members of <a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">DEC</a>'s Austin Research and Design Center working on the <a href="/wiki/StrongARM" title="StrongARM">StrongARM</a> project, dissolved after DEC sold its microprocessors business to <a href="/wiki/Intel" title="Intel">Intel</a>. In May 2000 Alchemy Semiconductor became an independent company.<sup id="cite_ref-AboutAlchemySemi_1-0" class="reference"><a href="#cite_note-AboutAlchemySemi-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p><p>Alchemy Semiconductor unveiled the first member of the family, the Au1000 processor, at the Embedded Processor Forum in San Jose, CA, on June 13, 2000,<sup id="cite_ref-Au1000-PR_2-0" class="reference"><a href="#cite_note-Au1000-PR-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-EPF2000-Au1000_3-0" class="reference"><a href="#cite_note-EPF2000-Au1000-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> with limited customer sampling in February 2001 and availability in production quantities in Q2 of that year, followed in 2001 and 2002 by the Au1500 and Au1100. </p><p>In February 2002 <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a> acquired Alchemy in order to compete with <a href="/wiki/Intel" title="Intel">Intel</a>'s ARM-based <a href="/wiki/XScale" title="XScale">XScale</a> processors, successor to the StrongARM line. They expanded the family with the Au1550 Security Network Processor and the Au1200 processor optimized for <a href="/wiki/Portable_media_player" title="Portable media player">PMP</a> applications, as well as the Am1772 wireless chipset consisting of the Am1770 transceiver and Am1771 integrated baseband/MAC chips. In Summer 2006 AMD sold its Alchemy assets to Raza Microelectronics, later renamed <a href="/wiki/RMI_Corporation" title="RMI Corporation">RMI Corporation</a>. This company introduced the Au1210 and Au1250, based on and pin-compatible with the Au1200, and finally in 2009 the Au1300 series integrating a graphics processor. RMI merged with <a href="/wiki/NetLogic_Microsystems" title="NetLogic Microsystems">NetLogic Microsystems</a> in late 2009,<sup id="cite_ref-RMI-NetLogic_4-0" class="reference"><a href="#cite_note-RMI-NetLogic-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> itself acquired by <a href="/wiki/Broadcom" title="Broadcom">Broadcom Corporation</a> in February 2012.<sup id="cite_ref-NetLogic-Broadcom_5-0" class="reference"><a href="#cite_note-NetLogic-Broadcom-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> Broadcom continued to sell Alchemy processors, if only under long term availability obligations, until at least 2017. </p> <div class="mw-heading mw-heading2"><h2 id="Au1_CPU_core">Au1 CPU core</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Alchemy_(processor)&action=edit&section=2" title="Edit section: Au1 CPU core"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The Au1 CPU core designed by Alchemy implements the MIPS32 ISA Release 1 and supports the MIPS EJTAG interface. A <a href="/wiki/Floating-point_arithmetic" title="Floating-point arithmetic">floating-point</a> unit is not present, FP instructions generate an exception and can be emulated by software. Code compression (MIPS16) and the optional Supervisor Mode were also omitted. Virtual address translation is <a href="/wiki/Translation_lookaside_buffer" title="Translation lookaside buffer">TLB</a>-based and relies on a fast exception handler rather than a hardware table walker. The core supports eight interrupt sources with prioritization by software. It has two low power modes where the clocks to all core units are stopped, one mode exempting the data cache to maintain cache coherency with the rest of the system. </p><p>Au1 is a scalar, in-order microarchitecture with a <a href="/wiki/Classic_RISC_pipeline" title="Classic RISC pipeline">classic five stage RISC pipeline</a> enhanced by several optimizations. It includes a 16 KiB, 4-way set associative instruction cache, a 16 KiB, 4-way, write-back, read-allocate data cache, a register file, a write buffer, and a 16/32-bit multiply-accumulate unit and 1 bit/cycle hardware divider. The cache supports prefetching by software, locking of cache lines, and a streaming mode. All pipeline stages complete in one cycle when data is available, and all pipeline hazards and dependencies are enforced by hardware interlocks. A few instructions require multiple cycles.<sup id="cite_ref-EPF2000-Au1000_3-1" class="reference"><a href="#cite_note-EPF2000-Au1000-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-HC12-Au1000_6-0" class="reference"><a href="#cite_note-HC12-Au1000-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-30360-D-Au1000-DB_7-0" class="reference"><a href="#cite_note-30360-D-Au1000-DB-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Alchemy_SoC">Alchemy SoC</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Alchemy_(processor)&action=edit&section=3" title="Edit section: Alchemy SoC"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The Au1000 SoC is rated for core frequencies up to 500 MHz. At 400 MHz it operates at 1.5 V and the chip consumes no more than 500 mW, with a performance of over 900 <a href="/wiki/Dhrystone" title="Dhrystone">Dhrystone-2.1</a> MIPS/Watt according to Alchemy Semiconductor. Au1000 and Au1500 processors were fabricated on a <a href="/wiki/TSMC" title="TSMC">TSMC</a> 180 nm LV logic 1.5V/3.3V 1P6M process, the Au1100 reduced power consumption further with a TSMC 130 nm process.<sup id="cite_ref-HC12-Au1000_6-1" class="reference"><a href="#cite_note-HC12-Au1000-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-HC14-Au1x00_8-0" class="reference"><a href="#cite_note-HC14-Au1x00-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> Manufacturing details of later models were not disclosed. </p><p>The CPU core, the integrated memory controllers and peripherals are linked by an internal 32-bit system bus (SBUS) running at up to one half of the CPU core frequency. Slower non-bus master capable peripherals are attached with an ancillary peripheral bus. The core's data cache snoops the SBUS for coherency with other bus masters, e.g. a DMA engine. Au12xx models integrate a 64-bit side bus (RBUS) for peripherals requiring more bandwidth from the memory controller.<sup id="cite_ref-32785-A-Au1200-PSA-WP_9-0" class="reference"><a href="#cite_note-32785-A-Au1200-PSA-WP-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> Au13xx models have one RBUS per memory channel.<sup id="cite_ref-Au1300-PB_10-0" class="reference"><a href="#cite_note-Au1300-PB-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> </p><p>All Alchemy processors integrate a <a href="/wiki/Dynamic_random-access_memory" title="Dynamic random-access memory">DRAM</a> controller, a static bus controller, an 8-channel DMA controller for data transfers between memory and peripherals, interrupt controllers, timers, and a power management unit. The static bus controller supports <a href="/wiki/Static_random-access_memory" title="Static random-access memory">SRAM</a>, <a href="/wiki/Read-only_memory" title="Read-only memory">ROM</a>, <a href="/wiki/Flash_memory" title="Flash memory">NAND/NOR Flash</a> (Au1550), page mode Flash/ROM, <a href="/wiki/PC_Card" title="PC Card">PCMCIA</a>/<a href="/wiki/CompactFlash" title="CompactFlash">CompactFlash</a> devices, and I/O peripherals such as an external LCD controller, <a href="/wiki/Parallel_ATA#IDE_and_ATA-1" title="Parallel ATA">IDE</a> PIO mode up to ≈80 Mbit/s (Au12xx), or ATA-6/UDMA mode 5 (Au13xx). Au1550 and later processors have a more flexible 16-channel descriptor-based DMA controller. The Au1550 integrates a <a href="/wiki/SafeNet" title="SafeNet">SafeNet</a> Security Engine providing an entropy-based random number generator and accelerating the <a href="/wiki/Data_Encryption_Standard" title="Data Encryption Standard">DES</a>, <a href="/wiki/Triple_DES" title="Triple DES">3DES</a>, <a href="/wiki/Advanced_Encryption_Standard" title="Advanced Encryption Standard">AES</a>, and <a href="/wiki/RC4" title="RC4">RC4</a> encryption algorithms, and the <a href="/wiki/MD5" title="MD5">MD5</a> and <a href="/wiki/SHA-1" title="SHA-1">SHA-1</a> hash algorithms. </p><p>Au1100 processors integrate an <a href="/wiki/Liquid-crystal_display" title="Liquid-crystal display">LCD</a> controller which supports panels up to 800 × 600 pixels with 16 bit color depth. The LCD controller of Au12xx processors supports up to 2K resolution and up to 24 bits per pixel, four overlay windows, alpha blending, and gamma correction. The Camera Interface Module pins out an <a href="/wiki/ITU-R_BT.656" title="ITU-R BT.656">ITU-R BT.656</a> compatible 8/9/10-bit bus running at up to 33 MHz, and supports UYVY (<a href="/wiki/Chroma_subsampling#4:2:2" title="Chroma subsampling">YUV 4:2:2</a>) and <a href="/wiki/Bayer_filter" title="Bayer filter">Bayer RGB</a> to planar format conversion. The Media Acceleration Engine accelerates video decoding and supports the formats <a href="/wiki/Moving_Picture_Experts_Group" title="Moving Picture Experts Group">MPEG-1/2/4</a>, <a href="/wiki/DivX" title="DivX">DivX-3/4/5</a>, <a href="/wiki/H.263" title="H.263">H.263</a>, and <a href="/wiki/Windows_Media_Video" title="Windows Media Video">WMV 9/VC-1</a> at resolutions up to 720 × 576. It supports hardware colorspace conversion and image scaling with a 4-tap filter, also for the CIM. The MAE2 peripheral of Au13xx processors adds support for the <a href="/wiki/Advanced_Video_Coding" title="Advanced Video Coding">H.264</a> and <a href="/wiki/JPEG" title="JPEG">JPEG</a> standards, hardware bit stream decoding, and resolutions up to 720p. The Graphics Processing Engine available on some Au13xx processors is an <a href="/wiki/Mali_(GPU)" class="mw-redirect" title="Mali (GPU)">ARM Mali-200</a> and accelerates 2D and 3D graphics compatible with <a href="/wiki/OpenVG" title="OpenVG">OpenVG</a> 1.1 and <a href="/wiki/OpenGL_ES" title="OpenGL ES">OpenGL ES</a> 1.1 and 2.0. </p><p>Each member of the family was available with different core frequency and hence power ratings, commercial and industrial temperature ranges, in a <a href="/wiki/Restriction_of_Hazardous_Substances_Directive" title="Restriction of Hazardous Substances Directive">Pb-free</a> or (earlier models) standard package. A low profile, fine pitch plastic ball grid array (LF-PBGA) package was used for all models, with ball counts from 324 (Au1000) to 537 (Au13xx), pitch 0.65 mm to 1.0 mm, and package size 17 mm × 17 mm × 1.7 mm to 23 mm × 23 mm × 1.5 mm. </p> <div class="mw-heading mw-heading2"><h2 id="Alchemy_Processor_Family">Alchemy Processor Family</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Alchemy_(processor)&action=edit&section=4" title="Edit section: Alchemy Processor Family"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" style="text-align: center"> <tbody><tr> <th rowspan="2">Series </th> <th rowspan="2">Launch </th> <th rowspan="2">Core frequ. (<a href="/wiki/Hertz" title="Hertz">MHz</a>) </th> <th rowspan="2"><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a> (<a href="/wiki/Watt" title="Watt">mW</a>) </th> <th rowspan="2"><a href="/wiki/Dynamic_random-access_memory" title="Dynamic random-access memory">DRAM</a> </th> <th rowspan="2">Static Bus </th> <th colspan="12">Integrated Peripherals </th> <th rowspan="2">Datasheet </th> <th rowspan="2">Notes </th></tr> <tr> <th><a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a> </th> <th><a href="/wiki/Liquid-crystal_display" title="Liquid-crystal display">LCD</a> </th> <th><abbr title="Graphics Processing Engine">GPE</abbr> </th> <th><abbr title="Camera Interface Module">CIM</abbr> </th> <th><abbr title="Media Acceleration Engine">MAE</abbr> </th> <th>Hardware de/encrypt. </th> <th><a href="/wiki/USB" title="USB">USB</a> host ports </th> <th>USB device port </th> <th><a href="/wiki/Ethernet" title="Ethernet">Ethernet</a> </th> <th><a href="/wiki/SD_card" title="SD card">SD card</a> </th> <th>Low speed busses </th> <th><a href="/wiki/General-purpose_input/output" title="General-purpose input/output">GPIOs</a> max. </th></tr> <tr> <th colspan="22" style="text-align: left">by <b>Alchemy Semiconductor</b> (2000–2002) </th></tr> <tr> <td>Au1000 </td> <td>2000-06-13<sup id="cite_ref-Au1000-PR_2-1" class="reference"><a href="#cite_note-Au1000-PR-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> (announced)<br />2001-Q2 (available) </td> <td>266-500 </td> <td>300-900 typ. </td> <td rowspan="2">32-bit SDR-133 </td> <td rowspan="3">32-bit data/address </td> <td>-</td> <td>-</td> <td>-</td> <td>-</td> <td>-</td> <td>- </td> <td>2 × 1.1</td> <td>1.1</td> <td>2 × 10/100</td> <td>- </td> <td><a href="/wiki/AC%2797" title="AC'97">AC'97</a>, <a href="/wiki/I%C2%B2S" title="I²S">I²S</a>, <a href="/wiki/Infrared_Data_Association" title="Infrared Data Association">IrDA</a>, 2 × <a href="/wiki/Synchronous_Serial_Interface" title="Synchronous Serial Interface">SSI</a>, 4 × <a href="/wiki/Universal_asynchronous_receiver_transmitter" class="mw-redirect" title="Universal asynchronous receiver transmitter">UART</a></td> <td>32 </td> <td><sup id="cite_ref-30360-D-Au1000-DB_7-1" class="reference"><a href="#cite_note-30360-D-Au1000-DB-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-27348-E-Au1000-SU_11-0" class="reference"><a href="#cite_note-27348-E-Au1000-SU-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <td>Au1500 </td> <td>2001-06-11<sup id="cite_ref-Au1500-PR_12-0" class="reference"><a href="#cite_note-Au1500-PR-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> (announced)<br />2001-12 (available) </td> <td>333-500 </td> <td>400-1200 typ. </td> <td>2.2, 32 bit, 33/66 MHz</td> <td>-</td> <td>-</td> <td>-</td> <td>-</td> <td>- </td> <td>2 × 1.1</td> <td>1.1</td> <td>2 × 10/100</td> <td>- </td> <td>AC'97, 2 × UART</td> <td>39 </td> <td><sup id="cite_ref-30361-D-Au1500-DB_13-0" class="reference"><a href="#cite_note-30361-D-Au1500-DB-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-27362-E-Au1500-SU_14-0" class="reference"><a href="#cite_note-27362-E-Au1500-SU-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <td>Au1100 </td> <td>2002-04-08<sup id="cite_ref-Au1100-PR_15-0" class="reference"><a href="#cite_note-Au1100-PR-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> (announced) </td> <td>333-500 </td> <td>200-400 typ. </td> <td>32-bit SDR-133 2.5V/3.3V </td> <td>-</td> <td>v1</td> <td>-</td> <td>-</td> <td>-</td> <td>- </td> <td>2 × 1.1</td> <td>1.1</td> <td>1 × 10/100</td> <td>2 × 1.1 </td> <td>AC'97, I²S, IrDA, 2 × SSI, 3 × UART</td> <td>48 </td> <td><sup id="cite_ref-30362-D-Au1100-DB_16-0" class="reference"><a href="#cite_note-30362-D-Au1100-DB-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-27353-E-Au1100-SU_17-0" class="reference"><a href="#cite_note-27353-E-Au1100-SU-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <th colspan="22" style="text-align: left">by <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a> (2002–2006) </th></tr> <tr> <td>Au1550 </td> <td>2004-02-24<sup id="cite_ref-Au1550-PR_18-0" class="reference"><a href="#cite_note-Au1550-PR-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> (announced) </td> <td>333-500 </td> <td>400-600 typ., 1460 max. </td> <td>16/32-bit SDR-166/<br />DDR-400 </td> <td>32-bit data, 29-bit addr. </td> <td>2.2, 32 bit, 33/66 MHz </td> <td>-</td> <td>-</td> <td>-</td> <td>-</td> <td>Security Engine </td> <td>2 × 1.1</td> <td>1.1 OTG</td> <td>2 × 10/100</td> <td>2 × 1.1 </td> <td>4 × PSC,<sup id="cite_ref-PSC_19-0" class="reference"><a href="#cite_note-PSC-19"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> 3 × UART</td> <td>43 </td> <td><sup id="cite_ref-30283-D-Au1550-DB_20-0" class="reference"><a href="#cite_note-30283-D-Au1550-DB-20"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <td>Au1200 </td> <td>2005-01-03<sup id="cite_ref-Au1200-PR_21-0" class="reference"><a href="#cite_note-Au1200-PR-21"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> </td> <td>333-500 </td> <td>1600 max. </td> <td>16/32-bit DDR-400/<br />DDR2-533 </td> <td>16-bit data,<br />15/30-bit addr.<sup id="cite_ref-Static15_22-0" class="reference"><a href="#cite_note-Static15-22"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </td> <td>-</td> <td>v2</td> <td>-</td> <td>v1</td> <td>v1</td> <td><a href="/wiki/Advanced_Encryption_Standard" title="Advanced Encryption Standard">AES</a>-128 </td> <td>1 × 2.0</td> <td>2.0 OTG</td> <td>-</td> <td>2 × 1.1 </td> <td>4 × PSC,<sup id="cite_ref-PSC_19-1" class="reference"><a href="#cite_note-PSC-19"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> 2 × UART</td> <td>48 </td> <td><sup id="cite_ref-32798-E-Au1200-DB_23-0" class="reference"><a href="#cite_note-32798-E-Au1200-DB-23"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <th colspan="22" style="text-align: left">by <a href="/wiki/RMI_Corporation" title="RMI Corporation">RMI</a> (2006–2009), <a href="/wiki/NetLogic_Microsystems" title="NetLogic Microsystems">NetLogic</a> (2009–2011), <a href="/wiki/Broadcom" title="Broadcom">Broadcom</a> (2011–current) </th></tr> <tr> <td>Au1210 </td> <td rowspan="2">2007-01-09 (announced)<br />2007-06 (available) </td> <td>333-400 </td> <td>360-420 typ., 1000 max. </td> <td rowspan="2">16/32-bit DDR-400/<br />DDR2-533 </td> <td rowspan="2">16-bit data,<br />15/30-bit addr.<sup id="cite_ref-Static15_22-1" class="reference"><a href="#cite_note-Static15-22"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </td> <td rowspan="2">- </td> <td rowspan="2">v2 </td> <td rowspan="2">- </td> <td rowspan="2">v1 </td> <td rowspan="2">v1 </td> <td>-</td> <td>1 × 2.0</td> <td>2.0 OTG</td> <td>-</td> <td>2 × 1.1 </td> <td rowspan="2">4 × PSC,<sup id="cite_ref-PSC_19-2" class="reference"><a href="#cite_note-PSC-19"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> 2 × UART </td> <td rowspan="2">48 </td> <td rowspan="2"><sup id="cite_ref-Au1210-Au1250-DB_24-0" class="reference"><a href="#cite_note-Au1210-Au1250-DB-24"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <td>Au1250 </td> <td>400-700<sup id="cite_ref-Au1210-Au1250-DB_24-1" class="reference"><a href="#cite_note-Au1210-Au1250-DB-24"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-NetLogic-ULPP_25-0" class="reference"><a href="#cite_note-NetLogic-ULPP-25"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup> </td> <td>560-580 typ., 1400 max. </td> <td>AES-128</td> <td>1 × 2.0</td> <td>2.0 OTG</td> <td>-</td> <td>2 × 1.1 </td> <td><sup id="cite_ref-CDR-King_26-0" class="reference"><a href="#cite_note-CDR-King-26"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td>Au1310 </td> <td rowspan="6">2009-01<sup id="cite_ref-Au1300-PR_27-0" class="reference"><a href="#cite_note-Au1300-PR-27"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> (announced) </td> <td>533 </td> <td> </td> <td rowspan="6">2 × 16-bit DDR2-667 </td> <td rowspan="6">16-bit data,<br />15/30-bit addr.<sup id="cite_ref-Static15_22-2" class="reference"><a href="#cite_note-Static15-22"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </td> <td rowspan="6">- </td> <td rowspan="6">v2? </td> <td>- </td> <td rowspan="6">v2 </td> <td rowspan="6">v2 </td> <td>- </td> <td rowspan="6">1 × 2.0 </td> <td rowspan="6">2.0 OTG </td> <td rowspan="6">- </td> <td rowspan="6">3 × ?, one port supporting 8-bit <a href="/wiki/MultiMediaCard#eMMC" title="MultiMediaCard">eMMC</a> 4.3 </td> <td rowspan="6">4 × PSC,<sup id="cite_ref-PSC_19-3" class="reference"><a href="#cite_note-PSC-19"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> 4 × UART </td> <td rowspan="6">75 </td> <td rowspan="6"><sup id="cite_ref-Au1300-PB_10-1" class="reference"><a href="#cite_note-Au1300-PB-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <td>Au1320</td> <td>667</td> <td></td> <td><big>✓</big></td> <td>?</td> <td> </td></tr> <tr> <td>Au1340</td> <td>533-667</td> <td></td> <td>-</td> <td>-</td> <td> </td></tr> <tr> <td>Au1350/Au1354</td> <td>533-800</td> <td></td> <td><big>✓</big></td> <td>AES-128</td> <td> </td></tr> <tr> <td>Au1370/Au1374</td> <td>667-800</td> <td></td> <td>-</td> <td>-</td> <td> </td></tr> <tr> <td>Au1380/Au1384</td> <td>667-1000</td> <td></td> <td><big>✓</big></td> <td>AES-128</td> <td> </td></tr></tbody></table> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-PSC-19"><span class="mw-cite-backlink">^ <a href="#cite_ref-PSC_19-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-PSC_19-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-PSC_19-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-PSC_19-3"><sup><i><b>d</b></i></sup></a></span> <span class="reference-text">Programmable Serial Controller configurable as <a href="/wiki/AC%2797" title="AC'97">AC'97</a>, <a href="/wiki/I%C2%B2S" title="I²S">I²S</a>, <a href="/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface">SPI</a>, <a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a> interface.</span> </li> <li id="cite_note-Static15-22"><span class="mw-cite-backlink">^ <a href="#cite_ref-Static15_22-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Static15_22-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-Static15_22-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text">15-bit address bus, 30 bit with an external latch.</span> </li> <li id="cite_note-CDR-King-26"><span class="mw-cite-backlink"><b><a href="#cite_ref-CDR-King_26-0">^</a></b></span> <span class="reference-text">Used in <a rel="nofollow" class="external text" href="https://web.archive.org/web/20190321193916/http://www.cdrking.com/?mod=products&type=view&sid=9821&main=166">CD-R King notebooks</a>.</span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="Applications">Applications</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Alchemy_(processor)&action=edit&section=5" title="Edit section: Applications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Alchemy processors were marketed for wireless <a href="/wiki/Gateway_(telecommunications)" title="Gateway (telecommunications)">gateways</a> and <a href="/wiki/Wireless_access_point" title="Wireless access point">access points</a>; <a href="/wiki/Voice_over_IP" title="Voice over IP">VoIP</a>, <a href="/wiki/Navigation_system" title="Navigation system">navigation</a>, and <a href="/wiki/Network-attached_storage" title="Network-attached storage">NAS</a> devices; <a href="/wiki/Set-top_box" title="Set-top box">STBs</a>, thin clients, portable and automotive TV and <a href="/wiki/Portable_media_player" title="Portable media player">media players</a>, and <a href="/wiki/Digital_photo_frame" title="Digital photo frame">digital photo frames</a>. </p><p>Examples are the <a href="/wiki/Sun_Ray" title="Sun Ray">Sun Ray 2</a> family of <a href="/wiki/Thin_client" title="Thin client">thin clients</a>., Several <a href="/wiki/Cowon" title="Cowon">Cowon</a> <a href="/wiki/Portable_media_player" title="Portable media player">PMP</a> devices, <a href="/wiki/Dell" title="Dell">Dell</a> DRAC5 remote administration cards, <a href="/wiki/AirPort" title="AirPort">AirPort</a> Extreme Base Station, embedded products for networking by <a href="/wiki/Sun_Microsystems" title="Sun Microsystems">Sun Microsystems</a>; 4G Systems MTX-1 AccessCube MeshCube </p> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Alchemy_(processor)&action=edit&section=6" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-AboutAlchemySemi-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-AboutAlchemySemi_1-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20141107140122/http://www.insidechips.com/public/3203print.cfm">"About Alchemy Semiconductor"</a>. Archived from <a rel="nofollow" class="external text" href="http://www.insidechips.com/public/3203print.cfm">the original</a> on 2014-11-07.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=About+Alchemy+Semiconductor&rft_id=http%3A%2F%2Fwww.insidechips.com%2Fpublic%2F3203print.cfm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1000-PR-2"><span class="mw-cite-backlink">^ <a href="#cite_ref-Au1000-PR_2-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Au1000-PR_2-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation pressrelease cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20010309104659/http://www.alchemysemi.com/press/in_the_news/EDN_6_13_2000.html">"Alchemy Semiconductor unveils Au1000 Internet Edge processor"</a> (Press release). Embedded Processor Forum, San Jose, CA: Alchemy Semiconductor. 2000-06-13. Archived from <a rel="nofollow" class="external text" href="http://www.alchemysemi.com/press/in_the_news/EDN_6_13_2000.html">the original</a> on 2001-03-09.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Alchemy+Semiconductor+unveils+Au1000+Internet+Edge+processor&rft.place=Embedded+Processor+Forum%2C+San+Jose%2C+CA&rft.pub=Alchemy+Semiconductor&rft.date=2000-06-13&rft_id=http%3A%2F%2Fwww.alchemysemi.com%2Fpress%2Fin_the_news%2FEDN_6_13_2000.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-EPF2000-Au1000-3"><span class="mw-cite-backlink">^ <a href="#cite_ref-EPF2000-Au1000_3-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-EPF2000-Au1000_3-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFHoeppner2000" class="citation conference cs1">Hoeppner, Greg (2000-06-13). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20000918034051/http://www.alchemysemi.com:80/powerpoint/EPF_Final_No_Animation.ppt"><i>Au1000 Internet Edge Processor - A High Performance / Low Power MIPS SOC</i></a>. Embedded Processor Forum 2000. Alchemy Semiconductor. Archived from <a rel="nofollow" class="external text" href="http://www.alchemysemi.com:80/powerpoint/EPF_Final_No_Animation.ppt">the original</a> on 2000-09-18.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=conference&rft.btitle=Au1000+Internet+Edge+Processor+-+A+High+Performance+%2F+Low+Power+MIPS+SOC&rft.pub=Alchemy+Semiconductor&rft.date=2000-06-13&rft.aulast=Hoeppner&rft.aufirst=Greg&rft_id=http%3A%2F%2Fwww.alchemysemi.com%3A80%2Fpowerpoint%2FEPF_Final_No_Animation.ppt&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-RMI-NetLogic-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-RMI-NetLogic_4-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation pressrelease cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20100330104024/http://www.netlogicmicro.com:80/News/pr/2009/09-10-23.htm">"NetLogic Microsystems Announces Stockholder Approval Required for Acquisition of RMI Corporation"</a> (Press release). <a href="/wiki/NetLogic_Microsystems" title="NetLogic Microsystems">NetLogic Microsystems</a>. 2009-10-23. Archived from <a rel="nofollow" class="external text" href="http://www.netlogicmicro.com:80/News/pr/2009/09-10-23.htm">the original</a> on 2010-03-30.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=NetLogic+Microsystems+Announces+Stockholder+Approval+Required+for+Acquisition+of+RMI+Corporation&rft.pub=NetLogic+Microsystems&rft.date=2009-10-23&rft_id=http%3A%2F%2Fwww.netlogicmicro.com%3A80%2FNews%2Fpr%2F2009%2F09-10-23.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-NetLogic-Broadcom-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-NetLogic-Broadcom_5-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation news cs1"><a rel="nofollow" class="external text" href="https://www.reuters.com/article/us-broadcom-idUSTRE78B23T20110912">"Chipmaker Broadcom to buy NetLogic for $3.7 billion"</a>. <i>Reuters</i>. 2016-09-12<span class="reference-accessdate">. Retrieved <span class="nowrap">2017-01-04</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Reuters&rft.atitle=Chipmaker+Broadcom+to+buy+NetLogic+for+%243.7+billion&rft.date=2016-09-12&rft_id=https%3A%2F%2Fwww.reuters.com%2Farticle%2Fus-broadcom-idUSTRE78B23T20110912&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-HC12-Au1000-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-HC12-Au1000_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-HC12-Au1000_6-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFPlummer2000" class="citation conference cs1">Plummer, Suzanne (2000-08-13). <a rel="nofollow" class="external text" href="https://hc12.hotchips.org"><i>The Au1000™ Internet Edge Processor: A High Performance, Low Power SOC</i></a>. Hot Chips 12.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=conference&rft.btitle=The+Au1000%E2%84%A2+Internet+Edge+Processor%3A+A+High+Performance%2C+Low+Power+SOC&rft.date=2000-08-13&rft.aulast=Plummer&rft.aufirst=Suzanne&rft_id=https%3A%2F%2Fhc12.hotchips.org&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-30360-D-Au1000-DB-7"><span class="mw-cite-backlink">^ <a href="#cite_ref-30360-D-Au1000-DB_7-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-30360-D-Au1000-DB_7-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20061015230659/http://www.razamicroelectronics.com/pub_assets/30360D_au1000_databook.pdf"><i>AMD Alchemy™ Au1000™ Processor Data Book</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. September 2005. Archived from <a rel="nofollow" class="external text" href="http://www.razamicroelectronics.com/pub_assets/30360D_au1000_databook.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2006-10-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-04-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1000%E2%84%A2+Processor+Data+Book&rft.pub=AMD&rft.date=2005-09&rft_id=http%3A%2F%2Fwww.razamicroelectronics.com%2Fpub_assets%2F30360D_au1000_databook.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-HC14-Au1x00-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-HC14-Au1x00_8-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBassett2002" class="citation conference cs1">Bassett, Paul (2002-08-19). <a rel="nofollow" class="external text" href="https://hc14.hotchips.org"><i>Alchemy Au1x00</i></a>. Hot Chips 14.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=conference&rft.btitle=Alchemy+Au1x00&rft.date=2002-08-19&rft.aulast=Bassett&rft.aufirst=Paul&rft_id=https%3A%2F%2Fhc14.hotchips.org&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-32785-A-Au1200-PSA-WP-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-32785-A-Au1200-PSA-WP_9-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFEno2005" class="citation book cs1">Eno, Jim (2005). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20051223152802/http://www.amd.com/files/connectivitysolutions/aufamily/au1200/32785a_au1200sysarch_wpaper.pdf"><i>White Paper: AMD Alchemy™ Au1200™ Processor System Architecture</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. Archived from <a rel="nofollow" class="external text" href="http://www.amd.com/files/connectivitysolutions/aufamily/au1200/32785a_au1200sysarch_wpaper.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2005-12-23<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-04-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=White+Paper%3A+AMD+Alchemy%E2%84%A2+Au1200%E2%84%A2+Processor+System+Architecture&rft.pub=AMD&rft.date=2005&rft.aulast=Eno&rft.aufirst=Jim&rft_id=http%3A%2F%2Fwww.amd.com%2Ffiles%2Fconnectivitysolutions%2Faufamily%2Fau1200%2F32785a_au1200sysarch_wpaper.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1300-PB-10"><span class="mw-cite-backlink">^ <a href="#cite_ref-Au1300-PB_10-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Au1300-PB_10-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://en.wikichip.org/wiki/file=RMI-Au1300-PB.pdf"><i>Product Brief: RMI Alchemy™ Au1300™ Media Processor Series</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/RMI_Corporation" title="RMI Corporation">RMI</a>. December 2008.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Product+Brief%3A+RMI+Alchemy%E2%84%A2+Au1300%E2%84%A2+Media+Processor+Series&rft.pub=RMI&rft.date=2008-12&rft_id=https%3A%2F%2Fen.wikichip.org%2Fwiki%2Ffile%3DRMI-Au1300-PB.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-27348-E-Au1000-SU-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-27348-E-Au1000-SU_11-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://en.wikichip.org/wiki/File:AMD-27348-E_Au1000_Spec_Update.pdf"><i>AMD Alchemy™ Au1000™ Processor Specification Update</i></a> <span class="cs1-format">(PDF)</span>. June 2005.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1000%E2%84%A2+Processor+Specification+Update&rft.date=2005-06&rft_id=https%3A%2F%2Fen.wikichip.org%2Fwiki%2FFile%3AAMD-27348-E_Au1000_Spec_Update.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1500-PR-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-Au1500-PR_12-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation pressrelease cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20011216070321/http://www.alchemysemi.com:80/press/press_releases/01_06_11_au1500_release.html">"Alchemy Semiconductor Expands Low Power, High Performance Chip Portfolio With Advent of Alchemy Au1500"</a> (Press release). Embedded Processor Forum, San Jose, CA: Alchemy Semiconductor. 2001-06-11. Archived from <a rel="nofollow" class="external text" href="http://www.alchemysemi.com:80/press/press_releases/01_06_11_au1500_release.html">the original</a> on 2001-12-16.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Alchemy+Semiconductor+Expands+Low+Power%2C+High+Performance+Chip+Portfolio+With+Advent+of+Alchemy+Au1500&rft.place=Embedded+Processor+Forum%2C+San+Jose%2C+CA&rft.pub=Alchemy+Semiconductor&rft.date=2001-06-11&rft_id=http%3A%2F%2Fwww.alchemysemi.com%3A80%2Fpress%2Fpress_releases%2F01_06_11_au1500_release.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-30361-D-Au1500-DB-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-30361-D-Au1500-DB_13-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20061015230435/http://www.razamicroelectronics.com/pub_assets/30361D_au1500_db.pdf"><i>AMD Alchemy™ Au1500™ Processor Data Book</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. March 2006. Archived from <a rel="nofollow" class="external text" href="http://www.razamicroelectronics.com/pub_assets/30361D_au1500_db.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2006-10-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-04-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1500%E2%84%A2+Processor+Data+Book&rft.pub=AMD&rft.date=2006-03&rft_id=http%3A%2F%2Fwww.razamicroelectronics.com%2Fpub_assets%2F30361D_au1500_db.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-27362-E-Au1500-SU-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-27362-E-Au1500-SU_14-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://en.wikichip.org/wiki/File:AMD-27362-E_Au1500_Spec_Update.pdf"><i>AMD Alchemy™ Au1500™ Processor Specification Update</i></a> <span class="cs1-format">(PDF)</span>. June 2005.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1500%E2%84%A2+Processor+Specification+Update&rft.date=2005-06&rft_id=https%3A%2F%2Fen.wikichip.org%2Fwiki%2FFile%3AAMD-27362-E_Au1500_Spec_Update.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1100-PR-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-Au1100-PR_15-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation pressrelease cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20061020093749/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_8001~19047,00.html">"Innovative Alchemy™ Au1100™ Processor From AMD Sets New Standard For Mobile Internet Appliance Market"</a> (Press release). Sunnyvale, CA: <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. 2002-04-08. Archived from <a rel="nofollow" class="external text" href="http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_8001~19047,00.html">the original</a> on 2006-10-20.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Innovative+Alchemy%E2%84%A2+Au1100%E2%84%A2+Processor+From+AMD+Sets+New+Standard+For+Mobile+Internet+Appliance+Market&rft.place=Sunnyvale%2C+CA&rft.pub=AMD&rft.date=2002-04-08&rft_id=http%3A%2F%2Fwww.amd.com%2Fus-en%2FCorporate%2FVirtualPressRoom%2F0%2C%2C51_104_543_8001~19047%2C00.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-30362-D-Au1100-DB-16"><span class="mw-cite-backlink"><b><a href="#cite_ref-30362-D-Au1100-DB_16-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20061020095828/http://www.amd.com/files/connectivitysolutions/aufamily/au1100/30362D_au1100_databook.pdf"><i>AMD Alchemy™ Au1100™ Processor Data Book</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. April 2006. Archived from <a rel="nofollow" class="external text" href="http://www.amd.com/files/connectivitysolutions/aufamily/au1100/30362D_au1100_databook.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2006-10-20<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-04-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1100%E2%84%A2+Processor+Data+Book&rft.pub=AMD&rft.date=2006-04&rft_id=http%3A%2F%2Fwww.amd.com%2Ffiles%2Fconnectivitysolutions%2Faufamily%2Fau1100%2F30362D_au1100_databook.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-27353-E-Au1100-SU-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-27353-E-Au1100-SU_17-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://en.wikichip.org/wiki/File:AMD-27353-E_Au1100_Spec_Update.pdf"><i>AMD Alchemy™ Au1100™ Processor Specification Update</i></a> <span class="cs1-format">(PDF)</span>. June 2005.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1100%E2%84%A2+Processor+Specification+Update&rft.date=2005-06&rft_id=https%3A%2F%2Fen.wikichip.org%2Fwiki%2FFile%3AAMD-27353-E_Au1100_Spec_Update.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1550-PR-18"><span class="mw-cite-backlink"><b><a href="#cite_ref-Au1550-PR_18-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation pressrelease cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20060528024627/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_12605~82638,00.html">"AMD Introduces The AMD Alchemy™ Au1550™ Processor Delivering Integrated Secure Network Processing Power"</a> (Press release). RSA Conference, San Francisco, CA: <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. 2004-02-24. Archived from <a rel="nofollow" class="external text" href="http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_12605~82638,00.html">the original</a> on 2006-05-28.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AMD+Introduces+The+AMD+Alchemy%E2%84%A2+Au1550%E2%84%A2+Processor+Delivering+Integrated+Secure+Network+Processing+Power&rft.place=RSA+Conference%2C+San+Francisco%2C+CA&rft.pub=AMD&rft.date=2004-02-24&rft_id=http%3A%2F%2Fwww.amd.com%2Fus-en%2FCorporate%2FVirtualPressRoom%2F0%2C%2C51_104_543_12605~82638%2C00.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-30283-D-Au1550-DB-20"><span class="mw-cite-backlink"><b><a href="#cite_ref-30283-D-Au1550-DB_20-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20060708150440/http://www.amd.com/files/connectivitysolutions/aufamily/au1550/30283D_Au1550_db.pdf"><i>AMD Alchemy™ Au1550™ Security Network Processor Data Book</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. May 2006. Archived from <a rel="nofollow" class="external text" href="http://www.amd.com/files/connectivitysolutions/aufamily/au1550/30283D_Au1550_db.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2006-07-08<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-04-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1550%E2%84%A2+Security+Network+Processor+Data+Book&rft.pub=AMD&rft.date=2006-05&rft_id=http%3A%2F%2Fwww.amd.com%2Ffiles%2Fconnectivitysolutions%2Faufamily%2Fau1550%2F30283D_Au1550_db.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1200-PR-21"><span class="mw-cite-backlink"><b><a href="#cite_ref-Au1200-PR_21-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation pressrelease cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20060315211729/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_13743~93074,00.html">"AMD Introduces the AMD Alchemy™ Au1200™ Processor, Forges New Era of Portable Multimedia"</a> (Press release). Sunnyvale, CA: <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. 2005-01-03. Archived from <a rel="nofollow" class="external text" href="http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_13743~93074,00.html">the original</a> on 2006-03-15.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AMD+Introduces+the+AMD+Alchemy%E2%84%A2+Au1200%E2%84%A2+Processor%2C+Forges+New+Era+of+Portable+Multimedia&rft.place=Sunnyvale%2C+CA&rft.pub=AMD&rft.date=2005-01-03&rft_id=http%3A%2F%2Fwww.amd.com%2Fus-en%2FCorporate%2FVirtualPressRoom%2F0%2C%2C51_104_543_13743~93074%2C00.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-32798-E-Au1200-DB-23"><span class="mw-cite-backlink"><b><a href="#cite_ref-32798-E-Au1200-DB_23-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20061015230051/http://www.razamicroelectronics.com/pub_assets/32798e_Au1200_ds.pdf"><i>AMD Alchemy™ Au1200™ Processor Data Book</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>. February 2006. Archived from <a rel="nofollow" class="external text" href="http://www.razamicroelectronics.com/pub_assets/32798e_Au1200_ds.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2006-10-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2022-04-27</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AMD+Alchemy%E2%84%A2+Au1200%E2%84%A2+Processor+Data+Book&rft.pub=AMD&rft.date=2006-02&rft_id=http%3A%2F%2Fwww.razamicroelectronics.com%2Fpub_assets%2F32798e_Au1200_ds.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1210-Au1250-DB-24"><span class="mw-cite-backlink">^ <a href="#cite_ref-Au1210-Au1250-DB_24-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Au1210-Au1250-DB_24-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://en.wikichip.org/wiki/File:RMI-Au1210-Au1250-DB.pdf"><i>RMI Alchemy™ Au1210™ Navigation Processor and Au1250™ Media Processor Data Book</i></a> <span class="cs1-format">(PDF)</span>. <a href="/wiki/RMI_Corporation" title="RMI Corporation">RMI</a>. April 2007.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=RMI+Alchemy%E2%84%A2+Au1210%E2%84%A2+Navigation+Processor+and+Au1250%E2%84%A2+Media+Processor+Data+Book&rft.pub=RMI&rft.date=2007-04&rft_id=https%3A%2F%2Fen.wikichip.org%2Fwiki%2FFile%3ARMI-Au1210-Au1250-DB.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-NetLogic-ULPP-25"><span class="mw-cite-backlink"><b><a href="#cite_ref-NetLogic-ULPP_25-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20101213050823/http://www.netlogicmicro.com/Products/ProductBriefs/Alchemy/ULPP%20Guide.htm">"NetLogic Microsystems Low-Power Embedded Processors Solution and Product Selection Guide"</a>. <a href="/wiki/NetLogic_Microsystems" title="NetLogic Microsystems">NetLogic Microsystems</a>. Archived from <a rel="nofollow" class="external text" href="http://www.netlogicmicro.com/Products/ProductBriefs/Alchemy/ULPP%20Guide.htm">the original</a> on 2010-12-13.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=NetLogic+Microsystems+Low-Power+Embedded+Processors+Solution+and+Product+Selection+Guide&rft.pub=NetLogic+Microsystems&rft_id=http%3A%2F%2Fwww.netlogicmicro.com%2FProducts%2FProductBriefs%2FAlchemy%2FULPP%2520Guide.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> <li id="cite_note-Au1300-PR-27"><span class="mw-cite-backlink"><b><a href="#cite_ref-Au1300-PR_27-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation pressrelease cs1"><a rel="nofollow" class="external text" href="http://satellite.tmcnet.com/news/2009/01/14/3913483.htm">"RMI Launches Alchemy Au1300 Processor Line"</a> (Press release). 2009-01-13.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=RMI+Launches+Alchemy+Au1300+Processor+Line&rft.date=2009-01-13&rft_id=http%3A%2F%2Fsatellite.tmcnet.com%2Fnews%2F2009%2F01%2F14%2F3913483.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAlchemy+%28processor%29" class="Z3988"></span></span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Alchemy_(processor)&action=edit&section=7" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20000816094552/http://www.alchemysemi.com:80/">Alchemy Semiconductor website</a> at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (archived 2000-08-16)</li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20060203023239/http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_6625,00.html">AMD Alchemy™ Solutions Processor Family</a> at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (archived 2006-02-03)</li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20060710035423/http://www.razamicroelectronics.com:80/">Raza Microelectronics website</a> at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (archived 2006-07-10)</li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20080210001717/http://www.rmicorp.com:80/">RMI Corp. website</a> at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (archived 2008-02-10)</li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20101214233835/http://www.netlogicmicro.com/Products/Alchemy/index.asp">Alchemy on the NetLogic website</a> at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (archived 2010-12-14)</li> <li><a rel="nofollow" class="external text" href="http://www.linux-mips.org/wiki/Alchemy">Alchemy</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20090303231220/http://www.linux-mips.org/wiki/Alchemy">Archived</a> 2009-03-03 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> page at linux-mips.org</li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline 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href="/wiki/Template:AMD_processors" title="Template:AMD processors"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:AMD_processors" title="Template talk:AMD processors"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:AMD_processors" title="Special:EditPage/Template:AMD processors"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="AMD_processors" style="font-size:114%;margin:0 4em"><a href="/wiki/List_of_AMD_processors" title="List of AMD processors">AMD processors</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/List_of_AMD_processors" title="List of AMD processors">Processors</a> <ul><li><a href="/wiki/List_of_AMD_K5_processors" title="List of AMD K5 processors">K5</a></li> <li><a href="/wiki/List_of_AMD_K6_processors" title="List of AMD K6 processors">K6</a></li> <li><a href="/wiki/List_of_AMD_Athlon_processors" title="List of AMD Athlon processors">Athlon</a> <ul><li><a href="/wiki/List_of_AMD_Athlon_XP_processors" title="List of AMD Athlon XP processors">XP</a></li> <li><a href="/wiki/List_of_AMD_Athlon_64_processors" title="List of AMD Athlon 64 processors">64</a></li> <li><a href="/wiki/List_of_AMD_Athlon_X2_processors" title="List of AMD Athlon X2 processors">X2</a></li> <li><a href="/wiki/List_of_AMD_Athlon_II_processors" title="List of AMD Athlon II processors">II</a></li></ul></li> <li><a href="/wiki/List_of_AMD_Phenom_processors" title="List of AMD Phenom processors">Phenom</a></li> <li><a href="/wiki/List_of_AMD_FX_processors" title="List of AMD FX processors">FX</a></li> <li><a href="/wiki/List_of_AMD_Ryzen_processors" title="List of AMD Ryzen processors">Ryzen</a></li> <li><a href="/wiki/List_of_AMD_Duron_processors" title="List of AMD Duron processors">Duron</a></li> <li><a href="/wiki/List_of_AMD_Sempron_processors" title="List of AMD Sempron processors">Sempron</a></li> <li><a href="/wiki/List_of_AMD_Turion_processors" title="List of AMD Turion processors">Turion</a></li> <li><a href="/wiki/List_of_AMD_Opteron_processors" title="List of AMD Opteron processors">Opteron</a></li> <li><a href="/wiki/List_of_AMD_Epyc_processors" class="mw-redirect" title="List of AMD Epyc processors">Epyc</a></li></ul></li> <li><a href="/wiki/List_of_AMD_processors_with_3D_graphics" title="List of AMD processors with 3D graphics">APUs</a></li> <li><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_AMD_chipsets" title="List of AMD chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon/K7</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 desktop</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K8" title="AMD K8">K8</a></li> <li><a href="/wiki/AMD_K9" title="AMD K9">K9</a></li> <li><a href="/wiki/AMD_10h" title="AMD 10h">K10 (aka 10h)</a></li> <li>15h <ul><li><a href="/wiki/Bulldozer_(microarchitecture)" title="Bulldozer (microarchitecture)">Bulldozer</a></li> <li><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver</a></li> <li><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller</a></li> <li><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a></li></ul></li> <li><a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a> <ul><li><a href="/wiki/Zen_(first_generation_microarchitecture)" class="mw-redirect" title="Zen (first generation microarchitecture)">1st gen</a></li> <li><a href="/wiki/Zen%2B" title="Zen+">Zen+</a></li> <li><a href="/wiki/Zen_2" title="Zen 2">Zen 2</a></li> <li><a href="/wiki/Zen_3" title="Zen 3">Zen 3</a></li> <li><a href="/wiki/Zen_3%2B" class="mw-redirect" title="Zen 3+">Zen 3+</a></li> <li><a href="/wiki/Zen_4" title="Zen 4">Zen 4</a></li> <li><a href="/wiki/Zen_5" title="Zen 5">Zen 5</a></li> <li><i><a href="/wiki/Zen_6" title="Zen 6">Zen 6</a></i></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 low-power</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bobcat_(microarchitecture)" title="Bobcat (microarchitecture)">Bobcat (aka 14h)</a></li> <li>16h <ul><li><a href="/wiki/Jaguar_(microarchitecture)" title="Jaguar (microarchitecture)">Jaguar</a></li> <li><a href="/wiki/Puma_(microarchitecture)" title="Puma (microarchitecture)">Puma</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/ARM_architecture_family#ARMv8-A" title="ARM architecture family">ARM64</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K12" title="AMD K12">K12 (aka 12h)</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon" title="Athlon">Athlon</a></li> <li><a href="/wiki/Ryzen" title="Ryzen">Ryzen</a></li> <li><a href="/wiki/Threadripper" title="Threadripper">Threadripper</a></li> <li><a href="/wiki/Epyc" title="Epyc">Epyc</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;background-color: #DDDDDD">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Early x86 (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am286" class="mw-redirect" title="Am286">Am286</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am386" title="Am386">Am386</a></li> <li><a href="/wiki/Am486" title="Am486">Am486</a></li> <li><a href="/wiki/Am5x86" title="Am5x86">Am5x86</a></li> <li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/AMD_K6-2" title="AMD K6-2">K6-2</a></li> <li><a href="/wiki/AMD_K6-III" title="AMD K6-III">K6-III</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon</a> <ul><li><a href="/wiki/Athlon_XP" class="mw-redirect" title="Athlon XP">XP</a></li> <li><a href="/wiki/Athlon_MP" class="mw-redirect" title="Athlon MP">MP</a></li></ul></li> <li><a href="/wiki/Duron" title="Duron">Duron</a></li> <li><a href="/wiki/Geode_(processor)" title="Geode (processor)">Geode</a></li> <li><a href="/wiki/AMD_%C3%89lan" title="AMD Élan">AMD Élan</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> <ul><li><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">X2</a></li> <li><a href="/wiki/Athlon_II" title="Athlon II">II</a></li></ul></li> <li><a href="/wiki/Sempron" title="Sempron">Sempron</a></li> <li><a href="/wiki/AMD_Turion" title="AMD Turion">Turion</a></li> <li><a href="/wiki/AMD_Phenom" title="AMD Phenom">Phenom</a> <ul><li><a href="/wiki/Phenom_II" title="Phenom II">II</a></li></ul></li> <li><a href="/wiki/AMD_FX" title="AMD FX">FX</a></li> <li><a href="/wiki/Opteron" title="Opteron">Opteron</a></li> <li><a href="/wiki/AMD_APU" title="AMD APU">A-series APUs</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Other</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_Am9080" title="AMD Am9080">Am9080</a></li> <li><a href="/wiki/AMD_Am2900" title="AMD Am2900">Am2900</a> <ul><li><a href="/wiki/List_of_AMD_Am2900_and_Am29000_families" title="List of AMD Am2900 and Am29000 families">list</a></li></ul></li> <li><a href="/wiki/AMD_Am29000" title="AMD Am29000">Am29000</a></li> <li><a href="/wiki/Alchemy_(microarchitecture)" class="mw-redirect" title="Alchemy (microarchitecture)">Alchemy</a> <ul><li><a href="/wiki/MIPS_architecture#MIPS32" title="MIPS architecture">MIPS32</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><i>Italics</i> indicates an upcoming architecture.</div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="MIPS_microprocessors" style="padding:3px"><table class="nowraplinks hlist mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:MIPS_microprocessors" title="Template:MIPS microprocessors"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:MIPS_microprocessors" title="Template talk:MIPS microprocessors"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:MIPS_microprocessors" title="Special:EditPage/Template:MIPS microprocessors"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="MIPS_microprocessors" style="font-size:114%;margin:0 4em">MIPS microprocessors</div></th></tr><tr><td class="navbox-abovebelow" colspan="2"><div> <ul><li><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS architecture</a></li> <li><a href="/wiki/MIPS_architecture_processors" title="MIPS architecture processors">MIPS architecture processors</a></li> <li><a href="/wiki/List_of_MIPS_architecture_processors" title="List of MIPS architecture processors">List of MIPS architecture processors</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">General<br />processors</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="MIPS64compatible" scope="row" class="navbox-group" style="width:1%">MIPS64<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Loongson#Loongson_3_Series" title="Loongson">Loongson 3 Series</a> <ul><li>LS3A1000/LS3A1000-I(LS3A1000-i)</li> <li>LS3A2000/LS3A1500-I</li> <li>LS3A3000/LS3A3000-I(LS3A3000-i)</li> <li>LS3A4000/LS3A4000-I(LS3A4000-i)</li> <li>LS3B1000</li> <li>LS3B1500</li> <li>LS3B2000</li> <li>LS3B3000</li> <li>LS3B4000</li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Application<br />processors</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">MIPS32<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Ingenic_Semiconductor" title="Ingenic Semiconductor">Ingenic XBurst</a> <ul><li>JZ4720 <ul><li><a href="/wiki/Ben_NanoNote" title="Ben NanoNote">Ben NanoNote</a></li></ul></li> <li>JZ4730 (<a href="/wiki/Skytone_Alpha-400" title="Skytone Alpha-400">Skytone Alpha-400</a>)</li> <li>JZ4740 (<a href="/wiki/Dingoo_A320" class="mw-redirect" title="Dingoo A320">Dingoo A320</a>)</li> <li>JZ4750 (<a href="/wiki/Game_Gadget" title="Game Gadget">Game Gadget</a>)</li> <li>JZ4760 <ul><li>Velocity Micro T103 Cruz</li> <li>Velocity Micro T301 Cruz</li></ul></li> <li>JZ4770 <ul><li><a href="/wiki/NOVO7" title="NOVO7">Ainol Novo7 Paladin</a></li> <li>NEOGEO-X</li> <li>GCW-Zero</li></ul></li> <li>JZ4780</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">MIPS64<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Loongson#Loongson_2_Series" title="Loongson">Loongson 2 Series</a> <ul><li>LS2H</li> <li>LS2K1000/LS2K2000</li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Microcontroller" title="Microcontroller">Microcontrollers</a><br />(embedded device)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">M4K</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microchip_Technology" title="Microchip Technology">Microchip Technology</a> <a href="/wiki/PIC_microcontrollers#PIC32MX" title="PIC microcontrollers">PIC32MX</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">4Kc/4KEc</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li>ATI/AMD/Broadcom <a href="/wiki/Xilleon" title="Xilleon">Xilleon</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">MIPS32<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Loongson#Loongson_1_Series" title="Loongson">Loongson 1 Series</a> <ul><li>LS1A0300</li> <li>LS1B</li> <li>LS1C300</li> <li>LS1C101</li> <li>LS1D</li> <li>LS1G</li> <li>LS1H</li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Networking</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">4Kc/4KEc</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Qualcomm_Atheros" title="Qualcomm Atheros">Qualcomm Atheros</a> <ul><li>AR2313</li> <li>AR2318</li></ul></li> <li><a href="/wiki/MediaTek" title="MediaTek">MediaTek</a> <ul><li>RT2880</li></ul></li> <li><a href="/wiki/Texas_Instruments" title="Texas Instruments">Texas Instruments</a>/Infineon/Lantiq <ul><li>AR7</li></ul></li> <li><a href="/wiki/Lantiq" title="Lantiq">Lantiq</a> <ul><li>AMAZON</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">5Kc</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Marvell_Technology_Group" class="mw-redirect" title="Marvell Technology Group">Marvell</a> <ul><li>88E6318 "Link Street"</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">24Kc/24KEc</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Qualcomm_Atheros" title="Qualcomm Atheros">Qualcomm Atheros</a> <ul><li>AR7240</li> <li>AR7161</li> <li>AR9132</li> <li>AR9331</li></ul></li> <li><a href="/wiki/MediaTek" title="MediaTek">MediaTek</a> <ul><li>RT3050</li> <li>RT3052</li> <li>RT3350</li> <li>RT5350</li> <li>RT6856</li> <li>MT7620</li> <li>MT7628</li> <li>MT7688</li></ul></li> <li><a href="/wiki/Lantiq" title="Lantiq">Lantiq</a> <ul><li>DANUBE</li> <li>VINAX</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">34Kc</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Lantiq" title="Lantiq">Lantiq</a> <ul><li>AR188</li> <li>VRX288</li> <li>GRX388</li></ul></li> <li><a href="/wiki/Ikanos_Communications" title="Ikanos Communications">Ikanos</a> <ul><li>Fusiv Vx175/173</li> <li>Fusiv Vx180</li> <li>Fusiv Vx185/183</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">74Kc</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Qualcomm_Atheros" title="Qualcomm Atheros">Qualcomm Atheros</a> <ul><li>AR9344</li> <li>QCA9558</li></ul></li> <li><a href="/wiki/MediaTek" title="MediaTek">MediaTek</a> <ul><li>RT3662</li> <li>RT3883</li></ul></li> <li><a href="/wiki/Broadcom_Corporation" title="Broadcom Corporation">Broadcom</a> <ul><li>BCM4706</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">1004Kc</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/MediaTek" title="MediaTek">MediaTek</a> <ul><li>MT7621</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">1074Kc</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Realtek" title="Realtek">Realtek</a> <ul><li>RTL8198C</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">MIPS32<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Broadcom_Corporation" title="Broadcom Corporation">Broadcom</a> <ul><li>various</li></ul></li> <li><a href="/wiki/Cavium" title="Cavium">Cavium</a> <ul><li>various</li></ul></li> <li>Alchemy Semiconductor <ul><li><a class="mw-selflink selflink">Alchemy</a></li></ul></li> <li><a href="/wiki/RMI_Corporation" title="RMI Corporation">RMI Corporation</a> <ul><li>XLR</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">MIPS64<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Broadcom_Corporation" title="Broadcom Corporation">Broadcom</a> <ul><li>various</li></ul></li> <li><a href="/wiki/Cavium" title="Cavium">Cavium</a> <ul><li>Octeon</li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Gaming</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="various" scope="row" class="navbox-group" style="width:1%">various</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/PlayStation_(console)" title="PlayStation (console)">PlayStation 1</a> MIPS R3000A-compatible</li> <li><a href="/wiki/Nintendo_64" title="Nintendo 64">Nintendo 64</a> NEC VR4300</li> <li><a href="/wiki/PlayStation_Portable" title="PlayStation Portable">PlayStation Portable</a> R4000-based</li> <li><a href="/wiki/PlayStation_2" title="PlayStation 2">PlayStation 2</a> <a href="/wiki/Emotion_Engine" title="Emotion Engine">Emotion Engine</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Supercomputer" title="Supercomputer">Supercomputer</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="MIPS64compatible" scope="row" class="navbox-group" style="width:1%">MIPS64<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Loongson" title="Loongson">Loongson-based systems</a> <ul><li>LS2F/LS2F1000</li> <li>LS3A1000</li> <li>LS3B1000</li></ul></li> <li><a href="/wiki/SiCortex" title="SiCortex">SiCortex</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Aerospace</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">MIPS64<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Loongson#Loongson_1_Series" title="Loongson">Loongson 1 Series</a> <ul><li>LS1E0300/LS1E1000</li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">MIPS32<br />compatible</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Loongson#Loongson_1_Series" title="Loongson">Loongson 1 Series</a> <ul><li>LS1E04</li> <li>LS1F04/LS1F0300</li> <li>LS1J</li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Classic<br />processors</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS I</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/R2000_(microprocessor)" class="mw-redirect" title="R2000 (microprocessor)">R2000</a></li> <li><a href="/wiki/R3000" title="R3000">R3000</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/MIPS_II" class="mw-redirect" title="MIPS II">MIPS II</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/R6000" title="R6000">R6000</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/MIPS_III" class="mw-redirect" title="MIPS III">MIPS III</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/R4000" title="R4000">R4000</a> <ul><li><a href="/wiki/R4000#R4400" title="R4000">R4400</a></li></ul></li> <li><a href="/wiki/R4200" title="R4200">R4200</a> <ul><li><a href="/wiki/R4200#R4300i" title="R4200">R4300i</a></li></ul></li> <li><a href="/wiki/R4600" title="R4600">R4600</a> <ul><li><a href="/wiki/R4600#R4700" title="R4600">R4700</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/MIPS_IV" class="mw-redirect" title="MIPS IV">MIPS IV</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/R5000" title="R5000">R5000</a></li> <li><a href="/wiki/R8000" title="R8000">R8000</a></li> <li><a href="/wiki/R10000" title="R10000">R10000</a> <ul><li><a href="/wiki/R10000#R12000" title="R10000">R12000</a></li> <li><a href="/wiki/R10000#R12000A" title="R10000">R12000A</a></li> <li><a href="/wiki/R10000#R14000" title="R10000">R14000</a></li> <li><a href="/wiki/R10000#R14000A" title="R10000">R14000A</a></li> <li><a href="/wiki/R10000#R16000" title="R10000">R16000</a></li> <li><a href="/wiki/R10000#R16000A" title="R10000">R16000A</a></li> <li><a href="/wiki/R10000#R18000" title="R10000">R18000</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/MIPS_V" class="mw-redirect" title="MIPS V">MIPS V</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><i><a href="/wiki/MIPS_Technologies#History" title="MIPS Technologies">H1 "Beast"</a></i></li> <li><i><a href="/wiki/MIPS_Technologies#History" title="MIPS Technologies">H2 "Capitan"</a></i></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1&useformat=desktop" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" 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