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In most cases, these ECC schemes guarantee the correction of single- and double-bit errors per configuration frame but fail to correct upsets with higher multiplicity in a single frame caused by a single event. This phenomenon has been observed in modern commercial-off-the-shelf FPGAs. Bit interleaving schemes are used in some FPGA families to scatter the multiple upsets into more than one frame, but this does not fully resolve the problem of uncorrectable errors. In this article, we propose a configuration memory scrubbing approach for SRAM-based FPGA devices, which combines the embedded ECC logic with an interframe, interleaved parity code to build a mixed 2-D coding technique. The proposed technique improves the multiple-bit error correction capabilities of the on-chip ECC scheme while keeping the error correction latency and hardware cost low. The scrubbing concept has been validated under heavy-ion irradiation, where it succeeded in correcting all the single and multiple upsets observed during the radiation experiment. Vlagkoulis, Vasileios; Sari, Aitzan; Antonopoulos, Georgios; Psarakis, Mihalis; Tavoularis, Antonios; Furano, Gianluca; Boatella-Polo, Cesar; Poivey, Christian; Ferlet-Cavrois, Véronique; Kastriotou, Maria; Martinez, Pablo Fernandez; Alía, Rubén García" /> <meta name="keywords" content="Error correction codes, Field programmable gate arrays, Codes, Encoding, Materials handling, System-on-chip, Memory management, Error correction codes (ECCs), field-programmable gate arrays (FPGAs), heavy-ion irradiation, memory scrubbing, single-event upsets (SEUs)" /> <script type="text/javascript" src="http://cds.cern.ch/js/jquery.min.js"></script>  <link rel="stylesheet" href="http://cds.cern.ch/img/webnews.css" type="text/css" />  <script type="text/javascript" src="http://cds.cern.ch/js/webnews.js?v=20131009"></script> <meta property="fb:app_id" content="137353533001720"/> <script type="text/x-mathjax-config"> MathJax.Hub.Config({ tex2jax: {inlineMath: [['$','$']], processEscapes: true}, showProcessingMessages: false, messageStyle: "none" }); </script> <script src="/MathJax/MathJax.js?config=TeX-AMS_CHTML" type="text/javascript"> </script>  <meta content="IEEE : Configuration Memory Scrubbing of SRAM-Based FPGAs Using a Mixed 2-D Coding Technique" name="citation_title" /> <meta content="Vlagkoulis, Vasileios" name="citation_author" /> <meta content="Poivey, Christian" name="citation_author" /> <meta content="Alía, Rubén García" name="citation_author" /> <meta content="Boatella-Polo, Cesar" name="citation_author" /> <meta content="Martinez, Pablo Fernandez" name="citation_author" /> <meta content="Psarakis, Mihalis" name="citation_author" /> <meta content="Sari, Aitzan" name="citation_author" /> <meta content="Tavoularis, Antonios" name="citation_author" /> <meta content="Antonopoulos, Georgios" name="citation_author" /> <meta content="Furano, Gianluca" name="citation_author" /> <meta content="Kastriotou, Maria" name="citation_author" /> <meta content="Ferlet-Cavrois, Véronique" name="citation_author" /> <meta content="10.1109/TNS.2022.3151977" name="citation_doi" /> <meta content="IEEE Trans. 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In most cases, these ECC schemes guarantee the correction of single- and double-bit errors per configuration frame but fail to correct upsets with higher multiplicity in a single frame caused by a single event. This phenomenon has been observed in modern commercial-off-the-shelf FPGAs. Bit interleaving schemes are used in some FPGA families to scatter the multiple upsets into more than one frame, but this does not fully resolve the problem of uncorrectable errors. In this article, we propose a configuration memory scrubbing approach for SRAM-based FPGA devices, which combines the embedded ECC logic with an interframe, interleaved parity code to build a mixed 2-D coding technique. The proposed technique improves the multiple-bit error correction capabilities of the on-chip ECC scheme while keeping the error correction latency and hardware cost low. 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var affiliation = $(this).data('affiliation') + '</br>'; var contribution = $(this).data('contribution') + '</br>'; $.magnificPopup.open({ items: { src: '<div id="ovelary-mathjax" class="overlay-white oc-content overlay-white-500">' + author + affiliation + contribution + '</div>', type: 'inline' }, callbacks: { open: function() { var div = document.getElementById("overlay-mathjax") MathJax.Hub.Queue(["Typeset", MathJax.Hub, div]); }, } }) }) }); </script> <tr><td class="formatRecordLabel"> Title </td><td style="padding-left:5px;"><b>Configuration Memory Scrubbing of SRAM-Based FPGAs Using a Mixed 2-D Coding Technique</b></td></tr> <tr><td class="formatRecordLabel"><span style="white-space:nowrap;"> Author(s) </span> </td><td style="padding-left:5px;"> <script type="text/javascript"> function toggle_authors_visibility(){ var more = document.getElementById('more'); var link = document.getElementById('link'); var extension = document.getElementById('extension'); if (more.style.display=='none'){ more.style.display = ''; extension.style.display = 'none'; link.innerHTML = "Απόκρυψη" } else { more.style.display = 'none'; extension.style.display = ''; link.innerHTML = "Εμφάνιση και των 12 συγγραφέων" } link.style.color = "rgb(204,0,0);" } function set_up(){ var extension = document.getElementById('extension'); extension.innerHTML = ""; toggle_authors_visibility(); } </script> <a name="show_hide" /><a href="http://cds.cern.ch/search?f=author&p=Vlagkoulis%2C%20Vasileios&ln=el">Vlagkoulis, Vasileios</a> (Piraeus, TEI) ; <a href="http://cds.cern.ch/search?f=author&p=Sari%2C%20Aitzan&ln=el">Sari, Aitzan</a> (Piraeus, TEI) ; <a href="http://cds.cern.ch/search?f=author&p=Antonopoulos%2C%20Georgios&ln=el">Antonopoulos, Georgios</a> (Piraeus, TEI) ; <a href="http://cds.cern.ch/search?f=author&p=Psarakis%2C%20Mihalis&ln=el">Psarakis, Mihalis</a> (Piraeus, TEI) ; <a href="http://cds.cern.ch/search?f=author&p=Tavoularis%2C%20Antonios&ln=el">Tavoularis, Antonios</a> (ESTEC, Noordwijk) ; <a href="http://cds.cern.ch/search?f=author&p=Furano%2C%20Gianluca&ln=el">Furano, Gianluca</a> (ESTEC, Noordwijk) ; <a href="http://cds.cern.ch/search?f=author&p=Boatella-Polo%2C%20Cesar&ln=el">Boatella-Polo, Cesar</a> (ESTEC, Noordwijk) ; <a href="http://cds.cern.ch/search?f=author&p=Poivey%2C%20Christian&ln=el">Poivey, Christian</a> (ESTEC, Noordwijk) ; <a href="http://cds.cern.ch/search?f=author&p=Ferlet-Cavrois%2C%20V%C3%A9ronique&ln=el">Ferlet-Cavrois, Véronique</a> (ESTEC, Noordwijk) ; <a href="http://cds.cern.ch/search?f=author&p=Kastriotou%2C%20Maria&ln=el">Kastriotou, Maria</a> (CERN ; Rutherford)<span id="more" style=""> ; <a href="http://cds.cern.ch/search?f=author&p=Martinez%2C%20Pablo%20Fernandez&ln=el">Martinez, Pablo Fernandez</a> (CERN ; Barcelona, IFAE) ; <a href="http://cds.cern.ch/search?f=author&p=Al%C3%ADa%2C%20Rub%C3%A9n%20Garc%C3%ADa&ln=el">Alía, Rubén García</a> (CERN)</span> <span id="extension"></span> <small><i><a id="link" href="#" onclick="toggle_authors_visibility()" style="color:rgb(204,0,0);"></a></i></small><script type="text/javascript">set_up()</script></td></tr> <tr><td class="formatRecordLabel"> Publication </td><td style="padding-left:5px;">2022</td></tr> <tr><td class="formatRecordLabel"> Number of pages </td><td style="padding-left:5px;">12</td></tr> <tr><td class="formatRecordLabel"> In: </td><td style="padding-left:5px;"><a href="http://dx.doi.org/10.1109/TNS.2022.3151977"><i>IEEE Trans. Nucl. Sci.</i> 69 (2022) 871-882</a> </a></td></tr> <tr><td class="formatRecordLabel"> DOI </td><td style="padding-left:5px;"><a href="http://dx.doi.org/10.1109/TNS.2022.3151977" title="DOI" target="_blank">10.1109/TNS.2022.3151977</a> <tr><td class="formatRecordLabel"> Subject category </td><td style="padding-left:5px;">Detectors and Experimental Techniques</td></tr> <tr><td class="formatRecordLabel"> Abstract </td><td style="padding-left:5px;">SRAM-based field-programmable gate array (FPGA) vendors typically integrate error correction codes (ECCs) into the configuration memory to assist designers in implementing scrubbing mechanisms. In most cases, these ECC schemes guarantee the correction of single- and double-bit errors per configuration frame but fail to correct upsets with higher multiplicity in a single frame caused by a single event. This phenomenon has been observed in modern commercial-off-the-shelf FPGAs. Bit interleaving schemes are used in some FPGA families to scatter the multiple upsets into more than one frame, but this does not fully resolve the problem of uncorrectable errors. In this article, we propose a configuration memory scrubbing approach for SRAM-based FPGA devices, which combines the embedded ECC logic with an interframe, interleaved parity code to build a mixed 2-D coding technique. The proposed technique improves the multiple-bit error correction capabilities of the on-chip ECC scheme while keeping the error correction latency and hardware cost low. The scrubbing concept has been validated under heavy-ion irradiation, where it succeeded in correcting all the single and multiple upsets observed during the radiation experiment.</td></tr> <tr><td class="formatRecordLabel"> Copyright/License </td><td style="padding-left:5px;">publication: © IEEE</td></tr> </table> <br/>Corresponding record in: <a href="http://inspirehep.net/record/2071447">Inspire</a> <small> </small> <br/> <br/><br/><div align="right"><div style="padding-bottom:2px;padding-top:30px;"><span class="moreinfo" style="margin-right:10px;"> <a href="" class="moreinfo">Επιστροφή στην αναζήτηση</a> </span></div></div> <div class="bottom-left-folded"><div class="recordlastmodifiedbox" style="position:relative;margin-left:1px"> Δημιουργία εγγραφής 2022-04-29, τελευταία τροποποίηση 2022-04-29</div></div> <div class="bottom-right-folded" style="text-align:right;padding-bottom:2px;"> <span class="moreinfo" style="margin-right:10px;"><a href="/search?ln=el&p=recid%3A2807909&rm=wrd" class="moreinfo">Παρόμοιες εγγραφές</a></span></div> </div> </div> </div> <br/> <br /> <div class="detailedrecordminipanel"> <div class="top-left"></div><div class="top-right"></div> <div class="inside"> <div id="detailedrecordminipanelfile" style="width:33%;float:left;text-align:center;margin-top:0"> <br/> </div> <div id="detailedrecordminipanelreview" style="width:30%;float:left;text-align:center"> </div> <div id="detailedrecordminipanelactions" style="width:36%;float:right;text-align:right;"> <ul class="detailedrecordactions"> <li><a href="/yourbaskets/add?ln=el&recid=2807909">Προσθήκη στο προσωπικό καλάθι</a></li> <li>Εξαγωγή ως <a style="text-decoration:underline;font-weight:normal" href="/record/2807909/export/hx?ln=el">BibTeX</a>, <a style="text-decoration:underline;font-weight:normal" href="/record/2807909/export/hm?ln=el">MARC</a>, <a style="text-decoration:underline;font-weight:normal" href="/record/2807909/export/xm?ln=el">MARCXML</a>, <a style="text-decoration:underline;font-weight:normal" href="/record/2807909/export/xd?ln=el">DC</a>, <a style="text-decoration:underline;font-weight:normal" href="/record/2807909/export/xe?ln=el">EndNote</a>,  <a style="text-decoration:underline;font-weight:normal" href="/record/2807909/export/xn?ln=el">NLM</a>, <a style="text-decoration:underline;font-weight:normal" href="/record/2807909/export/xw?ln=el">RefWorks</a> </li> </ul> <div style='padding-left: 13px;'>  <div id="bookmark"></div> <div id="bookmark_sciencewise"></div> <style type="text/css"> #bookmark_sciencewise, #bookmark {float: left;} #bookmark_sciencewise li {padding: 2px; width: 25px;} #bookmark_sciencewise ul, #bookmark ul {list-style-image: none;} </style> <script type="text/javascript" src="/js/jquery.bookmark.min.js"></script> <style type="text/css">@import "/css/jquery.bookmark.css";</style> <script type="text/javascript">// <![CDATA[ $.bookmark.addSite('sciencewise', 'ScienceWise.info', 'http://cds.cern.ch/img/sciencewise.png', 'en', 'bookmark', 'http://sciencewise.info/bookmarks/cds:2807909/add'); $('#bookmark_sciencewise').bookmark({sites: ['sciencewise']}); $('#bookmark').bookmark({ sites: ['facebook', 'twitter', 'linkedin', 'google_plusone'], icons: '/img/bookmarks.png', url: 'http://cds.cern.ch/record/2807909', addEmail: true, title: "Configuration Memory Scrubbing of SRAM-Based FPGAs Using a Mixed 2-D Coding Technique", description: "SRAM-based field-programmable gate array (FPGA) vendors typically integrate error correction codes (ECCs) into the configuration memory to assist designers in implementing scrubbing mechanisms. In most cases, these ECC schemes guarantee the correction of single- and double-bit errors per configuration frame but fail to correct upsets with higher multiplicity in a single frame caused by a single event. This phenomenon has been observed in modern commercial-off-the-shelf FPGAs. Bit interleaving schemes are used in some FPGA families to scatter the multiple upsets into more than one frame, but this does not fully resolve the problem of uncorrectable errors. In this article, we propose a configuration memory scrubbing approach for SRAM-based FPGA devices, which combines the embedded ECC logic with an interframe, interleaved parity code to build a mixed 2-D coding technique. The proposed technique improves the multiple-bit error correction capabilities of the on-chip ECC scheme while keeping the error correction latency and hardware cost low. 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