<?xml version="1.0" encoding="UTF-8"?> <collection xmlns="http://www.loc.gov/MARC21/slim"> <record> <controlfield tag="001">2807909</controlfield> <controlfield tag="003">SzGeCERN</controlfield> <controlfield tag="005">20220429211700.0</controlfield> <datafield tag="024" ind1="7" ind2=" "> <subfield code="2">DOI</subfield> <subfield code="9">IEEE</subfield> <subfield code="a">10.1109/TNS.2022.3151977</subfield> </datafield> <datafield tag="024" ind1="8" ind2=" "> <subfield code="a">oai:cds.cern.ch:2807909</subfield> <subfield code="p">cerncds:CERN</subfield> </datafield> <datafield tag="035" ind1=" " ind2=" "> <subfield code="9">https://inspirehep.net/api/oai2d</subfield> <subfield code="h">2022-04-29T04:00:08Z</subfield> <subfield code="m">marcxml</subfield> <subfield code="a">oai:inspirehep.net:2071447</subfield> <subfield code="d">2022-04-28T12:24:49Z</subfield> </datafield> <datafield tag="035" ind1=" " ind2=" "> <subfield code="9">Inspire</subfield> <subfield code="a">2071447</subfield> </datafield> <datafield tag="041" ind1=" " ind2=" "> <subfield code="a">eng</subfield> </datafield> <datafield tag="100" ind1=" " ind2=" "> <subfield code="a">Vlagkoulis, Vasileios</subfield> <subfield code="j">ORCID:0000-0003-0847-7789</subfield> <subfield code="u">Piraeus, TEI</subfield> </datafield> <datafield tag="245" ind1=" " ind2=" "> <subfield code="9">IEEE</subfield> <subfield code="a">Configuration Memory Scrubbing of SRAM-Based FPGAs Using a Mixed 2-D Coding Technique</subfield> </datafield> <datafield tag="260" ind1=" " ind2=" "> <subfield code="c">2022</subfield> </datafield> <datafield tag="300" ind1=" " ind2=" "> <subfield code="a">12 p</subfield> </datafield> <datafield tag="520" ind1=" " ind2=" "> <subfield code="9">IEEE</subfield> <subfield code="a">SRAM-based field-programmable gate array (FPGA) vendors typically integrate error correction codes (ECCs) into the configuration memory to assist designers in implementing scrubbing mechanisms. In most cases, these ECC schemes guarantee the correction of single- and double-bit errors per configuration frame but fail to correct upsets with higher multiplicity in a single frame caused by a single event. This phenomenon has been observed in modern commercial-off-the-shelf FPGAs. Bit interleaving schemes are used in some FPGA families to scatter the multiple upsets into more than one frame, but this does not fully resolve the problem of uncorrectable errors. In this article, we propose a configuration memory scrubbing approach for SRAM-based FPGA devices, which combines the embedded ECC logic with an interframe, interleaved parity code to build a mixed 2-D coding technique. The proposed technique improves the multiple-bit error correction capabilities of the on-chip ECC scheme while keeping the error correction latency and hardware cost low. The scrubbing concept has been validated under heavy-ion irradiation, where it succeeded in correcting all the single and multiple upsets observed during the radiation experiment.</subfield> </datafield> <datafield tag="542" ind1=" " ind2=" "> <subfield code="d">IEEE</subfield> <subfield code="3">publication</subfield> <subfield code="f">漏 IEEE</subfield> <subfield code="g">2022</subfield> </datafield> <datafield tag="650" ind1="1" ind2="7"> <subfield code="2">SzGeCERN</subfield> <subfield code="a">Detectors and Experimental Techniques</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">Error correction codes</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">Field programmable gate arrays</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">Codes</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">Encoding</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">Materials handling</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">System-on-chip</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">Memory management</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">Error correction codes (ECCs)</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">field-programmable gate arrays (FPGAs)</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">heavy-ion irradiation</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">memory scrubbing</subfield> </datafield> <datafield tag="653" ind1="1" ind2=" "> <subfield code="9">author</subfield> <subfield code="a">single-event upsets (SEUs)</subfield> </datafield> <datafield tag="690" ind1="C" ind2=" "> <subfield code="a">ARTICLE</subfield> </datafield> <datafield tag="690" ind1="C" ind2=" "> <subfield code="a">CERN</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Sari, Aitzan</subfield> <subfield code="u">Piraeus, TEI</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Antonopoulos, Georgios</subfield> <subfield code="j">ORCID:0000-0003-0562-3904</subfield> <subfield code="u">Piraeus, TEI</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Psarakis, Mihalis</subfield> <subfield code="j">ORCID:0000-0002-5359-619X</subfield> <subfield code="u">Piraeus, TEI</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Tavoularis, Antonios</subfield> <subfield code="u">ESTEC, Noordwijk</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Furano, Gianluca</subfield> <subfield code="j">ORCID:0000-0001-7624-1415</subfield> <subfield code="u">ESTEC, Noordwijk</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Boatella-Polo, Cesar</subfield> <subfield code="u">ESTEC, Noordwijk</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Poivey, Christian</subfield> <subfield code="u">ESTEC, Noordwijk</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Ferlet-Cavrois, V茅ronique</subfield> <subfield code="u">ESTEC, Noordwijk</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Kastriotou, Maria</subfield> <subfield code="j">ORCID:0000-0003-1010-2396</subfield> <subfield code="u">CERN</subfield> <subfield code="u">Rutherford</subfield> <subfield code="v">ISIS Facility, UKRI-STFC, Rutherford Appleton Laboratory, Didcot, U.K.</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Martinez, Pablo Fernandez</subfield> <subfield code="j">ORCID:0000-0002-7818-6971</subfield> <subfield code="u">CERN</subfield> <subfield code="u">Barcelona, IFAE</subfield> <subfield code="v">Institut de Fisica d鈥橝ltes energies (IFAE) Edificio CM7, Carrer de Can Magrans, Campus UAB, Barcelona, Spain</subfield> </datafield> <datafield tag="700" ind1=" " ind2=" "> <subfield code="a">Al铆a, Rub茅n Garc铆a</subfield> <subfield code="j">ORCID:0000-0001-8030-1804</subfield> <subfield code="u">CERN</subfield> </datafield> <datafield tag="773" ind1=" " ind2=" "> <subfield code="c">871-882</subfield> <subfield code="n">4</subfield> <subfield code="y">2022</subfield> <subfield code="p">IEEE Trans. Nucl. Sci.</subfield> <subfield code="v">69</subfield> </datafield> <datafield tag="960" ind1=" " ind2=" "> <subfield code="a">13</subfield> </datafield> <datafield tag="980" ind1=" " ind2=" "> <subfield code="a">ARTICLE</subfield> </datafield> </record> </collection>