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</a></div></div><div class="grve-header-elements grve-position-left"><div class="grve-wrapper"><ul><li class="grve-header-element"> <a href="#grve-sidearea" class="grve-sidearea-btn grve-toggle-hiddenarea" aria-label="Side area"> <span class="grve-item"><i class="grve-icon-safebutton"></i></span> </a></li></ul></div></div></div></div></div></div></div></header><div id="grve-page-title" class="grve-page-title grve-with-title grve-custom-size grve-bg-primary-1" data-height="10" style="min-height:160px;"><div class="grve-wrapper clearfix" style="height:10vh; min-height:160px;"><div class="grve-content grve-align-left-center" data-animation="none"><div class="grve-container"><div class="grve-title-content-wrapper grve-bg-none grve-align-left grve-content-large"><h1 class="grve-title grve-with-line grve-text-light"><span>SSCS “PICO” Open-Source Chipathon</span></h1></div></div></div></div></div><div id="grve-page-breadcrumbs" class="grve-breadcrumbs clearfix grve-align-left"><div class="grve-breadcrumbs-wrapper"><div class="grve-container"><nav><span><span><a href="https://sscs.ieee.org/">Home</a></span> › <span><a href="https://sscs.ieee.org/technical-committees/">Technical Committees</a></span> › <span><a href="https://sscs.ieee.org/technical-committees/tc-ose/">Technical Committee on the Open Source Ecosystem (TC-OSE)</a></span> › <span class="breadcrumb_last" aria-current="page">SSCS “PICO” Open-Source Chipathon</span></span></nav></div></div></div><div id="grve-content" class="clearfix "><div class="grve-content-wrapper"><div id="grve-main-content"><div class="grve-main-content-wrapper clearfix"><div id="page-519" class="post-519 page type-page status-publish hentry"><div class="grve-section grve-row-section grve-fullwidth-background grve-padding-bottom-1x grve-bg-none"><div class="grve-container"><div class="grve-row grve-bookmark grve-columns-gap-30"><div class="grve-column wpb_column grve-column-1" ><div class="grve-column-wrapper mw-870" ><h2 class="grve-element grve-title grve-align-left grve-h3" style="margin-bottom: 48px;"><span>2024 SSCS PICO Open-Source Chipathon: Automating Analog Layout</span></h2><h3 class="grve-element grve-title grve-align-left grve-h6" style="margin-bottom: 30px;"><span>Sign-up Deadline: May 10, 2024</span></h3><div class="grve-element grve-text"><p>The IEEE Solid-State Circuits Society is pleased to announce its fourth open-source integrated circuit (IC) design contest under the umbrella of its <a href="/technical-committees/tc-ose/sscs-pico-program/">PICO</a> Program (Platform for IC Design Outreach). While this contest is open to anyone (no restrictions), we encourage the participation of pre-college students, undergraduates, and geographical regions that are underrepresented within the IC design community.</p><p>The goal of this year’s event is to advance the automatic generation and open sharing of analog circuit layout cells to increase our community’s design productivity and to catch up with other fields where sharing and automation is a key enabler of progress (e.g., in machine learning).</p></div><div class="grve-element grve-image mw-270 grve-padding-top-2x grve-padding-bottom-2x grve-align-left" style=""><div class="grve-image-wrapper"><img fetchpriority="high" decoding="async" width="405" height="405" src="https://sscs.ieee.org/wp-content/uploads/image1.png" class="attachment-full size-full" alt="Illustration of engineers of different backgrounds working around a chip" srcset="https://sscs.ieee.org/wp-content/uploads/image1.png 405w, https://sscs.ieee.org/wp-content/uploads/image1-300x300.png 300w, https://sscs.ieee.org/wp-content/uploads/image1-150x150.png 150w" sizes="(max-width: 405px) 100vw, 405px" /></div></div><h3 class="grve-element grve-title grve-align-left grve-h4" style=""><span>Contest Outline</span></h3><div class="grve-element grve-text"><ol><li>Interested individuals sign up using <a href="https://docs.google.com/forms/d/e/1FAIpQLSc8qgEWNHIJnZDTtO84N6lJKftrIOeewaIVmXN3R78bu9Kk5Q/viewform">this form</a> by May 10, 2024.</li><li><strong>Phase 1 (~June):</strong> Through a series of weekly meet-ups and training sessions, the participants learn to create basic one- or two-transistor layout generators using Python and open-source CMOS PDKs. Using Jupyter Notebooks hosted on Google Colab allows anyone with an internet connection to participate – no downloads or installations required! Relevant circuit examples can be found in <sup>[1]</sup>, <sup>[2]</sup>. We will leverage code modules available with the OpenFASoC <sup>[3]</sup> environment.</li><li><strong>Phase 2 (~July):</strong> Interested participants define larger layout building blocks that they wish to automate (examples: comparator, bandgap, phase interpolator, OTA). Teaming among participants is encouraged to maximize collaboration and learning).</li><li><strong>Phase 3 (~August-September):</strong> Participants implement their generators and submit sample layouts and test structures for potential tape-out to an open-source MPW (tentatively SKY130).</li><li><strong>Phase 4 (~October-November):</strong> A jury evaluates the created generators/layouts and selects the test structures that will be taped out. The teams work together to assemble a shared database with all the designs and to complete the tapeout. Ideally, this phase will involve automated verification through CACE <sup>[4]</sup> or a similar tool.</li><li><strong>Phase 5 (TBD):</strong> The designs will be tested using lab measurements by a subset of participants and SSCS volunteers with access to lab facilities. Some of the test setups may be available for remote characterization. The obtained measurement data will be added to the repositories containing the layout generators.</li></ol></div><h4 class="grve-element grve-title grve-align-left grve-h5" style=""><span>References</span></h4><div class="grve-element grve-text grve-small-text"><ul style="list-style: none;"><li>[1] H. Pretl, “Fifty Nifty Variations of Two-Transistor Circuits,” MOS-AK Workshop Spring 2022, URL: <a href="https://www.mos-ak.org/spring_2022/presentations/Pretl_Spring_MOS-AK_2022.pdf">https://www.mos-ak.org/spring_2022/presentations/Pretl_Spring_MOS-AK_2022.pdf</a></li><li>[2] H. Pretl and M. Eberlein, “Fifty Nifty Variations of Two-Transistor Circuits: A tribute to the versatility of MOSFETs,” in IEEE Solid-State Circuits Magazine, vol. 13, no. 3, pp. 38-46, Summer 2021, URL: <a href="https://ieeexplore.ieee.org/document/9523464">https://ieeexplore.ieee.org/document/9523464</a></li><li>[3] OpenFASoC: Fully Open-Source Autonomous SoC Synthesis using Customizable Cell-Based Synthesizable Analog Circuits, URL: <a href="https://github.com/idea-fasoc/OpenFASOC/">https://github.com/idea-fasoc/OpenFASOC/</a></li><li>[4] Circuit Automatic Characterization Engine, URL: <a href="https://github.com/efabless/cace">https://github.com/efabless/cace</a></li></ul></div></div></div></div></div><div class="grve-background-wrapper"></div></div></div></div></div></div></div><footer id="grve-footer" data-sticky-footer="no" class="grve-border grve-bookmark"><div id="grve-bottom-bar" class="grve-bookmark"><div class="grve-section grve-row-section grve-fullwidth-background grve-padding-top-3x grve-padding-bottom-3x grve-bg-none bg-red-gradient" id="join-sscs"><div class="grve-container"><div class="grve-row grve-bookmark grve-columns-gap-30"><div class="grve-column wpb_column grve-column-1 grve-align-center" ><div class="grve-column-wrapper mw-770" ><h2 class="grve-element grve-title grve-align-center grve-subtitle-text" style=""><span>Join IEEE Solid-State Circuits Society</span></h2><div class="grve-element grve-text"><p>As a member of the IEEE SSCS Society, you will receive communications about networking opportunities, conferences, meetings, special events, exclusive content, and so much more.</p></div><div class="grve-element grve-align-center ieee-btn"><a href="#grve-sidearea" title="Learn More" class="grve-btn grve-btn-medium grve-extra-round grve-bg-white grve-bg-hover-primary-2 grve-toggle-hiddenarea"><span>Learn More</span></a></div></div></div></div></div><div class="grve-background-wrapper"></div></div></div><div class="grve-footer-wrapper"><div class="grve-widget-area"><div class="grve-container grve-padding-top-2x grve-padding-bottom-1x "><div class="grve-row grve-columns-gap-30"><div class="wpb_column grve-column grve-column-1-2 grve-tablet-column-1-2"><div class="grve-column-wrapper"><div id="media_image-2" class="grve-widget widget widget_media_image"><a href="/"><img width="476" height="128" src="https://sscs.ieee.org/wp-content/uploads/ieee-sscs-sm-ko-logo2x.png" class="image wp-image-1260 attachment-full size-full" alt="IEEE Solid-State Circuits Society logo" style="max-width: 100%; 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