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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC) - IEEE Solid-State Circuits Society
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grve-position-right"><div class="grve-header-element"> <a href="#grve-hidden-menu" class="grve-toggle-hiddenarea" aria-label="Menu"> <span class="grve-item"> <span class="grve-icon-menu" aria-hidden="true"></span> </span> </a></div></div></div></div></div></div></div></header><div id="grve-page-title" class="grve-page-title grve-with-title grve-custom-size grve-bg-primary-1" data-height="10" style="min-height:160px;"><div class="grve-wrapper clearfix" style="height:10vh; min-height:160px;"><div class="grve-content grve-align-left-center" data-animation="none"><div class="grve-container"><div class="grve-title-content-wrapper grve-bg-none grve-align-left grve-content-large"><h1 class="grve-title grve-with-line grve-text-light"><span>IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC)</span></h1></div></div></div></div></div><div id="grve-content" class="clearfix "><div class="grve-content-wrapper"><div id="grve-main-content"><div class="grve-main-content-wrapper clearfix"><div id="page-160" class="post-160 page type-page status-publish hentry"><div class="grve-section grve-row-section grve-fullwidth-background grve-padding-top-3x grve-padding-bottom-3x grve-bg-none grve-custom-height grve-middle-content bg-dk-grey" id="quick-links" data-tablet-portrait-equal-columns="false" data-mobile-equal-columns="false"><div class="grve-container"><div class="grve-row grve-bookmark grve-columns-gap-30"><div class="grve-column wpb_column grve-column-1-4 grve-tablet-column-1-3 grve-tablet-sm-column-1 txt-column left" ><div class="grve-column-wrapper" ><h2 class="grve-element grve-title grve-align-left grve-h3" style=""><span>Quick Links</span></h2></div></div><div class="grve-column wpb_column grve-column-3-4 grve-tablet-column-2-3 grve-tablet-sm-column-1" ><div class="grve-column-wrapper" ><div class="grve-row-inner grve-bookmark"><div class="grve-column-inner wpb_column grve-column-1-3 grve-tablet-column-1-2 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title="JXCDC Associate Editors"><div class="grve-wrapper-icon grve-no-shape" style=""><i class="grve-text-primary-1 fas fa-users"></i></div><div class="grve-box-content"><div class="grve-box-title-wrapper"><h3 class="grve-box-title grve-link-text">JXCDC Associate Editors</h3></div></div></a></div></div></div><div class="grve-column-inner wpb_column grve-column-1-3 grve-tablet-column-1-2 grve-tablet-sm-column-1-2"><div class="grve-column-wrapper-inner"><div class="grve-element grve-box-icon grve-small grve-side-icon grve-align-left quick-link jssc-special-issues" style=""><a href="/publications/ieee-journal-on-exploratory-solid-state-computational-devices-and-circuits-jcdc/jxcdc-steering-committee/" title="Steering Committee"><div class="grve-wrapper-icon grve-no-shape" style=""><i class="grve-text-primary-1 fas fa-users-cog"></i></div><div class="grve-box-content"><div class="grve-box-title-wrapper"><h3 class="grve-box-title grve-link-text">Steering Committee</h3></div></div></a></div></div></div><div class="grve-column-inner wpb_column grve-column-1-3 grve-tablet-column-1-2 grve-tablet-sm-column-1-2"><div class="grve-column-wrapper-inner"><div class="grve-element grve-box-icon grve-small grve-side-icon grve-align-left quick-link jssc-special-issues" style=""><a href="/publications/ieee-journal-on-exploratory-solid-state-computational-devices-and-circuits-jcdc/special-issues/" title="Special Issues"><div class="grve-wrapper-icon grve-no-shape" style=""><i class="grve-text-primary-1 fas fa-book"></i></div><div class="grve-box-content"><div class="grve-box-title-wrapper"><h3 class="grve-box-title grve-link-text">Special Issues</h3></div></div></a></div></div></div></div></div></div></div></div><div class="grve-background-wrapper"><div class="grve-bg-image grve-bg-center-center grve-bg-image-id-1269" style="background-image: url(https://sscs.ieee.org/wp-content/uploads/circuit-bg-artwork_1920x620.png);"></div></div></div><div class="grve-section grve-row-section grve-fullwidth-background grve-padding-top-3x grve-padding-bottom-4x grve-bg-none" id="jxcdc"><div class="grve-container"><div class="grve-row grve-bookmark grve-columns-gap-30"><div class="grve-column wpb_column grve-column-2-3 txt-column left" ><div class="grve-column-wrapper" ><h3 class="grve-element grve-title grve-align-left grve-h5" style=""><span>Aims and Scope</span></h3><div class="grve-element grve-text"><p>The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits focuses on multi-disciplinary research in solid-state circuits using exploratory materials and devices for novel energy efficient computation beyond standard CMOS (complementary Metal Oxide Semiconductor) technology. Focus is on the exploration of materials, devices and computation circuits to enable Moore’s Law to continue for computation beyond a 10 to 15 year horizon (beyond end of the roadmap for CMOS technologies) with the associated density scaling and improvement in energy efficiency.</p></div><h3 class="grve-element grve-title grve-align-left grve-h5" style=""><span>Examples of appropriate topics to submit are:</span></h3><div class="grve-element grve-text"><ul><li>Quantum electronic devices (e.g., tunneling)</li><li>Spintronics and Nanomagnetics devices</li><li>Straintronics (piezo-electric) devices</li><li>Plasmonics</li><li>Functional materials</li><li>High fan-in, fan-out logic circuits</li><li>Reconfigurable and non-volatile computation circuits</li><li>Computation circuits comprehending the on-chip communication means</li></ul><p><em>This publication provides a unique interdisciplinary forum of scientists and engineers to critique and document progress in this field of promising alternatives to CMOS technology for computation devices, circuits and architecture.</em></p></div><div class="grve-element grve-image mw-370 grve-padding-top-2x grve-padding-bottom-2x grve-align-left" style=""><div class="grve-image-wrapper"><img decoding="async" width="226" height="183" src="https://sscs.ieee.org/wp-content/uploads/jxcdc_logo.jpg" class="attachment-full size-full" alt="JXCDC Logo" srcset="https://sscs.ieee.org/wp-content/uploads/jxcdc_logo.jpg 1x,https://sscs.ieee.org/wp-content/uploads/jxcdc_logo2x.png 2x" /></div></div><h3 class="grve-element grve-title grve-align-left grve-h5" style=""><span>Detailed Scope</span></h3><div class="grve-element grve-text"><p>The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC) is designed for rapid publication of results across the areas of solid-state materials, devices, and circuits for novel computation (logic, memory, and communication) beyond the limits of conventional CMOS technology. The scope of the JXCDC is not limited to digital information processing, rather it also encompasses non-Boolean computation – including analog, neuromorphic computation, and novel concepts in computer automata. It is envisioned that these exploratory methods of computation could augment CMOS-based information processing.</p><p>Manuscripts are solicited in the areas of materials, devices, and circuits that transcend hierarchical boundaries to foster co-design enabling significant improvement in computational performance and energy efficiency. Manuscripts covering new materials must show a device application with computational performance impact. Manuscripts on devices must show potential to enable new integrated circuit architectures for improved computational performance and energy. Manuscripts on computation circuits and systems must be based on viable exploratory devices.</p><p>By its nature, the JXCDC is a publication that connects researchers across the design abstraction hierarchy of materials, devices, circuits, architectures, systems, and algorithms. It is a selective, archival publication that scientists and engineers can read to follow developments in beyond-CMOS technology for energy-efficient computation, and communication.</p><p>If your career involves work within the semiconductor industry or academia (scientists and engineers), the JXCDC will enable you to follow the developments and gain visibility beyond CMOS and the possible future direction of the integrated circuit and semiconductor industry. Also if you are a researcher in the integrated circuit and semiconductor industry or an academic institution, publication in the selective cross-disciplinary JXCDC should be considered so you contribute toward more energy efficient computation while elevating your career to new heights!</p></div><h3 class="grve-element grve-title grve-align-left grve-h5" style=""><span>Paper Format Description</span></h3><div class="grve-element grve-text"><p>Papers can have 2 parts – the first part is a 4-8 page main paper (following a strict format – template available from website), and the second part is the supplementary material. The main paper itself will just focus on describing why the work is important, the state of the prior art, the key new accomplishment(s) or results, and then what the research directions are going forward. The main paper can have an accompanying supplementary material (detailed methods) part. The supplementary material is not mandatory, but authors are strongly encouraged to submit supplementary material, which will increase the chance of acceptance. The Supplementary material (detailed methods) will be peer reviewed along with the main paper. The ScholarOne website will have the guidelines for the two part submission – the main and the supplementary material.</p></div><h3 class="grve-element grve-title grve-align-left grve-h5" style=""><span>JxCDC is an Open Access only Publication</span></h3><div class="grve-element grve-text"><p><strong>Article Processing Charge (APC): US $1995 – effective 1 January 2024</strong></p><p>Discounts:</p><ul><li>IEEE Members receive a 5% discount.</li><li>IEEE Society Members receive a 20% discount.</li></ul><p>These discounts cannot be combined.</p><p>For papers submitted in 2023, the Article Processing Charge (APC) is US$1950 plus applicable local taxes. The following discounts apply: IEEE Members receive a 5% discount. IEEE SSCS Members receive a 20% discount. Discounts do not apply to undergraduate and graduate students. These discounts cannot be combined.</p><p>Paper submissions must be done through the IEEE Author Portal website: <a href="https://ieee.atyponrex.com/journal/JXCDC" target="_blank" rel="noopener">www.ieee.atyponrex.com/journal/jxcdc</a></p><p>Guidelines for papers and supplementary materials, as well as a paper template, are provided at this website.</p></div><h3 class="grve-element grve-title grve-align-left grve-h5" style=""><span>JxCDC is sponsored by:</span></h3><div class="grve-element grve-text"><ul><li>IEEE Solid-State Circuits Society</li><li>Magnetics Society</li><li>Circuits and Systems Society</li><li>Electron Devices Society</li><li>Council of Electronic Design Automation</li><li>Council on Superconductivity</li></ul><p>Accepted manuscripts will be posted in the IEEE Xplore website within 2 weeks after authors have correctly uploaded their final files in the IEEE Author Portal “Awaiting Final Files” queue.</p><p><strong>Inquiries for the JxCDC Journal should be sent to: <a href="javascript:;" data-enc-email="wkpqp[at]vrrr.bet" target="_blank" rel="noopener" class="mail-link" data-wpel-link="ignore"><span id="eeb-707538-365960"></span><script type="text/javascript">(function(){var ml="r%4e0xdiojc.g",mi="95:6:1247333;80<",o="";for(var j=0,l=mi.length;j<l;j++){o+=ml.charAt(mi.charCodeAt(j)-48);}document.getElementById("eeb-707538-365960").innerHTML = decodeURIComponent(o);}());</script><noscript>*protected email*</noscript></a></strong></p></div><h3 class="grve-element grve-title grve-align-left grve-h5" style=""><span>Tools for Authors:</span></h3><div class="grve-element grve-text"><ul><li><a href="http://refassist.ieee.org/action/showAuthorLogin" target="_blank" rel="noopener">IEEE Reference Preparation Assistant</a></li><li><a href="https://www.ieee.org/publications/authors/pdf_checker.html" target="_blank" rel="noopener">IEEE PDF Checker</a></li><li><a href="https://ieee-collabratec.ieee.org/app/community/18/activities" target="_blank" rel="noopener">IEEE Collabratec Author Lab</a></li></ul></div></div></div><div class="grve-column wpb_column grve-column-1-3 img-column right" ><div class="grve-column-wrapper" ><div class="grve-element grve-image mw-270 grve-hover-item grve-hover-style-1 grve-full-image" style=""><div class="grve-image-wrapper"><figure class="grve-image-hover grve-media grve-zoom-none"><a href="javascript:;" data-enc-email="nmnq[at]tngrpu.rqh" title="Email Azad" class="grve-item-url mail-link" data-wpel-link="ignore"></a><div class="grve-bg-dark grve-hover-overlay grve-opacity-0"></div><img fetchpriority="high" decoding="async" width="270" height="300" src="https://sscs.ieee.org/wp-content/uploads/ieee-sscs-editor-in-chief-jxcdc-azad-naeemi.jpg" class="" alt="Azad Naeemi" srcset="https://sscs.ieee.org/wp-content/uploads/ieee-sscs-editor-in-chief-jxcdc-azad-naeemi.jpg 1x,https://sscs.ieee.org/wp-content/uploads/ieee-sscs-editor-in-chief-jxcdc-azad-naeemi2x.jpg 2x" /><figcaption></figcaption></figure><div class="grve-content grve-align-center"><h4 class="grve-title grve-h5 grve-text-inherit">Azad Naeemi</h4><span class="grve-description grve-link-text grve-text-content">Editor-in-Chief</span></div></div></div></div></div></div></div><div class="grve-background-wrapper"></div></div><div class="grve-section grve-row-section grve-fullwidth-background grve-padding-top-3x grve-padding-bottom-4x grve-bg-none bg-lt-grey jxcdc use-mathjax" id="publications"><div class="grve-container"><div class="grve-row grve-bookmark grve-columns-gap-30"><div class="grve-column wpb_column grve-column-1" ><div class="grve-column-wrapper" ><h2 class="grve-element grve-title grve-align-center grve-h3" style="margin-bottom: 48px;"><span>JxCDC Papers on IEEE <em>Xplore</em></span></h2><div class="grve-element grve-carousel grve-layout-2 grve-carousel-style-1 grve-with-gap grve-carousel-wrapper journals" style="" ><div class="grve-carousel-info-wrapper grve-align-left"><div class="grve-carousel-info"><h3 class="grve-title grve-h5">Latest Issue</h3></div><div class="grve-carousel-navigation grve-dark grve-navigation-1 grve-navigation-carousel"><div class="grve-carousel-buttons"><div class="grve-carousel-prev"><i class="grve-icon-nav-left-small"></i><span class="screen-reader-text">Previous</span></div><div class="grve-carousel-next"><i class="grve-icon-nav-right-small"></i><span class="screen-reader-text">Next</span></div></div></div></div><div class="grve-carousel-wrapper"><div class="grve-blog grve-blog-carousel grve-carousel-element" data-items="3" data-items-tablet-landscape="3" data-items-tablet-portrait="2" data-items-mobile="1" data-slider-autoplay="no" data-slider-loop="no" data-slider-speed="3000" data-slider-pause="no" data-pagination-speed="400" data-pagination="yes" data-gutter-size="30"><div class="grve-carousel-item"><article class="grve-post-item post-2612 post type-post status-publish format-standard hentry category-ieee-journal-on-exploratory-solid-state-computational-devices-and-circuits category-ieee-journal-on-exploratory-solid-state-computational-devices-and-circuits-journals tag-computational-modeling tag-computer-architecture tag-embedded-nonvolatile-memory-envm tag-energy-efficiency tag-fefets tag-ferroelectric-field-effect-transistor-fefet tag-in-memory-computing-imc tag-magnetoresistive-random-access-memory-mram tag-parallel-bar tag-resistive-memories tag-resistive-random-access-memory-reram tag-sensors tag-signal-to-noise-plus-distortion-ratio-sndr tag-voltage tag-wires" itemscope itemType="http://schema.org/BlogPosting"><div class="grve-post-content"><ul class="grve-post-meta"><li class="grve-post-date"> <time class="" datetime="2024-03-25T00:00:00-04:00"> 25 March 2024 </time></li></ul> <a href="https://ieeexplore.ieee.org/document/10478888/" rel="bookmark"><h4 class="grve-post-title grve-post-title-hover grve-h6" itemprop="headline">Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures</h4></a> <span class="grve-hidden"> <span class="grve-structured-data entry-title">Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures</span> <span class="grve-structured-data" itemprop="image" itemscope itemtype="http://schema.org/ImageObject"> <span itemprop='url' >https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg</span> <span itemprop='height' >150</span> <span itemprop='width' >150</span> </span> <span class="grve-structured-data vcard author" itemprop="author" itemscope itemtype="http://schema.org/Person"> <span itemprop="name" class="fn"><span id="eeb-635858-466975"></span><script type="text/javascript">(function(){var ml="irh%doen20ltcmsk.4",mi="?16>>6:3A9;207?4=8@<5=",o="";for(var j=0,l=mi.length;j<l;j++){o+=ml.charAt(mi.charCodeAt(j)-48);}document.getElementById("eeb-635858-466975").innerHTML = decodeURIComponent(o);}());</script><noscript>*protected email*</noscript></span> </span> <span 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itemscope itemtype="http://schema.org/WebPage" itemid="https://ieeexplore.ieee.org/document/10478888/"></span> </span></div></article></div><div class="grve-carousel-item"><article class="grve-post-item post-2583 post type-post status-publish format-standard hentry category-ieee-journal-on-exploratory-solid-state-computational-devices-and-circuits category-ieee-journal-on-exploratory-solid-state-computational-devices-and-circuits-journals tag-back-end-of-the-line-beol tag-frequency-modulation tag-integrated-circuit-interconnections tag-interconnect tag-magnetic-random-access-memory-mram tag-magnetic-tunneling tag-performance-evaluation tag-resistance tag-spin-orbit-torque-sot tag-spin-transfer-torque-stt tag-switches tag-wires" itemscope itemType="http://schema.org/BlogPosting"><div class="grve-post-content"><ul class="grve-post-meta"><li class="grve-post-date"> <time class="" datetime="2024-01-23T00:00:00-05:00"> 23 January 2024 </time></li></ul> <a href="https://ieeexplore.ieee.org/document/10412202/" rel="bookmark"><h4 class="grve-post-title grve-post-title-hover grve-h6" itemprop="headline">Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories</h4></a> <span class="grve-hidden"> <span class="grve-structured-data entry-title">Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories</span> <span class="grve-structured-data" itemprop="image" itemscope itemtype="http://schema.org/ImageObject"> <span itemprop='url' >https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg</span> <span itemprop='height' >150</span> <span itemprop='width' >150</span> </span> <span class="grve-structured-data vcard author" itemprop="author" itemscope itemtype="http://schema.org/Person"> <span itemprop="name" class="fn"><span id="eeb-933770-777134"></span><script type="text/javascript">(function(){var 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