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<span>Capabilities</span> </div> </a> <ul id="toc-Capabilities-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Development_of_the_stored-program_concept" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Development_of_the_stored-program_concept"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Development of the stored-program concept</span> </div> </a> <ul id="toc-Development_of_the_stored-program_concept-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Early_von_Neumann-architecture_computers" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Early_von_Neumann-architecture_computers"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Early von Neumann-architecture computers</span> </div> </a> <ul id="toc-Early_von_Neumann-architecture_computers-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Early_stored-program_computers" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Early_stored-program_computers"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Early stored-program computers</span> </div> </a> <ul id="toc-Early_stored-program_computers-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Evolution" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Evolution"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>Evolution</span> </div> </a> <ul id="toc-Evolution-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Design_limitations" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Design_limitations"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>Design limitations</span> </div> </a> <button aria-controls="toc-Design_limitations-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Design limitations subsection</span> </button> <ul id="toc-Design_limitations-sublist" class="vector-toc-list"> <li id="toc-von_Neumann_bottleneck" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#von_Neumann_bottleneck"> <div class="vector-toc-text"> <span class="vector-toc-numb">7.1</span> <span>von Neumann bottleneck</span> </div> </a> <ul id="toc-von_Neumann_bottleneck-sublist" class="vector-toc-list"> <li id="toc-Mitigations" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Mitigations"> <div class="vector-toc-text"> <span class="vector-toc-numb">7.1.1</span> <span>Mitigations</span> </div> </a> <ul id="toc-Mitigations-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Self-modifying_code" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Self-modifying_code"> <div class="vector-toc-text"> <span class="vector-toc-numb">7.2</span> <span>Self-modifying code</span> </div> </a> <ul id="toc-Self-modifying_code-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">9</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Further_reading" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Further_reading"> <div class="vector-toc-text"> <span class="vector-toc-numb">10</span> <span>Further reading</span> </div> </a> <ul id="toc-Further_reading-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">11</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Toggle the table of contents</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">Von Neumann architecture</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. Available in 55 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-55" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">55 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D9%85%D8%B9%D9%85%D8%A7%D8%B1%D9%8A%D8%A9_%D9%81%D9%88%D9%86_%D9%86%D9%8A%D9%88%D9%85%D8%A7%D9%86" title="معمارية فون نيومان – Arabic" lang="ar" hreflang="ar" data-title="معمارية فون نيومان" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-ast mw-list-item"><a href="https://ast.wikipedia.org/wiki/Arquiteutura_von_Neumann" title="Arquiteutura von Neumann – Asturian" lang="ast" hreflang="ast" data-title="Arquiteutura von Neumann" data-language-autonym="Asturianu" data-language-local-name="Asturian" class="interlanguage-link-target"><span>Asturianu</span></a></li><li class="interlanguage-link interwiki-az mw-list-item"><a href="https://az.wikipedia.org/wiki/Fon_Neyman_arxitekturas%C4%B1" title="Fon Neyman arxitekturası – Azerbaijani" lang="az" hreflang="az" data-title="Fon Neyman arxitekturası" data-language-autonym="Azərbaycanca" data-language-local-name="Azerbaijani" class="interlanguage-link-target"><span>Azərbaycanca</span></a></li><li class="interlanguage-link interwiki-be mw-list-item"><a href="https://be.wikipedia.org/wiki/%D0%90%D1%80%D1%85%D1%96%D1%82%D1%8D%D0%BA%D1%82%D1%83%D1%80%D0%B0_%D1%84%D0%BE%D0%BD_%D0%9D%D1%8D%D0%B9%D0%BC%D0%B0%D0%BD%D0%B0" title="Архітэктура фон Нэймана – Belarusian" lang="be" hreflang="be" data-title="Архітэктура фон Нэймана" data-language-autonym="Беларуская" data-language-local-name="Belarusian" class="interlanguage-link-target"><span>Беларуская</span></a></li><li class="interlanguage-link interwiki-bg mw-list-item"><a href="https://bg.wikipedia.org/wiki/%D0%90%D1%80%D1%85%D0%B8%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80%D0%B0_%D0%BD%D0%B0_%D1%84%D0%BE%D0%BD_%D0%9D%D0%BE%D0%B9%D0%BC%D0%B0%D0%BD" title="Архитектура на фон Нойман – Bulgarian" lang="bg" hreflang="bg" data-title="Архитектура на фон Нойман" data-language-autonym="Български" data-language-local-name="Bulgarian" class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-bs mw-list-item"><a href="https://bs.wikipedia.org/wiki/Von_Neumannova_arhitektura" title="Von Neumannova arhitektura – Bosnian" lang="bs" hreflang="bs" data-title="Von Neumannova arhitektura" data-language-autonym="Bosanski" data-language-local-name="Bosnian" class="interlanguage-link-target"><span>Bosanski</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Arquitectura_de_von_Neumann" title="Arquitectura de von Neumann – Catalan" lang="ca" hreflang="ca" data-title="Arquitectura de von Neumann" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/Von_Neumannova_architektura" title="Von Neumannova architektura – Czech" lang="cs" hreflang="cs" data-title="Von Neumannova architektura" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-da mw-list-item"><a href="https://da.wikipedia.org/wiki/Von_Neumann-arkitektur" title="Von Neumann-arkitektur – Danish" lang="da" hreflang="da" data-title="Von Neumann-arkitektur" data-language-autonym="Dansk" data-language-local-name="Danish" class="interlanguage-link-target"><span>Dansk</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Von-Neumann-Architektur" title="Von-Neumann-Architektur – German" lang="de" hreflang="de" data-title="Von-Neumann-Architektur" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/Von_Neumanni_arhitektuur" title="Von Neumanni arhitektuur – Estonian" lang="et" hreflang="et" data-title="Von Neumanni arhitektuur" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-el mw-list-item"><a href="https://el.wikipedia.org/wiki/%CE%91%CF%81%CF%87%CE%B9%CF%84%CE%B5%CE%BA%CF%84%CE%BF%CE%BD%CE%B9%CE%BA%CE%AE_%CF%86%CE%BF%CE%BD_%CE%9D%CF%8C%CE%B9%CE%BC%CE%B1%CE%BD" title="Αρχιτεκτονική φον Νόιμαν – Greek" lang="el" hreflang="el" data-title="Αρχιτεκτονική φον Νόιμαν" data-language-autonym="Ελληνικά" data-language-local-name="Greek" class="interlanguage-link-target"><span>Ελληνικά</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Arquitectura_de_Von_Neumann" title="Arquitectura de Von Neumann – Spanish" lang="es" hreflang="es" data-title="Arquitectura de Von Neumann" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-eu mw-list-item"><a href="https://eu.wikipedia.org/wiki/Von_Neumannen_arkitektura" title="Von Neumannen arkitektura – Basque" lang="eu" hreflang="eu" data-title="Von Neumannen arkitektura" data-language-autonym="Euskara" data-language-local-name="Basque" class="interlanguage-link-target"><span>Euskara</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%D9%85%D8%B9%D9%85%D8%A7%D8%B1%DB%8C_%D9%81%D9%88%D9%86_%D9%86%D9%88%DB%8C%D9%85%D8%A7%D9%86" title="معماری فون نویمان – Persian" lang="fa" hreflang="fa" data-title="معماری فون نویمان" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Architecture_de_von_Neumann" title="Architecture de von Neumann – French" lang="fr" hreflang="fr" data-title="Architecture de von Neumann" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%ED%8F%B0_%EB%85%B8%EC%9D%B4%EB%A7%8C_%EA%B5%AC%EC%A1%B0" title="폰 노이만 구조 – Korean" lang="ko" hreflang="ko" data-title="폰 노이만 구조" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-ha mw-list-item"><a href="https://ha.wikipedia.org/wiki/Von_Neumann_architecture" title="Von Neumann architecture – Hausa" lang="ha" hreflang="ha" data-title="Von Neumann architecture" data-language-autonym="Hausa" data-language-local-name="Hausa" class="interlanguage-link-target"><span>Hausa</span></a></li><li class="interlanguage-link interwiki-hr mw-list-item"><a href="https://hr.wikipedia.org/wiki/Von_Neumannova_arhitektura" title="Von Neumannova arhitektura – Croatian" lang="hr" hreflang="hr" data-title="Von Neumannova arhitektura" data-language-autonym="Hrvatski" data-language-local-name="Croatian" class="interlanguage-link-target"><span>Hrvatski</span></a></li><li class="interlanguage-link interwiki-id mw-list-item"><a href="https://id.wikipedia.org/wiki/Arsitektur_von_Neumann" title="Arsitektur von Neumann – Indonesian" lang="id" hreflang="id" data-title="Arsitektur von Neumann" data-language-autonym="Bahasa Indonesia" data-language-local-name="Indonesian" class="interlanguage-link-target"><span>Bahasa Indonesia</span></a></li><li class="interlanguage-link interwiki-ia mw-list-item"><a href="https://ia.wikipedia.org/wiki/Architectura_de_von_Neumann" title="Architectura de von Neumann – Interlingua" lang="ia" hreflang="ia" data-title="Architectura de von Neumann" data-language-autonym="Interlingua" data-language-local-name="Interlingua" class="interlanguage-link-target"><span>Interlingua</span></a></li><li class="interlanguage-link interwiki-is mw-list-item"><a href="https://is.wikipedia.org/wiki/Von_Neumann_arkitekt%C3%BAr" title="Von Neumann arkitektúr – Icelandic" lang="is" hreflang="is" data-title="Von Neumann arkitektúr" data-language-autonym="Íslenska" data-language-local-name="Icelandic" class="interlanguage-link-target"><span>Íslenska</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Architettura_di_von_Neumann" title="Architettura di von Neumann – Italian" lang="it" hreflang="it" data-title="Architettura di von Neumann" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-he mw-list-item"><a href="https://he.wikipedia.org/wiki/%D7%90%D7%A8%D7%9B%D7%99%D7%98%D7%A7%D7%98%D7%95%D7%A8%D7%AA_%D7%A4%D7%95%D7%9F_%D7%A0%D7%95%D7%99%D7%9E%D7%9F" title="ארכיטקטורת פון נוימן – Hebrew" lang="he" hreflang="he" data-title="ארכיטקטורת פון נוימן" data-language-autonym="עברית" data-language-local-name="Hebrew" class="interlanguage-link-target"><span>עברית</span></a></li><li class="interlanguage-link interwiki-kk mw-list-item"><a href="https://kk.wikipedia.org/wiki/%D0%A4%D0%BE%D0%BD_%D0%9D%D0%B5%D0%B9%D0%BC%D0%B0%D0%BD_%D0%B0%D1%80%D1%85%D0%B8%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80%D0%B0%D1%81%D1%8B" title="Фон Нейман архитектурасы – Kazakh" lang="kk" hreflang="kk" data-title="Фон Нейман архитектурасы" data-language-autonym="Қазақша" data-language-local-name="Kazakh" class="interlanguage-link-target"><span>Қазақша</span></a></li><li class="interlanguage-link interwiki-la mw-list-item"><a href="https://la.wikipedia.org/wiki/Architectura_von_Neumann" title="Architectura von Neumann – Latin" lang="la" hreflang="la" data-title="Architectura von Neumann" data-language-autonym="Latina" data-language-local-name="Latin" class="interlanguage-link-target"><span>Latina</span></a></li><li class="interlanguage-link interwiki-lv mw-list-item"><a href="https://lv.wikipedia.org/wiki/Fon_Neimana_arhitekt%C5%ABra" title="Fon Neimana arhitektūra – Latvian" lang="lv" hreflang="lv" data-title="Fon Neimana arhitektūra" data-language-autonym="Latviešu" data-language-local-name="Latvian" class="interlanguage-link-target"><span>Latviešu</span></a></li><li class="interlanguage-link interwiki-lt mw-list-item"><a href="https://lt.wikipedia.org/wiki/Noimano_architekt%C5%ABra" title="Noimano architektūra – Lithuanian" lang="lt" hreflang="lt" data-title="Noimano architektūra" data-language-autonym="Lietuvių" data-language-local-name="Lithuanian" class="interlanguage-link-target"><span>Lietuvių</span></a></li><li class="interlanguage-link interwiki-lmo mw-list-item"><a href="https://lmo.wikipedia.org/wiki/Architettura_de_Von_Neumann" title="Architettura de Von Neumann – Lombard" lang="lmo" hreflang="lmo" data-title="Architettura de Von Neumann" data-language-autonym="Lombard" data-language-local-name="Lombard" class="interlanguage-link-target"><span>Lombard</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/Neumann-architekt%C3%BAra" title="Neumann-architektúra – Hungarian" lang="hu" hreflang="hu" data-title="Neumann-architektúra" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-mk mw-list-item"><a href="https://mk.wikipedia.org/wiki/%D0%A4%D0%BE%D0%BD_%D0%9D%D0%BE%D1%98%D0%BC%D0%B0%D0%BD%D0%BE%D0%B2%D0%B0_%D0%B0%D1%80%D1%85%D0%B8%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80%D0%B0" title="Фон Нојманова архитектура – Macedonian" lang="mk" hreflang="mk" data-title="Фон Нојманова архитектура" data-language-autonym="Македонски" data-language-local-name="Macedonian" class="interlanguage-link-target"><span>Македонски</span></a></li><li class="interlanguage-link interwiki-mn mw-list-item"><a href="https://mn.wikipedia.org/wiki/%D0%A4%D0%BE%D0%BD_%D0%9D%D0%B5%D0%B9%D0%BC%D0%B0%D0%BD_%D0%B0%D1%80%D1%85%D0%B8%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80" title="Фон Нейман архитектур – Mongolian" lang="mn" hreflang="mn" data-title="Фон Нейман архитектур" data-language-autonym="Монгол" data-language-local-name="Mongolian" class="interlanguage-link-target"><span>Монгол</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Von_Neumann-architectuur" title="Von Neumann-architectuur – Dutch" lang="nl" hreflang="nl" data-title="Von Neumann-architectuur" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/%E3%83%8E%E3%82%A4%E3%83%9E%E3%83%B3%E5%9E%8B" title="ノイマン型 – Japanese" lang="ja" hreflang="ja" data-title="ノイマン型" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/Von_Neumann-arkitektur" title="Von Neumann-arkitektur – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="Von Neumann-arkitektur" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-oc mw-list-item"><a href="https://oc.wikipedia.org/wiki/Arquitectura_de_von_Neumann" title="Arquitectura de von Neumann – Occitan" lang="oc" hreflang="oc" data-title="Arquitectura de von Neumann" data-language-autonym="Occitan" data-language-local-name="Occitan" class="interlanguage-link-target"><span>Occitan</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Architektura_von_Neumanna" title="Architektura von Neumanna – Polish" lang="pl" hreflang="pl" data-title="Architektura von Neumanna" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Arquitetura_de_von_Neumann" title="Arquitetura de von Neumann – Portuguese" lang="pt" hreflang="pt" data-title="Arquitetura de von Neumann" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ro mw-list-item"><a href="https://ro.wikipedia.org/wiki/Arhitectur%C4%83_von_Neumann" title="Arhitectură von Neumann – Romanian" lang="ro" hreflang="ro" data-title="Arhitectură von Neumann" data-language-autonym="Română" data-language-local-name="Romanian" class="interlanguage-link-target"><span>Română</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/%D0%90%D1%80%D1%85%D0%B8%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80%D0%B0_%D1%84%D0%BE%D0%BD_%D0%9D%D0%B5%D0%B9%D0%BC%D0%B0%D0%BD%D0%B0" title="Архитектура фон Неймана – Russian" lang="ru" hreflang="ru" data-title="Архитектура фон Неймана" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sq mw-list-item"><a href="https://sq.wikipedia.org/wiki/Arkitektura_e_Von_Neumann" title="Arkitektura e Von Neumann – Albanian" lang="sq" hreflang="sq" data-title="Arkitektura e Von Neumann" data-language-autonym="Shqip" data-language-local-name="Albanian" class="interlanguage-link-target"><span>Shqip</span></a></li><li class="interlanguage-link interwiki-simple mw-list-item"><a href="https://simple.wikipedia.org/wiki/Von_Neumann_architecture" title="Von Neumann architecture – Simple English" lang="en-simple" hreflang="en-simple" data-title="Von Neumann architecture" data-language-autonym="Simple English" data-language-local-name="Simple English" class="interlanguage-link-target"><span>Simple English</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Koncepcia_Johna_von_Neumanna" title="Koncepcia Johna von Neumanna – Slovak" lang="sk" hreflang="sk" data-title="Koncepcia Johna von Neumanna" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-sl mw-list-item"><a href="https://sl.wikipedia.org/wiki/Von_Neumannova_arhitektura" title="Von Neumannova arhitektura – Slovenian" lang="sl" hreflang="sl" data-title="Von Neumannova arhitektura" data-language-autonym="Slovenščina" data-language-local-name="Slovenian" class="interlanguage-link-target"><span>Slovenščina</span></a></li><li class="interlanguage-link interwiki-sr mw-list-item"><a href="https://sr.wikipedia.org/wiki/%D0%A4%D0%BE%D0%BD_%D0%9D%D0%BE%D1%98%D0%BC%D0%B0%D0%BD%D0%BE%D0%B2%D0%B0_%D0%B0%D1%80%D1%85%D0%B8%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80%D0%B0" title="Фон Нојманова архитектура – Serbian" lang="sr" hreflang="sr" data-title="Фон Нојманова архитектура" data-language-autonym="Српски / srpski" data-language-local-name="Serbian" class="interlanguage-link-target"><span>Српски / srpski</span></a></li><li class="interlanguage-link interwiki-sh mw-list-item"><a href="https://sh.wikipedia.org/wiki/Von_Neumannova_arhitektura" title="Von Neumannova arhitektura – Serbo-Croatian" lang="sh" hreflang="sh" data-title="Von Neumannova arhitektura" data-language-autonym="Srpskohrvatski / српскохрватски" data-language-local-name="Serbo-Croatian" class="interlanguage-link-target"><span>Srpskohrvatski / српскохрватски</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/Von_Neumannin_arkkitehtuuri" title="Von Neumannin arkkitehtuuri – Finnish" lang="fi" hreflang="fi" data-title="Von Neumannin arkkitehtuuri" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Von_Neumann-arkitekturen" title="Von Neumann-arkitekturen – Swedish" lang="sv" hreflang="sv" data-title="Von Neumann-arkitekturen" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-th mw-list-item"><a href="https://th.wikipedia.org/wiki/%E0%B8%AA%E0%B8%96%E0%B8%B2%E0%B8%9B%E0%B8%B1%E0%B8%95%E0%B8%A2%E0%B8%81%E0%B8%A3%E0%B8%A3%E0%B8%A1%E0%B8%9F%E0%B8%AD%E0%B8%99%E0%B8%99%E0%B8%AD%E0%B8%A2%E0%B8%A1%E0%B8%B1%E0%B8%99%E0%B8%99%E0%B9%8C" title="สถาปัตยกรรมฟอนนอยมันน์ – Thai" lang="th" hreflang="th" data-title="สถาปัตยกรรมฟอนนอยมันน์" data-language-autonym="ไทย" data-language-local-name="Thai" class="interlanguage-link-target"><span>ไทย</span></a></li><li class="interlanguage-link interwiki-tr mw-list-item"><a href="https://tr.wikipedia.org/wiki/Neumann_mimarisi" title="Neumann mimarisi – Turkish" lang="tr" hreflang="tr" data-title="Neumann mimarisi" data-language-autonym="Türkçe" data-language-local-name="Turkish" class="interlanguage-link-target"><span>Türkçe</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/%D0%90%D1%80%D1%85%D1%96%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80%D0%B0_%D1%84%D0%BE%D0%BD_%D0%9D%D0%B5%D0%B9%D0%BC%D0%B0%D0%BD%D0%B0" title="Архітектура фон Неймана – Ukrainian" lang="uk" hreflang="uk" data-title="Архітектура фон Неймана" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-vi mw-list-item"><a href="https://vi.wikipedia.org/wiki/Ki%E1%BA%BFn_tr%C3%BAc_von_Neumann" title="Kiến trúc von Neumann – Vietnamese" lang="vi" hreflang="vi" data-title="Kiến trúc von Neumann" data-language-autonym="Tiếng Việt" data-language-local-name="Vietnamese" class="interlanguage-link-target"><span>Tiếng Việt</span></a></li><li class="interlanguage-link interwiki-war mw-list-item"><a href="https://war.wikipedia.org/wiki/Arkitektura_Von_Neumann" title="Arkitektura Von Neumann – Waray" lang="war" hreflang="war" data-title="Arkitektura Von Neumann" data-language-autonym="Winaray" data-language-local-name="Waray" class="interlanguage-link-target"><span>Winaray</span></a></li><li class="interlanguage-link interwiki-zh-yue mw-list-item"><a href="https://zh-yue.wikipedia.org/wiki/%E9%A6%AE%E7%B4%90%E6%9B%BC%E6%9E%B6%E6%A7%8B" title="馮紐曼架構 – Cantonese" lang="yue" hreflang="yue" data-title="馮紐曼架構" data-language-autonym="粵語" data-language-local-name="Cantonese" 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data-event-name="pinnable-header.vector-appearance.unpin">hide</button> </div> </div> </div> </nav> </div> </div> <div id="bodyContent" class="vector-body" aria-labelledby="firstHeading" data-mw-ve-target-container> <div class="vector-body-before-content"> <div class="mw-indicators"> </div> <div id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Computer architecture where code and data share a common bus</div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/Stored-program_computer" title="Stored-program computer">Stored-program computer</a> and <a href="/wiki/Universal_Turing_machine#Stored-program_computer" title="Universal Turing machine">Universal Turing machine § Stored-program computer</a></div> <p class="mw-empty-elt"> </p> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Von_Neumann_Architecture.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/e5/Von_Neumann_Architecture.svg/300px-Von_Neumann_Architecture.svg.png" decoding="async" width="300" height="174" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/e5/Von_Neumann_Architecture.svg/450px-Von_Neumann_Architecture.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/e5/Von_Neumann_Architecture.svg/600px-Von_Neumann_Architecture.svg.png 2x" data-file-width="510" data-file-height="295" /></a><figcaption>A von Neumann architecture scheme</figcaption></figure> <p>The <b>von Neumann architecture</b>—also known as the <b>von Neumann model</b> or <b>Princeton architecture</b>—is a <a href="/wiki/Computer_architecture" title="Computer architecture">computer architecture</a> based on the <i><a href="/wiki/First_Draft_of_a_Report_on_the_EDVAC" title="First Draft of a Report on the EDVAC">First Draft of a Report on the EDVAC</a></i>,<sup id="cite_ref-FirstDraftReport_1-0" class="reference"><a href="#cite_note-FirstDraftReport-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> written by <a href="/wiki/John_von_Neumann" title="John von Neumann">John von Neumann</a> in 1945, describing designs discussed with <a href="/wiki/John_Mauchly" title="John Mauchly">John Mauchly</a> and <a href="/wiki/J._Presper_Eckert" title="J. Presper Eckert">J. Presper Eckert</a> at the University of Pennsylvania's <a href="/wiki/Moore_School_of_Electrical_Engineering" title="Moore School of Electrical Engineering">Moore School of Electrical Engineering</a>. The document describes a design architecture for an electronic <a href="/wiki/Digital_computer" class="mw-redirect" title="Digital computer">digital computer</a> made of "organs" that were later understood to have these components: </p> <ul><li>A <a href="/wiki/Central_processing_unit" title="Central processing unit">processing unit</a> with both an <a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">arithmetic logic unit</a> and <a href="/wiki/Processor_register" title="Processor register">processor registers</a></li> <li>A <a href="/wiki/Control_unit" title="Control unit">control unit</a> that includes an <a href="/wiki/Instruction_register" title="Instruction register">instruction register</a> and a <a href="/wiki/Program_counter" title="Program counter">program counter</a></li> <li><a href="/wiki/Computer_memory" title="Computer memory">Memory</a> that stores <a href="/wiki/Data_(computing)" class="mw-redirect" title="Data (computing)">data</a> and <a href="/wiki/Instruction_set" class="mw-redirect" title="Instruction set">instructions</a></li> <li>External <a href="/wiki/Mass_storage" title="Mass storage">mass storage</a></li> <li><a href="/wiki/Input_and_output" class="mw-redirect" title="Input and output">Input and output</a> mechanisms<sup id="cite_ref-FirstDraftReport_1-1" class="reference"><a href="#cite_note-FirstDraftReport-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-GanesanCh4_2-0" class="reference"><a href="#cite_note-GanesanCh4-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup></li></ul> <p>The attribution of the invention of the architecture to von Neumann is controversial, not least because Eckert and Mauchly had done a lot of the required design work and claim to have had the idea for stored programs long before discussing the ideas with von Neumann and <a href="/wiki/Herman_Goldstine" title="Herman Goldstine">Herman Goldstine</a>.<sup id="cite_ref-FiftyYearsOfArmyComputing_3-0" class="reference"><a href="#cite_note-FiftyYearsOfArmyComputing-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </p><p>The term "von Neumann architecture" has evolved to refer to any <a href="/wiki/Stored-program_computer" title="Stored-program computer">stored-program computer</a> in which an <a href="/wiki/Instruction_fetch" class="mw-redirect" title="Instruction fetch">instruction fetch</a> and a data operation cannot occur at the same time (since they share a common <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a>). This is referred to as the <a href="#von_Neumann_bottleneck">von Neumann bottleneck</a>, which often limits the performance of the corresponding system.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </p><p>The von Neumann architecture is simpler than the <a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard architecture</a> (which has one dedicated set of address and data buses for reading and writing to memory and another set of address and data buses to fetch <a href="/wiki/Instruction_fetch" class="mw-redirect" title="Instruction fetch">instructions</a>). </p><p>A <a href="/wiki/Stored-program_computer" title="Stored-program computer">stored-program computer</a> uses the same underlying mechanism to encode both <a href="/wiki/Computer_program" title="Computer program">program instructions</a> and data as opposed to designs which use a mechanism such as discrete <a href="/wiki/Plugboard" title="Plugboard">plugboard</a> wiring or fixed control circuitry for instruction <a href="/wiki/Implementation" title="Implementation">implementation</a>. Stored-program computers were an advancement over the manually reconfigured or fixed function computers of the 1940s, such as the <a href="/wiki/Colossus_computer" title="Colossus computer">Colossus</a> and the <a href="/wiki/ENIAC" title="ENIAC">ENIAC</a>. These were programmed by setting <a href="/wiki/Switch" title="Switch">switches</a> and inserting <a href="/wiki/Patch_cable" title="Patch cable">patch cables</a> to route data and control signals between various functional units. </p><p>The vast majority of modern computers use the same hardware mechanism to encode and store both data and program instructions, but have <a href="/wiki/CPU_cache" title="CPU cache">caches</a> between the CPU and memory, and, for the caches closest to the CPU, have separate caches for instructions and data, so that most instruction and data fetches use separate buses (<a href="/wiki/Modified_Harvard_architecture#Split-cache_(or_almost-von-Neumann)_architecture" title="Modified Harvard architecture">split-cache architecture</a>). </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="History">History</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=1" title="Edit section: History"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The earliest computing machines had fixed programs. Some very simple computers still use this design, either for simplicity or training purposes. For example, a desk <a href="/wiki/Calculator" title="Calculator">calculator</a> (in principle) is a fixed program computer. It can do basic <a href="/wiki/Mathematics" title="Mathematics">mathematics</a>, but it cannot run a <a href="/wiki/Word_processor" title="Word processor">word processor</a> or games. Changing the program of a fixed-program machine requires rewiring, restructuring, or redesigning the machine. The earliest computers were not so much "programmed" as "designed" for a particular task. "Reprogramming"—when possible at all—was a laborious process that started with <a href="/wiki/Flowchart" title="Flowchart">flowcharts</a> and paper notes, followed by detailed engineering designs, and then the often-arduous process of physically rewiring and rebuilding the machine. It could take three weeks to set up and debug a program on <a href="/wiki/ENIAC" title="ENIAC">ENIAC</a>.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p><p>With the proposal of the stored-program computer, this changed. A stored-program computer includes, by design, an <a href="/wiki/Instruction_set" class="mw-redirect" title="Instruction set">instruction set</a>, and can store in memory a set of instructions (a <a href="/wiki/Computer_program" title="Computer program">program</a>) that details the <a href="/wiki/Computation" title="Computation">computation</a>. </p><p>A stored-program design also allows for <a href="/wiki/Self-modifying_code" title="Self-modifying code">self-modifying code</a>. One early motivation for such a facility was the need for a program to increment or otherwise modify the address portion of instructions, which operators had to do manually in early designs. This became less important when <a href="/wiki/Index_register" title="Index register">index registers</a> and <a href="/wiki/Addressing_mode" title="Addressing mode">indirect addressing</a> became usual features of machine architecture. Another use was to embed frequently used data in the instruction stream using <a href="/wiki/Addressing_mode" title="Addressing mode">immediate addressing</a>. </p><p>When von Neumann described the automatic computing systems using different terminology than is typically described with the model. In the <i><a href="/wiki/First_Draft_of_a_Report_on_the_EDVAC" title="First Draft of a Report on the EDVAC">First Draft of a Report on the EDVAC</a></i>,<sup id="cite_ref-FirstDraftReport_1-2" class="reference"><a href="#cite_note-FirstDraftReport-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> the architecture was composed of "a high-speed memory M, a central arithmetic unit CA, an outside recording medium R, an input organ I, an output organ O, and a central control CC" <sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Capabilities">Capabilities</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=2" title="Edit section: Capabilities"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>On a large scale, the ability to treat instructions as data is what makes <a href="/wiki/Assembly_language#Assembler" title="Assembly language">assemblers</a>, <a href="/wiki/Compiler" title="Compiler">compilers</a>, <a href="/wiki/Linker_(computing)" title="Linker (computing)">linkers</a>, <a href="/wiki/Loader_(computing)" title="Loader (computing)">loaders</a>, and other automated programming tools possible. It makes "programs that write programs" possible.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> This has made a sophisticated self-hosting computing ecosystem flourish around von Neumann architecture machines. </p><p>Some <a href="/wiki/High-level_programming_language" title="High-level programming language">high-level languages</a> leverage the von Neumann architecture by providing an abstract, machine-independent way to manipulate <a href="/wiki/Executable" title="Executable">executable code</a> at runtime (e.g., <a href="/wiki/LISP" class="mw-redirect" title="LISP">LISP</a>), or by using runtime information to tune <a href="/wiki/Just-in-time_compilation" title="Just-in-time compilation">just-in-time compilation</a> (e.g. languages hosted on the <a href="/wiki/Java_virtual_machine" title="Java virtual machine">Java virtual machine</a>, or languages embedded in <a href="/wiki/Web_browsers" class="mw-redirect" title="Web browsers">web browsers</a>). </p><p>On a smaller scale, some repetitive operations such as <a href="/wiki/Bit_blit" title="Bit blit">BITBLT</a> or <a href="/wiki/High-Level_Shader_Language" title="High-Level Shader Language">pixel and vertex shaders</a> can be accelerated on general purpose processors with just-in-time compilation techniques. This is one use of self-modifying code that has remained popular. </p> <div class="mw-heading mw-heading2"><h2 id="Development_of_the_stored-program_concept">Development of the stored-program concept</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=3" title="Edit section: Development of the stored-program concept"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The mathematician <a href="/wiki/Alan_Turing" title="Alan Turing">Alan Turing</a>, who had been alerted to a problem of mathematical logic by the lectures of <a href="/wiki/Max_Newman" title="Max Newman">Max Newman</a> at the <a href="/wiki/University_of_Cambridge" title="University of Cambridge">University of Cambridge</a>, wrote a paper in 1936 entitled <i>On Computable Numbers, with an Application to the <a href="/wiki/Entscheidungsproblem" title="Entscheidungsproblem">Entscheidungsproblem</a></i>, which was published in the <i>Proceedings of the London Mathematical Society</i>.<sup id="cite_ref-Turing1936_8-0" class="reference"><a href="#cite_note-Turing1936-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> In it he described a hypothetical machine he called a <i>universal computing machine</i>, now known as the "<a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal Turing machine</a>". The hypothetical machine had an infinite store (memory in today's terminology) that contained both instructions and data. <a href="/wiki/John_von_Neumann" title="John von Neumann">John von Neumann</a> became acquainted with Turing while he was a visiting professor at Cambridge in 1935, and also during Turing's PhD year at the <a href="/wiki/Institute_for_Advanced_Study" title="Institute for Advanced Study">Institute for Advanced Study</a> in <a href="/wiki/Princeton,_New_Jersey" title="Princeton, New Jersey">Princeton, New Jersey</a> during 1936–1937. Whether he knew of Turing's paper of 1936 at that time is not clear. </p><p>In 1936, <a href="/wiki/Konrad_Zuse" title="Konrad Zuse">Konrad Zuse</a> also anticipated, in two patent applications, that machine instructions could be stored in the same storage used for data.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> </p><p>Independently, <a href="/wiki/J._Presper_Eckert" title="J. Presper Eckert">J. Presper Eckert</a> and <a href="/wiki/John_Mauchly" title="John Mauchly">John Mauchly</a>, who were developing the <a href="/wiki/ENIAC" title="ENIAC">ENIAC</a> at the <a href="/wiki/Moore_School_of_Electrical_Engineering" title="Moore School of Electrical Engineering">Moore School of Electrical Engineering</a> of the <a href="/wiki/University_of_Pennsylvania" title="University of Pennsylvania">University of Pennsylvania</a>, wrote about the stored-program concept in December 1943. <sup id="cite_ref-Lukoff_1979_10-0" class="reference"><a href="#cite_note-Lukoff_1979-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> In planning a new machine, <a href="/wiki/EDVAC" title="EDVAC">EDVAC</a>, Eckert wrote in January 1944 that they would store data and programs in a new addressable memory device, a mercury metal <a href="/wiki/Delay-line_memory" title="Delay-line memory">delay-line memory</a>. This was the first time the construction of a practical stored-program machine was proposed. At that time, he and Mauchly were not aware of Turing's work. </p><p>Von Neumann was involved in the <a href="/wiki/Manhattan_Project" title="Manhattan Project">Manhattan Project</a> at the <a href="/wiki/Los_Alamos_National_Laboratory" title="Los Alamos National Laboratory">Los Alamos National Laboratory</a>. It required huge amounts of calculation, and thus drew him to the ENIAC project, during the summer of 1944. There he joined the ongoing discussions on the design of this stored-program computer, the EDVAC. As part of that group, he wrote up a description titled <i>First Draft of a Report on the EDVAC</i><sup id="cite_ref-FirstDraftReport_1-3" class="reference"><a href="#cite_note-FirstDraftReport-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> based on the work of Eckert and Mauchly. It was unfinished when his colleague Herman Goldstine circulated it, and bore only von Neumann's name (to the consternation of Eckert and Mauchly).<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> The paper was read by dozens of von Neumann's colleagues in America and Europe, and influenced<sup class="noprint Inline-Template" style="margin-left:0.1em; white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Vagueness" title="Wikipedia:Vagueness"><span title="This information is too vague. (March 2022)">vague</span></a></i>]</sup> the next round of computer designs. </p><p><a href="/wiki/Jack_Copeland" title="Jack Copeland">Jack Copeland</a> considers that it is "historically inappropriate to refer to electronic stored-program digital computers as 'von Neumann machines<span style="padding-right:.15em;">'</span>".<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> His Los Alamos colleague <a href="/wiki/Stan_Frankel" title="Stan Frankel">Stan Frankel</a> said of von Neumann's regard for Turing's ideas<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> </p> <style data-mw-deduplicate="TemplateStyles:r1244412712">.mw-parser-output .templatequote{overflow:hidden;margin:1em 0;padding:0 32px}.mw-parser-output .templatequotecite{line-height:1.5em;text-align:left;margin-top:0}@media(min-width:500px){.mw-parser-output .templatequotecite{padding-left:1.6em}}</style><blockquote class="templatequote"> <p>I know that in or about 1943 or '44 von Neumann was well aware of the fundamental importance of Turing's paper of 1936.... Von Neumann introduced me to that paper and at his urging I studied it with care. Many people have acclaimed von Neumann as the "father of the computer" (in a modern sense of the term) but I am sure that he would never have made that mistake himself. He might well be called the midwife, perhaps, but he firmly emphasized to me, and to others I am sure, that the fundamental conception is owing to Turing—in so far as not anticipated by Babbage.... Both Turing and von Neumann, of course, also made substantial contributions to the "<a href="/wiki/Reduction_to_practice" title="Reduction to practice">reduction to practice</a>" of these concepts but I would not regard these as comparable in importance with the introduction and explication of the concept of a computer able to store in its memory its program of activities and of modifying that program in the course of these activities. </p> </blockquote> <p>At the time that the "First Draft" report was circulated, Turing was producing a report entitled <i>Proposed Electronic Calculator</i>. It described in engineering and programming detail, his idea of a machine he called the <i><a href="/wiki/Automatic_Computing_Engine" title="Automatic Computing Engine">Automatic Computing Engine (ACE)</a></i>.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> He presented this to the executive committee of the British <a href="/wiki/National_Physical_Laboratory,_UK" class="mw-redirect" title="National Physical Laboratory, UK">National Physical Laboratory</a> on February 19, 1946. Although Turing knew from his wartime experience at Bletchley Park that what he proposed was feasible, the secrecy surrounding <a href="/wiki/Colossus_computer" title="Colossus computer">Colossus</a>, that was subsequently maintained for several decades, prevented him from saying so. Various successful implementations of the ACE design were produced. </p><p>Both von Neumann's and Turing's papers described stored-program computers, but von Neumann's earlier paper achieved greater circulation and the computer architecture it outlined became known as the "von Neumann architecture". In the 1953 publication <i>Faster than Thought: A Symposium on Digital Computing Machines</i> (edited by B. V. Bowden), a section in the chapter on <i>Computers in America</i> reads as follows:<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> </p> <blockquote> <p><b>The Machine of the Institute For Advanced Study, Princeton</b> </p><p>In 1945, Professor J. von Neumann, who was then working at the Moore School of Engineering in Philadelphia, where the E.N.I.A.C. had been built, issued on behalf of a group of his co-workers, a report on the logical design of digital computers. The report contained a detailed proposal for the design of the machine that has since become known as the E.D.V.A.C. (electronic discrete variable automatic computer). This machine has only recently been completed in America, but the von Neumann report inspired the construction of the E.D.S.A.C. (electronic delay-storage automatic calculator) in Cambridge (see p. 130). </p><p>In 1947, Burks, Goldstine and von Neumann published another report that outlined the design of another type of machine (a parallel machine this time) that would be exceedingly fast, capable perhaps of 20,000 operations per second. They pointed out that the outstanding problem in constructing such a machine was the development of suitable memory with instantaneously accessible contents. At first they suggested using a special <a href="/wiki/Vacuum_tube" title="Vacuum tube">vacuum tube</a>—called the "<a href="/wiki/Selectron_tube" title="Selectron tube">Selectron</a>"—which the Princeton Laboratories of RCA had invented. These tubes were expensive and difficult to make, so von Neumann subsequently decided to build a machine based on the <a href="/wiki/Williams_tube" title="Williams tube">Williams memory</a>. This machine—completed in June, 1952 in Princeton—has become popularly known as the Maniac. The design of this machine inspired at least half a dozen machines now being built in America, all known affectionately as "Johniacs". </p> </blockquote> <p>In the same book, the first two paragraphs of a chapter on ACE read as follows:<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> </p> <blockquote> <p><b>Automatic Computation at the National Physical Laboratory</b> </p><p>One of the most modern digital computers which embodies developments and improvements in the technique of automatic electronic computing was recently demonstrated at the National Physical Laboratory, Teddington, where it has been designed and built by a small team of mathematicians and electronics research engineers on the staff of the Laboratory, assisted by a number of production engineers from the English Electric Company, Limited. The equipment so far erected at the Laboratory is only the pilot model of a much larger installation which will be known as the Automatic Computing Engine, but although comparatively small in bulk and containing only about 800 thermionic valves, as can be judged from Plates XII, XIII and XIV, it is an extremely rapid and versatile calculating machine. </p><p>The basic concepts and abstract principles of computation by a machine were formulated by Dr. A. M. Turing, F.R.S., in a paper<sup>1</sup>. read before the London Mathematical Society in 1936, but work on such machines in Britain was delayed by the war. In 1945, however, an examination of the problems was made at the National Physical Laboratory by Mr. J. R. Womersley, then superintendent of the Mathematics Division of the Laboratory. He was joined by Dr. Turing and a small staff of specialists, and, by 1947, the preliminary planning was sufficiently advanced to warrant the establishment of the special group already mentioned. In April, 1948, the latter became the Electronics Section of the Laboratory, under the charge of Mr. F. M. Colebrook. </p> </blockquote> <div class="mw-heading mw-heading2"><h2 id="Early_von_Neumann-architecture_computers">Early von Neumann-architecture computers</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=4" title="Edit section: Early von Neumann-architecture computers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The <i>First Draft</i> described a design that was used by many universities and corporations to construct their computers.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> Among these various computers, only ILLIAC and ORDVAC had compatible instruction sets. </p> <ul><li><a href="/wiki/APEXC" title="APEXC">ARC2</a> (<a href="/wiki/Birkbeck,_University_of_London" title="Birkbeck, University of London">Birkbeck, University of London</a>) officially came online on May 12, 1948.<sup id="cite_ref-birkbeck_19-0" class="reference"><a href="#cite_note-birkbeck-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup></li> <li><a href="/wiki/Manchester_Baby" title="Manchester Baby">Manchester Baby</a> (<a href="/wiki/Victoria_University_of_Manchester" title="Victoria University of Manchester">Victoria University of Manchester</a>, England) made its first successful run of a stored program on June 21, 1948.</li> <li><a href="/wiki/EDSAC" title="EDSAC">EDSAC</a> (<a href="/wiki/University_of_Cambridge" title="University of Cambridge">University of Cambridge</a>, England) was the first practical stored-program electronic computer (May 1949)</li> <li><a href="/wiki/Manchester_Mark_1" title="Manchester Mark 1">Manchester Mark 1</a> (<a href="/wiki/University_of_Manchester" title="University of Manchester">University of Manchester</a>, England) Developed from the Baby (June 1949)</li> <li><a href="/wiki/CSIRAC" title="CSIRAC">CSIRAC</a> (<a href="/wiki/Commonwealth_Scientific_and_Industrial_Research_Organisation" class="mw-redirect" title="Commonwealth Scientific and Industrial Research Organisation">Council for Scientific and Industrial Research</a>) Australia (November 1949)</li> <li><a href="/wiki/MESM" title="MESM">MESM</a> at the <a href="/wiki/Kiev_Institute_of_Electrotechnology" class="mw-redirect" title="Kiev Institute of Electrotechnology">Kiev Institute of Electrotechnology</a> in <a href="/wiki/Kyiv" title="Kyiv">Kiev</a>, <a href="/wiki/Ukrainian_Soviet_Socialist_Republic" title="Ukrainian Soviet Socialist Republic">Ukrainian SSR</a> (November 1950)</li> <li><a href="/wiki/EDVAC" title="EDVAC">EDVAC</a> (<a href="/wiki/Ballistic_Research_Laboratory" title="Ballistic Research Laboratory">Ballistic Research Laboratory</a>, Computing Laboratory at <a href="/wiki/Aberdeen_Proving_Ground" title="Aberdeen Proving Ground">Aberdeen Proving Ground</a> 1951)</li> <li><a href="/wiki/IAS_machine" title="IAS machine">IAS machine</a> at <a href="/wiki/Institute_for_Advanced_Study" title="Institute for Advanced Study">Institute for Advanced Study</a> (1951)</li> <li><a href="/wiki/ORDVAC" title="ORDVAC">ORDVAC</a> (University of Illinois) at <a href="/wiki/Aberdeen_Proving_Ground" title="Aberdeen Proving Ground">Aberdeen Proving Ground</a>, Maryland (completed November 1951)<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup></li> <li><a href="/wiki/MANIAC_I" title="MANIAC I">MANIAC I</a> at <a href="/wiki/Los_Alamos_Scientific_Laboratory" class="mw-redirect" title="Los Alamos Scientific Laboratory">Los Alamos Scientific Laboratory</a> (March 1952)</li> <li><a href="/wiki/ILLIAC" title="ILLIAC">ILLIAC</a> at the <a href="/wiki/University_of_Illinois_Urbana-Champaign" title="University of Illinois Urbana-Champaign">University of Illinois</a>, (September 1952)</li> <li><a href="/wiki/BESM" title="BESM">BESM-1</a> in Moscow (1952)</li> <li><a href="/wiki/AVIDAC" title="AVIDAC">AVIDAC</a> at <a href="/wiki/Argonne_National_Laboratory" title="Argonne National Laboratory">Argonne National Laboratory</a> (1953)</li> <li><a href="/wiki/ORACLE_(computer)" title="ORACLE (computer)">ORACLE</a> at <a href="/wiki/Oak_Ridge_National_Laboratory" title="Oak Ridge National Laboratory">Oak Ridge National Laboratory</a> (June 1953)</li> <li><a href="/wiki/BESK" title="BESK">BESK</a> in Stockholm (1953)</li> <li><a href="/wiki/JOHNNIAC" title="JOHNNIAC">JOHNNIAC</a> at <a href="/wiki/RAND_Corporation" title="RAND Corporation">RAND Corporation</a> (January 1954)</li> <li><a href="/wiki/DASK" title="DASK">DASK</a> in Denmark (1955)</li> <li><a href="/wiki/WEIZAC" title="WEIZAC">WEIZAC</a> at the <a href="/wiki/Weizmann_Institute_of_Science" title="Weizmann Institute of Science">Weizmann Institute of Science</a> in <a href="/wiki/Rehovot" title="Rehovot">Rehovot</a>, Israel (1955)</li> <li><a href="/wiki/PERM_(computer)" title="PERM (computer)">PERM</a> in Munich (1956)</li> <li><a href="/wiki/SILLIAC" title="SILLIAC">SILLIAC</a> in Sydney (1956)</li></ul> <div class="mw-heading mw-heading2"><h2 id="Early_stored-program_computers">Early stored-program computers</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=5" title="Edit section: Early stored-program computers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The date information in the following chronology is difficult to put into proper order. Some dates are for first running a test program, some dates are the first time the computer was demonstrated or completed, and some dates are for the first delivery or installation. </p> <ul><li>The <a href="/wiki/IBM_SSEC" title="IBM SSEC">IBM SSEC</a> had the ability to treat instructions as data, and was publicly demonstrated on January 27, 1948. This ability was claimed in a <a href="/wiki/United_States_patent_law" title="United States patent law">US patent</a>.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> However it was partially <a href="/wiki/Electromechanics" title="Electromechanics">electromechanical</a>, not fully electronic. In practice, instructions were read from <a href="/wiki/Punched_tape" title="Punched tape">paper tape</a> due to its limited memory.<sup id="cite_ref-herb_23-0" class="reference"><a href="#cite_note-herb-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup></li> <li>The <a href="/wiki/APEXC" title="APEXC">ARC2</a> developed by <a href="/wiki/Andrew_Donald_Booth" title="Andrew Donald Booth">Andrew Booth</a> and <a href="/wiki/Kathleen_Booth" title="Kathleen Booth">Kathleen Booth</a> at <a href="/wiki/Birkbeck,_University_of_London" title="Birkbeck, University of London">Birkbeck, University of London</a> officially came online on May 12, 1948.<sup id="cite_ref-birkbeck_19-1" class="reference"><a href="#cite_note-birkbeck-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> It featured the first <a href="/wiki/Drum_memory" title="Drum memory">rotating drum storage device</a>.<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup></li> <li>The <a href="/wiki/Manchester_Baby" title="Manchester Baby">Manchester Baby</a> was the first fully electronic computer to run a stored program. It ran a factoring program for 52 minutes on June 21, 1948, after running a simple division program and a program to show that two numbers were <a href="/wiki/Coprime_integers" title="Coprime integers">relatively prime</a>.</li> <li>The <a href="/wiki/ENIAC" title="ENIAC">ENIAC</a> was modified to run as a primitive read-only stored-program computer (using the Function Tables for program <a href="/wiki/Read-only_memory" title="Read-only memory">ROM</a>) and was demonstrated as such on September 16, 1948, running a program by <a href="/wiki/Adele_Goldstine" title="Adele Goldstine">Adele Goldstine</a> for von Neumann.</li> <li>The <a href="/wiki/BINAC" title="BINAC">BINAC</a> ran some test programs in February, March, and April 1949, although was not completed until September 1949.</li> <li>The <a href="/wiki/Manchester_Mark_1" title="Manchester Mark 1">Manchester Mark 1</a> developed from the Baby project. An intermediate version of the Mark 1 was available to run programs in April 1949, but was not completed until October 1949.</li> <li>The <a href="/wiki/Electronic_Delay_Storage_Automatic_Calculator" class="mw-redirect" title="Electronic Delay Storage Automatic Calculator">EDSAC</a> ran its first program on May 6, 1949.</li> <li>The <a href="/wiki/EDVAC" title="EDVAC">EDVAC</a> was delivered in August 1949, but it had problems that kept it from being put into regular operation until 1951.</li> <li>The <a href="/wiki/CSIRAC" title="CSIRAC">CSIR Mk I</a> ran its first program in November 1949.</li> <li>The <a href="/wiki/SEAC_(computer)" title="SEAC (computer)">SEAC</a> was demonstrated in April 1950.</li> <li>The <a href="/wiki/Pilot_ACE" title="Pilot ACE">Pilot ACE</a> ran its first program on May 10, 1950, and was demonstrated in December 1950.</li> <li>The <a href="/wiki/SWAC_(computer)" title="SWAC (computer)">SWAC</a> was completed in July 1950.</li> <li>The <a href="/wiki/Whirlwind_(computer)" class="mw-redirect" title="Whirlwind (computer)">Whirlwind</a> was completed in December 1950 and was in actual use in April 1951.</li> <li>The first <a href="/wiki/UNIVAC_1101" title="UNIVAC 1101">ERA Atlas</a> (later the commercial ERA 1101/UNIVAC 1101) was installed in December 1950.</li></ul> <div class="mw-heading mw-heading2"><h2 id="Evolution">Evolution</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=6" title="Edit section: Evolution"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Computer_system_bus.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/68/Computer_system_bus.svg/220px-Computer_system_bus.svg.png" decoding="async" width="220" height="162" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/68/Computer_system_bus.svg/330px-Computer_system_bus.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/68/Computer_system_bus.svg/440px-Computer_system_bus.svg.png 2x" data-file-width="740" data-file-height="545" /></a><figcaption>Single <a href="/wiki/System_bus" title="System bus">system bus</a> evolution of the architecture</figcaption></figure> <p>Through the decades of the 1960s and 1970s computers generally became both smaller and faster, which led to evolutions in their architecture. For example, <a href="/wiki/Memory-mapped_I/O" class="mw-redirect" title="Memory-mapped I/O">memory-mapped I/O</a> lets input and output <a href="/wiki/Peripheral" title="Peripheral">devices</a> be treated the same as memory.<sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup> A single <a href="/wiki/System_bus" title="System bus">system bus</a> could be used to provide a modular system with lower cost<sup class="noprint Inline-Template" style="margin-left:0.1em; white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Please_clarify" title="Wikipedia:Please clarify"><span title="The text near this tag may need clarification or removal of jargon. (November 2015)">clarification needed</span></a></i>]</sup>. This is sometimes called a "streamlining" of the architecture.<sup id="cite_ref-27" class="reference"><a href="#cite_note-27"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup> In subsequent decades, simple <a href="/wiki/Microcontrollers" class="mw-redirect" title="Microcontrollers">microcontrollers</a> would sometimes omit features of the model to lower cost and size. Larger computers added features for higher performance. </p> <div class="mw-heading mw-heading2"><h2 id="Design_limitations">Design limitations</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=7" title="Edit section: Design limitations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="von_Neumann_bottleneck">von Neumann bottleneck</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=8" title="Edit section: von Neumann bottleneck"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The use of the same bus to fetch instructions and data leads to the <i>von Neumann bottleneck</i>, the limited <a href="/wiki/Throughput" class="mw-redirect" title="Throughput">throughput</a> (data transfer rate) between the <a href="/wiki/Central_processing_unit" title="Central processing unit">central processing unit</a> (CPU) and memory compared to the amount of memory. Because the single bus can only access one of the two classes of memory at a time, throughput is lower than the rate at which the CPU can work. This seriously limits the effective processing speed when the CPU is required to perform minimal processing on large amounts of data. The CPU is continually <a href="/wiki/Wait_state" title="Wait state">forced to wait</a> for needed data to move to or from memory. Since CPU speed and memory size have increased much faster than the throughput between them, the bottleneck has become more of a problem, a problem whose severity increases with every new generation of CPU. </p><p>The von Neumann bottleneck was described by <a href="/wiki/John_Backus" title="John Backus">John Backus</a> in his 1977 ACM <a href="/wiki/Turing_Award" title="Turing Award">Turing Award</a> lecture. According to Backus: </p> <blockquote><p>Surely there must be a less primitive way of making big changes in the store than by pushing vast numbers of <a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">words</a> back and forth through the von Neumann bottleneck. Not only is this tube a literal bottleneck for the data traffic of a problem, but, more importantly, it is an intellectual bottleneck that has kept us tied to word-at-a-time thinking instead of encouraging us to think in terms of the larger conceptual units of the task at hand. Thus programming is basically planning and detailing the enormous traffic of words through the von Neumann bottleneck, and much of that traffic concerns not significant data itself, but where to find it.<sup id="cite_ref-backus_28-0" class="reference"><a href="#cite_note-backus-28"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup></p></blockquote> <div class="mw-heading mw-heading4"><h4 id="Mitigations">Mitigations</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=9" title="Edit section: Mitigations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>There are several known methods for mitigating the Von Neumann performance bottleneck. For example, the following all can improve performance<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Please_clarify" title="Wikipedia:Please clarify"><span title="The reason for this is unclear. (November 2015)">why?</span></a></i>]</sup>: </p> <ul><li>providing a <a href="/wiki/CPU_cache" title="CPU cache">cache</a> between the CPU and the <a href="/wiki/Main_memory" class="mw-redirect" title="Main memory">main memory</a>;</li> <li>providing separate caches or separate access paths for data and instructions (the so-called <a href="/wiki/Modified_Harvard_architecture" title="Modified Harvard architecture">Modified Harvard architecture</a>);</li> <li>using <a href="/wiki/Branch_predictor" title="Branch predictor">branch predictor</a> algorithms and logic;</li> <li>providing a limited CPU stack or other on-chip <a href="/wiki/Scratchpad_memory" title="Scratchpad memory">scratchpad memory</a> to reduce memory access;</li> <li>implementing the CPU and the <a href="/wiki/Memory_hierarchy" title="Memory hierarchy">memory hierarchy</a> as a <a href="/wiki/System_on_a_chip" title="System on a chip">system on chip</a>, providing greater <a href="/wiki/Locality_of_reference" title="Locality of reference">locality of reference</a> and thus reducing latency and increasing throughput between <a href="/wiki/Processor_register" title="Processor register">processor registers</a> and <a href="/wiki/Main_memory" class="mw-redirect" title="Main memory">main memory</a>.</li></ul> <p>The problem can also be sidestepped somewhat by using <a href="/wiki/Parallel_computing" title="Parallel computing">parallel computing</a>, using for example the <a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">non-uniform memory access</a> (NUMA) architecture—this approach is commonly employed by <a href="/wiki/Supercomputer" title="Supercomputer">supercomputers</a>. It is less clear whether the <i>intellectual bottleneck</i> that Backus criticized has changed much since 1977. Backus's proposed solution has not had a major influence.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (December 2010)">citation needed</span></a></i>]</sup> Modern <a href="/wiki/Functional_programming" title="Functional programming">functional programming</a> and <a href="/wiki/Object-oriented_programming" title="Object-oriented programming">object-oriented programming</a> are much less geared towards "pushing vast numbers of words back and forth" than earlier languages like <a href="/wiki/FORTRAN" class="mw-redirect" title="FORTRAN">FORTRAN</a> were, but internally, that is still what computers spend much of their time doing, even highly parallel supercomputers. </p><p>As of 1996, a database benchmark study found that three out of four CPU cycles were spent waiting for memory. Researchers expect that increasing the number of simultaneous instruction streams with <a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">multithreading</a> or single-chip <a href="/wiki/Multiprocessing" title="Multiprocessing">multiprocessing</a> will make this bottleneck even worse.<sup id="cite_ref-30" class="reference"><a href="#cite_note-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup> In the context of <a href="/wiki/Multi-core_processor" title="Multi-core processor">multi-core processors</a>, additional <a href="/wiki/Overhead_(computing)" title="Overhead (computing)">overhead</a> is required to maintain <a href="/wiki/Cache_coherence" title="Cache coherence">cache coherence</a> between processors and threads. </p> <div class="mw-heading mw-heading3"><h3 id="Self-modifying_code">Self-modifying code</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=10" title="Edit section: Self-modifying code"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Self-modifying_code" title="Self-modifying code">Self-modifying code</a></div> <p>Aside from the von Neumann bottleneck, program modifications can be quite harmful, either by accident or design.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (September 2023)">citation needed</span></a></i>]</sup> In some simple stored-program computer designs, a malfunctioning program can damage itself, other programs, or the <a href="/wiki/Operating_system" title="Operating system">operating system</a>, possibly leading to a computer <a href="/wiki/Crash_(computing)" title="Crash (computing)">crash</a>. However, this problem also applies to conventional programs that lack <a href="/wiki/Bounds_checking" title="Bounds checking">bounds checking</a>. <a href="/wiki/Memory_protection" title="Memory protection">Memory protection</a> and various access controls generally safeguard against both accidental and malicious program changes. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=11" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/CARDboard_Illustrative_Aid_to_Computation" title="CARDboard Illustrative Aid to Computation">CARDboard Illustrative Aid to Computation</a></li> <li><a href="/wiki/Interconnect_bottleneck" title="Interconnect bottleneck">Interconnect bottleneck</a></li> <li><a href="/wiki/Little_man_computer" title="Little man computer">Little man computer</a></li> <li><a href="/wiki/Random-access_machine" title="Random-access machine">Random-access machine</a></li> <li><a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard architecture</a></li> <li><a href="/wiki/Turing_machine" title="Turing machine">Turing machine</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=12" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-FirstDraftReport-1"><span class="mw-cite-backlink">^ <a href="#cite_ref-FirstDraftReport_1-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-FirstDraftReport_1-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-FirstDraftReport_1-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-FirstDraftReport_1-3"><sup><i><b>d</b></i></sup></a></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFvon_Neumann1945" class="citation cs2"><a href="/wiki/John_von_Neumann" title="John von Neumann">von Neumann, John</a> (1945), <a rel="nofollow" class="external text" href="https://web.archive.org/web/20130314123032/http://qss.stanford.edu/~godfrey/vonNeumann/vnedvac.pdf"><i>First Draft of a Report on the EDVAC</i></a> <span class="cs1-format">(PDF)</span>, archived from <a rel="nofollow" class="external text" href="https://sites.google.com/site/michaeldgodfrey/vonneumann/vnedvac.pdf">the original</a> <span class="cs1-format">(PDF)</span> on March 14, 2013<span class="reference-accessdate">, retrieved <span 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Turing">Turing, Alan M.</a> (1938), "On Computable Numbers, with an Application to the Entscheidungsproblem. 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C.; Kilburn, T. (September 25, 1948), "Electronic Digital Computers", <i>Nature</i>, <b>162</b> (4117): 487, <a href="/wiki/Bibcode_(identifier)" class="mw-redirect" title="Bibcode (identifier)">Bibcode</a>:<a rel="nofollow" class="external text" href="https://ui.adsabs.harvard.edu/abs/1948Natur.162..487W">1948Natur.162..487W</a>, <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://doi.org/10.1038%2F162487a0">10.1038/162487a0</a></span>, <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:4110351">4110351</a></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Nature&rft.atitle=Electronic+Digital+Computers&rft.volume=162&rft.issue=4117&rft.pages=487&rft.date=1948-09-25&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A4110351%23id-name%3DS2CID&rft_id=info%3Adoi%2F10.1038%2F162487a0&rft_id=info%3Abibcode%2F1948Natur.162..487W&rft.aulast=Williams&rft.aufirst=F.+C.&rft.au=Kilburn%2C+T.&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span>.</span> </li> <li id="cite_note-Lukoff_1979-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-Lukoff_1979_10-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLukoff1979" class="citation book cs1"><a href="/wiki/Herman_Lukoff" title="Herman Lukoff">Lukoff, Herman</a> (1979). <i>From Dits to Bits: A personal history of the electronic computer</i>. Portland, Oregon: Robotics Press. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-89661-002-0" title="Special:BookSources/0-89661-002-0"><bdi>0-89661-002-0</bdi></a>. <a href="/wiki/LCCN_(identifier)" class="mw-redirect" title="LCCN (identifier)">LCCN</a> <a rel="nofollow" class="external text" href="https://lccn.loc.gov/79-90567">79-90567</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=From+Dits+to+Bits%3A+A+personal+history+of+the+electronic+computer&rft.place=Portland%2C+Oregon&rft.pub=Robotics+Press&rft.date=1979&rft_id=info%3Alccn%2F79-90567&rft.isbn=0-89661-002-0&rft.aulast=Lukoff&rft.aufirst=Herman&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></span> </li> <li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text">ENIAC project administrator Grist Brainerd's December 1943 progress report for the first period of the ENIAC's development implicitly proposed the stored program concept (while simultaneously rejecting its implementation in the ENIAC) by stating that "in order to have the simplest project and not to complicate matters", the ENIAC would be constructed without any "automatic regulation".</span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><a href="#CITEREFCopeland2006">Copeland 2006</a>, p. 113.</span> </li> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFCopeland2000" class="citation cs2"><a href="/wiki/Jack_Copeland" title="Jack Copeland">Copeland, Jack</a> (2000), <a rel="nofollow" class="external text" href="http://www.alanturing.net/turing_archive/pages/Reference%20Articles/BriefHistofComp.html#ACE"><i>A Brief History of Computing: ENIAC and EDVAC</i></a><span class="reference-accessdate">, retrieved <span class="nowrap">January 27,</span> 2010</span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=A+Brief+History+of+Computing%3A+ENIAC+and+EDVAC&rft.date=2000&rft.aulast=Copeland&rft.aufirst=Jack&rft_id=http%3A%2F%2Fwww.alanturing.net%2Fturing_archive%2Fpages%2FReference%2520Articles%2FBriefHistofComp.html%23ACE&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span>.</span> </li> <li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFCopeland2000" class="citation cs2"><a href="/wiki/Jack_Copeland" title="Jack Copeland">Copeland, Jack</a> (2000), <a rel="nofollow" class="external text" href="http://www.alanturing.net/turing_archive/pages/Reference%20Articles/BriefHistofComp.html#ACE"><i>A Brief History of Computing: ENIAC and EDVAC</i></a><span class="reference-accessdate">, retrieved <span class="nowrap">January 27,</span> 2010</span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=A+Brief+History+of+Computing%3A+ENIAC+and+EDVAC&rft.date=2000&rft.aulast=Copeland&rft.aufirst=Jack&rft_id=http%3A%2F%2Fwww.alanturing.net%2Fturing_archive%2Fpages%2FReference%2520Articles%2FBriefHistofComp.html%23ACE&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span> (a work which cites <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFRandell1972" class="citation cs2"><a href="/wiki/Brian_Randell" title="Brian Randell">Randell, Brian</a> (1972), Meltzer, B.; Michie, D. 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A Functional Style and Its Algebra of Programs"</a>. <i>Communications of the ACM</i>. <b>21</b> (8): <span class="nowrap">613–</span>641. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://doi.org/10.1145%2F359576.359579">10.1145/359576.359579</a></span>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:16367522">16367522</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Communications+of+the+ACM&rft.atitle=Can+Programming+Be+Liberated+from+the+von+Neumann+Style%3F+A+Functional+Style+and+Its+Algebra+of+Programs&rft.volume=21&rft.issue=8&rft.pages=%3Cspan+class%3D%22nowrap%22%3E613-%3C%2Fspan%3E641&rft.date=1978-08&rft_id=info%3Adoi%2F10.1145%2F359576.359579&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A16367522%23id-name%3DS2CID&rft.aulast=Backus&rft.aufirst=John+W.&rft_id=https%3A%2F%2Fdoi.org%2F10.1145%252F359576.359579&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></span> </li> <li id="cite_note-29"><span class="mw-cite-backlink"><b><a href="#cite_ref-29">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFDijkstra" class="citation web cs1"><a href="/wiki/Edsger_W._Dijkstra" title="Edsger W. Dijkstra">Dijkstra, Edsger W.</a> <a rel="nofollow" class="external text" href="http://www.cs.utexas.edu/~EWD/transcriptions/EWD06xx/EWD692.html">"E. W. Dijkstra Archive: A review of the 1977 Turing Award Lecture"</a><span class="reference-accessdate">. Retrieved <span class="nowrap">July 11,</span> 2008</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=E.+W.+Dijkstra+Archive%3A+A+review+of+the+1977+Turing+Award+Lecture&rft.aulast=Dijkstra&rft.aufirst=Edsger+W.&rft_id=http%3A%2F%2Fwww.cs.utexas.edu%2F~EWD%2Ftranscriptions%2FEWD06xx%2FEWD692.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></span> </li> <li id="cite_note-30"><span class="mw-cite-backlink"><b><a href="#cite_ref-30">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSites1996" class="citation journal cs1">Sites, Richard L. (August 5, 1996). <a rel="nofollow" class="external text" href="http://cva.stanford.edu/classes/cs99s/papers/architects_look_to_future.pdf">"Architects Look to Processors of Future"</a> <span class="cs1-format">(PDF)</span>. <i><a href="/wiki/Microprocessor_Report" title="Microprocessor Report">Microprocessor Report</a></i>. <b>10</b> (10). It's the Memory, Stupid!.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Microprocessor+Report&rft.atitle=Architects+Look+to+Processors+of+Future&rft.volume=10&rft.issue=10&rft.pages=It%27s+the+Memory%2C+Stupid%21&rft.date=1996-08-05&rft.aulast=Sites&rft.aufirst=Richard+L.&rft_id=http%3A%2F%2Fcva.stanford.edu%2Fclasses%2Fcs99s%2Fpapers%2Farchitects_look_to_future.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></span> </li> <li id="cite_note-31"><span class="mw-cite-backlink"><b><a href="#cite_ref-31">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFPatt1996" class="citation journal cs1"><a href="/wiki/Yale_Patt" title="Yale Patt">Patt, Yale</a> (August 5, 1996). <a rel="nofollow" class="external text" href="http://cva.stanford.edu/classes/cs99s/papers/architects_look_to_future.pdf">"Architects Look to Processors of Future"</a> <span class="cs1-format">(PDF)</span>. <i><a href="/wiki/Microprocessor_Report" title="Microprocessor Report">Microprocessor Report</a></i>. <b>10</b> (10). First, Let’s Get the Uniprocessor Right.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Microprocessor+Report&rft.atitle=Architects+Look+to+Processors+of+Future&rft.volume=10&rft.issue=10&rft.pages=First%2C+Let%E2%80%99s+Get+the+Uniprocessor+Right&rft.date=1996-08-05&rft.aulast=Patt&rft.aufirst=Yale&rft_id=http%3A%2F%2Fcva.stanford.edu%2Fclasses%2Fcs99s%2Fpapers%2Farchitects_look_to_future.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=13" title="Edit section: Further reading"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239549316">.mw-parser-output .refbegin{margin-bottom:0.5em}.mw-parser-output .refbegin-hanging-indents>ul{margin-left:0}.mw-parser-output .refbegin-hanging-indents>ul>li{margin-left:0;padding-left:3.2em;text-indent:-3.2em}.mw-parser-output .refbegin-hanging-indents ul,.mw-parser-output .refbegin-hanging-indents ul li{list-style:none}@media(max-width:720px){.mw-parser-output .refbegin-hanging-indents>ul>li{padding-left:1.6em;text-indent:-1.6em}}.mw-parser-output .refbegin-columns{margin-top:0.3em}.mw-parser-output .refbegin-columns ul{margin-top:0}.mw-parser-output .refbegin-columns li{page-break-inside:avoid;break-inside:avoid-column}@media screen{.mw-parser-output .refbegin{font-size:90%}}</style><div class="refbegin" style=""> <ul><li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBowden1953" class="citation cs2">Bowden, B. V., ed. (1953), <i>Faster Than Thought: A Symposium on Digital Computing Machines</i>, London: Sir Isaac Pitman and Sons Ltd.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Faster+Than+Thought%3A+A+Symposium+on+Digital+Computing+Machines&rft.place=London&rft.pub=Sir+Isaac+Pitman+and+Sons+Ltd.&rft.date=1953&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFRojasHashagen2000" class="citation cs2">Rojas, Raúl; Hashagen, Ulf, eds. (2000), <i>The First Computers: History and Architectures</i>, <a href="/wiki/MIT_Press" title="MIT Press">MIT Press</a>, <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-262-18197-5" title="Special:BookSources/0-262-18197-5"><bdi>0-262-18197-5</bdi></a></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=The+First+Computers%3A+History+and+Architectures&rft.pub=MIT+Press&rft.date=2000&rft.isbn=0-262-18197-5&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFDavis2000" class="citation cs2"><a href="/wiki/Martin_Davis_(mathematician)" title="Martin Davis (mathematician)">Davis, Martin</a> (2000), <i>The universal computer: the road from Leibniz to Turing</i>, New York: <a href="/wiki/W._W._Norton_%26_Company_Inc." class="mw-redirect" title="W. W. Norton & Company Inc.">W. W. Norton & Company Inc.</a>, <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-393-04785-7" title="Special:BookSources/0-393-04785-7"><bdi>0-393-04785-7</bdi></a></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=The+universal+computer%3A+the+road+from+Leibniz+to+Turing&rft.place=New+York&rft.pub=W.+W.+Norton+%26+Company+Inc.&rft.date=2000&rft.isbn=0-393-04785-7&rft.aulast=Davis&rft.aufirst=Martin&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span> republished as: <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFDavis2001" class="citation cs2"><a href="/wiki/Martin_Davis_(mathematician)" title="Martin Davis (mathematician)">Davis, Martin</a> (2001), <i>Engines of Logic: Mathematicians and the Origin of the Computer</i>, New York: <a href="/wiki/W._W._Norton_%26_Company" title="W. W. Norton & Company">W. W. Norton & Company</a>, <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-393-32229-3" title="Special:BookSources/978-0-393-32229-3"><bdi>978-0-393-32229-3</bdi></a></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Engines+of+Logic%3A+Mathematicians+and+the+Origin+of+the+Computer&rft.place=New+York&rft.pub=W.+W.+Norton+%26+Company&rft.date=2001&rft.isbn=978-0-393-32229-3&rft.aulast=Davis&rft.aufirst=Martin&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li> <li><i>Can Programming be Liberated from the von Neumann Style?</i>. <a href="/wiki/John_Backus" title="John Backus">Backus, John</a>. 1977 ACM Turing Award Lecture. Communications of the ACM, August 1978, Volume 21, Number 8 <a rel="nofollow" class="external text" href="http://www.stanford.edu/class/cs242/readings/backus.pdf">Online PDF</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20070621162552/http://www.stanford.edu/class/cs242/readings/backus.pdf">Archived</a> June 21, 2007, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> see details at <a rel="nofollow" class="external free" href="https://www.cs.tufts.edu/~nr/backus-lecture.html">https://www.cs.tufts.edu/~nr/backus-lecture.html</a></li> <li>Bell, C. Gordon; Newell, Allen (1971), <i>Computer Structures: Readings and Examples</i>, <a href="/wiki/McGraw-Hill_Book_Company" class="mw-redirect" title="McGraw-Hill Book Company">McGraw-Hill Book Company</a>, New York. Massive (668 pages)</li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFCopeland2006" class="citation cs2">Copeland, Jack (2006), "Colossus and the Rise of the Modern Computer", in Copeland, B. Jack (ed.), <i>Colossus: The Secrets of Bletchley Park's Codebreaking Computers</i>, Oxford: <a href="/wiki/Oxford_University_Press" title="Oxford University Press">Oxford University Press</a>, <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-19-284055-4" title="Special:BookSources/978-0-19-284055-4"><bdi>978-0-19-284055-4</bdi></a></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=bookitem&rft.atitle=Colossus+and+the+Rise+of+the+Modern+Computer&rft.btitle=Colossus%3A+The+Secrets+of+Bletchley+Park%27s+Codebreaking+Computers&rft.place=Oxford&rft.pub=Oxford+University+Press&rft.date=2006&rft.isbn=978-0-19-284055-4&rft.aulast=Copeland&rft.aufirst=Jack&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFGanesan2009" class="citation cs2">Ganesan, Deepak (2009), <a rel="nofollow" class="external text" href="https://web.archive.org/web/20120425083227/http://none.cs.umass.edu/~dganesan/courses/fall09/handouts/Chapter4.pdf"><i>The von Neumann Model</i></a> <span class="cs1-format">(PDF)</span>, archived from <a rel="nofollow" class="external text" href="http://none.cs.umass.edu/~dganesan/courses/fall09/handouts/Chapter4.pdf">the original</a> <span class="cs1-format">(PDF)</span> on April 25, 2012<span class="reference-accessdate">, retrieved <span class="nowrap">October 22,</span> 2011</span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=The+von+Neumann+Model&rft.date=2009&rft.aulast=Ganesan&rft.aufirst=Deepak&rft_id=http%3A%2F%2Fnone.cs.umass.edu%2F~dganesan%2Fcourses%2Ffall09%2Fhandouts%2FChapter4.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="SCOTT" class="citation book cs1">McCartney, Scott (1999). <a rel="nofollow" class="external text" href="https://archive.org/details/eniac00scot"><i>ENIAC: The Triumphs and Tragedies of the World's First Computer</i></a>. Walker & Co. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-8027-1348-3" title="Special:BookSources/0-8027-1348-3"><bdi>0-8027-1348-3</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=ENIAC%3A+The+Triumphs+and+Tragedies+of+the+World%27s+First+Computer&rft.pub=Walker+%26+Co.&rft.date=1999&rft.isbn=0-8027-1348-3&rft.aulast=McCartney&rft.aufirst=Scott&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2Feniac00scot&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="HHG" class="citation book cs1"><a href="/wiki/Herman_Goldstine" title="Herman Goldstine">Goldstine, Herman H.</a> (1972). <a rel="nofollow" class="external text" href="https://archive.org/details/computerfrompasc00herm"><i>The Computer from Pascal to von Neumann</i></a>. <a href="/wiki/Princeton_University_Press" title="Princeton University Press">Princeton University Press</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-691-08104-2" title="Special:BookSources/0-691-08104-2"><bdi>0-691-08104-2</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=The+Computer+from+Pascal+to+von+Neumann&rft.pub=Princeton+University+Press&rft.date=1972&rft.isbn=0-691-08104-2&rft.aulast=Goldstine&rft.aufirst=Herman+H.&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2Fcomputerfrompasc00herm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="JOEL" class="citation book cs1">Shurkin, Joel (1984). <i>Engines of the Mind: A history of the Computer</i>. New York, London: <a href="/wiki/W._W._Norton_%26_Company" title="W. W. Norton & Company">W. W. Norton & Company</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-393-01804-0" title="Special:BookSources/0-393-01804-0"><bdi>0-393-01804-0</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Engines+of+the+Mind%3A+A+history+of+the+Computer&rft.place=New+York%2C+London&rft.pub=W.+W.+Norton+%26+Company&rft.date=1984&rft.isbn=0-393-01804-0&rft.aulast=Shurkin&rft.aufirst=Joel&rfr_id=info%3Asid%2Fen.wikipedia.org%3AVon+Neumann+architecture" class="Z3988"></span></li></ul> </div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Von_Neumann_architecture&action=edit&section=14" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style 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href="http://sourceforge.net/projects/johnnysimulator/">JOHNNY: A simple Open Source simulator of a von Neumann machine for educational purposes</a></li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output .hlist.inline ol,.mw-parser-output .hlist.inline ul,.mw-parser-output .hlist dl dl,.mw-parser-output .hlist dl ol,.mw-parser-output .hlist dl ul,.mw-parser-output .hlist ol dl,.mw-parser-output .hlist ol ol,.mw-parser-output .hlist ol ul,.mw-parser-output .hlist ul dl,.mw-parser-output .hlist ul ol,.mw-parser-output .hlist ul ul{display:inline}.mw-parser-output .hlist .mw-empty-li{display:none}.mw-parser-output .hlist dt::after{content:": "}.mw-parser-output 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href="/wiki/Processor_(computing)" title="Processor (computing)">Processor technologies</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Model_of_computation" title="Model of computation">Models</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Abstract_machine" title="Abstract machine">Abstract machine</a></li> <li><a href="/wiki/Stored-program_computer" title="Stored-program computer">Stored-program computer</a></li> <li><a href="/wiki/Finite-state_machine" title="Finite-state machine">Finite-state machine</a> <ul><li><a href="/wiki/Finite-state_machine_with_datapath" class="mw-redirect" title="Finite-state machine with datapath">with datapath</a></li> <li><a href="/wiki/Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical</a></li> <li><a href="/wiki/Deterministic_finite_automaton" title="Deterministic finite automaton">Deterministic finite automaton</a></li> <li><a href="/wiki/Queue_automaton" title="Queue automaton">Queue automaton</a></li> <li><a href="/wiki/Cellular_automaton" title="Cellular automaton">Cellular automaton</a></li> <li><a href="/wiki/Quantum_cellular_automaton" title="Quantum cellular automaton">Quantum cellular automaton</a></li></ul></li> <li><a href="/wiki/Turing_machine" title="Turing machine">Turing machine</a> <ul><li><a href="/wiki/Alternating_Turing_machine" title="Alternating Turing machine">Alternating Turing machine</a></li> <li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal</a></li> <li><a href="/wiki/Post%E2%80%93Turing_machine" title="Post–Turing machine">Post–Turing</a></li> <li><a href="/wiki/Quantum_Turing_machine" title="Quantum Turing machine">Quantum</a></li> <li><a href="/wiki/Nondeterministic_Turing_machine" title="Nondeterministic Turing machine">Nondeterministic Turing machine</a></li> <li><a href="/wiki/Probabilistic_Turing_machine" title="Probabilistic Turing machine">Probabilistic Turing machine</a></li> <li><a href="/wiki/Hypercomputation" title="Hypercomputation">Hypercomputation</a></li> <li><a href="/wiki/Zeno_machine" title="Zeno machine">Zeno machine</a></li></ul></li> <li><a href="/wiki/History_of_general-purpose_CPUs#Belt_machine_architecture" title="History of general-purpose CPUs">Belt machine</a></li> <li><a href="/wiki/Stack_machine" title="Stack machine">Stack machine</a></li> <li><a href="/wiki/Register_machine" title="Register machine">Register machines</a> <ul><li><a href="/wiki/Counter_machine" title="Counter machine">Counter</a></li> <li><a href="/wiki/Pointer_machine" title="Pointer machine">Pointer</a></li> <li><a href="/wiki/Random-access_machine" title="Random-access machine">Random-access</a></li> <li><a href="/wiki/Random-access_stored-program_machine" title="Random-access stored-program machine">Random-access stored program</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architecture</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></li> <li><a class="mw-selflink selflink">Von Neumann</a></li> <li><a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard</a> <ul><li><a href="/wiki/Modified_Harvard_architecture" title="Modified Harvard architecture">modified</a></li></ul></li> <li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport-triggered</a></li> <li><a href="/wiki/Cellular_architecture" title="Cellular architecture">Cellular</a></li> <li><a href="/wiki/Endianness" title="Endianness">Endianness</a></li> <li><a href="/wiki/Computer_data_storage" title="Computer data storage">Memory access</a> <ul><li><a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></li> <li><a href="/wiki/Uniform_memory_access" title="Uniform memory access">HUMA</a></li> <li><a href="/wiki/Load%E2%80%93store_architecture" title="Load–store architecture">Load–store</a></li> <li><a href="/wiki/Register%E2%80%93memory_architecture" title="Register–memory architecture">Register/memory</a></li></ul></li> <li><a href="/wiki/Cache_hierarchy" title="Cache hierarchy">Cache hierarchy</a></li> <li><a href="/wiki/Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a> <ul><li><a href="/wiki/Virtual_memory" title="Virtual memory">Virtual memory</a></li> <li><a href="/wiki/Secondary_storage" class="mw-redirect" title="Secondary storage">Secondary storage</a></li></ul></li> <li><a href="/wiki/Heterogeneous_System_Architecture" title="Heterogeneous System Architecture">Heterogeneous</a></li> <li><a href="/wiki/Fabric_computing" title="Fabric computing">Fabric</a></li> <li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessing</a></li> <li><a href="/wiki/Cognitive_computing" title="Cognitive computing">Cognitive</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set<br />architectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Orthogonal_instruction_set" title="Orthogonal instruction set">Orthogonal instruction set</a></li> <li><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></li> <li><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific</a></li> <li><a href="/wiki/Explicit_data_graph_execution" title="Explicit data graph execution">EDGE</a> <ul><li><a href="/wiki/TRIPS_architecture" title="TRIPS architecture">TRIPS</a></li></ul></li> <li><a href="/wiki/Very_long_instruction_word" title="Very long instruction word">VLIW</a> <ul><li><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></li></ul></li> <li><a href="/wiki/Minimal_instruction_set_computer" title="Minimal instruction set computer">MISC</a></li> <li><a href="/wiki/One-instruction_set_computer" title="One-instruction set computer">OISC</a></li> <li><a href="/wiki/No_instruction_set_computing" title="No instruction set computing">NISC</a></li> <li><a href="/wiki/Zero_instruction_set_computer" class="mw-redirect" title="Zero instruction set computer">ZISC</a></li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Quantum_computing" title="Quantum computing">Quantum computing</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Comparison</a> <ul><li><a href="/wiki/Addressing_mode" title="Addressing mode">Addressing modes</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instruction<br />sets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Motorola_68000_series" title="Motorola 68000 series">Motorola 68000 series</a></li> <li><a href="/wiki/VAX" title="VAX">VAX</a></li> <li><a href="/wiki/PDP-11_architecture" title="PDP-11 architecture">PDP-11</a></li> <li><a href="/wiki/X86" title="X86">x86</a></li> <li><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a></li> <li><a href="/wiki/Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li> <li><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a></li> <li><a href="/wiki/MIPS-X" title="MIPS-X">MIPS-X</a></li> <li>Power <ul><li><a href="/wiki/IBM_POWER_architecture" title="IBM POWER architecture">POWER</a></li> <li><a href="/wiki/PowerPC" title="PowerPC">PowerPC</a></li> <li><a href="/wiki/Power_ISA" title="Power ISA">Power ISA</a></li></ul></li> <li><a href="/wiki/Clipper_architecture" title="Clipper architecture">Clipper architecture</a></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a></li> <li><a href="/wiki/SuperH" title="SuperH">SuperH</a></li> <li><a href="/wiki/DEC_Alpha" title="DEC Alpha">DEC Alpha</a></li> <li><a href="/wiki/ETRAX_CRIS" title="ETRAX CRIS">ETRAX CRIS</a></li> <li><a href="/wiki/M32R" title="M32R">M32R</a></li> <li><a href="/wiki/Unicore" title="Unicore">Unicore</a></li> <li><a href="/wiki/IA-64" title="IA-64">Itanium</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a></li> <li><a href="/wiki/Little_man_computer" title="Little man computer">LMC</a></li> <li>System/3x0 <ul><li><a href="/wiki/IBM_System/360_architecture" title="IBM System/360 architecture">S/360</a></li> <li><a href="/wiki/IBM_System/370" title="IBM System/370">S/370</a></li> <li><a href="/wiki/IBM_System/390" title="IBM System/390">S/390</a></li> <li><a href="/wiki/Z/Architecture" title="Z/Architecture">z/Architecture</a></li></ul></li> <li>Tilera ISA</li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Adapteva#Products" class="mw-redirect" title="Adapteva">Epiphany architecture</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Others</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_cycle" title="Instruction cycle">Execution</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Instruction pipelining</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Pipeline_stall" title="Pipeline stall">Pipeline stall</a></li> <li><a href="/wiki/Operand_forwarding" title="Operand forwarding">Operand forwarding</a></li> <li><a href="/wiki/Classic_RISC_pipeline" title="Classic RISC pipeline">Classic RISC pipeline</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hazard_(computer_architecture)" title="Hazard (computer architecture)">Hazards</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Data_dependency" title="Data dependency">Data dependency</a></li> <li><a href="/wiki/Structural_hazard" class="mw-redirect" title="Structural hazard">Structural</a></li> <li><a href="/wiki/Control_hazard" class="mw-redirect" title="Control hazard">Control</a></li> <li><a href="/wiki/False_sharing" title="False sharing">False sharing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Out-of-order_execution" title="Out-of-order execution">Out-of-order</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Scoreboarding" title="Scoreboarding">Scoreboarding</a></li> <li><a href="/wiki/Tomasulo%27s_algorithm" title="Tomasulo's algorithm">Tomasulo's algorithm</a> <ul><li><a href="/wiki/Reservation_station" title="Reservation station">Reservation station</a></li> <li><a href="/wiki/Re-order_buffer" title="Re-order buffer">Re-order buffer</a></li></ul></li> <li><a href="/wiki/Register_renaming" title="Register renaming">Register renaming</a></li> <li><a href="/wiki/Wide-issue" title="Wide-issue">Wide-issue</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Speculative_execution" title="Speculative execution">Speculative</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch prediction</a></li> <li><a href="/wiki/Memory_dependence_prediction" title="Memory dependence prediction">Memory dependence prediction</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Parallel_computing" title="Parallel computing">Parallelism</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Level</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bit-level_parallelism" title="Bit-level parallelism">Bit</a> <ul><li><a href="/wiki/Bit-serial_architecture" title="Bit-serial architecture">Bit-serial</a></li> <li><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word</a></li></ul></li> <li><a href="/wiki/Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li> <li><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Pipelining</a> <ul><li><a href="/wiki/Scalar_processor" title="Scalar processor">Scalar</a></li> <li><a href="/wiki/Superscalar_processor" title="Superscalar processor">Superscalar</a></li></ul></li> <li><a href="/wiki/Task_parallelism" title="Task parallelism">Task</a> <ul><li><a href="/wiki/Thread_(computing)" title="Thread (computing)">Thread</a></li> <li><a href="/wiki/Process_(computing)" title="Process (computing)">Process</a></li></ul></li> <li><a href="/wiki/Data_parallelism" title="Data parallelism">Data</a> <ul><li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li></ul></li> <li><a href="/wiki/Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li> <li><a href="/wiki/Distributed_architecture" class="mw-redirect" title="Distributed architecture">Distributed</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Temporal_multithreading" title="Temporal multithreading">Temporal</a></li> <li><a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a> <ul><li><a href="/wiki/Hyper-threading" title="Hyper-threading">Hyperthreading</a></li> <li><a href="/wiki/Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li></ul></li> <li><a href="/wiki/Speculative_multithreading" title="Speculative multithreading">Speculative</a></li> <li><a href="/wiki/Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li> <li><a href="/wiki/Cooperative_multitasking" title="Cooperative multitasking">Cooperative</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Flynn%27s_taxonomy" title="Flynn's taxonomy">Flynn's taxonomy</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single_instruction,_single_data" title="Single instruction, single data">SISD</a></li> <li><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> <ul><li><a href="/wiki/Single_instruction,_multiple_threads" title="Single instruction, multiple threads">Array processing (SIMT)</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Pipelined_processor" title="Flynn's taxonomy">Pipelined processing</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Associative_processor" title="Flynn's taxonomy">Associative processing</a></li> <li><a href="/wiki/SWAR" title="SWAR">SWAR</a></li></ul></li> <li><a href="/wiki/Multiple_instruction,_single_data" title="Multiple instruction, single data">MISD</a></li> <li><a href="/wiki/Multiple_instruction,_multiple_data" title="Multiple instruction, multiple data">MIMD</a> <ul><li><a href="/wiki/Single_program,_multiple_data" title="Single program, multiple data">SPMD</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_performance" title="Computer performance">Processor<br />performance</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transistor_count" title="Transistor count">Transistor count</a></li> <li><a href="/wiki/Instructions_per_cycle" title="Instructions per cycle">Instructions per cycle</a> (IPC) <ul><li><a href="/wiki/Cycles_per_instruction" title="Cycles per instruction">Cycles per instruction</a> (CPI)</li></ul></li> <li><a href="/wiki/Instructions_per_second" title="Instructions per second">Instructions per second</a> (IPS)</li> <li><a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">Floating-point operations per second</a> (FLOPS)</li> <li><a href="/wiki/Transactions_per_second" title="Transactions per second">Transactions per second</a> (TPS)</li> <li><a href="/wiki/SUPS" title="SUPS">Synaptic updates per second</a> (SUPS)</li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li> <li><a href="/wiki/Cache_performance_measurement_and_metric" title="Cache performance measurement and metric">Cache performance metrics</a></li> <li><a href="/wiki/Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Types</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Central processing unit</a> (CPU)</li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU) <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li></ul></li> <li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li> <li><a href="/wiki/Barrel_processor" title="Barrel processor">Barrel</a></li> <li><a href="/wiki/Stream_processing" title="Stream processing">Stream</a></li> <li><a href="/wiki/Tile_processor" title="Tile processor">Tile processor</a></li> <li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Field-programmable_object_array" title="Field-programmable object array">FPOA</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a> (SiP)</li> <li><a href="/wiki/Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">By application</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Embedded_system" title="Embedded system">Embedded system</a></li> <li><a href="/wiki/Microprocessor" title="Microprocessor">Microprocessor</a></li> <li><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a></li> <li><a href="/wiki/Mobile_processor" title="Mobile processor">Mobile</a></li> <li><a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">Ultra-low-voltage</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">ASIP</a></li> <li><a href="/wiki/Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Systems<br />on chip</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> (SoC)</li> <li><a href="/wiki/Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor</a> (MPSoC)</li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a> (NoC)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware<br />accelerators</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">AI accelerator</a></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li> <li><a href="/wiki/Image_processor" title="Image processor">Image processor</a></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Vision processing unit</a> (VPU)</li> <li><a href="/wiki/Physics_processing_unit" title="Physics processing unit">Physics processing unit</a> (PPU)</li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li> <li><a href="/wiki/Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li> <li><a href="/wiki/Secure_cryptoprocessor" title="Secure cryptoprocessor">Secure cryptoprocessor</a></li> <li><a href="/wiki/Network_processor" title="Network processor">Network processor</a></li> <li><a href="/wiki/Baseband_processor" title="Baseband processor">Baseband processor</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word size</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/1-bit_computing" title="1-bit computing">1-bit</a></li> <li><a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a></li> <li><a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a></li> <li><a href="/wiki/12-bit_computing" title="12-bit computing">12-bit</a></li> <li><a href="/wiki/Apollo_Guidance_Computer" title="Apollo Guidance Computer">15-bit</a></li> <li><a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a></li> <li><a href="/wiki/24-bit_computing" title="24-bit computing">24-bit</a></li> <li><a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a></li> <li><a href="/wiki/48-bit_computing" title="48-bit computing">48-bit</a></li> <li><a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a></li> <li><a href="/wiki/128-bit_computing" title="128-bit computing">128-bit</a></li> <li><a href="/wiki/256-bit_computing" title="256-bit computing">256-bit</a></li> <li><a href="/wiki/512-bit_computing" title="512-bit computing">512-bit</a></li> <li><a href="/wiki/Bit_slicing" title="Bit slicing">bit slicing</a></li> <li><a href="/wiki/Word_(computer_architecture)#Table_of_word_sizes" title="Word (computer architecture)">others</a> <ul><li><a href="/wiki/Word_(computer_architecture)#Variable-word_architectures" title="Word (computer architecture)">variable</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Core count</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single-core" title="Single-core">Single-core</a></li> <li><a href="/wiki/Multi-core_processor" title="Multi-core processor">Multi-core</a></li> <li><a href="/wiki/Manycore_processor" title="Manycore processor">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous architecture</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Core</a></li> <li><a href="/wiki/Cache_(computing)" title="Cache (computing)">Cache</a> <ul><li><a href="/wiki/CPU_cache" title="CPU cache">CPU cache</a></li> <li><a href="/wiki/Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li> <li><a href="/wiki/Data_cache" class="mw-redirect" title="Data cache">Data cache</a></li> <li><a href="/wiki/Instruction_cache" class="mw-redirect" title="Instruction cache">Instruction cache</a></li> <li><a href="/wiki/Cache_replacement_policies" title="Cache replacement policies">replacement policies</a></li> <li><a href="/wiki/Cache_coherence" title="Cache coherence">coherence</a></li></ul></li> <li><a href="/wiki/Bus_(computing)" title="Bus (computing)">Bus</a></li> <li><a href="/wiki/Clock_rate" title="Clock rate">Clock rate</a></li> <li><a href="/wiki/Clock_signal" title="Clock signal">Clock signal</a></li> <li><a href="/wiki/FIFO_(computing_and_electronics)" title="FIFO (computing and electronics)">FIFO</a></li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Execution_unit" title="Execution unit">Functional<br />units</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">Arithmetic logic unit</a> (ALU)</li> <li><a href="/wiki/Address_generation_unit" title="Address generation unit">Address generation unit</a> (AGU)</li> <li><a href="/wiki/Floating-point_unit" title="Floating-point unit">Floating-point unit</a> (FPU)</li> <li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a> (MMU) <ul><li><a href="/wiki/Load%E2%80%93store_unit" title="Load–store unit">Load–store unit</a></li> <li><a href="/wiki/Translation_lookaside_buffer" title="Translation lookaside buffer">Translation lookaside buffer</a> (TLB)</li></ul></li> <li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch predictor</a></li> <li><a href="/wiki/Branch_target_predictor" title="Branch target predictor">Branch target predictor</a></li> <li><a href="/wiki/Memory_controller" title="Memory controller">Integrated memory controller</a> (IMC) <ul><li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a></li></ul></li> <li><a href="/wiki/Instruction_decoder" class="mw-redirect" title="Instruction decoder">Instruction decoder</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Logic_gate" title="Logic gate">Logic</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Combinational_logic" title="Combinational logic">Combinational</a></li> <li><a href="/wiki/Sequential_logic" title="Sequential logic">Sequential</a></li> <li><a href="/wiki/Glue_logic" title="Glue logic">Glue</a></li> <li><a href="/wiki/Logic_gate" title="Logic gate">Logic gate</a> <ul><li><a href="/wiki/Quantum_logic_gate" title="Quantum logic gate">Quantum</a></li> <li><a href="/wiki/Gate_array" title="Gate array">Array</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_register" title="Hardware register">Registers</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Processor_register" title="Processor register">Processor register</a></li> <li><a href="/wiki/Status_register" title="Status register">Status register</a></li> <li><a href="/wiki/Stack_register" title="Stack register">Stack register</a></li> <li><a href="/wiki/Register_file" title="Register file">Register file</a></li> <li><a href="/wiki/Memory_buffer_register" title="Memory buffer register">Memory buffer</a></li> <li><a href="/wiki/Memory_address_register" title="Memory address register">Memory address register</a></li> <li><a href="/wiki/Program_counter" title="Program counter">Program counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Control_unit" title="Control unit">Control unit</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Hardwired_control_unit" class="mw-redirect" title="Hardwired control unit">Hardwired control unit</a></li> <li><a href="/wiki/Instruction_unit" title="Instruction unit">Instruction unit</a></li> <li><a href="/wiki/Data_buffer" title="Data buffer">Data buffer</a></li> <li><a href="/wiki/Write_buffer" title="Write buffer">Write buffer</a></li> <li><a href="/wiki/Microcode" title="Microcode">Microcode</a> <a href="/wiki/ROM_image" title="ROM image">ROM</a></li> <li><a href="/wiki/Counter_(digital)" title="Counter (digital)">Counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Datapath" title="Datapath">Datapath</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multiplexer" title="Multiplexer">Multiplexer</a></li> <li><a href="/wiki/Demultiplexer" class="mw-redirect" title="Demultiplexer">Demultiplexer</a></li> <li><a href="/wiki/Adder_(electronics)" title="Adder (electronics)">Adder</a></li> <li><a href="/wiki/Binary_multiplier" title="Binary multiplier">Multiplier</a> <ul><li><a href="/wiki/CPU_multiplier" title="CPU multiplier">CPU</a></li></ul></li> <li><a href="/wiki/Binary_decoder" title="Binary decoder">Binary decoder</a> <ul><li><a href="/wiki/Address_decoder" title="Address decoder">Address decoder</a></li> <li><a href="/wiki/Sum-addressed_decoder" title="Sum-addressed decoder">Sum-addressed decoder</a></li></ul></li> <li><a href="/wiki/Barrel_shifter" title="Barrel shifter">Barrel shifter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Electronic_circuit" title="Electronic circuit">Circuitry</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> <ul><li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D</a></li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal</a></li> <li><a href="/wiki/Power_management_integrated_circuit" title="Power management integrated circuit">Power management</a></li></ul></li> <li><a href="/wiki/Boolean_circuit" title="Boolean circuit">Boolean</a></li> <li><a href="/wiki/Circuit_(computer_science)" title="Circuit (computer science)">Digital</a></li> <li><a href="/wiki/Analogue_electronics" title="Analogue electronics">Analog</a></li> <li><a href="/wiki/Quantum_circuit" title="Quantum circuit">Quantum</a></li> <li><a href="/wiki/Switch#Electronic_switches" title="Switch">Switch</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Power_management" title="Power management">Power<br />management</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Power_Management_Unit" title="Power Management Unit">PMU</a></li> <li><a href="/wiki/Advanced_Power_Management" title="Advanced Power Management">APM</a></li> <li><a href="/wiki/ACPI" title="ACPI">ACPI</a></li> <li><a href="/wiki/Dynamic_frequency_scaling" title="Dynamic frequency scaling">Dynamic frequency scaling</a></li> <li><a href="/wiki/Dynamic_voltage_scaling" title="Dynamic voltage scaling">Dynamic voltage scaling</a></li> <li><a href="/wiki/Clock_gating" title="Clock gating">Clock gating</a></li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/History_of_general-purpose_CPUs" title="History of general-purpose CPUs">History of general-purpose CPUs</a></li> <li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">Microprocessor chronology</a></li> <li><a href="/wiki/Processor_design" title="Processor design">Processor design</a></li> <li><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></li> <li><a href="/wiki/Hardware_security_module" title="Hardware security module">Hardware security module</a></li> <li><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li> <li><a 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Inc.","logo":{"@type":"ImageObject","url":"https:\/\/www.wikimedia.org\/static\/images\/wmf-hor-googpub.png"}},"datePublished":"2004-02-20T11:36:44Z","dateModified":"2025-02-09T19:52:51Z","image":"https:\/\/upload.wikimedia.org\/wikipedia\/commons\/e\/e5\/Von_Neumann_Architecture.svg","headline":"computer architecture"}</script> </body> </html>