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Search results for: singularly perturbed circuits
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373</div> </div> </div> </div> <h1 class="mt-3 mb-3 text-center" style="font-size:1.6rem;">Search results for: singularly perturbed circuits</h1> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">343</span> Effects of Variable Viscosity on Radiative MHD Flow in a Porous Medium Between Twovertical Wavy Walls</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=A.%20B.%20Disu">A. B. Disu</a>, <a href="https://publications.waset.org/abstracts/search?q=M.%20S.%20Dada"> M. S. Dada</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This study was conducted to investigate two dimensional heat transfer of a free convective-radiative MHD (Magneto-hydrodynamics) flow with temperature dependent viscosity and heat source of a viscous incompressible fluid in a porous medium between two vertical wavy walls. The fluid viscosity is assumed to vary as an exponential function of temperature. The flow is assumed to consist of a mean part and a perturbed part. The perturbed quantities were expressed in terms of complex exponential series of plane wave equation. The resultant differential equations were solved by Differential Transform Method (DTM). The numerical computations were presented graphically to show the salient features of the fluid flow and heat transfer characteristics. The skin friction and Nusselt number were also analyzed for various governing parameters. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=differential%20transform%20method" title="differential transform method">differential transform method</a>, <a href="https://publications.waset.org/abstracts/search?q=MHD%20free%20convection" title=" MHD free convection"> MHD free convection</a>, <a href="https://publications.waset.org/abstracts/search?q=porous%20medium" title=" porous medium"> porous medium</a>, <a href="https://publications.waset.org/abstracts/search?q=two%20dimensional%20radiation" title=" two dimensional radiation"> two dimensional radiation</a>, <a href="https://publications.waset.org/abstracts/search?q=two%20wavy%20walls" title=" two wavy walls"> two wavy walls</a> </p> <a href="https://publications.waset.org/abstracts/27813/effects-of-variable-viscosity-on-radiative-mhd-flow-in-a-porous-medium-between-twovertical-wavy-walls" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/27813.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">447</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">342</span> Design and Characterization of CMOS Readout Circuit for ISFET and ISE Based Sensors</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Yuzman%20Yusoff">Yuzman Yusoff</a>, <a href="https://publications.waset.org/abstracts/search?q=Siti%20Noor%20Harun"> Siti Noor Harun</a>, <a href="https://publications.waset.org/abstracts/search?q=Noor%20Shelida%20Salleh"> Noor Shelida Salleh</a>, <a href="https://publications.waset.org/abstracts/search?q=Tan%20Kong%20Yew"> Tan Kong Yew</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=readout%20interface%20circuit%20%28ROIC%29" title="readout interface circuit (ROIC)">readout interface circuit (ROIC)</a>, <a href="https://publications.waset.org/abstracts/search?q=analog%20interface%20circuit" title=" analog interface circuit"> analog interface circuit</a>, <a href="https://publications.waset.org/abstracts/search?q=ion%20sensitive%20field%20effect%20transistor%20%28ISFET%29" title=" ion sensitive field effect transistor (ISFET)"> ion sensitive field effect transistor (ISFET)</a>, <a href="https://publications.waset.org/abstracts/search?q=ion%20selective%20electrode%20%28ISE%29" title=" ion selective electrode (ISE)"> ion selective electrode (ISE)</a>, <a href="https://publications.waset.org/abstracts/search?q=ion%20sensor%20electronics" title=" ion sensor electronics"> ion sensor electronics</a> </p> <a href="https://publications.waset.org/abstracts/1577/design-and-characterization-of-cmos-readout-circuit-for-isfet-and-ise-based-sensors" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/1577.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">314</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">341</span> Numerical Analysis of Gas-Particle Mixtures through Pipelines</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=G.%20Judakova">G. Judakova</a>, <a href="https://publications.waset.org/abstracts/search?q=M.%20Bause"> M. Bause</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The ability to model and simulate numerically natural gas flow in pipelines has become of high importance for the design of pipeline systems. The understanding of the formation of hydrate particles and their dynamical behavior is of particular interest, since these processes govern the operation properties of the systems and are responsible for system failures by clogging of the pipelines under certain conditions. Mathematically, natural gas flow can be described by multiphase flow models. Using the two-fluid modeling approach, the gas phase is modeled by the compressible Euler equations and the particle phase is modeled by the pressureless Euler equations. The numerical simulation of compressible multiphase flows is an important research topic. It is well known that for nonlinear fluxes, even for smooth initial data, discontinuities in the solution are likely to occur in finite time. They are called shock waves or contact discontinuities. For hyperbolic and singularly perturbed parabolic equations the standard application of the Galerkin finite element method (FEM) leads to spurious oscillations (e.g. Gibb's phenomenon). In our approach, we use stabilized FEM, the streamline upwind Petrov-Galerkin (SUPG) method, where artificial diffusion acting only in the direction of the streamlines and using a special treatment of the boundary conditions in inviscid convective terms, is added. Numerical experiments show that the numerical solution obtained and stabilized by SUPG captures discontinuities or steep gradients of the exact solution in layers. However, within this layer the approximate solution may still exhibit overshoots or undershoots. To suitably reduce these artifacts we add a discontinuity capturing or shock capturing term. The performance properties of our numerical scheme are illustrated for two-phase flow problem. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=two-phase%20flow" title="two-phase flow">two-phase flow</a>, <a href="https://publications.waset.org/abstracts/search?q=gas-particle%20mixture" title=" gas-particle mixture"> gas-particle mixture</a>, <a href="https://publications.waset.org/abstracts/search?q=inviscid%20two-fluid%20model" title=" inviscid two-fluid model"> inviscid two-fluid model</a>, <a href="https://publications.waset.org/abstracts/search?q=euler%20equation" title=" euler equation"> euler equation</a>, <a href="https://publications.waset.org/abstracts/search?q=finite%20element%20method" title=" finite element method"> finite element method</a>, <a href="https://publications.waset.org/abstracts/search?q=streamline%20upwind%20petrov-galerkin" title=" streamline upwind petrov-galerkin"> streamline upwind petrov-galerkin</a>, <a href="https://publications.waset.org/abstracts/search?q=shock%20capturing" title=" shock capturing"> shock capturing</a> </p> <a href="https://publications.waset.org/abstracts/41971/numerical-analysis-of-gas-particle-mixtures-through-pipelines" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/41971.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">311</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">340</span> An Appraisal of Grade 12 Educators’ Difficulties in Understanding Electric Circuits in South Africa: A Case Study of Umgungundlovu District of Kwazulu-Natal</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Akinrogunde%20Omolere%20Moses">Akinrogunde Omolere Moses</a> </p> <p class="card-text"><strong>Abstract:</strong></p> A plethora of studies indicated that teaching and learning of the physical sciences in the Further Education and Training (FET) Phase (Grades 10–12) have long been declared problematic in South Africa. For instance, the results from the National Senior Certificate Matric Examination in Physical Sciences, especially in the questions related to practical skills, more specifically, electric circuits, have been unsatisfactory in the past decades. Learner difficulties in understanding electric circuits are well stated. Thus, this study appraised the difficulties Grade 12 Educators often face in understanding Electric Circuits in Umgungundlovu, District of Kwazulu-Natal, South Africa. A mixed-methods research methodology was employed, while a total of 30 schools were sampled, including Ex-Model C, Independent Exam Board, community, rural, and deep rural schools. Data were collected through semi-structured questionnaires. The findings revealed that a large percentage of the Grade 12 physical sciences educators have difficulties with the Grade 9 and 12 physical sciences content. It was also observed that most of the educators who had difficulties were unable to detect the type of difficulties learners would experience; as a result, they were unable to explain why learners experience such difficulties. The results also showed that only those educators with more experience in teaching the physical sciences were able to provide clearer explanations of both the why and how of dealing with learner difficulties with this section on electric circuits. The study recommended that there is a need to recruit more qualified educators, with at least a Bachelor of Science in Physics in particular, in order to combat the misconceptions. Also, Educators with an inadequate understanding of physical sciences should be orientated in order to meet the standard of classroom practice. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=grade%2012%20educators%27%20difficulties" title="grade 12 educators' difficulties">grade 12 educators' difficulties</a>, <a href="https://publications.waset.org/abstracts/search?q=electric%20circuits" title=" electric circuits"> electric circuits</a>, <a href="https://publications.waset.org/abstracts/search?q=learners%27%20difficulties" title=" learners' difficulties"> learners' difficulties</a>, <a href="https://publications.waset.org/abstracts/search?q=educators%20understanding%20of%20EC." title=" educators understanding of EC."> educators understanding of EC.</a> </p> <a href="https://publications.waset.org/abstracts/189606/an-appraisal-of-grade-12-educators-difficulties-in-understanding-electric-circuits-in-south-africa-a-case-study-of-umgungundlovu-district-of-kwazulu-natal" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/189606.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">33</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">339</span> Multifractal Behavior of the Perturbed Cerbelli-Giona Map: Numerical Computation of ω-Measure</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Ibrahim%20Alsendid">Ibrahim Alsendid</a>, <a href="https://publications.waset.org/abstracts/search?q=Rob%20Sturman"> Rob Sturman</a>, <a href="https://publications.waset.org/abstracts/search?q=Benjamin%20Sharp"> Benjamin Sharp</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, we consider a family of 2-dimensional nonlinear area-preserving transformations on the torus. A single parameter η varies between 0 and 1, taking the transformation from a hyperbolic toral automorphism to the “Cerbelli-Giona” map, a system known to exhibit multifractal properties. Here we study the multifractal properties of the family of maps. We apply a box-counting method by defining a grid of boxes Bi(δ), where i is the index and δ is the size of the boxes, to quantify the distribution of stable and unstable manifolds of the map. When the parameter is in the range 0.51< η <0.58 and 0.68< η <1 the map is ergodic; i.e., the unstable and stable manifolds eventually cover the whole torus, although not in a uniform distribution. For accurate numerical results, we require correspondingly accurate construction of the stable and unstable manifolds. Here we use the piecewise linearity of the map to achieve this, by computing the endpoints of line segments that define the global stable and unstable manifolds. This allows the generalized fractal dimension Dq, and spectrum of dimensions f(α), to be computed with accuracy. Finally, the intersection of the unstable and stable manifold of the map will be investigated and compared with the distribution of periodic points of the system. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=Discrete-time%20dynamical%20systems" title="Discrete-time dynamical systems">Discrete-time dynamical systems</a>, <a href="https://publications.waset.org/abstracts/search?q=Fractal%20geometry" title=" Fractal geometry"> Fractal geometry</a>, <a href="https://publications.waset.org/abstracts/search?q=Multifractal%20behaviour%20of%20the%20Perturbed%20map" title=" Multifractal behaviour of the Perturbed map"> Multifractal behaviour of the Perturbed map</a>, <a href="https://publications.waset.org/abstracts/search?q=Multifractal%20of%20Dynamical%20systems" title=" Multifractal of Dynamical systems"> Multifractal of Dynamical systems</a> </p> <a href="https://publications.waset.org/abstracts/139556/multifractal-behavior-of-the-perturbed-cerbelli-giona-map-numerical-computation-of-o-measure" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/139556.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">211</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">338</span> Toxicological Analysis of Some Plant Combinations Used for the Treatment of Hypertension by Lay People in Northern Kwazulu-Natal, South Africa</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Mmbulaheni%20Ramulondi">Mmbulaheni Ramulondi</a>, <a href="https://publications.waset.org/abstracts/search?q=Sandy%20Van%20Vuuren"> Sandy Van Vuuren</a>, <a href="https://publications.waset.org/abstracts/search?q=Helene%20De%20Wet"> Helene De Wet</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The use of plant combinations to treat various medical conditions is not a new concept, and it is known that traditional people do not only rely on a single plant extract for efficacy but often combine various plant species for treatment. The knowledge of plant combinations is transferred from one generation to the other in the belief that combination therapy may enhance efficacy, reduce toxicity, decreases adverse effects, increase bioavailability and result in lower dosages. However, combination therapy may also be harmful when the interaction is antagonistic, since it may result in increasing toxicity. Although a fair amount of research has been done on the toxicity of medicinal plants, there is very little done on the toxicity of medicinal plants in combination. The aim of the study was to assess the toxicity potential of 19 plant combinations which have been documented as treatments of hypertension in northern KwaZulu-Natal by lay people. The aqueous extracts were assessed using two assays; the Brine shrimp assay (Artemia franciscana) and the Ames test (Mutagenicity). Only one plant combination (Aloe marlothii with Hypoxis hemerocallidea) in the current study has been previously assessed for toxicity. With the Brine shrimp assay, the plant combinations were tested in two concentrations (2 and 4 mg/ml), while for mutagenicity tests, they were tested at 5 mg/ml. The results showed that in the Brine shrimp assay, six combinations were toxic at 4 mg/ml. The combinations were Albertisia delagoensis with Senecio serratuloides (57%), Aloe marlothii with Catharanthus roseus (98%), Catharanthus roseus with Hypoxis hemerocallidea (66%), Catharanthus roseus with Musa acuminata (89%), Catharanthus roseus with Momordica balsamina (99%) and Aloe marlothii with Trichilia emetica and Hyphaene coriacea (50%). However when the concentration was reduced to 2 mg/ml, only three combinations were toxic which were Aloe marlothii with Catharanthus roseus (76%), Catharanthus roseus with Musa acuminata (66%) and Catharanthus roseus with Momordica balsamina (73%). For the mutagenicity assay, only the combinations between Catharanthus roseus with Hypoxis hemerocallidea and Catharanthus roseus with Momordica balsamina were mutagenic towards the Salmonella typhimurium strains TA98 and TA100. Most of the combinations which were toxic involve C. roseus which was also toxic when tested singularly. It is worth noting that C. roseus was one of the most frequently used plant species both to treat hypertension singularly and in combination and some of the individuals have been using this for the last 20 years. The mortality percentage of the Brine shrimp showed a significant correlation between dosage and toxicity thus toxicity was dosage dependant. A combination which is worth noting is the combination between A. delagoensis and S. serratuloides. Singularly these plants were non-toxic towards Brine shrimp, however their combination resulted in antagonism with the mortality rate of 57% at the total concentration of 4 mg/ml. Low toxicity was mostly observed, giving some validity to combined use, however the few combinations showing increased toxicity demonstrate the importance of analysing plant combinations. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=dosage" title="dosage">dosage</a>, <a href="https://publications.waset.org/abstracts/search?q=hypertension" title=" hypertension"> hypertension</a>, <a href="https://publications.waset.org/abstracts/search?q=plant%20combinations" title=" plant combinations"> plant combinations</a>, <a href="https://publications.waset.org/abstracts/search?q=toxicity" title=" toxicity"> toxicity</a> </p> <a href="https://publications.waset.org/abstracts/52527/toxicological-analysis-of-some-plant-combinations-used-for-the-treatment-of-hypertension-by-lay-people-in-northern-kwazulu-natal-south-africa" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/52527.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">353</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">337</span> Deep Reinforcement Learning Model Using Parameterised Quantum Circuits</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Lokes%20Parvatha%20Kumaran%20S.">Lokes Parvatha Kumaran S.</a>, <a href="https://publications.waset.org/abstracts/search?q=Sakthi%20Jay%20Mahenthar%20C."> Sakthi Jay Mahenthar C.</a>, <a href="https://publications.waset.org/abstracts/search?q=Sathyaprakash%20P."> Sathyaprakash P.</a>, <a href="https://publications.waset.org/abstracts/search?q=Jayakumar%20V."> Jayakumar V.</a>, <a href="https://publications.waset.org/abstracts/search?q=Shobanadevi%20A."> Shobanadevi A.</a> </p> <p class="card-text"><strong>Abstract:</strong></p> With the evolution of technology, the need to solve complex computational problems like machine learning and deep learning has shot up. But even the most powerful classical supercomputers find it difficult to execute these tasks. With the recent development of quantum computing, researchers and tech-giants strive for new quantum circuits for machine learning tasks, as present works on Quantum Machine Learning (QML) ensure less memory consumption and reduced model parameters. But it is strenuous to simulate classical deep learning models on existing quantum computing platforms due to the inflexibility of deep quantum circuits. As a consequence, it is essential to design viable quantum algorithms for QML for noisy intermediate-scale quantum (NISQ) devices. The proposed work aims to explore Variational Quantum Circuits (VQC) for Deep Reinforcement Learning by remodeling the experience replay and target network into a representation of VQC. In addition, to reduce the number of model parameters, quantum information encoding schemes are used to achieve better results than the classical neural networks. VQCs are employed to approximate the deep Q-value function for decision-making and policy-selection reinforcement learning with experience replay and the target network. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=quantum%20computing" title="quantum computing">quantum computing</a>, <a href="https://publications.waset.org/abstracts/search?q=quantum%20machine%20learning" title=" quantum machine learning"> quantum machine learning</a>, <a href="https://publications.waset.org/abstracts/search?q=variational%20quantum%20circuit" title=" variational quantum circuit"> variational quantum circuit</a>, <a href="https://publications.waset.org/abstracts/search?q=deep%20reinforcement%20learning" title=" deep reinforcement learning"> deep reinforcement learning</a>, <a href="https://publications.waset.org/abstracts/search?q=quantum%20information%20encoding%20scheme" title=" quantum information encoding scheme"> quantum information encoding scheme</a> </p> <a href="https://publications.waset.org/abstracts/152629/deep-reinforcement-learning-model-using-parameterised-quantum-circuits" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/152629.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">134</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">336</span> Control of a Plane Jet Spread by Tabs at the Nozzle Exit</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Makito%20Sakai">Makito Sakai</a>, <a href="https://publications.waset.org/abstracts/search?q=Takahiro%20Kiwata"> Takahiro Kiwata</a>, <a href="https://publications.waset.org/abstracts/search?q=Takumi%20Awa"> Takumi Awa</a>, <a href="https://publications.waset.org/abstracts/search?q=Hiroshi%20Teramoto"> Hiroshi Teramoto</a>, <a href="https://publications.waset.org/abstracts/search?q=Takaaki%20Kono"> Takaaki Kono</a>, <a href="https://publications.waset.org/abstracts/search?q=Kuniaki%20Toyoda"> Kuniaki Toyoda</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Using experimental and numerical results, this paper describes the effects of tabs on the flow characteristics of a plane jet at comparatively low Reynolds numbers while focusing on the velocity field and the vortical structure. The flow visualization and velocity measurements were respectively carried out using laser Doppler velocimetry (LDV) and particle image velocimetry (PIV). In addition, three-dimensional (3D) plane jet numerical simulations were performed using ANSYS Fluent, a commercially available computational fluid dynamics (CFD) software application. We found that the spreads of jets perturbed by large delta tabs and round tabs were larger than those produced by the other tabs tested. Additionally, it was determined that a plane jet with square tabs had the smallest jet spread downstream, and the jet’s centerline velocity was larger than those of jets perturbed by the other tabs tested. It was also observed that the spanwise vortical structure of a plane jet with tabs disappeared completely. Good agreement was found between the experimental and numerical simulation velocity profiles in the area near the nozzle exit when the laminar flow model was used. However, we also found that large eddy simulation (LES) is better at predicting the developing flow field of a plane jet than the laminar and the standard k-ε turbulent models. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=plane%20jet" title="plane jet">plane jet</a>, <a href="https://publications.waset.org/abstracts/search?q=flow%20control" title=" flow control"> flow control</a>, <a href="https://publications.waset.org/abstracts/search?q=tab" title=" tab"> tab</a>, <a href="https://publications.waset.org/abstracts/search?q=flow%20measurement" title=" flow measurement"> flow measurement</a>, <a href="https://publications.waset.org/abstracts/search?q=numerical%20simulation" title=" numerical simulation"> numerical simulation</a> </p> <a href="https://publications.waset.org/abstracts/54632/control-of-a-plane-jet-spread-by-tabs-at-the-nozzle-exit" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/54632.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">334</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">335</span> Pushing the Boundary of Parallel Tractability for Ontology Materialization via Boolean Circuits</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Zhangquan%20Zhou">Zhangquan Zhou</a>, <a href="https://publications.waset.org/abstracts/search?q=Guilin%20Qi"> Guilin Qi</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Materialization is an important reasoning service for applications built on the Web Ontology Language (OWL). To make materialization efficient in practice, current research focuses on deciding tractability of an ontology language and designing parallel reasoning algorithms. However, some well-known large-scale ontologies, such as YAGO, have been shown to have good performance for parallel reasoning, but they are expressed in ontology languages that are not parallelly tractable, i.e., the reasoning is inherently sequential in the worst case. This motivates us to study the problem of parallel tractability of ontology materialization from a theoretical perspective. That is we aim to identify the ontologies for which materialization is parallelly tractable, i.e., in the NC complexity. Since the NC complexity is defined based on Boolean circuit that is widely used to investigate parallel computing problems, we first transform the problem of materialization to evaluation of Boolean circuits, and then study the problem of parallel tractability based on circuits. In this work, we focus on datalog rewritable ontology languages. We use Boolean circuits to identify two classes of datalog rewritable ontologies (called parallelly tractable classes) such that materialization over them is parallelly tractable. We further investigate the parallel tractability of materialization of a datalog rewritable OWL fragment DHL (Description Horn Logic). Based on the above results, we analyze real-world datasets and show that many ontologies expressed in DHL belong to the parallelly tractable classes. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=ontology%20materialization" title="ontology materialization">ontology materialization</a>, <a href="https://publications.waset.org/abstracts/search?q=parallel%20reasoning" title=" parallel reasoning"> parallel reasoning</a>, <a href="https://publications.waset.org/abstracts/search?q=datalog" title=" datalog"> datalog</a>, <a href="https://publications.waset.org/abstracts/search?q=Boolean%20circuit" title=" Boolean circuit"> Boolean circuit</a> </p> <a href="https://publications.waset.org/abstracts/57402/pushing-the-boundary-of-parallel-tractability-for-ontology-materialization-via-boolean-circuits" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/57402.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">271</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">334</span> Analysis of Lightweight Register Hardware Threat</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Yang%20Luo">Yang Luo</a>, <a href="https://publications.waset.org/abstracts/search?q=Beibei%20Wang"> Beibei Wang</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, we present a design methodology of lightweight register transfer level (RTL) hardware threat implemented based on a MAX II FPGA platform. The dynamic power consumed by the toggling of the various bit of registers as well as the dynamic power consumed per unit of logic circuits were analyzed. The hardware threat was designed taking advantage of the differences in dynamic power consumed per unit of logic circuits to hide the transfer information. The experiment result shows that the register hardware threat was successfully implemented by using different dynamic power consumed per unit of logic circuits to hide the key information of DES encryption module. It needs more than 100000 sample curves to reduce the background noise by comparing the sample space when it completely meets the time alignment requirement. In additional, an external trigger signal is playing a very important role to detect the hardware threat in this experiment. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=side-channel%20analysis" title="side-channel analysis">side-channel analysis</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware%20Trojan" title=" hardware Trojan"> hardware Trojan</a>, <a href="https://publications.waset.org/abstracts/search?q=register%20transfer%20level" title=" register transfer level"> register transfer level</a>, <a href="https://publications.waset.org/abstracts/search?q=dynamic%20power" title=" dynamic power"> dynamic power</a> </p> <a href="https://publications.waset.org/abstracts/58138/analysis-of-lightweight-register-hardware-threat" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/58138.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">279</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">333</span> Experimental Partial Discharge Localization for Internal Short Circuits of Transformers Windings </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Jalal%20M.%20Abdallah">Jalal M. Abdallah </a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper presents experimental studies carried out on a three phase transformer to investigate and develop the transformer models, which help in testing procedures, describing and evaluating the transformer dielectric conditions process and methods such as: the partial discharge (PD) localization in windings. The measurements are based on the transfer function methods in transformer windings by frequency response analysis (FRA). Numbers of tests conditions were applied to obtain the sensitivity frequency responses of a transformer for different type of faults simulated in a particular phase. The frequency responses were analyzed for the sensitivity of different test conditions to detect and identify the starting of small faults, which are sources of PD. In more detail, the aim is to explain applicability and sensitivity of advanced PD measurements for small short circuits and its localization. The experimental results presented in the paper will help in understanding the sensitivity of FRA measurements in detecting various types of internal winding short circuits in the transformer. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=frequency%20response%20analysis%20%28FRA%29" title="frequency response analysis (FRA)">frequency response analysis (FRA)</a>, <a href="https://publications.waset.org/abstracts/search?q=measurements" title=" measurements"> measurements</a>, <a href="https://publications.waset.org/abstracts/search?q=transfer%20function" title=" transfer function"> transfer function</a>, <a href="https://publications.waset.org/abstracts/search?q=transformer" title=" transformer"> transformer</a> </p> <a href="https://publications.waset.org/abstracts/7119/experimental-partial-discharge-localization-for-internal-short-circuits-of-transformers-windings" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/7119.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">281</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">332</span> A Machine Learning Approach for Detecting and Locating Hardware Trojans</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Kaiwen%20Zheng">Kaiwen Zheng</a>, <a href="https://publications.waset.org/abstracts/search?q=Wanting%20Zhou"> Wanting Zhou</a>, <a href="https://publications.waset.org/abstracts/search?q=Nan%20Tang"> Nan Tang</a>, <a href="https://publications.waset.org/abstracts/search?q=Lei%20Li"> Lei Li</a>, <a href="https://publications.waset.org/abstracts/search?q=Yuanhang%20He"> Yuanhang He</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The integrated circuit industry has become a cornerstone of the information society, finding widespread application in areas such as industry, communication, medicine, and aerospace. However, with the increasing complexity of integrated circuits, Hardware Trojans (HTs) implanted by attackers have become a significant threat to their security. In this paper, we proposed a hardware trojan detection method for large-scale circuits. As HTs introduce physical characteristic changes such as structure, area, and power consumption as additional redundant circuits, we proposed a machine-learning-based hardware trojan detection method based on the physical characteristics of gate-level netlists. This method transforms the hardware trojan detection problem into a machine-learning binary classification problem based on physical characteristics, greatly improving detection speed. To address the problem of imbalanced data, where the number of pure circuit samples is far less than that of HTs circuit samples, we used the SMOTETomek algorithm to expand the dataset and further improve the performance of the classifier. We used three machine learning algorithms, K-Nearest Neighbors, Random Forest, and Support Vector Machine, to train and validate benchmark circuits on Trust-Hub, and all achieved good results. In our case studies based on AES encryption circuits provided by trust-hub, the test results showed the effectiveness of the proposed method. To further validate the method’s effectiveness for detecting variant HTs, we designed variant HTs using open-source HTs. The proposed method can guarantee robust detection accuracy in the millisecond level detection time for IC, and FPGA design flows and has good detection performance for library variant HTs. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=hardware%20trojans" title="hardware trojans">hardware trojans</a>, <a href="https://publications.waset.org/abstracts/search?q=physical%20properties" title=" physical properties"> physical properties</a>, <a href="https://publications.waset.org/abstracts/search?q=machine%20learning" title=" machine learning"> machine learning</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware%20security" title=" hardware security"> hardware security</a> </p> <a href="https://publications.waset.org/abstracts/164285/a-machine-learning-approach-for-detecting-and-locating-hardware-trojans" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/164285.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">147</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">331</span> Time Parameter Based for the Detection of Catastrophic Faults in Analog Circuits </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Arabi%20Abderrazak">Arabi Abderrazak</a>, <a href="https://publications.waset.org/abstracts/search?q=Bourouba%20Nacerdine"> Bourouba Nacerdine</a>, <a href="https://publications.waset.org/abstracts/search?q=Ayad%20Mouloud"> Ayad Mouloud</a>, <a href="https://publications.waset.org/abstracts/search?q=Belaout%20Abdeslam"> Belaout Abdeslam</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, a new test technique of analog circuits using time mode simulation is proposed for the single catastrophic faults detection in analog circuits. This test process is performed to overcome the problem of catastrophic faults being escaped in a DC mode test applied to the inverter amplifier in previous research works. The circuit under test is a second-order low pass filter constructed around this type of amplifier but performing a function that differs from that of the previous test. The test approach performed in this work is based on two key- elements where the first one concerns the unique square pulse signal selected as an input vector test signal to stimulate the fault effect at the circuit output response. The second element is the filter response conversion to a square pulses sequence obtained from an analog comparator. This signal conversion is achieved through a fixed reference threshold voltage of this comparison circuit. The measurement of the three first response signal pulses durations is regarded as fault effect detection parameter on one hand, and as a fault signature helping to hence fully establish an analog circuit fault diagnosis on another hand. The results obtained so far are very promising since the approach has lifted up the fault coverage ratio in both modes to over 90% and has revealed the harmful side of faults that has been masked in a DC mode test. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=analog%20circuits" title="analog circuits">analog circuits</a>, <a href="https://publications.waset.org/abstracts/search?q=analog%20faults%20diagnosis" title=" analog faults diagnosis"> analog faults diagnosis</a>, <a href="https://publications.waset.org/abstracts/search?q=catastrophic%20faults" title=" catastrophic faults"> catastrophic faults</a>, <a href="https://publications.waset.org/abstracts/search?q=fault%20detection" title=" fault detection"> fault detection</a> </p> <a href="https://publications.waset.org/abstracts/38309/time-parameter-based-for-the-detection-of-catastrophic-faults-in-analog-circuits" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/38309.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">442</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">330</span> Influence of Temperature on Properties of MOSFETs</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Azizi%20Cherifa">Azizi Cherifa</a>, <a href="https://publications.waset.org/abstracts/search?q=O.%20Benzaoui"> O. Benzaoui </a> </p> <p class="card-text"><strong>Abstract:</strong></p> The thermal aspects in the design of power circuits often deserve as much attention as pure electric components aspects as the operating temperature has a direct influence on their static and dynamic characteristics. MOSFET is fundamental in the circuits, it is the most widely used device in the current production of semiconductor components using their honorable performance. The aim of this contribution is devoted to the effect of the temperature on the properties of MOSFETs. The study enables us to calculate the drain current as function of bias in both linear and saturated modes. The effect of temperature is evaluated using a numerical simulation, using the laws of mobility and saturation velocity of carriers as a function of temperature. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=temperature" title="temperature">temperature</a>, <a href="https://publications.waset.org/abstracts/search?q=MOSFET" title=" MOSFET"> MOSFET</a>, <a href="https://publications.waset.org/abstracts/search?q=mobility" title=" mobility"> mobility</a>, <a href="https://publications.waset.org/abstracts/search?q=transistor" title=" transistor"> transistor</a> </p> <a href="https://publications.waset.org/abstracts/42385/influence-of-temperature-on-properties-of-mosfets" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/42385.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">346</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">329</span> High Frequency Memristor-Based BFSK and 8QAM Demodulators</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Nahla%20Elazab">Nahla Elazab</a>, <a href="https://publications.waset.org/abstracts/search?q=Mohamed%20Aboudina"> Mohamed Aboudina</a>, <a href="https://publications.waset.org/abstracts/search?q=Ghada%20Ibrahim"> Ghada Ibrahim</a>, <a href="https://publications.waset.org/abstracts/search?q=Hossam%20Fahmy"> Hossam Fahmy</a>, <a href="https://publications.waset.org/abstracts/search?q=Ahmed%20Khalil"> Ahmed Khalil</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper presents the developed memristor based demodulators for eight circular Quadrature Amplitude Modulation (QAM) and Binary Frequency Shift Keying (BFSK) operating at relatively high frequency. In our implementations, the experimental-based ‘nonlinear’ dopant drift model is adopted along with the proposed circuits providing incorporation of all known non-idealities of practically realized memristor and gaining high operation frequency. The suggested designs leverage the distinctive characteristics of the memristor device, definitely, its changeable average memristance versus the frequency, phase and amplitude of the periodic excitation input. The proposed demodulators feature small integration area, low power consumption, and easy implementation. Moreover, the proposed QAM demodulator precludes the requirement for the carrier recovery circuits. In doing so, the designs were validated by transient simulations using the nonlinear dopant drift memristor model. The simulations results show high agreement with the theory presented. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=BFSK" title="BFSK">BFSK</a>, <a href="https://publications.waset.org/abstracts/search?q=demodulator" title=" demodulator"> demodulator</a>, <a href="https://publications.waset.org/abstracts/search?q=high%20frequency%20memristor%20applications" title=" high frequency memristor applications"> high frequency memristor applications</a>, <a href="https://publications.waset.org/abstracts/search?q=memristor%20based%20analog%20circuits" title=" memristor based analog circuits"> memristor based analog circuits</a>, <a href="https://publications.waset.org/abstracts/search?q=nonlinear%20dopant%20drift%20model" title=" nonlinear dopant drift model"> nonlinear dopant drift model</a>, <a href="https://publications.waset.org/abstracts/search?q=QAM" title=" QAM"> QAM</a> </p> <a href="https://publications.waset.org/abstracts/125099/high-frequency-memristor-based-bfsk-and-8qam-demodulators" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/125099.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">167</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">328</span> Design and Simulation of Coupled-Line Coupler with Different Values of Coupling Efficiency</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Suleiman%20Babani">Suleiman Babani</a>, <a href="https://publications.waset.org/abstracts/search?q=Jazuli%20Sanusi%20Kazaure"> Jazuli Sanusi Kazaure</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, two coupled-line couplers are designed and simulated using stripline technology. The coupled-line couplers (A and B) are designed with different values of coupling coefficient 6dB and 10dB respectively. Both of circuits have a coupled output port, a through output port and an isolated output port. Moreover, both circuits are tuned to function around 2.45 GHz. The design results are presented by simulation results obtained using ADS 2012.08 (Advanced Design System) software. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=ADS" title="ADS">ADS</a>, <a href="https://publications.waset.org/abstracts/search?q=coupled-line%20coupler" title=" coupled-line coupler"> coupled-line coupler</a>, <a href="https://publications.waset.org/abstracts/search?q=directional%20coupler" title=" directional coupler"> directional coupler</a>, <a href="https://publications.waset.org/abstracts/search?q=stripline" title=" stripline"> stripline</a> </p> <a href="https://publications.waset.org/abstracts/28524/design-and-simulation-of-coupled-line-coupler-with-different-values-of-coupling-efficiency" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/28524.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">512</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">327</span> Optimizing Power in Sequential Circuits by Reducing Leakage Current Using Enhanced Multi Threshold CMOS </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Patikineti%20Sreenivasulu">Patikineti Sreenivasulu</a>, <a href="https://publications.waset.org/abstracts/search?q=K.%20srinivasa%20Rao"> K. srinivasa Rao</a>, <a href="https://publications.waset.org/abstracts/search?q=A.%20Vinaya%20Babu"> A. Vinaya Babu</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The demand for portability, performance and high functional integration density of digital devices leads to the scaling of complementary metal oxide semiconductor (CMOS) devices inevitable. The increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. MTCMOS technology provides low leakage and high performance operation by utilizing high speed, low Vt (LVT) transistors for logic cells and low leakage, high Vt (HVT) devices as sleep transistors. Sleep transistors disconnect logic cells from the supply and/or ground to reduce the leakage in the sleep mode. In this technology, energy consumption while doing the mode transition and minimum time required to turn ON the circuit upon receiving the wake up signal are issues to be considered because these can adversely impact the performance of VLSI circuit. In this paper we are introducing an enhancing method of MTCMOS technology to optimize the power in MTCMOS sequential circuits. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=power%20consumption" title="power consumption">power consumption</a>, <a href="https://publications.waset.org/abstracts/search?q=ultra-low%20power" title=" ultra-low power"> ultra-low power</a>, <a href="https://publications.waset.org/abstracts/search?q=leakage" title=" leakage"> leakage</a>, <a href="https://publications.waset.org/abstracts/search?q=sub%20threshold" title=" sub threshold"> sub threshold</a>, <a href="https://publications.waset.org/abstracts/search?q=MTCMOS" title=" MTCMOS"> MTCMOS</a> </p> <a href="https://publications.waset.org/abstracts/35180/optimizing-power-in-sequential-circuits-by-reducing-leakage-current-using-enhanced-multi-threshold-cmos" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/35180.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">407</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">326</span> Analysis of Silicon Controlled Rectifier-Based Electrostatic Discharge Protection Circuits with Electrical Characteristics for the 5V Power Clamp</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Jun-Geol%20Park">Jun-Geol Park</a>, <a href="https://publications.waset.org/abstracts/search?q=Kyoung-Il%20Do"> Kyoung-Il Do</a>, <a href="https://publications.waset.org/abstracts/search?q=Min-Ju%20Kwon"> Min-Ju Kwon</a>, <a href="https://publications.waset.org/abstracts/search?q=Kyung-Hyun%20Park"> Kyung-Hyun Park</a>, <a href="https://publications.waset.org/abstracts/search?q=Yong-Seo%20Koo"> Yong-Seo Koo</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper analyzed the SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuits with the turn-on time characteristics. The structures are the LVTSCR (Low Voltage Triggered SCR), the ZTSCR (Zener Triggered SCR) and the PTSCR (P-Substrate Triggered SCR). The three structures are for the 5V power clamp. In general, the structures with the low trigger voltage structure can have the fast turn-on characteristics than other structures. All the ESD protection circuits have the low trigger voltage by using the N+ bridge region of LVTSCR, by using the zener diode structure of ZTSCR, by increasing the trigger current of PTSCR. The simulation for the comparison with the turn-on time was conducted by the Synopsys TCAD simulator. As the simulation results, the LVTSCR has the turn-on time of 2.8 ns, ZTSCR of 2.1 ns and the PTSCR of 2.4 ns. The HBM simulation results, however, show that the PTSCR is the more robust structure of 430K in HBM 8kV standard than 450K of LVTSCR and 495K of ZTSCR. Therefore the PTSCR is the most effective ESD protection circuit for the 5V power clamp. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=ESD" title="ESD">ESD</a>, <a href="https://publications.waset.org/abstracts/search?q=SCR" title=" SCR"> SCR</a>, <a href="https://publications.waset.org/abstracts/search?q=turn-on%20time" title=" turn-on time"> turn-on time</a>, <a href="https://publications.waset.org/abstracts/search?q=trigger%20voltage" title=" trigger voltage"> trigger voltage</a>, <a href="https://publications.waset.org/abstracts/search?q=power%20clamp" title=" power clamp"> power clamp</a> </p> <a href="https://publications.waset.org/abstracts/65650/analysis-of-silicon-controlled-rectifier-based-electrostatic-discharge-protection-circuits-with-electrical-characteristics-for-the-5v-power-clamp" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/65650.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">348</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">325</span> A Development of Portable Intrinsically Safe Explosion-Proof Type of Dual Gas Detector</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Sangguk%20Ahn">Sangguk Ahn</a>, <a href="https://publications.waset.org/abstracts/search?q=Youngyu%20Kim"> Youngyu Kim</a>, <a href="https://publications.waset.org/abstracts/search?q=Jaheon%20Gu"> Jaheon Gu</a>, <a href="https://publications.waset.org/abstracts/search?q=Gyoutae%20Park"> Gyoutae Park</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, we developed a dual gas leak instrument to detect Hydrocarbon (HC) and Monoxide (CO) gases. To two kinds of gases, it is necessary to design compact structure for sensors. And then it is important to draw sensing circuits such as measuring, amplifying and filtering. After that, it should be well programmed with robust, systematic and module coding methods. In center of them, improvement of accuracy and initial response time are a matter of vital importance. To manufacture distinguished gas leak detector, we applied intrinsically safe explosion-proof structure to lithium ion battery, main circuits, a pump with motor, color LCD interfaces and sensing circuits. On software, to enhance measuring accuracy we used numerical analysis such as Lagrange and Neville interpolation. Performance test result is conducted by using standard Methane with seven different concentrations with three other products. We want raise risk prevention and efficiency of gas safe management through distributing to the field of gas safety. Acknowledgment: This study was supported by Small and Medium Business Administration under the research theme of ‘Commercialized Development of a portable intrinsically safe explosion-proof type dual gas leak detector’, (task number S2456036). <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=gas%20leak" title="gas leak">gas leak</a>, <a href="https://publications.waset.org/abstracts/search?q=dual%20gas%20detector" title=" dual gas detector"> dual gas detector</a>, <a href="https://publications.waset.org/abstracts/search?q=intrinsically%20safe" title=" intrinsically safe"> intrinsically safe</a>, <a href="https://publications.waset.org/abstracts/search?q=explosion%20proof" title=" explosion proof"> explosion proof</a> </p> <a href="https://publications.waset.org/abstracts/69836/a-development-of-portable-intrinsically-safe-explosion-proof-type-of-dual-gas-detector" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/69836.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">228</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">324</span> Design and Study of a Low Power High Speed Full Adder Using GDI Multiplexer</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Biswarup%20Mukherjee">Biswarup Mukherjee</a>, <a href="https://publications.waset.org/abstracts/search?q=Aniruddha%20Ghosal"> Aniruddha Ghosal</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, we propose a new technique for implementing a low power full adder using a set of GDI multiplexers. Full adder circuits are used comprehensively in Application Specific Integrated Circuits (ASICs). Thus it is desirable to have low power operation for the sub components. The explored method of implementation achieves a low power design for the full adder. Simulated results using state-of-art Tanner tool indicates the superior performance of the proposed technique over conventional CMOS full adder. Detailed comparison of simulated results for the conventional and present method of implementation is presented. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=low%20power%20full%20adder" title="low power full adder">low power full adder</a>, <a href="https://publications.waset.org/abstracts/search?q=2-T%20GDI%20MUX" title=" 2-T GDI MUX"> 2-T GDI MUX</a>, <a href="https://publications.waset.org/abstracts/search?q=ASIC%0D%0A%28application%20specific%20integrated%20circuit%29" title=" ASIC (application specific integrated circuit)"> ASIC (application specific integrated circuit)</a>, <a href="https://publications.waset.org/abstracts/search?q=12-T%20FA" title=" 12-T FA"> 12-T FA</a>, <a href="https://publications.waset.org/abstracts/search?q=CMOS%20%28complementary%20metal%20oxide%20semiconductor%29" title=" CMOS (complementary metal oxide semiconductor)"> CMOS (complementary metal oxide semiconductor)</a> </p> <a href="https://publications.waset.org/abstracts/21647/design-and-study-of-a-low-power-high-speed-full-adder-using-gdi-multiplexer" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/21647.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">348</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">323</span> Design Dual Band Band-Pass Filter by Using Stepped Impedance</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Fawzia%20Al-Sakeer">Fawzia Al-Sakeer</a>, <a href="https://publications.waset.org/abstracts/search?q=Hassan%20Aldeeb"> Hassan Aldeeb</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Development in the communications field is proceeding at an amazing speed, which has led researchers to improve and develop electronic circuits by increasing their efficiency and reducing their size to reduce the weight of electronic devices. One of the most important of these circuits is the band-pass filter, which is what made us carry out this research, which aims to use an alternate technology to design a dual band-pass filter by using a stepped impedance microstrip transmission line. We designed a filter that works at two center frequency bands by designing with the ADS program, and the results were excellent, as we obtained the two design frequencies, which are 1 and 3GHz, and the values of insertion loss S11, which was more than 21dB with a small area. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=band%20pass%20filter" title="band pass filter">band pass filter</a>, <a href="https://publications.waset.org/abstracts/search?q=dual%20band%20band-pass%20filter" title=" dual band band-pass filter"> dual band band-pass filter</a>, <a href="https://publications.waset.org/abstracts/search?q=ADS" title=" ADS"> ADS</a>, <a href="https://publications.waset.org/abstracts/search?q=microstrip%20filter" title=" microstrip filter"> microstrip filter</a>, <a href="https://publications.waset.org/abstracts/search?q=stepped%20impedance" title=" stepped impedance"> stepped impedance</a> </p> <a href="https://publications.waset.org/abstracts/177757/design-dual-band-band-pass-filter-by-using-stepped-impedance" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/177757.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">69</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">322</span> Multiple Fault Diagnosis in Digital Circuits using Critical Path Tracing and Enhanced Deduction Algorithm</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Mohamed%20Mahmoud">Mohamed Mahmoud</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper has developed an effect-cause analysis technique for fault diagnosis in digital circuits. The main algorithm of our technique is based on the Enhanced Deduction Algorithm, which processes the real response of the CUT to the applied test T to deduce the values of the internal lines. An experimental version of the algorithm has been implemented in C++. The code takes about 7592 lines. The internal values are determined based on the logic values under the permanent stuck-fault model. Using a backtracking strategy guarantees that the actual values are covered by at least one solution, or no solution is found. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=enhanced%20deduction%20algorithm" title="enhanced deduction algorithm">enhanced deduction algorithm</a>, <a href="https://publications.waset.org/abstracts/search?q=backtracking%20strategy" title=" backtracking strategy"> backtracking strategy</a>, <a href="https://publications.waset.org/abstracts/search?q=automatic%20test%20equipment" title=" automatic test equipment"> automatic test equipment</a>, <a href="https://publications.waset.org/abstracts/search?q=verfication" title=" verfication"> verfication</a> </p> <a href="https://publications.waset.org/abstracts/144580/multiple-fault-diagnosis-in-digital-circuits-using-critical-path-tracing-and-enhanced-deduction-algorithm" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/144580.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">120</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">321</span> Prediction of Turbulent Separated Flow in a Wind Tunel</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Karima%20Boukhadia">Karima Boukhadia</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In the present study, the subsonic flow in an asymmetrical diffuser was simulated numerically using code CFX 11.0 and its generator of grid ICEM CFD. Two models of turbulence were tested: K- ε and K- ω SST. The results obtained showed that the K- ε model singularly over-estimates the speed value close to the wall and that the K- ω SST model is qualitatively in good agreement with the experimental results of Buice and Eaton 1997. They also showed that the separation and reattachment of the fluid on the tilted wall strongly depends on its angle of inclination and that the length of the zone of separation increases with the angle of inclination of the lower wall of the diffuser. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=asymmetric%20diffuser" title="asymmetric diffuser">asymmetric diffuser</a>, <a href="https://publications.waset.org/abstracts/search?q=separation" title=" separation"> separation</a>, <a href="https://publications.waset.org/abstracts/search?q=reattachment" title=" reattachment"> reattachment</a>, <a href="https://publications.waset.org/abstracts/search?q=tilt%20angle" title=" tilt angle"> tilt angle</a>, <a href="https://publications.waset.org/abstracts/search?q=separation%20zone" title=" separation zone"> separation zone</a> </p> <a href="https://publications.waset.org/abstracts/26379/prediction-of-turbulent-separated-flow-in-a-wind-tunel" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/26379.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">576</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">320</span> Low Power Glitch Free Dual Output Coarse Digitally Controlled Delay Lines</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=K.%20Shaji%20Mon">K. Shaji Mon</a>, <a href="https://publications.waset.org/abstracts/search?q=P.%20R.%20John%20Sreenidhi"> P. R. John Sreenidhi</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In deep-submicrometer CMOS processes, time-domain resolution of a digital signal is becoming higher than voltage resolution of analog signals. This claim is nowadays pushing toward a new circuit design paradigm in which the traditional analog signal processing is expected to be progressively substituted by the processing of times in the digital domain. Within this novel paradigm, digitally controlled delay lines (DCDL) should play the role of digital-to-analog converters in traditional, analog-intensive, circuits. Digital delay locked loops are highly prevalent in integrated systems.The proposed paper addresses the glitches present in delay circuits along with area,power dissipation and signal integrity.The digitally controlled delay lines(DCDL) under study have been designed in a 90 nm CMOS technology 6 layer metal Copper Strained SiGe Low K Dielectric. Simulation and synthesis results show that the novel circuits exhibit no glitches for dual output coarse DCDL with less power dissipation and consumes less area compared to the glitch free NAND based DCDL. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=glitch%20free" title="glitch free">glitch free</a>, <a href="https://publications.waset.org/abstracts/search?q=NAND-based%20DCDL" title=" NAND-based DCDL"> NAND-based DCDL</a>, <a href="https://publications.waset.org/abstracts/search?q=CMOS" title=" CMOS"> CMOS</a>, <a href="https://publications.waset.org/abstracts/search?q=deep-submicrometer" title=" deep-submicrometer"> deep-submicrometer</a> </p> <a href="https://publications.waset.org/abstracts/2876/low-power-glitch-free-dual-output-coarse-digitally-controlled-delay-lines" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/2876.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">245</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">319</span> Synchrony between Genetic Repressilators in Sister Cells in Different Temperatures</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Jerome%20G.%20Chandraseelan">Jerome G. Chandraseelan</a>, <a href="https://publications.waset.org/abstracts/search?q=Samuel%20M.%20D.%20Oliveira"> Samuel M. D. Oliveira</a>, <a href="https://publications.waset.org/abstracts/search?q=Antti%20H%C3%A4kkinen"> Antti Häkkinen</a>, <a href="https://publications.waset.org/abstracts/search?q=Sofia%20Startceva"> Sofia Startceva</a>, <a href="https://publications.waset.org/abstracts/search?q=Andre%20S.%20Ribeiro"> Andre S. Ribeiro</a> </p> <p class="card-text"><strong>Abstract:</strong></p> We used live E. coli containing synthetic genetic oscillators to study how the degree of synchrony between the genetic circuits of sister cells changes with temperature. We found that both the mean and the variability of the degree of synchrony between the fluorescence signals from sister cells are affected by temperature. Also, while most pairs of sister cells were found to be highly synchronous in each condition, the number of asynchronous pairs increased with increasing temperature, which was found to be due to disruptions in the oscillations. Finally we provide evidence that these disruptions tend to affect multiple generations as opposed to individual cells. These findings provide insight in how to design more robust synthetic circuits and in how cell division can affect their dynamics. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=repressilator" title="repressilator">repressilator</a>, <a href="https://publications.waset.org/abstracts/search?q=robustness" title=" robustness"> robustness</a>, <a href="https://publications.waset.org/abstracts/search?q=synchrony" title=" synchrony"> synchrony</a>, <a href="https://publications.waset.org/abstracts/search?q=synthetic%20biology" title=" synthetic biology"> synthetic biology</a> </p> <a href="https://publications.waset.org/abstracts/24590/synchrony-between-genetic-repressilators-in-sister-cells-in-different-temperatures" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/24590.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">483</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">318</span> Constructing a Two-Tier Test about Source Current to Diagnose Pre-Service Elementary School Teacher’ Misconceptions</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Abdeljalil%20Metioui">Abdeljalil Metioui</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The purpose of this article is to present the results of two-stage qualitative research. The first involved the identification of the alternative conceptions of 80 elementary pre-service teachers from Quebec in Canada about the operation of simple electrical circuits. To do this, they completed a two-choice questionnaire (true or false) with justification. Data analysis identifies many conceptual difficulties. For example, for their majority, whatever the electrical device that composes an electrical circuit, the current source (power supply), and the generated electrical power is constant. The second step was to develop a double multiple-choice questionnaire based on the identified designs. It allows teachers to quickly diagnose their students' conceptions and take them into account in their teaching. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=development" title="development">development</a>, <a href="https://publications.waset.org/abstracts/search?q=electrical%20circuits" title=" electrical circuits"> electrical circuits</a>, <a href="https://publications.waset.org/abstracts/search?q=two-tier%20diagnostic%20test" title=" two-tier diagnostic test"> two-tier diagnostic test</a>, <a href="https://publications.waset.org/abstracts/search?q=secondary%20and%20high%20school" title=" secondary and high school"> secondary and high school</a> </p> <a href="https://publications.waset.org/abstracts/102849/constructing-a-two-tier-test-about-source-current-to-diagnose-pre-service-elementary-school-teacher-misconceptions" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/102849.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">112</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">317</span> Design and Study of a Low Power High Speed 8 Transistor Based Full Adder Using Multiplexer and XOR Gates</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Biswarup%20Mukherjee">Biswarup Mukherjee</a>, <a href="https://publications.waset.org/abstracts/search?q=Aniruddha%20Ghoshal"> Aniruddha Ghoshal</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, we propose a new technique for implementing a low power high speed full adder using 8 transistors. Full adder circuits are used comprehensively in Application Specific Integrated Circuits (ASICs). Thus it is desirable to have high speed operation for the sub components. The explored method of implementation achieves a high speed low power design for the full adder. Simulated results indicate the superior performance of the proposed technique over conventional 28 transistor CMOS full adder. Detailed comparison of simulated results for the conventional and present method of implementation is presented. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=high%20speed%20low%20power%20full%20adder" title="high speed low power full adder">high speed low power full adder</a>, <a href="https://publications.waset.org/abstracts/search?q=2-T%20MUX" title=" 2-T MUX"> 2-T MUX</a>, <a href="https://publications.waset.org/abstracts/search?q=3-T%20XOR" title=" 3-T XOR"> 3-T XOR</a>, <a href="https://publications.waset.org/abstracts/search?q=8-T%20FA" title=" 8-T FA"> 8-T FA</a>, <a href="https://publications.waset.org/abstracts/search?q=pass%20transistor%20logic" title=" pass transistor logic"> pass transistor logic</a>, <a href="https://publications.waset.org/abstracts/search?q=CMOS%20%28complementary%20metal%20oxide%20semiconductor%29" title=" CMOS (complementary metal oxide semiconductor)"> CMOS (complementary metal oxide semiconductor)</a> </p> <a href="https://publications.waset.org/abstracts/21932/design-and-study-of-a-low-power-high-speed-8-transistor-based-full-adder-using-multiplexer-and-xor-gates" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/21932.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">348</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">316</span> Power Circuit Schemes in AC Drive is Made by Condition of the Minimum Electric Losses</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=M.%20A.%20Grigoryev">M. A. Grigoryev</a>, <a href="https://publications.waset.org/abstracts/search?q=A.%20N.%20Shishkov"> A. N. Shishkov</a>, <a href="https://publications.waset.org/abstracts/search?q=D.%20A.%20Sychev"> D. A. Sychev</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The article defines the necessity of choosing the optimal power circuits scheme of the electric drive with field regulated reluctance machine. The specific weighting factors are calculation, the linear regression dependence of specific losses in semiconductor frequency converters are presented depending on the values of the rated current. It is revealed that with increase of the carrier frequency PWM improves the output current waveform, but increases the loss, so you will need depending on the task in a certain way to choose from the carrier frequency. For task of optimization by criterion of the minimum electrical losses regression dependence of the electrical losses in the frequency converter circuit at a frequency of a PWM signal of 0 Hz. The surface optimization criterion is presented depending on the rated output torque of the motor and number of phases. In electric drives with field regulated reluctance machine with at low output power optimization criterion appears to be the worst for multiphase circuits. With increasing output power this trend hold true, but becomes insignificantly different optimal solutions for three-phase and multiphase circuits. This is explained to the linearity of the dependence of the electrical losses from the current. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=field%20regulated%20reluctance%20machine" title="field regulated reluctance machine">field regulated reluctance machine</a>, <a href="https://publications.waset.org/abstracts/search?q=the%20electrical%20losses" title=" the electrical losses"> the electrical losses</a>, <a href="https://publications.waset.org/abstracts/search?q=multiphase%20power%20circuit" title=" multiphase power circuit"> multiphase power circuit</a>, <a href="https://publications.waset.org/abstracts/search?q=the%20surface%20optimization%20criterion" title=" the surface optimization criterion"> the surface optimization criterion</a> </p> <a href="https://publications.waset.org/abstracts/46140/power-circuit-schemes-in-ac-drive-is-made-by-condition-of-the-minimum-electric-losses" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/46140.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">295</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">315</span> Two-Dimensional Material-Based Negative Differential Resistance Device with High Peak-to- Valley Current Ratio for Multi-Valued Logic Circuits</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Kwan-Ho%20Kim">Kwan-Ho Kim</a>, <a href="https://publications.waset.org/abstracts/search?q=Jin-Hong%20Park"> Jin-Hong Park</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The multi-valued logic (MVL) circuits, which can handle more than two logic states, are one of the promising solutions to overcome the bit density limitations of conventional binary logic systems. Recently, tunneling devices such as Esaki diode and resonant tunneling diode (RTD) have been extensively explored to construct the MVL circuits. These tunneling devices present a negative differential resistance (NDR) phenomenon in which a current decreases as a voltage increases in a specific applied voltage region. Due to this non-monotonic current behavior, the tunneling devices have more than two threshold voltages, consequently enabling construction of MVL circuits. Recently, the emergence of two dimensional (2D) van der Waals (vdW) crystals has opened up the possibility to fabricate such tunneling devices easily. Owing to the defect-free surface of the 2D crystals, a very abrupt junction interface could be formed through a simple stacking process, which subsequently allowed the implementation of a high-performance tunneling device. Here, we report a vdW heterostructure based tunneling device with multiple threshold voltages, which was fabricated with black phosphorus (BP) and hafnium diselenide (HfSe₂). First, we exfoliated BP on the SiO₂ substrate and then transferred HfSe₂ on BP using dry transfer method. The BP and HfSe₂ form type-Ⅲ heterojunction so that the highly doped n+/p+ interface can be easily implemented without additional electrical or chemical doping process. Owing to high natural doping at the junction, record high peak to valley ratio (PVCR) of 16 was observed to the best our knowledge in 2D materials based NDR device. Furthermore, based on this, we first demonstrate the feasibility of the ternary latch by connecting two multi-threshold voltage devices in series. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=two%20dimensional%20van%20der%20Waals%20crystal" title="two dimensional van der Waals crystal">two dimensional van der Waals crystal</a>, <a href="https://publications.waset.org/abstracts/search?q=multi-valued%20logic" title=" multi-valued logic"> multi-valued logic</a>, <a href="https://publications.waset.org/abstracts/search?q=negative%20differential%20resistnace" title=" negative differential resistnace"> negative differential resistnace</a>, <a href="https://publications.waset.org/abstracts/search?q=tunneling%20device" title=" tunneling device"> tunneling device</a> </p> <a href="https://publications.waset.org/abstracts/93870/two-dimensional-material-based-negative-differential-resistance-device-with-high-peak-to-valley-current-ratio-for-multi-valued-logic-circuits" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/93870.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">213</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">314</span> Single Pass Design of Genetic Circuits Using Absolute Binding Free Energy Measurements and Dimensionless Analysis</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Iman%20Farasat">Iman Farasat</a>, <a href="https://publications.waset.org/abstracts/search?q=Howard%20M.%20Salis"> Howard M. Salis</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Engineered genetic circuits reprogram cellular behavior to act as living computers with applications in detecting cancer, creating self-controlling artificial tissues, and dynamically regulating metabolic pathways. Phenemenological models are often used to simulate and design genetic circuit behavior towards a desired behavior. While such models assume that each circuit component’s function is modular and independent, even small changes in a circuit (e.g. a new promoter, a change in transcription factor expression level, or even a new media) can have significant effects on the circuit’s function. Here, we use statistical thermodynamics to account for the several factors that control transcriptional regulation in bacteria, and experimentally demonstrate the model’s accuracy across 825 measurements in several genetic contexts and hosts. We then employ our first principles model to design, experimentally construct, and characterize a family of signal amplifying genetic circuits (genetic OpAmps) that expand the dynamic range of cell sensors. To develop these models, we needed a new approach to measuring the in vivo binding free energies of transcription factors (TFs), a key ingredient of statistical thermodynamic models of gene regulation. We developed a new high-throughput assay to measure RNA polymerase and TF binding free energies, requiring the construction and characterization of only a few constructs and data analysis (Figure 1A). We experimentally verified the assay on 6 TetR-homolog repressors and a CRISPR/dCas9 guide RNA. We found that our binding free energy measurements quantitatively explains why changing TF expression levels alters circuit function. Altogether, by combining these measurements with our biophysical model of translation (the RBS Calculator) as well as other measurements (Figure 1B), our model can account for changes in TF binding sites, TF expression levels, circuit copy number, host genome size, and host growth rate (Figure 1C). Model predictions correctly accounted for how these 8 factors control a promoter’s transcription rate (Figure 1D). Using the model, we developed a design framework for engineering multi-promoter genetic circuits that greatly reduces the number of degrees of freedom (8 factors per promoter) to a single dimensionless unit. We propose the Ptashne (Pt) number to encapsulate the 8 co-dependent factors that control transcriptional regulation into a single number. Therefore, a single number controls a promoter’s output rather than these 8 co-dependent factors, and designing a genetic circuit with N promoters requires specification of only N Pt numbers. We demonstrate how to design genetic circuits in Pt number space by constructing and characterizing 15 2-repressor OpAmp circuits that act as signal amplifiers when within an optimal Pt region. We experimentally show that OpAmp circuits using different TFs and TF expression levels will only amplify the dynamic range of input signals when their corresponding Pt numbers are within the optimal region. Thus, the use of the Pt number greatly simplifies the genetic circuit design, particularly important as circuits employ more TFs to perform increasingly complex functions. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=transcription%20factor" title="transcription factor">transcription factor</a>, <a href="https://publications.waset.org/abstracts/search?q=synthetic%20biology" title=" synthetic biology"> synthetic biology</a>, <a href="https://publications.waset.org/abstracts/search?q=genetic%20circuit" title=" genetic circuit"> genetic circuit</a>, <a href="https://publications.waset.org/abstracts/search?q=biophysical%20model" title=" biophysical model"> biophysical model</a>, <a href="https://publications.waset.org/abstracts/search?q=binding%20energy%20measurement" title=" binding energy measurement"> binding energy measurement</a> </p> <a href="https://publications.waset.org/abstracts/13748/single-pass-design-of-genetic-circuits-using-absolute-binding-free-energy-measurements-and-dimensionless-analysis" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/13748.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">473</span> </span> </div> </div> <ul class="pagination"> <li class="page-item"><a class="page-link" href="https://publications.waset.org/abstracts/search?q=singularly%20perturbed%20circuits&page=1" rel="prev">‹</a></li> <li class="page-item"><a class="page-link" href="https://publications.waset.org/abstracts/search?q=singularly%20perturbed%20circuits&page=1">1</a></li> <li class="page-item active"><span class="page-link">2</span></li> <li class="page-item"><a class="page-link" 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