{"title":"Bias Stability of a-IGZO TFT and a new Shift-Register Design Suitable for a-IGZO TFT","authors":"Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han","volume":52,"journal":"International Journal of Electrical and Computer Engineering","pagesStart":568,"pagesEnd":572,"ISSN":"1307-6892","URL":"https:\/\/publications.waset.org\/pdf\/10628","abstract":"We have fabricated a-IGZO TFT and investigated the\r\nstability under positive DC and AC bias stress. The threshold voltage\r\nof a-IGZO TFT shifts positively under those biases, and that reduces\r\non-current. For this reason, conventional shift-register circuit\r\nemploying TFTs which stressed by positive bias will be unstable, may\r\ndo not work properly. We have designed a new 6-transistor\r\nshift-register, which has less transistors than prior circuits. The TFTs\r\nof the proposed shift-register are not suffering from positive DC or AC\r\nstress, mainly kept unbiased. Despite the compact design, the stable\r\noutput signal was verified through the SPICE simulation even under\r\nRC delay of clock signal.","references":"[1] H. Yubata et al., \"High-mobility thin-film transistor with amorphous\r\nInGaZnO4 channel fabricated by room temperature rf-magnetron\r\nsputtering\", Appl. Phys. Lett. 89, 112123 (2006).\r\n[2] H. Hosono et al.,\"Recent progress in transparent oxide semiconductors:\r\nMaterials and device application\", Thin Solid Films 515 (2007).\r\n[3] J-H. Lee et al, \"World's largest (15-inch) XGA AMLCD panel using\r\nIGZO oxide TFT, SID 08 Digest, PP.625 (2008)\r\n[4] S.H. Moon et al, US20070177438\r\n[5] Yong Ho Jang, US20060146978\r\n[6] Abbas Jamshidi-Roudbari, Shahrukh Akbar Khan and Miltiadis K.\r\nHatalis, \"High-Frequency Half-Bit Shift Register With\r\nAmorphous-Oxide TFT\", IEEE ELECTRON DEVICE LETTERS, VOL.\r\n31, NO. 4, (2010)\r\n[7] T. Osada, K. Akimoto, T. Sato, M. Ikeda, M. Tsubuku, J. Sakata, J.\r\nKoyama, T. Serikawa, and S. Yamazaki, \"Development of\r\ndriverintegrated panel using amorphous In-Ga-Zn-Oxide TFT,\" in Proc.\r\nSID Symp. Dig., vol. 40, pp. 184-187 (2009)\r\n[8] Jae Kyeong Jeong, Hui Won Yang, Jong Han Jeong, Yeon-Gon Mo, and\r\nHye Dong Kim, \"Origin of threshold voltage instability in\r\nindium-gallium-zinc oxide thin film transistors\", Appl. Phys. Lett. 93,\r\n123508 (2008)\r\n[9] Ken Hoshino, David Hong, Hai Q. Chiang, and John F. Wager,\r\n\"Constant-Voltage-Bias Stress Testing of a-IGZO Thin-Film Transistors\",\r\nIEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 56, NO. 7\r\n(2009)\r\n[10] A. Suresh and J. F. Muth, \"Bias stress stability of indium gallium zinc\r\noxide channel based transparent thin film transistors\", Appl. Phys. Lett.\r\n92, 033502 (2008)\r\n[11] In-Tak Cho, Jeong-Min Lee, Jong-Ho Lee and Hyuck-In Kwon, \"Charge\r\ntrapping and detrapping characteristics in amorphous InGaZnO TFTs\r\nunder static and dynamic stresses\", Semicond. Sci. Technol. 24 (2009)\r\n[12] Sangwon Lee et al., \"Electrical stress-induced instability of amorphous\r\nindium-gallium-zinc oxide thin-film transistors under bipolar ac stress\",\r\nAPPLIED PHYSICS LETTERS 95, 132101 (2009)\r\n[13] Tze-Ching Fung, Katsumi Abe, Hideya Kumomi and Jerzy Kanicki,\r\n\"DC\/AC Electrical Instability of R.F. Sputter Amorphous In-Ga-Zn-O\r\nTFTs\", SID 09 DIGEST (2009)","publisher":"World Academy of Science, Engineering and Technology","index":"Open Science Index 52, 2011"}