TY - JFULL AU - Aakash Subramanian and Vansh Pal Singh Makh and Abhijit Mitra PY - 2007/9/ TI - A New Digital Transceiver Circuit for Asynchronous Communication T2 - International Journal of Electronics and Communication Engineering SP - 1227 EP - 1232 VL - 1 SN - 1307-6892 UR - https://publications.waset.org/pdf/79 PU - World Academy of Science, Engineering and Technology NX - Open Science Index 8, 2007 N2 - A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit. ER -