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<td><a href="#ABA">ABA</a> <a href="#ADC">ADC</a> <a href="#ADD">ADD</a> <a href="#AND">AND</a> <a href="#ASL">ASL</a> <a href="#ASR">ASR</a> <a href="#BCC">BCC</a> <a href="#BCS">BCS</a> <a href="#BEQ">BEQ</a></td> <td><a href="#BGE">BGE</a> <a href="#BGT">BGT</a> <a href="#BHI">BHI</a> <a href="#BIT">BIT</a> <a href="#BLE">BLE</a> <a href="#BLS">BLS</a> <a href="#BLT">BLT</a> <a href="#BMI">BMI</a> <a href="#BNE">BNE</a></td> <td><a href="#BPL">BPL</a> <a href="#BRA">BRA</a> <a href="#BSR">BSR</a> <a href="#BVC">BVC</a> <a href="#BVS">BVS</a> <a href="#CBA">CBA</a> <a href="#CLC">CLC</a> <a href="#CLI">CLI</a> <a href="#CLR">CLR</a></td> <td><a href="#CLV">CLV</a> <a href="#CMP">CMP</a> <a href="#COM">COM</a> <a href="#CPX">CPX</a> <a href="#DAA">DAA</a> <a href="#DEC">DEC</a> <a href="#DES">DES</a> <a href="#DEX">DEX</a> <a href="#EOR">EOR</a></td> <td><a href="#INC">INC</a> <a href="#INS">INS</a> <a href="#INX">INX</a> <a href="#JMP">JMP</a> <a href="#JSR">JSR</a> <a href="#LDA">LDA</a> <a href="#LDS">LDS</a> <a href="#LDX">LDX</a> <a href="#LSR">LSR</a></td> <td><a href="#NEG">NEG</a> <a href="#NOP">NOP</a> <a href="#ORA">ORA</a> <a href="#PSH">PSH</a> <a href="#PUL">PUL</a> <a href="#ROL">ROL</a> <a href="#ROR">ROR</a> <a href="#RTI">RTI</a> <a href="#RTS">RTS</a></td> <td><a href="#SBA">SBA</a> <a href="#SBC">SBC</a> <a href="#SEC">SEC</a> <a href="#SEI">SEI</a> <a href="#SEV">SEV</a> <a href="#STA">STA</a> <a href="#STS">STS</a> <a href="#STX">STX</a> <a href="#SUB">SUB</a></td> <td><a href="#SWI">SWI</a> <a href="#TAB">TAB</a> <a href="#TAP">TAP</a> <a href="#TBA">TBA</a> <a href="#TPA">TPA</a> <a href="#TST">TST</a> <a href="#TSX">TSX</a> <a href="#TXS">TXS</a> <a href="#WAI">WAI</a></td> </tr> </table> <h2>Decoding table</h2> <table id="decoding-table"> <tr><td>MSB \ LSB</td><td>_0</td><td>_1</td><td>_2</td><td>_3</td><td>_4</td><td>_5</td><td>_6</td><td>_7</td><td>_8</td><td>_9</td><td>_A</td><td>_B</td><td>_C</td><td>_D</td><td>_E</td><td>_F</td></tr> <tr><td>0_</td><td></td><td><a href="#NOP-INH">NOP</a> (<a href="#INH-desc">INH</a>)</td><td></td><td></td><td></td><td></td><td><a href="#TAP-INH">TAP</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#TPA-INH">TPA</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#INX-INH">INX</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#DEX-INH">DEX</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#CLV-INH">CLV</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#SEV-INH">SEV</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#CLC-INH">CLC</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#SEC-INH">SEC</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#CLI-INH">CLI</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#SEI-INH">SEI</a> (<a href="#INH-desc">INH</a>)</td></tr> <tr><td>1_</td><td><a href="#SBA-INH">SBA</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#CBA-INH">CBA</a> (<a href="#INH-desc">INH</a>)</td><td></td><td></td><td></td><td></td><td><a href="#TAB-INH">TAB</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#TBA-INH">TBA</a> (<a href="#INH-desc">INH</a>)</td><td></td><td><a href="#DAA-INH">DAA</a> (<a href="#INH-desc">INH</a>)</td><td></td><td><a href="#ABA-ACC">ABA</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td></td><td></td><td></td></tr> <tr><td>2_</td><td><a href="#BRA-REL">BRA</a> (<a href="#REL-desc">REL</a>)</td><td></td><td><a href="#BHI-REL">BHI</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BLS-REL">BLS</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BCC-REL">BCC</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BCS-REL">BCS</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BNE-REL">BNE</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BEQ-REL">BEQ</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BVC-REL">BVC</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BVS-REL">BVS</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BPL-REL">BPL</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BMI-REL">BMI</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BGE-REL">BGE</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BLT-REL">BLT</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BGT-REL">BGT</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#BLE-REL">BLE</a> (<a href="#REL-desc">REL</a>)</td></tr> <tr><td>3_</td><td><a href="#TSX-INH">TSX</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#INS-INH">INS</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#PUL-A-ACC">PUL A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#PUL-B-ACC">PUL B</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#DES-INH">DES</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#TXS-INH">TXS</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#PSH-A-ACC">PSH A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#PSH-B-ACC">PSH B</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td><a href="#RTS-INH">RTS</a> (<a href="#INH-desc">INH</a>)</td><td></td><td><a href="#RTI-INH">RTI</a> (<a href="#INH-desc">INH</a>)</td><td></td><td></td><td><a href="#WAI-INH">WAI</a> (<a href="#INH-desc">INH</a>)</td><td><a href="#SWI-INH">SWI</a> (<a href="#INH-desc">INH</a>)</td></tr> <tr><td>4_</td><td><a href="#NEG-A-ACC">NEG A</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td></td><td><a href="#COM-A-ACC">COM A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#LSR-A-ACC">LSR A</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td><a href="#ROR-A-ACC">ROR A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#ASR-A-ACC">ASR A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#ASL-A-ACC">ASL A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#ROL-A-ACC">ROL A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#DEC-A-ACC">DEC A</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td><a href="#INC-A-ACC">INC A</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#TST-A-ACC">TST A</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td><a href="#CLR-A-ACC">CLR A</a> (<a href="#ACC-desc">ACC</a>)</td></tr> <tr><td>5_</td><td><a href="#NEG-B-ACC">NEG B</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td></td><td><a href="#COM-B-ACC">COM B</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#LSR-B-ACC">LSR B</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td><a href="#ROR-B-ACC">ROR B</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#ASR-B-ACC">ASR B</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#ASL-B-ACC">ASL B</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#ROL-B-ACC">ROL B</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#DEC-B-ACC">DEC B</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td><a href="#INC-B-ACC">INC B</a> (<a href="#ACC-desc">ACC</a>)</td><td><a href="#TST-B-ACC">TST B</a> (<a href="#ACC-desc">ACC</a>)</td><td></td><td><a href="#CLR-B-ACC">CLR B</a> (<a href="#ACC-desc">ACC</a>)</td></tr> <tr><td>6_</td><td><a href="#NEG-IDX">NEG</a> (<a href="#IDX-desc">IDX</a>)</td><td></td><td></td><td><a href="#COM-IDX">COM</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#LSR-IDX">LSR</a> (<a href="#IDX-desc">IDX</a>)</td><td></td><td><a href="#ROR-IDX">ROR</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ASR-IDX">ASR</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ASL-IDX">ASL</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ROL-IDX">ROL</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#DEC-IDX">DEC</a> (<a href="#IDX-desc">IDX</a>)</td><td></td><td><a href="#INC-IDX">INC</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#TST-IDX">TST</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#JMP-IDX">JMP</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#CLR-IDX">CLR</a> (<a href="#IDX-desc">IDX</a>)</td></tr> <tr><td>7_</td><td><a href="#NEG-EXT">NEG</a> (<a href="#EXT-desc">EXT</a>)</td><td></td><td></td><td><a href="#COM-EXT">COM</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#LSR-EXT">LSR</a> (<a href="#EXT-desc">EXT</a>)</td><td></td><td><a href="#ROR-EXT">ROR</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ASR-EXT">ASR</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ASL-EXT">ASL</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ROL-EXT">ROL</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#DEC-EXT">DEC</a> (<a href="#EXT-desc">EXT</a>)</td><td></td><td><a href="#INC-EXT">INC</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#TST-EXT">TST</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#JMP-EXT">JMP</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#CLR-EXT">CLR</a> (<a href="#EXT-desc">EXT</a>)</td></tr> <tr><td>8_</td><td><a href="#SUB-A-IMM">SUB A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#CMP-A-IMM">CMP A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#SBC-A-IMM">SBC A</a> (<a href="#IMM-desc">IMM</a>)</td><td></td><td><a href="#AND-A-IMM">AND A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#BIT-A-IMM">BIT A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#LDA-A-IMM">LDA A</a> (<a href="#IMM-desc">IMM</a>)</td><td></td><td><a href="#EOR-A-IMM">EOR A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#ADC-A-IMM">ADC A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#ORA-A-IMM">ORA A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#ADD-A-IMM">ADD A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#CPX-A-IMM">CPX A</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#BSR-REL">BSR</a> (<a href="#REL-desc">REL</a>)</td><td><a href="#LDS-IMM">LDS</a> (<a href="#IMM-desc">IMM</a>)</td><td></td></tr> <tr><td>9_</td><td><a href="#SUB-A-DIR">SUB A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#CMP-A-DIR">CMP A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#SBC-A-DIR">SBC A</a> (<a href="#DIR-desc">DIR</a>)</td><td></td><td><a href="#AND-A-DIR">AND A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#BIT-A-DIR">BIT A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#LDA-A-DIR">LDA A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#STA-A-DIR">STA A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#EOR-A-DIR">EOR A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#ADC-A-DIR">ADC A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#ORA-A-DIR">ORA A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#ADD-A-DIR">ADD A</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#CPX-A-DIR">CPX A</a> (<a href="#DIR-desc">DIR</a>)</td><td></td><td><a href="#LDS-DIR">LDS</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#STS-DIR">STS</a> (<a href="#DIR-desc">DIR</a>)</td></tr> <tr><td>A_</td><td><a href="#SUB-A-IDX">SUB A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#CMP-A-IDX">CMP A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#SBC-A-IDX">SBC A</a> (<a href="#IDX-desc">IDX</a>)</td><td></td><td><a href="#AND-A-IDX">AND A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#BIT-A-IDX">BIT A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#LDA-A-IDX">LDA A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#STA-A-IDX">STA A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#EOR-A-IDX">EOR A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ADC-A-IDX">ADC A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ORA-A-IDX">ORA A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ADD-A-IDX">ADD A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#CPX-A-IDX">CPX A</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#JSR-IDX">JSR</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#LDS-IDX">LDS</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#STS-IDX">STS</a> (<a href="#IDX-desc">IDX</a>)</td></tr> <tr><td>B_</td><td><a href="#SUB-A-EXT">SUB A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#CMP-A-EXT">CMP A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#SBC-A-EXT">SBC A</a> (<a href="#EXT-desc">EXT</a>)</td><td></td><td><a href="#AND-A-EXT">AND A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#BIT-A-EXT">BIT A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#LDA-A-EXT">LDA A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#STA-A-EXT">STA A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#EOR-A-EXT">EOR A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ADC-A-EXT">ADC A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ORA-A-EXT">ORA A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ADD-A-EXT">ADD A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#CPX-A-EXT">CPX A</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#JSR-EXT">JSR</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#LDS-EXT">LDS</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#STS-EXT">STS</a> (<a href="#EXT-desc">EXT</a>)</td></tr> <tr><td>C_</td><td><a href="#SUB-B-IMM">SUB B</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#CMP-B-IMM">CMP B</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#SBC-B-IMM">SBC B</a> (<a href="#IMM-desc">IMM</a>)</td><td></td><td><a href="#AND-B-IMM">AND B</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#BIT-B-IMM">BIT B</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#LDA-B-IMM">LDA B</a> (<a href="#IMM-desc">IMM</a>)</td><td></td><td><a href="#EOR-B-IMM">EOR B</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#ADC-B-IMM">ADC B</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#ORA-B-IMM">ORA B</a> (<a href="#IMM-desc">IMM</a>)</td><td><a href="#ADD-B-IMM">ADD B</a> (<a href="#IMM-desc">IMM</a>)</td><td></td><td></td><td><a href="#LDX-IMM">LDX</a> (<a href="#IMM-desc">IMM</a>)</td><td></td></tr> <tr><td>D_</td><td><a href="#SUB-B-DIR">SUB B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#CMP-B-DIR">CMP B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#SBC-B-DIR">SBC B</a> (<a href="#DIR-desc">DIR</a>)</td><td></td><td><a href="#AND-B-DIR">AND B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#BIT-B-DIR">BIT B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#LDA-B-DIR">LDA B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#STA-B-DIR">STA B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#EOR-B-DIR">EOR B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#ADC-B-DIR">ADC B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#ORA-B-DIR">ORA B</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#ADD-B-DIR">ADD B</a> (<a href="#DIR-desc">DIR</a>)</td><td></td><td></td><td><a href="#LDX-DIR">LDX</a> (<a href="#DIR-desc">DIR</a>)</td><td><a href="#STX-DIR">STX</a> (<a href="#DIR-desc">DIR</a>)</td></tr> <tr><td>E_</td><td><a href="#SUB-B-IDX">SUB B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#CMP-B-IDX">CMP B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#SBC-B-IDX">SBC B</a> (<a href="#IDX-desc">IDX</a>)</td><td></td><td><a href="#AND-B-IDX">AND B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#BIT-B-IDX">BIT B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#LDA-B-IDX">LDA B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#STA-B-IDX">STA B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#EOR-B-IDX">EOR B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ADC-B-IDX">ADC B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ORA-B-IDX">ORA B</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#ADD-B-IDX">ADD B</a> (<a href="#IDX-desc">IDX</a>)</td><td></td><td></td><td><a href="#LDX-IDX">LDX</a> (<a href="#IDX-desc">IDX</a>)</td><td><a href="#STX-IDX">STX</a> (<a href="#IDX-desc">IDX</a>)</td></tr> <tr><td>F_</td><td><a href="#SUB-B-EXT">SUB B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#CMP-B-EXT">CMP B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#SBC-B-EXT">SBC B</a> (<a href="#EXT-desc">EXT</a>)</td><td></td><td><a href="#AND-B-EXT">AND B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#BIT-B-EXT">BIT B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#LDA-B-EXT">LDA B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#STA-B-EXT">STA B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#EOR-B-EXT">EOR B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ADC-B-EXT">ADC B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ORA-B-EXT">ORA B</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#ADD-B-EXT">ADD B</a> (<a href="#EXT-desc">EXT</a>)</td><td></td><td></td><td><a href="#LDX-EXT">LDX</a> (<a href="#EXT-desc">EXT</a>)</td><td><a href="#STX-EXT">STX</a> (<a href="#EXT-desc">EXT</a>)</td></tr> </table> <h3>Abbreviations:</h3> <h4>6800 Addressing modes:</h4> <dl> <dt><a name="ACC-desc">ACC - Accumulator</a></dt> <dd>In accumulator addressing, either accumulator A or accumulator B is specified. These are 1- byte instructions. Ex: ABA adds the contetns of accumulators and stores the result in accumulator A</dd> <dt><a name="IMM-desc">IMM - Immediate</a></dt> <dd>In immediate addressing, operand is located immediately after the opcode in the second byte of the instruction in program memory (except LDS and LDX where the operand is in the second and third bytes of the instruction). These are 2-byte or 3-byte instructions. Ex: LDAA #$25 loads the number (25)H into accumulator A</dd> <dt><a name="DIR-desc">DIR - Direct</a></dt> <dd>In direct addressing, the address of the operand is contained in the second byte of the instruction. Direct addressing allows the user to directly address the lowest 256 bytes of the memory, i.e, locations 0 through 255. Enhanced execution times are achieved by storing data in these locations. These are 2-byte instructions. Ex: LDAA $25 loads the contents of the memory address (25)H into accumulator A</dd> <dt><a name="EXT-desc">EXT - Extended</a></dt> <dd>In extended addressing, the address contained in the second byte of the instruction is used as the higher eight bits of the address of the operand. The third byte of the instruction is used as the lower eight bits of the address for the operand. This is an absolute address in the memory. These are 3-byte instructions. Ex: LDAA $1000 loads the contents of the memory address (1000)H into accumulator A</dd> <dt><a name="IDX-desc">IDX - Indexed</a></dt> <dd>In indexed addressing, the address contained in the second byte of the instruction is added to the index register’s lowest eight bits. The carry is then added to the higher order eight bits of the index register. This result is then used to address memory. The modified address is held in a temporary address register so there is no change to the index register. These are 2-byte instructions. Ex: LDX #$1000 or LDAA $10,X Initially, LDX #$1000 instruction loads 1000H to the index register (X) using immediate addressing. Then LDAA $10,X instruction, using indexed addressing, loads the contents of memory address (10)H + X = 1010H into accumulator A.</dd> <dt><a name="INH-desc">INH - Implied (Inherent)</a></dt> <dd>In the implied addressing mode, the instruction gives the address inherently (i.e, stack pointer, index register, etc.). Inherent instructions are used when no operands need to be fetched. These are 1 byte instructions. Ex: INX increases the contents of the Index register by one. The address information is "inherent" in the instruction itself. INCA increases the contents of the accumulator A by one. DECB decreases the contents of the accumulator B by one.</dd> <dt><a name="REL-desc">REL - Relative</a></dt> <dd>The relative addressing mode is used with most of the branching instructions on the 6802 microprocessor. The first byte of the instruction is the opcode. The second byte of the instruction is called the offset. The offset is interpreted as a signed 7-bit number. If the MSB (most significant bit) of the offset is 0, the number is positive, which indicates a forward branch. If the MSB of the offset is 1, the number is negative, which indicates a backward branch. This allows the user to address data in a range of -126 to +129 bytes of the present instruction. These are 2-byte instructions. Ex: <pre>PC Hex Label Instruction 0009 2004 BRA 0FH</pre></dd> </dl> <h4>The registers:</h4> <ul> <li><a name="A-reg">A</a>,<a name="B-reg">B</a> Accumulator</li> <li><a name="X-reg">X</a> Index register</li> <li><a name="PC-reg">PC</a> Program Counter</li> <li><a name="SP-reg">SP</a> Stack Pointer</li> <li><a name="SR-reg">SR</a> Status register</li> </ul> <h4>Statuses shown:</h4> <ul> <li>C Carry status</li> <li>Z Zero status</li> <li>S Sign status</li> <li>O Overflow status</li> <li>I Interrupt Mask status</li> <li>AC Auxiliary Carry status</li> </ul> <h4>Symbols in the STATUSES column:</h4> <ul> <li>(blank) operation does not affect status</li> <li>x operation affects status</li> <li>0 flag is cleared by the operation</li> <li>1 flag is set by the operation</li> </ul> <a name="data8-desc">data8</a> 8-bit immediate data <a name="data16-desc">data16</a> 16-bit immediate data <a name="addr8-desc">addr8</a> 8-bit direct address <a name="addr16-desc">addr16</a> 16-bit extended address <a name="disp-desc">disp</a> 8-bit signed address displacement <a name="HI-desc"><a href="#HI-desc">(HI)</a> bits 15-8 from 16bit value <a name="LO-desc"><a href="#LO-desc">(LO)</a> bits 7-0 from 16bit value [...] content of ... [[...]] implied addressing (content of [content of ...]) <a name="AND-desc">∧</a> Logical AND <a name="OR-desc">∨</a> Logical OR <a name="XOR-desc">⊻</a> Logical Exclusive-OR <a name="transfer-desc">←</a> Data is transferred in the direction of the arrow <table id="maxitable"> <colgroup><col><col><col><col><col><col><col><col><col><col><col><col><col><col></colgroup> <tr><td>MNEMO</td><td>SYNTAX</td><td>MODE</td><td>BYTES</td><td>CODE</td><td>CYCLES</td><td>C</td><td>Z</td><td>S</td><td>O</td><td>Ac</td><td>I</td><td>SYMBOLIC OPERATION</td><td>DESCRIPTION</td></tr> <tr><td><a name="ABA">ABA</a></td><td><a name="ABA-ACC">ABA</a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$1B</td><td>2</td><td>x</td><td>x</td><td>x</td><td>x</td><td>x</td><td>-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + [<a href="#B-reg">B</a>]</td><td>Add <a href="#B-reg">B</a> to <a href="#A-reg">A</a></td></tr> <tr><td rowspan="8"><a name="ADC">ADC</a></td><td><a name="ADC-A-IMM">ADC <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$89</td><td>2</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + <a href="#data8-desc">data8</a> + C</td><td rowspan="8">Add contents of Memory + Carry Flag to Accumulator</td></tr> <tr><td><a name="ADC-A-DIR">ADC <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$99</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + [<a href="#addr8-desc">addr8</a>] + C</td></tr> <tr><td><a name="ADC-A-IDX">ADC <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A9</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] + C</td></tr> <tr><td><a name="ADC-A-EXT">ADC <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B9</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + [<a href="#addr16-desc">addr16</a>] + C</td></tr> <tr><td><a name="ADC-B-IMM">ADC <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C9</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + <a href="#data8-desc">data8</a> + C</td></tr> <tr><td><a name="ADC-B-DIR">ADC <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D9</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + [<a href="#addr8-desc">addr8</a>] + C</td></tr> <tr><td><a name="ADC-B-IDX">ADC <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E9</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] + C</td></tr> <tr><td><a name="ADC-B-EXT">ADC <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F9</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + [<a href="#addr16-desc">addr16</a>] + C</td></tr> <tr><td rowspan="8"><a name="ADD">ADD</a></td><td><a name="ADD-A-IMM">ADD <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$8B</td><td>2</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + <a href="#data8-desc">data8</a></td><td rowspan="8">Add Memory contents to the Accumulator</td></tr> <tr><td><a name="ADD-A-DIR">ADD <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$9B</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="ADD-A-IDX">ADD <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$AB</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="ADD-A-EXT">ADD <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$BB</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="ADD-B-IMM">ADD <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$CB</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="ADD-B-DIR">ADD <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$DB</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="ADD-B-IDX">ADD <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$EB</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="ADD-B-EXT">ADD <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$FB</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td rowspan="8"><a name="AND">AND</a></td><td><a name="AND-A-IMM">AND <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$84</td><td>2</td><td rowspan="8">-</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">0</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> <a href="#data8-desc">data8</a></td><td rowspan="8">Memory contents AND the Accumulator to the Accumulator</td></tr> <tr><td><a name="AND-A-DIR">AND <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$94</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="AND-A-IDX">AND <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A4</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="AND-A-EXT">AND <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B4</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="AND-B-IMM">AND <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C4</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="AND-B-DIR">AND <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D4</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="AND-B-IDX">AND <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E4</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="AND-B-EXT">AND <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F4</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td rowspan="4"><a name="ASL">ASL</a></td><td><a name="ASL-A-ACC">ASL <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$48</td><td>2</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td rowspan="4">C ← 76543210 ← 0</td><td rowspan="4">Arithmetic Shift Left. Bit 0 is set to 0. (multiplying by two)</td></tr> <tr><td><a name="ASL-B-ACC">ASL <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$58</td><td>2</td> </tr> <tr><td><a name="ASL-IDX">ASL <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$68</td><td>7</td> </tr> <tr><td><a name="ASL-EXT">ASL <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$78</td><td>6</td> </tr> <tr><td rowspan="4"><a name="ASR">ASR</a></td><td><a name="ASR-A-ACC">ASR <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$47</td><td>2</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td rowspan="4">76543210 → C</td><td rowspan="4">Arithmetic Shift Right. Bit 7 stays the same.</td></tr> <tr><td><a name="ASR-B-ACC">ASR <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$57</td><td>2</td> </tr> <tr><td><a name="ASR-IDX">ASR <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$67</td><td>7</td> </tr> <tr><td><a name="ASR-EXT">ASR <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$77</td><td>6</td> </tr> <tr><td><a name="BCC">BCC</a></td><td><a name="BCC-REL">BCC <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$24</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(C == 0) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if carry clear</td></tr> <tr><td><a name="BCS">BCS</a></td><td><a name="BCS-REL">BCS <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$25</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(C == 1) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if carry set</td></tr> <tr><td><a name="BEQ">BEQ</a></td><td><a name="BEQ-REL">BEQ <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$27</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(Z == 1) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if equal to zero</td></tr> <tr><td><a name="BGE">BGE</a></td><td><a name="BGE-REL">BGE <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$2C</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(S <a href="#XOR-desc">⊻</a> O == 0) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if greater than or equal to zero</td></tr> <tr><td><a name="BGT">BGT</a></td><td><a name="BGT-REL">BGT <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$2E</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(Z <a href="#OR-desc">∨</a> (S <a href="#XOR-desc">⊻</a> O) == 0) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if greater than zero</td></tr> <tr><td><a name="BHI">BHI</a></td><td><a name="BHI-REL">BHI <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$22</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(C <a href="#OR-desc">∨</a> Z == 0) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if Accumulator contents higher than comparand</td></tr> <tr><td rowspan="8"><a name="BIT">BIT</a></td><td><a name="BIT-A-IMM">BIT <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$85</td><td>2</td><td rowspan="8">-</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">0</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> <a href="#data8-desc">data8</a></td><td rowspan="8">Memory contents AND the Accumulator, but only Status register is affected.</td></tr> <tr><td><a name="BIT-A-DIR">BIT <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$95</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="BIT-A-IDX">BIT <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A5</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="BIT-A-EXT">BIT <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B5</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#AND-desc">∧</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="BIT-B-IMM">BIT <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C5</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="BIT-B-DIR">BIT <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D5</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="BIT-B-IDX">BIT <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E5</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="BIT-B-EXT">BIT <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F5</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#AND-desc">∧</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="BLE">BLE</a></td><td><a name="BLE-REL">BLE <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$2F</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(Z <a href="#OR-desc">∨</a> (S <a href="#XOR-desc">⊻</a> O) == 1) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if less than or equal to zero</td></tr> <tr><td><a name="BLS">BLS</a></td><td><a name="BLS-REL">BLS <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$23</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(C <a href="#OR-desc">∨</a> Z == 1) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if Accumulator contents less than or same as comparand</td></tr> <tr><td><a name="BLT">BLT</a></td><td><a name="BLT-REL">BLT <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$2D</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(S <a href="#XOR-desc">⊻</a> O == 1) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if less than zero</td></tr> <tr><td><a name="BMI">BMI</a></td><td><a name="BMI-REL">BMI <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$2B</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(S == 1) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if minus</td></tr> <tr><td><a name="BNE">BNE</a></td><td><a name="BNE-REL">BNE <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$26</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(Z == 0) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if not equal to zero</td></tr> <tr><td><a name="BPL">BPL</a></td><td><a name="BPL-REL">BPL <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$2A</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(S == 0) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if plus</td></tr> <tr><td><a name="BRA">BRA</a></td><td><a name="BRA-REL">BRA <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$20</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2</td><td>Unconditional branch relative to present Program Counter contents.</td></tr> <tr><td><a name="BSR">BSR</a></td><td><a name="BSR-REL">BSR <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$8D</td><td>8</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[[<a href="#SP-reg">SP</a>]] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>], [[<a href="#SP-reg">SP</a>] - 1] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 2, [<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2</td><td>Unconditional branch to subroutine located relative to present Program Counter contents.</td></tr> <tr><td><a name="BVC">BVC</a></td><td><a name="BVC-REL">BVC <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$28</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(O == 0) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if overflow clear</td></tr> <tr><td><a name="BVS">BVS</a></td><td><a name="BVS-REL">BVS <a href="#disp-desc">disp</a></a></td><td><a href="#REL-desc">REL</a></td><td>2</td><td>$29</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>(O == 1) ? {[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a>] + <a href="#disp-desc">disp</a> + 2}</td><td>Branch if overflow set</td></tr> <tr><td><a name="CBA">CBA</a></td><td><a name="CBA-INH">CBA</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$11</td><td>2</td><td>x</td><td>x</td><td>x</td><td>x</td><td>-</td><td>-</td><td>[<a href="#A-reg">A</a>] - [<a href="#B-reg">B</a>]</td><td>Compare contents of Accumulators <a href="#A-reg">A</a> and <a href="#B-reg">B</a>. Only the Status register is affected.</td></tr> <tr><td><a name="CLC">CLC</a></td><td><a name="CLC-INH">CLC</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$0C</td><td>2</td><td>0</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>C <a href="#transfer-desc">←</a> 0</td><td>Clear the Carry Flag</td></tr> <tr><td><a name="CLI">CLI</a></td><td><a name="CLI-INH">CLI</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$0E</td><td>2</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>0</td><td>I <a href="#transfer-desc">←</a> 0</td><td>Clear the Interrupt flag to enable interrupts</td></tr> <tr><td rowspan="4"><a name="CLR">CLR</a></td><td><a name="CLR-A-ACC">CLR <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$4F</td><td>2</td><td rowspan="4">0</td><td rowspan="4">1</td><td rowspan="4">0</td><td rowspan="4">0</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> 0</td><td rowspan="2">Clear the Accumulator</td></tr> <tr><td><a name="CLR-B-ACC">CLR <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$5F</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> 0</td></tr> <tr><td><a name="CLR-IDX">CLR <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$6F</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> 0</td><td rowspan="2">Clear the Memory location</td></tr> <tr><td><a name="CLR-EXT">CLR <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$7F</td><td>6</td><td>[<a href="#addr16-desc">addr16</a>] <a href="#transfer-desc">←</a> 0</td></tr> <tr><td><a name="CLV">CLV</a></td><td><a name="CLV-INH">CLV</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$0A</td><td>2</td><td>-</td><td>-</td><td>-</td><td>0</td><td>-</td><td>-</td><td>O <a href="#transfer-desc">←</a> 0</td><td>Clear the Overflow flag</td></tr> <tr><td rowspan="8"><a name="CMP">CMP</a></td><td><a name="CMP-A-IMM">CMP <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$81</td><td>2</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] - <a href="#data8-desc">data8</a></td><td rowspan="8">Compare the contents of Memory and Accumulator. Only the Status register is affected.</td></tr> <tr><td><a name="CMP-A-DIR">CMP <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$91</td><td>3</td><td>[<a href="#A-reg">A</a>] - [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="CMP-A-IDX">CMP <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A1</td><td>5</td><td>[<a href="#A-reg">A</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="CMP-A-EXT">CMP <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B1</td><td>4</td><td>[<a href="#A-reg">A</a>] - [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="CMP-B-IMM">CMP <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C1</td><td>2</td><td>[<a href="#B-reg">B</a>] - <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="CMP-B-DIR">CMP <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D1</td><td>3</td><td>[<a href="#B-reg">B</a>] - [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="CMP-B-IDX">CMP <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E1</td><td>5</td><td>[<a href="#B-reg">B</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="CMP-B-EXT">CMP <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F1</td><td>4</td><td>[<a href="#B-reg">B</a>] - [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td rowspan="4"><a name="COM">COM</a></td><td><a name="COM-A-ACC">COM <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$43</td><td>2</td><td rowspan="4">1</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">0</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> $FF - [<a href="#A-reg">A</a>]</td><td rowspan="2">Complement the Accumulator</td></tr> <tr><td><a name="COM-B-ACC">COM <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$53</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> $FF - [<a href="#B-reg">B</a>]</td></tr> <tr><td><a name="COM-IDX">COM <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$63</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> $FF - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td><td rowspan="2">Complement the Memory Location</td></tr> <tr><td><a name="COM-EXT">COM <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$73</td><td>6</td><td>[<a href="#addr16-desc">addr16</a>] <a href="#transfer-desc">←</a> $FF - [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td rowspan="4"><a name="CPX">CPX</a></td><td><a name="CPX-DIR">CPX <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$9C</td><td>4</td><td rowspan="4">-</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] - [<a href="#addr8-desc">addr8</a>], [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] - [<a href="#addr8-desc">addr8</a> + 1]</td><td rowspan="4">Compare the contents of Memory to the Index Register <a href="#X-reg">X</a></td></tr> <tr><td><a name="CPX-IDX">CPX <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$AC</td><td>6</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]], [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>] + 1]</td></tr> <tr><td><a name="CPX-IMM">CPX #<a href="#data16-desc">data16</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>3</td><td>$8C</td><td>3</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] - <a href="#data16-desc">data16</a><a href="#HI-desc">(HI)</a>, [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] - <a href="#data16-desc">data16</a><a href="#LO-desc">(LO)</a></td></tr> <tr><td><a name="CPX-EXT">CPX <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$BC</td><td>5</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] - [<a href="#addr16-desc">addr16</a><a href="#HI-desc">(HI)</a>], [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] - [<a href="#addr16-desc">addr16</a><a href="#LO-desc">(LO)</a>]</td></tr> <tr><td><a name="DAA">DAA</a></td><td><a name="DAA-INH">DAA</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$19</td><td>2</td><td>x</td><td>x</td><td>x</td><td>x</td><td>-</td><td>-</td><td></td><td>Decimal Adjust Accumulator <a href="#A-reg">A</a></td></tr> <tr><td rowspan="4"><a name="DEC">DEC</a></td><td><a name="DEC-A-ACC">DEC <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$4A</td><td>2</td><td rowspan="4">-</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - 1</td><td rowspan="2">Decrement the Accumulator</td></tr> <tr><td><a name="DEC-B-ACC">DEC <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$5A</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - 1</td></tr> <tr><td><a name="DEC-IDX">DEC <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$6A</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] - 1</td><td rowspan="2">Decrement the Memory Location</td></tr> <tr><td><a name="DEC-EXT">DEC <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$7A</td><td>6</td><td>[<a href="#addr16-desc">addr16</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a>] - 1</td></tr> <tr><td><a name="DES">DES</a></td><td><a name="DES-INH">DES</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$34</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 1</td><td>Decrement the Stack Pointer</td></tr> <tr><td><a name="DEX">DEX</a></td><td><a name="DEX-INH">DEX</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$09</td><td>4</td><td>-</td><td>x</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#X-reg">X</a>] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a>] - 1</td><td>Decrement the Index Register <a href="#X-reg">X</a></td></tr> <tr><td rowspan="8"><a name="EOR">EOR</a></td><td><a name="EOR-A-IMM">EOR <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$88</td><td>2</td><td rowspan="8">-</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">0</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#XOR-desc">⊻</a> <a href="#data8-desc">data8</a></td><td rowspan="8">Memory contents EXLCLUSIVE OR the Accumulator</td></tr> <tr><td><a name="EOR-A-DIR">EOR <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$98</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#XOR-desc">⊻</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="EOR-A-IDX">EOR <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A8</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#XOR-desc">⊻</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="EOR-A-EXT">EOR <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B8</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#XOR-desc">⊻</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="EOR-B-IMM">EOR <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C8</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#XOR-desc">⊻</a> <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="EOR-B-DIR">EOR <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D8</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#XOR-desc">⊻</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="EOR-B-IDX">EOR <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E8</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#XOR-desc">⊻</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="EOR-B-EXT">EOR <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F8</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#XOR-desc">⊻</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td rowspan="4"><a name="INC">INC</a></td><td><a name="INC-A-ACC">INC <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$4C</td><td>2</td><td rowspan="4">-</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] + 1</td><td rowspan="2">Increment the Accumulator</td></tr> <tr><td><a name="INC-B-ACC">INC <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$5C</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] + 1</td></tr> <tr><td><a name="INC-IDX">INC <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$6C</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] + 1</td><td rowspan="2">Increment the Memory Location</td></tr> <tr><td><a name="INC-EXT">INC <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$7C</td><td>6</td><td>[<a href="#addr16-desc">addr16</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a>] + 1</td></tr> <tr><td><a name="INS">INS</a></td><td><a name="INS-INH">INS</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$31</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] + 1</td><td>Increment the Stack Pointer</td></tr> <tr><td><a name="INX">INX</a></td><td><a name="INX-INH">INX</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$08</td><td>4</td><td>-</td><td>x</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#X-reg">X</a>] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a>] + 1</td><td>Increment the Index Register <a href="#X-reg">X</a></td></tr> <tr><td rowspan="2"><a name="JMP">JMP</a></td><td><a name="JMP-IDX">JMP <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$6E</td><td>4</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td>[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> <a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]</td><td rowspan="2">Jump</td></tr> <tr><td><a name="JMP-EXT">JMP <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$7E</td><td>3</td><td>[<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> <a href="#addr16-desc">addr16</a></td></tr> <tr><td rowspan="2"><a name="JSR">JSR</a></td><td><a name="JSR-IDX">JSR <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$AD</td><td>8</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td>[[<a href="#SP-reg">SP</a>]] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>], [[<a href="#SP-reg">SP</a>] - 1] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 2, [<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> <a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]</td><td rowspan="2">Jump to Subroutine</td></tr> <tr><td><a name="JSR-EXT">JSR <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$BD</td><td>9</td><td>[[<a href="#SP-reg">SP</a>]] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>], [[<a href="#SP-reg">SP</a>] - 1] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 2, [<a href="#PC-reg">PC</a>] <a href="#transfer-desc">←</a> <a href="#addr16-desc">addr16</a></td></tr> <tr><td rowspan="8"><a name="LDA">LDA</a></td><td><a name="LDA-A-IMM">LDA <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$86</td><td>2</td><td rowspan="8">-</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">0</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> <a href="#data8-desc">data8</a></td><td rowspan="8">Load Accumulator from Memory</td></tr> <tr><td><a name="LDA-A-DIR">LDA <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$96</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="LDA-A-IDX">LDA <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A6</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="LDA-A-EXT">LDA <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B6</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="LDA-B-IMM">LDA <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C6</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="LDA-B-DIR">LDA <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D6</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="LDA-B-IDX">LDA <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E6</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="LDA-B-EXT">LDA <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F6</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td rowspan="4"><a name="LDS">LDS</a></td><td><a name="LDS-DIR">LDS <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$9E</td><td>4</td><td rowspan="4">-</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">0</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#SP-reg">SP</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#addr8-desc">addr8</a>], [<a href="#SP-reg">SP</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#addr8-desc">addr8</a> + 1]</td><td rowspan="4">Load the Stack Pointer</td></tr> <tr><td><a name="LDS-IDX">LDS <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$AE</td><td>6</td><td>[<a href="#SP-reg">SP</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]], [<a href="#SP-reg">SP</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>] + 1]</td></tr> <tr><td><a name="LDS-IMM">LDS #<a href="#data16-desc">data16</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>3</td><td>$8E</td><td>3</td><td>[<a href="#SP-reg">SP</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> <a href="#data16-desc">data16</a><a href="#HI-desc">(HI)</a>, [<a href="#SP-reg">SP</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> <a href="#data16-desc">data16</a><a href="#LO-desc">(LO)</a></td></tr> <tr><td><a name="LDS-EXT">LDS <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$BE</td><td>5</td><td>[<a href="#SP-reg">SP</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a><a href="#HI-desc">(HI)</a>], [<a href="#SP-reg">SP</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a><a href="#LO-desc">(LO)</a>]</td></tr> <tr><td rowspan="4"><a name="LDX">LDX</a></td><td><a name="LDX-DIR">LDX <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$DE</td><td>4</td><td rowspan="4">-</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">0</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#addr8-desc">addr8</a>], [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#addr8-desc">addr8</a> + 1]</td><td rowspan="4">Load the Index Register</td></tr> <tr><td><a name="LDX-IDX">LDX <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$EE</td><td>6</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]], [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>] + 1]</td></tr> <tr><td><a name="LDX-IMM">LDX #<a href="#data16-desc">data16</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>3</td><td>$CE</td><td>3</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> <a href="#data16-desc">data16</a><a href="#HI-desc">(HI)</a>, [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> <a href="#data16-desc">data16</a><a href="#LO-desc">(LO)</a></td></tr> <tr><td><a name="LDX-EXT">LDX <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$FE</td><td>5</td><td>[<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a><a href="#HI-desc">(HI)</a>], [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#addr16-desc">addr16</a><a href="#LO-desc">(LO)</a>]</td></tr> <tr><td rowspan="4"><a name="LSR">LSR</a></td><td><a name="LSR-A-ACC">LSR <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$44</td><td>2</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">0</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td rowspan="4">0 → 76543210 → C</td><td rowspan="4">Logical Shift Right. Bit 7 is set to 0. (dividing by two)</td></tr> <tr><td><a name="LSR-B-ACC">LSR <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$54</td><td>2</td> </tr> <tr><td><a name="LSR-IDX">LSR <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$64</td><td>7</td> </tr> <tr><td><a name="LSR-EXT">LSR <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$74</td><td>6</td> </tr> <tr><td rowspan="4"><a name="NEG">NEG</a></td><td><a name="NEG-A-ACC">NEG <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$40</td><td>2</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> 0 - [<a href="#A-reg">A</a>]</td><td rowspan="2">Negate the Accumulator</td></tr> <tr><td><a name="NEG-B-ACC">NEG <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$50</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> 0 - [<a href="#B-reg">B</a>]</td></tr> <tr><td><a name="NEG-IDX">NEG <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$60</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> 0 - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td><td rowspan="2">Negate the Memory Location</td></tr> <tr><td><a name="NEG-EXT">NEG <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$70</td><td>6</td><td>[<a href="#addr16-desc">addr16</a>] <a href="#transfer-desc">←</a> 0 - [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="NOP">NOP</a></td><td><a name="NOP-INH">NOP</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$01</td><td>2</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td></td><td>No Operation</td></tr> <tr><td rowspan="8"><a name="ORA">ORA</a></td><td><a name="ORA-A-IMM">ORA <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$8A</td><td>2</td><td rowspan="8">-</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">0</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#OR-desc">∨</a> <a href="#data8-desc">data8</a></td><td rowspan="8">OR the Accumulator</td></tr> <tr><td><a name="ORA-A-DIR">ORA <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$9A</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#OR-desc">∨</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="ORA-A-IDX">ORA <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$AA</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#OR-desc">∨</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="ORA-A-EXT">ORA <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$BA</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] <a href="#OR-desc">∨</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="ORA-B-IMM">ORA <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$CA</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#OR-desc">∨</a> <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="ORA-B-DIR">ORA <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$DA</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#OR-desc">∨</a> [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="ORA-B-IDX">ORA <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$EA</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#OR-desc">∨</a> [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="ORA-B-EXT">ORA <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$FA</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] <a href="#OR-desc">∨</a> [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td rowspan="2"><a name="PSH">PSH</a></td><td><a name="PSH-A-ACC">PSH <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$36</td><td>4</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td>[[<a href="#SP-reg">SP</a>]] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 1</td><td rowspan="2">Push Accumulator onto the Stack</td></tr> <tr><td><a name="PSH-B-ACC">PSH <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$37</td><td>4</td><td>[[<a href="#SP-reg">SP</a>]] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 1</td></tr> <tr><td rowspan="2"><a name="PUL">PUL</a></td><td><a name="PUL-A-ACC">PUL <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$32</td><td>4</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td rowspan="2">-</td><td>[<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] + 1, [<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>]]</td><td rowspan="2">Pull Data from Stack to Accumulator</td></tr> <tr><td><a name="PUL-B-ACC">PUL <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$33</td><td>4</td><td>[<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] + 1, [<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>]]</td></tr> <tr><td rowspan="4"><a name="ROL">ROL</a></td><td><a name="ROL-A-ACC">ROL <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$49</td><td>2</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td rowspan="4">C ← 76543210 ← C</td><td rowspan="4">Rotate left through Carry.</td></tr> <tr><td><a name="ROL-B-ACC">ROL <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$59</td><td>2</td> </tr> <tr><td><a name="ROL-IDX">ROL <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$69</td><td>7</td> </tr> <tr><td><a name="ROL-EXT">ROL <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$79</td><td>6</td> </tr> <tr><td rowspan="4"><a name="ROR">ROR</a></td><td><a name="ROR-A-ACC">ROR <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$46</td><td>2</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">-</td><td rowspan="4">-</td><td rowspan="4">C → 76543210 → C</td><td rowspan="4">Rotate right through Carry.</td></tr> <tr><td><a name="ROR-B-ACC">ROR <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$56</td><td>2</td> </tr> <tr><td><a name="ROR-IDX">ROR <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$66</td><td>7</td> </tr> <tr><td><a name="ROR-EXT">ROR <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$76</td><td>6</td> </tr> <tr><td><a name="RTI">RTI</a></td><td><a name="RTI-INH">RTI</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$3B</td><td>10</td><td>x</td><td>x</td><td>x</td><td>x</td><td>x</td><td>x</td><td>[<a href="#SR-reg">SR</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 1], [<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 2], [<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 3], [<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 4], [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 5], [<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 6], [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 7], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] + 7</td><td>Return from interrupt. Put registers from Stack and increment Stack Pointer.</td></tr> <tr><td><a name="RTS">RTS</a></td><td><a name="RTS-INH">RTS</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$39</td><td>5</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 1], [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [[<a href="#SP-reg">SP</a>] + 2], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] + 2</td><td>Return from subroutine. Pull <a href="#PC-reg">PC</a> from top of Stack and increment Stack Pointer.</td></tr> <tr><td><a name="SBA">SBA</a></td><td><a name="SBA-INH">SBA</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$10</td><td>2</td><td>x</td><td>x</td><td>x</td><td>x</td><td>-</td><td>-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - [<a href="#B-reg">B</a>]</td><td>Subtract contents of Accumulator <a href="#B-reg">B</a> from those of Accumulator <a href="#A-reg">A</a>.</td></tr> <tr><td rowspan="8"><a name="SBC">SBC</a></td><td><a name="SBC-A-IMM">SBC <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$82</td><td>2</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - <a href="#data8-desc">data8</a> - C</td><td rowspan="8">Subtract Mem and Carry Flag from Accumulator</td></tr> <tr><td><a name="SBC-A-DIR">SBC <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$92</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - [<a href="#addr8-desc">addr8</a>] - C</td></tr> <tr><td><a name="SBC-A-IDX">SBC <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A2</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] - C</td></tr> <tr><td><a name="SBC-A-EXT">SBC <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B2</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - [<a href="#addr16-desc">addr16</a>] - C</td></tr> <tr><td><a name="SBC-B-IMM">SBC <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C2</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - <a href="#data8-desc">data8</a> - C</td></tr> <tr><td><a name="SBC-B-DIR">SBC <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D2</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - [<a href="#addr8-desc">addr8</a>] - C</td></tr> <tr><td><a name="SBC-B-IDX">SBC <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E2</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] - C</td></tr> <tr><td><a name="SBC-B-EXT">SBC <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F2</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - [<a href="#addr16-desc">addr16</a>] - C</td></tr> <tr><td><a name="SEC">SEC</a></td><td><a name="SEC-INH">SEC</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$0D</td><td>2</td><td>1</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>C <a href="#transfer-desc">←</a> 1</td><td>Set the Carry Flag</td></tr> <tr><td><a name="SEI">SEI</a></td><td><a name="SEI-INH">SEI</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$0F</td><td>2</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>1</td><td>I <a href="#transfer-desc">←</a> 1</td><td>Set the Interrupt Flag to disable interrupts</td></tr> <tr><td><a name="SEV">SEV</a></td><td><a name="SEV-INH">SEV</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$0B</td><td>2</td><td>-</td><td>-</td><td>-</td><td>1</td><td>-</td><td>-</td><td>O <a href="#transfer-desc">←</a> 1</td><td>Set the Overflow Flag</td></tr> <tr><td rowspan="6"><a name="STA">STA</a></td><td><a name="STA-A-DIR">STA <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$97</td><td>4</td><td rowspan="6">-</td><td rowspan="6">x</td><td rowspan="6">x</td><td rowspan="6">0</td><td rowspan="6">-</td><td rowspan="6">-</td><td>[<a href="#addr8-desc">addr8</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>]</td><td rowspan="6">Store Accumulator in Memory</td></tr> <tr><td><a name="STA-A-IDX">STA <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A7</td><td>6</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>]</td></tr> <tr><td><a name="STA-A-EXT">STA <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B7</td><td>5</td><td>[<a href="#addr16-desc">addr16</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>]</td></tr> <tr><td><a name="STA-B-DIR">STA <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D7</td><td>4</td><td>[<a href="#addr8-desc">addr8</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>]</td></tr> <tr><td><a name="STA-B-IDX">STA <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E7</td><td>6</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>]</td></tr> <tr><td><a name="STA-B-EXT">STA <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F7</td><td>5</td><td>[<a href="#addr16-desc">addr16</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>]</td></tr> <tr><td rowspan="3"><a name="STS">STS</a></td><td><a name="STS-DIR">STS <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$9F</td><td>5</td><td rowspan="3">-</td><td rowspan="3">x</td><td rowspan="3">x</td><td rowspan="3">0</td><td rowspan="3">-</td><td rowspan="3">-</td><td>[<a href="#addr8-desc">addr8</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a><a href="#HI-desc">(HI)</a>], [<a href="#addr8-desc">addr8</a> + 1] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a><a href="#LO-desc">(LO)</a>]</td><td rowspan="3">Store the Stack Pointer</td></tr> <tr><td><a name="STS-IDX">STS <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$AF</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a><a href="#HI-desc">(HI)</a>], [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>] + 1] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a><a href="#LO-desc">(LO)</a>]</td></tr> <tr><td><a name="STS-EXT">STS <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$BF</td><td>6</td><td>[<a href="#addr16-desc">addr16</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a><a href="#HI-desc">(HI)</a>], [<a href="#addr16-desc">addr16</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a><a href="#LO-desc">(LO)</a>]</td></tr> <tr><td rowspan="3"><a name="STX">STX</a></td><td><a name="STX-DIR">STX <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$DF</td><td>5</td><td rowspan="3">-</td><td rowspan="3">x</td><td rowspan="3">x</td><td rowspan="3">0</td><td rowspan="3">-</td><td rowspan="3">-</td><td>[<a href="#addr8-desc">addr8</a>] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>], [<a href="#addr8-desc">addr8</a> + 1] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>]</td><td rowspan="3">Store the Index Register <a href="#X-reg">X</a></td></tr> <tr><td><a name="STX-IDX">STX <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$EF</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>], [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>] + 1] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>]</td></tr> <tr><td><a name="STX-EXT">STX <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$FF</td><td>6</td><td>[<a href="#addr16-desc">addr16</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>], [<a href="#addr16-desc">addr16</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>]</td></tr> <tr><td rowspan="8"><a name="SUB">SUB</a></td><td><a name="SUB-A-IMM">SUB <a href="#A-reg">A</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$80</td><td>2</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">x</td><td rowspan="8">-</td><td rowspan="8">-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - <a href="#data8-desc">data8</a></td><td rowspan="8">Subtract Memory contents from Accumulator</td></tr> <tr><td><a name="SUB-A-DIR">SUB <a href="#A-reg">A</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$90</td><td>3</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="SUB-A-IDX">SUB <a href="#A-reg">A</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$A0</td><td>5</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="SUB-A-EXT">SUB <a href="#A-reg">A</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$B0</td><td>4</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>] - [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="SUB-B-IMM">SUB <a href="#B-reg">B</a> #<a href="#data8-desc">data8</a></a></td><td><a href="#IMM-desc">IMM</a></td><td>2</td><td>$C0</td><td>2</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - <a href="#data8-desc">data8</a></td></tr> <tr><td><a name="SUB-B-DIR">SUB <a href="#B-reg">B</a> <a href="#addr8-desc">addr8</a></a></td><td><a href="#DIR-desc">DIR</a></td><td>2</td><td>$D0</td><td>3</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - [<a href="#addr8-desc">addr8</a>]</td></tr> <tr><td><a name="SUB-B-IDX">SUB <a href="#B-reg">B</a> <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$E0</td><td>5</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - [<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]]</td></tr> <tr><td><a name="SUB-B-EXT">SUB <a href="#B-reg">B</a> <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$F0</td><td>4</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>] - [<a href="#addr16-desc">addr16</a>]</td></tr> <tr><td><a name="SWI">SWI</a></td><td><a name="SWI-INH">SWI</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$3F</td><td>12</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>1</td><td>[[<a href="#SP-reg">SP</a>]] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>], [[<a href="#SP-reg">SP</a>] - 1] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>], [[<a href="#SP-reg">SP</a>] - 2] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>], [[<a href="#SP-reg">SP</a>] - 3] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>], [[<a href="#SP-reg">SP</a>] - 4] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>], [[<a href="#SP-reg">SP</a>] - 5] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>], [[<a href="#SP-reg">SP</a>] - 6] <a href="#transfer-desc">←</a> [<a href="#SR-reg">SR</a>], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 7, [<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>] <a href="#transfer-desc">←</a> [$FFFA], [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>] <a href="#transfer-desc">←</a> [$FFFB]</td><td>Software Interrupt: push registers onto Stack, decrement Stack Pointer, and jump to interrupt subroutine.</td></tr> <tr><td><a name="TAB">TAB</a></td><td><a name="TAB-INH">TAB</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$16</td><td>2</td><td>-</td><td>x</td><td>x</td><td>0</td><td>-</td><td>-</td><td>[<a href="#B-reg">B</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>]</td><td>Transfer <a href="#A-reg">A</a> to <a href="#B-reg">B</a></td></tr> <tr><td><a name="TAP">TAP</a></td><td><a name="TAP-INH">TAP</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$06</td><td>2</td><td>x</td><td>x</td><td>x</td><td>x</td><td>x</td><td>-</td><td>[<a href="#SR-reg">SR</a>] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>]</td><td>Transfer <a href="#A-reg">A</a> to Status Register</td></tr> <tr><td><a name="TBA">TBA</a></td><td><a name="TBA-INH">TBA</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$17</td><td>2</td><td>-</td><td>x</td><td>x</td><td>0</td><td>-</td><td>-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>]</td><td>Transfer <a href="#B-reg">B</a> to <a href="#A-reg">A</a></td></tr> <tr><td><a name="TPA">TPA</a></td><td><a name="TPA-INH">TPA</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$07</td><td>2</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#A-reg">A</a>] <a href="#transfer-desc">←</a> [<a href="#SR-reg">SR</a>]</td><td>Transfer Status Register to <a href="#A-reg">A</a></td></tr> <tr><td rowspan="4"><a name="TST">TST</a></td><td><a name="TST-A-ACC">TST <a href="#A-reg">A</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$4D</td><td>2</td><td rowspan="4">0</td><td rowspan="4">x</td><td rowspan="4">x</td><td rowspan="4">0</td><td rowspan="4">-</td><td rowspan="4">-</td><td>[<a href="#A-reg">A</a>] - 0</td><td rowspan="2">Test the Accumulator</td></tr> <tr><td><a name="TST-B-ACC">TST <a href="#B-reg">B</a></a></td><td><a href="#ACC-desc">ACC</a></td><td>1</td><td>$5D</td><td>2</td><td>[<a href="#B-reg">B</a>] - 0</td></tr> <tr><td><a name="TST-IDX">TST <a href="#data8-desc">data8</a>,<a href="#X-reg">X</a></a></td><td><a href="#IDX-desc">IDX</a></td><td>2</td><td>$6D</td><td>7</td><td>[<a href="#data8-desc">data8</a> + [<a href="#X-reg">X</a>]] - 0</td><td rowspan="2">Test the Memory Location</td></tr> <tr><td><a name="TST-EXT">TST <a href="#addr16-desc">addr16</a></a></td><td><a href="#EXT-desc">EXT</a></td><td>3</td><td>$7D</td><td>6</td><td>[<a href="#addr16-desc">addr16</a>] - 0</td></tr> <tr><td><a name="TSX">TSX</a></td><td><a name="TSX-INH">TSX</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$30</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#X-reg">X</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] + 1</td><td>Move Stack Pointer contents to Index register and increment.</td></tr> <tr><td><a name="TXS">TXS</a></td><td><a name="TXS-INH">TXS</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$35</td><td>4</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>[<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a>] - 1</td><td>Move Index register contents to Stack Pointer and decrement.</td></tr> <tr><td><a name="WAI">WAI</a></td><td><a name="WAI-INH">WAI</a></td><td><a href="#INH-desc">INH</a></td><td>1</td><td>$3E</td><td>9</td><td>-</td><td>-</td><td>-</td><td>-</td><td>-</td><td>1</td><td>[[<a href="#SP-reg">SP</a>]] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#LO-desc">(LO)</a>], [[<a href="#SP-reg">SP</a>] - 1] <a href="#transfer-desc">←</a> [<a href="#PC-reg">PC</a><a href="#HI-desc">(HI)</a>], [[<a href="#SP-reg">SP</a>] - 2] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#LO-desc">(LO)</a>], [[<a href="#SP-reg">SP</a>] - 3] <a href="#transfer-desc">←</a> [<a href="#X-reg">X</a><a href="#HI-desc">(HI)</a>], [[<a href="#SP-reg">SP</a>] - 4] <a href="#transfer-desc">←</a> [<a href="#A-reg">A</a>], [[<a href="#SP-reg">SP</a>] - 5] <a href="#transfer-desc">←</a> [<a href="#B-reg">B</a>], [[<a href="#SP-reg">SP</a>] - 6] <a href="#transfer-desc">←</a> [<a href="#SR-reg">SR</a>], [<a href="#SP-reg">SP</a>] <a href="#transfer-desc">←</a> [<a href="#SP-reg">SP</a>] - 7</td><td>Push registers onto Stack, decrement Stack Pointer, end wiat for interrupt. If [I] = 1 when WAI is executed, a non-maskable interrupt is required to exit the Wait state. Otherwise, [I] <a href="#transfer-desc">←</a> 1 when the interrupt occurs.</td></tr> </table> </div> </body> </html>