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Core Number Optimization Based Scheduler to Order/Mapp Simulink Application
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class="card"> <div class="card-body"><strong>Paper Count:</strong> 87352</div> </div> </div> </div> <div class="card publication-listing mt-3 mb-3"> <h5 class="card-header" style="font-size:.9rem">Core Number Optimization Based Scheduler to Order/Mapp Simulink Application</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Asma%20Rebaya">Asma Rebaya</a>, <a href="https://publications.waset.org/abstracts/search?q=Imen%20Amari"> Imen Amari</a>, <a href="https://publications.waset.org/abstracts/search?q=Kaouther%20Gasmi"> Kaouther Gasmi</a>, <a href="https://publications.waset.org/abstracts/search?q=Salem%20Hasnaoui"> Salem Hasnaoui</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Over these last years, the number of cores witnessed a spectacular increase in digital signal and general use processors. Concurrently, significant researches are done to get benefit from the high degree of parallelism. Indeed, these researches are focused to provide an efficient scheduling from hardware/software systems to multicores architecture. The scheduling process consists on statically choose one core to execute one task and to specify an execution order for the application tasks. In this paper, we describe an efficient scheduler that calculates the optimal number of cores required to schedule an application, gives a heuristic scheduling solution and evaluates its cost. Our proposal results are evaluated and compared with Preesm scheduler results and we prove that ours allows better scheduling in terms of latency, computation time and number of cores. <iframe src="https://publications.waset.org/abstracts/67853.pdf" style="width:100%; height:400px;" frameborder="0"></iframe> <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=computation%20time" title="computation time">computation time</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware%2Fsoftware%20system" title=" hardware/software system"> hardware/software system</a>, <a href="https://publications.waset.org/abstracts/search?q=latency" title=" latency"> latency</a>, <a href="https://publications.waset.org/abstracts/search?q=optimization" title="optimization">optimization</a>, <a href="https://publications.waset.org/abstracts/search?q=multi-cores%20platform" title=" multi-cores platform"> multi-cores platform</a>, <a href="https://publications.waset.org/abstracts/search?q=scheduling" title=" scheduling"> scheduling</a> </p> <a href="https://publications.waset.org/abstracts/67853/core-number-optimization-based-scheduler-to-ordermapp-simulink-application" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/67853.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">283</span> </span> </div> </div> </div> </main> <footer> <div id="infolinks" class="pt-3 pb-2"> <div class="container"> <div style="background-color:#f5f5f5;" class="p-3"> <div class="row"> <div class="col-md-2"> <ul class="list-unstyled"> About <li><a href="https://waset.org/page/support">About Us</a></li> <li><a href="https://waset.org/page/support#legal-information">Legal</a></li> <li><a target="_blank" rel="nofollow" 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