III-V compound semiconductor transistors鈥攆rom planar to nanowire structures

<!DOCTYPE html>     <html class="no-js" lang="en">  <head> <title>III-V compound semiconductor transistors鈥攆rom planar to nanowire structures - ADS</title>  <link rel="apple-touch-icon" sizes="180x180" href="/styles/favicon/apple-touch-icon.png" /> <link rel="icon" type="image/png" sizes="32x32" href="/styles/favicon/favicon-32x32.png" /> <link rel="icon" type="image/png" sizes="16x16" href="/styles/favicon/favicon-16x16.png" /> <link rel="manifest" href="/styles/favicon/site.webmanifest" /> <link rel="mask-icon" href="/styles/favicon/safari-pinned-tab.svg" color="#5bbad5" /> <meta name="apple-mobile-web-app-title" content="ADS" /> <meta name="application-name" content="ADS" /> <meta name="msapplication-TileColor" content="#ffc40d" /> <meta name="theme-color" content="#ffffff" />   <script>(function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start': new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0], j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src= 'https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f); })(window,document,'script','dataLayer','GTM-NT2453N');</script>  <link rel="stylesheet" href="/styles/css/styles.css"> <meta name="robots" content="noarchive"> <link rel="canonical" href="http://ui.adsabs.harvard.edu/abs/2014MRSBu..39..668R/abstract"/> <meta name="description" content="Conventional silicon transistor scaling is fast approaching its limits. An extension of the logic device roadmap to further improve future performance increases of integrated circuits is required to propel the electronics industry. Attention is turning to III-V compound semiconductors that are well positioned to replace silicon as the base material in logic switching devices. Their outstanding electron transport properties and the possibility to tune heterostructures provide tremendous opportunities to engineer novel nanometer-scale logic transistors. The scaling constraints require an evolution from planar III-V metal oxide semiconductor field-effect transistors (MOSFETs) toward transistor channels with a three-dimensional structure, such as nanowire FETs, to achieve future performance needs for complementary metal oxide semiconductor (CMOS) nodes beyond 10 nm. Further device innovations are required to increase energy efficiency. This could be addressed by tunnel FETs (TFETs), which rely on interband tunneling and thus require advanced III-V heterostructures for optimized performance. This article describes the challenges and recent progress toward the development of III-V MOSFETs and heterostructure TFETs鈥攆rom planar to nanowire devices鈥攊ntegrated on a silicon platform to make these technologies suitable for future CMOS applications.">  <meta property="og:type" content="article"> <meta property="og:title" content="III-V compound semiconductor transistors鈥攆rom planar to nanowire structures"> <meta property="og:site_name" content="ADS"> <meta property="og:description" content="Conventional silicon transistor scaling is fast approaching its limits. An extension of the logic device roadmap to further improve future performance increases of integrated circuits is required to propel the electronics industry. Attention is turning to III-V compound semiconductors that are well positioned to replace silicon as the base material in logic switching devices. Their outstanding electron transport properties and the possibility to tune heterostructures provide tremendous opportunities to engineer novel nanometer-scale logic transistors. The scaling constraints require an evolution from planar III-V metal oxide semiconductor field-effect transistors (MOSFETs) toward transistor channels with a three-dimensional structure, such as nanowire FETs, to achieve future performance needs for complementary metal oxide semiconductor (CMOS) nodes beyond 10 nm. Further device innovations are required to increase energy efficiency. This could be addressed by tunnel FETs (TFETs), which rely on interband tunneling and thus require advanced III-V heterostructures for optimized performance. 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An extension of the logic device roadmap to further improve future performance increases of integrated circuits is required to propel the electronics industry. Attention is turning to III-V compound semiconductors that are well positioned to replace silicon as the base material in logic switching devices. Their outstanding electron transport properties and the possibility to tune heterostructures provide tremendous opportunities to engineer novel nanometer-scale logic transistors. The scaling constraints require an evolution from planar III-V metal oxide semiconductor field-effect transistors (MOSFETs) toward transistor channels with a three-dimensional structure, such as nanowire FETs, to achieve future performance needs for complementary metal oxide semiconductor (CMOS) nodes beyond 10 nm. Further device innovations are required to increase energy efficiency. This could be addressed by tunnel FETs (TFETs), which rely on interband tunneling and thus require advanced III-V heterostructures for optimized performance. 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<li class="author"><a href="/search/?q=author%3A%22Wernersson%2C+Lars-Erik%22">Wernersson, Lars-Erik</a> </li>; <li class="author"><a href="/search/?q=author%3A%22Hong%2C+Minghwei%22">Hong, Minghwei</a> </li>; <li class="author"><a href="/search/?q=author%3A%22del+Alamo%2C+Jes%C3%BAs+A.%22">del Alamo, Jes煤s A.</a> </li> </ul> </div> <div class="s-abstract-text"> <h4 class="sr-only">Abstract</h4> <p> Conventional silicon transistor scaling is fast approaching its limits. An extension of the logic device roadmap to further improve future performance increases of integrated circuits is required to propel the electronics industry. Attention is turning to III-V compound semiconductors that are well positioned to replace silicon as the base material in logic switching devices. Their outstanding electron transport properties and the possibility to tune heterostructures provide tremendous opportunities to engineer novel nanometer-scale logic transistors. The scaling constraints require an evolution from planar III-V metal oxide semiconductor field-effect transistors (MOSFETs) toward transistor channels with a three-dimensional structure, such as nanowire FETs, to achieve future performance needs for complementary metal oxide semiconductor (CMOS) nodes beyond 10 nm. Further device innovations are required to increase energy efficiency. This could be addressed by tunnel FETs (TFETs), which rely on interband tunneling and thus require advanced III-V heterostructures for optimized performance. This article describes the challenges and recent progress toward the development of III-V MOSFETs and heterostructure TFETs鈥攆rom planar to nanowire devices鈥攊ntegrated on a silicon platform to make these technologies suitable for future CMOS applications. </p> </div> <br> <dl class="s-abstract-dl-horizontal"> <dt>Publication:</dt> <dd> <div id="article-publication">MRS Bulletin</div> </dd> <dt>Pub Date:</dt> <dd>August 2014</dd> <dt>DOI:</dt> <dd> <p class="doi-p"> <a href="/link_gateway/2014MRSBu..39..668R/doi:10.1557/mrs.2014.137" target="_blank" rel="noreferrer noopener">10.1557/mrs.2014.137</a> <i class="fa fa-external-link"></i> </p> </dd> <dt>Bibcode:</dt> <dd> <a href="/abs/2014MRSBu..39..668R/abstract"> 2014MRSBu..39..668R </a> <i class="icon-help" title="The bibcode is assigned by the ADS as a unique identifier for the paper."></i> </dd> </dl> </article> </div> <div data-widget="ShowCitations"></div> <div data-widget="ShowReferences"></div> <div data-widget="ShowCoreads"></div> <div data-widget="ShowSimilar"></div> <div data-widget="ShowTableofcontents"></div> <div data-widget="ShowGraphics"></div> <div data-widget="ShowExportcitation" data-origin="abstract"></div> <div data-widget="ShowMetrics" data-allow-redirect="false"></div> <div data-widget="MetaTagsWidget"></div> </div> </div> </div> <div class="s-right-col-container col-xs-12 col-sm-12 col-md-3 col-lg-2 s-right-column" id="right-col-container" > <div data-widget="ShowResources"> <div data-reactroot="" class="s-right-col-widget-container" style="padding: 10px" > <div> <div class="resources__container"> <div class="resources__full__list"> <div class="resources__header__row"> <i class="fa fa-file-text-o" aria-hidden="true"> </i> <div class="resources__header__title">full text sources</div> </div> <div class="resources__content"> <div class="resources__content__title"> Publisher </div> <div class="resources__content__links"> <span> <div class="resources__content__link__separator">|</div> </span> <span> <a href="/link_gateway/2014MRSBu..39..668R/PUB_HTML" rel="noopener" class="resources__content__link " > <i class="fa fa-file-text" aria-hidden="true"> </i> </a> </span> </div> </div> </div> </div> <div data-widget="ShowAssociated"> </div> </div> </div> </div> <div data-widget="ShowGraphicsSidebar"> </div> </div> </div> </div> </div> </div> </div> <div id="footer-container"> <div data-widget="FooterWidget"> <div class="footer s-footer"> <footer> <div class="__footer_wrapper"> <div class="__footer_brand"> 漏 The SAO Astrophysics Data System <div class="__footer_brand_extra"> <p> <i class="fa fa-envelope"></i> adshelp[at]cfa.harvard.edu </p> <p> The ADS is operated by the Smithsonian Astrophysical Observatory under NASA Cooperative Agreement <em>80NSSC21M0056</em> </p> </div> <div class="__footer_brand_logos"> <div class="logo1"> <a href="http://www.si.edu" target="_blank" rel="noreferrer noopener"> <img id="smithsonian-logo" src="/styles/img/smithsonian-logo.svg" alt="Smithsonian logo" /> </a> </div> <div class="logo2"> <a href="https://www.cfa.harvard.edu/" target="_blank" rel="noreferrer noopener"> <img src="/styles/img/cfa.png" alt="Harvard Center for Astrophysics logo" id="cfa-logo" /> </a> </div> <div class="logo3"> <a href="http://www.nasa.gov" target="_blank" rel="noreferrer noopener"> <img src="/styles/img/nasa-partner.svg" alt="NASA logo" id="nasa-logo" /> </a> </div> </div> <div class="__footer_brand_disclaimer"> *The material contained in this document is based upon work supported by a National Aeronautics and Space Administration (NASA) grant or cooperative agreement. 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