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It not only brings great challenges to the industrial product security, but also opens up a new research direction for the academic community. This paper proposes a defense mechanism for SMT processors against launching transient execution attacks using shared cache. The main structure includes two parts, a security shadow label and a transient execution cache. In the face of the side channel attacks widely used by transient execution attack, our defense mechanism adds a security shadow label to the memory request from the thread with high security requirement, so that the shared cache can distinguish the cache requests from different security level threads. At the same time, based on the record of security shadow label, the transient execution cache is used to preserve the historical data, so as to realize the repair of the cache state and prevent the modification of the cache state by misspeculated path from being exploited by attackers. Finally, the cache state is successfully guaranteed to be invisible to any attacker’s cache operations. This design only needs one operation similar to the normal memory access, thus reducing the memory access pressure. Compared with the existing defense schemes, our scheme can effectively prevent Spectre attack, and the overhead of performance is only 3.9%.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_18.20210335/_article">SCPA: A Segemented Carry Prediction Approximate Adder Structure</a></h4><p><span id="skip_info">Hao Liu</span>  <span id="skip_info">Ming-Jiang Wang</span>  <span id="skip_info">Ming Liu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20210335 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_18.20210335" id="hidden1"></ul><div class="summary_txt"> <p>Approximate computing has excellent result in error-tolerant applications sacrificing computational accuracy for better performance in the area, speed, and power consumption. As the most basic operation, addition is used in a large number of applications in various occasions. Therefore it is of great importance to optimize the performance of addition computation. In this paper, a segemented carry prediction adder (SCPA) structure is proposed, which splits the long carry chain into several short chains for parallel computation. The design parameters are diversified by adjusting the size of the blocks and the prediction depth of each subadditive to achieve different levels of performance. Flexible parameter tuning allows different design goals to be achieved based on specific performance requirements, which makes SCPA a useful design guideline for approximate adders. The error performance of SCPA is mesured by MRED, NMRED, ER, and other indicators and significantly has the best statiscal performace compared to similar designs. The proposed design is synthesized under TSMC 65nm process, and the result shows that the SCPA has a very nice accuracy-power tradeoff under 8-bit and 16-bit condition.</p> </div></div></li><li><h4><DIV class="category00">Devices, circuits and hardware for IoT and biomedical applications</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_19.20220431/_article">A non-battery pressure detection and communication system for basketball game referee based on piezoelectric devices</a></h4><p><span id="skip_info">Yingxiang Gong</span>  <span id="skip_info">Zile Fan</span>  <br> <div class="data"> <dl><dt> </dt><dd>20220431 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_19.20220431" id="hidden2"></ul><div class="summary_txt"> <p>How to replace the referee in sports with artificial intelligence has attacked a huge amount of attention recently. In this paper, non-battery pressure detection and communication system are designed and fabricated aiming to help the referee in the basketball games. To get the information from player and ball at the same time, the designed system is consisted of three parts, including the basketball monitoring system, the shoes monitoring system, and the laptop to collect and process the data. For the basketball monitoring system, eight piezoelectric polyvinylidene fluoride (PVDF) flexible thin films are used as the sensor on the surface of the basketball with the sensitivity of 0.065 V/N and four hard piezoelectric Lead Zirconium titanite (PZT) patches are set inside the ball as the power source. As for the shoes monitoring system, four PZT patches work as both power source and pressure sensor with a sensitivity of 0.025 V/N. To solve the referee problem in basketball game, time delay of different systems is first measured. The different systems have similar time delay of about 3s, which will help to make sure whether the players break the rules. In this paper, whether the player has a traveling violation in a game can be refereed by the collected data, which has more than 97% accuracy. This work shows an innovative progress in automatic referees in games and the Internet of Things (IoT) in the human health monitoring.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_19.20220488/_article">An Improved Buck-boost Power Converter for Switched Reluctance Generator Drive</a></h4><p><span id="skip_info">Yinyi Zhu</span>  <span id="skip_info">Haitao Sun</span>  <span id="skip_info">Mingzhi Shao</span>  <span id="skip_info">Ruihao Wang</span>  <span id="skip_info">Zhenyu Zhao</span>  <span id="skip_info">Yan Chen</span>  <br> <div class="data"> <dl><dt> </dt><dd>20220488 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_19.20220488" id="hidden3"></ul><div class="summary_txt"> <p>A novel buck-boost power converter is proposed to improve the performance of switched reluctance generator (SRG) system in an electric vehicle. In the proposed topology, the energy conversion part is formed by a buck-boost circuit and additional switches, with which, it is flexible to significantly boost the magnetization voltage and demagnetization voltage, thereby the output power range is improved and the power losses are reduced. The basic structure of the proposed converter is presented first and the attached operating modes are analyzed. The control strategy of the SRG system is then made to control the output voltage and the boost capacitor voltage. The simulation results show that compared to the conventional buck-boost converter, the proposed converter enhances the efficiency and reduces the power losses.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_20.20230009/_article">Adaptive PID controller of permanent magnet linear synchronous motor based on particle swarm neural network</a></h4><p><span id="skip_info">Jie Yang</span>  <span id="skip_info">Hong Fan</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230009 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_20.20230009" id="hidden4"></ul><div class="summary_txt"> <p>To improve the dynamic response performance and robustness of a permanent magnet linear synchronous motor (PMLSM)-based servo system, an adaptive proportional-integral-derivative (PID) controller based on a particle swarm optimization neural network is proposed. First, according to the mechanical dynamics equation of the PMLSM, a mathematical model of the PMLSM was established. Second, an adaptive PID speed controller is designed to realize real-time control of the PMLSM. To improve the dynamic performance and stability of the controller, a particle swarm optimization neural network is used to dynamically tune the parameters. Finally, the effectiveness of the proposed controller was verified on the MATLAB/Simulink simulation platform. Compared to the traditional PID controller, the adaptive PID controller can improve the dynamic performance of the system more effectively.</p> </div></div></li><li><h4><DIV class="category00">Microwave and millimeter wave devices, circuits, and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_20.20230094/_article">Effects of underfill on wideband flip-chip packaging for 5G millimeter-wave applications</a></h4><p><span id="skip_info">Haiyang Xia</span>  <span id="skip_info">Tao Zhang</span>  <span id="skip_info">Zhiqiang Liu</span>  <span id="skip_info">Huan Liu</span>  <span id="skip_info">Xu Wu</span>  <span id="skip_info">Lianming Li</span>  <span id="skip_info">Zhigong Wang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230094 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_20.20230094" id="hidden5"></ul><div class="summary_txt"> <p>This letter investigates the effects of the underfill on the wideband flip-chip packaging for 5G millimeter-wave (mm-Wave) applications. For accurate interconnect design, a new hybrid equivalent circuit model is proposed. Targeting at the phased array systems with high density I/Os, a compact anti-pad structure is implemented and co-designed with the high impedance transmission line and the low-cost 90 μm solder balls, compensating the ﬂip-chip capacitive parasitics and realizing the compact low-loss interconnect. To evaluate the underfill effect on the interconnect parasitics, both theoretical analyses and simulations are undertaken. For demonstration, by using a glass substrate with the fan-out process, back-to-back flip-chip packaging structures are designed, fabricated, and measured. Measured results demonstrate that with and without underfill U8410-99 the interconnect return loss is better than 20 and 10 dB from DC to 90 GHz, with an insertion loss of 0.2 and 0.45dB at 60GHz, respectively.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_20.20230181/_article">Level-increased Model Predictive Control Method with Sub-module Circulating Current Suppression of Modular Multilevel Converter</a></h4><p><span id="skip_info">Changtian Xu</span>  <span id="skip_info">Yanan Zhang</span>  <span id="skip_info">Xingwu Yang</span>  <span id="skip_info">Zhicheng Meng</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230181 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_20.20230181" id="hidden6"></ul><div class="summary_txt"> <p>Level-increased nearest level modulation (NLM) has been widely used in the modular multilevel converter (MMC) due to its simple implementation and low switching frequency in recent years. However, there are some disadvantages such as the poor performance of output voltage distortion and harmonic circulating current. A harmonic circulating current (CC) suppression method based on level-increased NLM is proposed in this paper. The impact of level-increased NLM on the CC is firstly analyzed. Then, a 5-voltage-level compensation method for harmonic CC suppression is proposed. Simulation and experiment verify the effectiveness of the proposed method.</p> </div></div></li><li><h4><DIV class="category00">Microwave and millimeter wave devices, circuits, and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_20.20230191/_article">Enhanced Darlington <I>f<sub>T</sub></I>-doubler Structure in a 25 GS/s Track-and-Hold Amplifier for Bandwidth Improvement</a></h4><p><span id="skip_info">Luning Xiao</span>  <span id="skip_info">Wenxiang Zhen</span>  <span id="skip_info">Yongbo Su</span>  <span id="skip_info">Zhi Jin</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230191 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_20.20230191" id="hidden7"></ul><div class="summary_txt"> <p>A wideband track-and-hold amplifier (THA) for high-speed sampling in analog front-end (AFE) is designed and fabricated in a 0.8-μm indium phosphide (InP) process with 165 GHz cut-off frequency ( <I>f<sub>T</sub></I>). Broadband operation is achieved using an enhanced degenerated Darlington <I>f<sub>T</sub></I>-doubler buffer, which is first used in the switched-emitter follower (SEF) sampling architecture. Compared with the traditional <I>f<sub>T</sub></I>-doubler structures, the enhanced cascode Darlington <I>f<sub>T</sub></I>-doubler structure reduces the “<I>V<sub>CE</sub></I> mismatch” between the amplifying transistors. Moreover, it can also achieve higher gain more easily, and provide higher <I>V<sub>CE</sub></I> for amplifying transistors, which represents higher <I>f<sub>T</sub></I>,<I><sub>peak</sub></I> performance. Benefiting from the proposed Darlington <I>f<sub>T</sub></I>-doubler buffer, the driving capacity of the input stage is also improved. Besides, capacitive/resistive degeneration is introduced to provide higher bandwidth, which generates a zero to cancel the dominant pole of the THA. Moreover, transmission lines (TLs) at the emitter of cascode stages are adopted to reduce the loss of the sampled signals and the drop in the circuit bandwidth. By these methods, the bandwidth is significantly enhanced. The measurement results show that the THA achieves a bandwidth from DC to 29.8 GHz, exhibiting a 0.181- <I>f<sub>T</sub></I> bandwidth utilization. At 25-GSa/s sampling rate, a total harmonic distortion (THD) of less than -35 dBc and the maximum spurious-free dynamic range (SFDR) of 52.3 dB are tested. The power consumption of the THA is only 672 mW, exhibiting a competitive performance compared with other advanced THAs.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_20.20230528/_article">A double half-bridge series-matrix converter with symmetric modulation for single-stage wireless power transmission without polarity detection</a></h4><p><span id="skip_info">Ziheng Zhang</span>  <span id="skip_info">Jianfeng Hong</span>  <span id="skip_info">Jin Jiang</span>  <span id="skip_info">Ding Chen</span>  <span id="skip_info">Liyan Qin</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230528 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_20.20230528" id="hidden8"></ul><div class="summary_txt"> <p>Wireless power transfer requires multilevel energy conversion for energy transfer, resulting in a bulky system. This paper proposes a direct AC-AC converter topology denoted as double half-bridge series-matrix converter and introduces a symmetric modulation method that eliminates the need for input voltage polarity detection. The converter circumvents DC conversion and operates at a unit power factor without the assistance of power factor correction. A 1kw prototype was constructed and the same control strategy was adopted, without considering the polarity or magnitude of the input voltage, verifying the accuracy and reliability of the proposed topology. The transmission efficiency was achieved at 91.43%.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20230495/_article">Application dependent FPGA interconnect test method with small test configuration number using SMT net-grouping constraints</a></h4><p><span id="skip_info">Xinyu He</span>  <span id="skip_info">Jinmei Lai</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230495 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20230495" id="hidden9"></ul><div class="summary_txt"> <p>An application dependent FPGA interconnect testing scheme is presented. The goal is to reduce the number of test configurations while keeping high fault coverage. Reduction is done by using SMT constraints that allow multiple nets as a group to use one input vector, so that the number of test configurations is reduced. Based on the complete fault model, a novel approach to generate SAT formulas, most notably dominant bridging faults, are explained to retain coverage. Experiments on FPGAs shown that this method yield on average 44% fewer configurations on circuits with 1000&sim;100000 LUTs comparing with existing methods, with full fault coverage.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20230570/_article">An improved coverage optimization method for video sensor networks based on whale optimization algorithm</a></h4><p><span id="skip_info">Haiyan Chen</span>  <span id="skip_info">Lei Lu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230570 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20230570" id="hidden10"></ul><div class="summary_txt"> <p>In this paper, an improved coverage optimization method for video sensor networks(VSNs) based on Whale optimization algorithm (SGWOA) is proposed to solve the problem of uneven distribution of nodes in random deployment of video sensor networks, which will cause coverage holes or coverage redundancy in the coverage area of VSNs. Firstly, Sobol sequence is used to initialize the population, which improves the diversity of the population and makes the distribution of network nodes more uniform when randomly deployed. Secondly, the nonlinear convergence factor and adaptive inertia weight are introduced to prevent the algorithm from falling into local optimal prematurely. Finally, Levi's flight strategy is added to disturb the position update during whale optimization, which speeds up the convergence of the algorithm and avoids premature convergence.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20230598/_article">A 0.84-μA bandgap for high step-down DC-DC convertors with thermal compensation and protection</a></h4><p><span id="skip_info">Jiarui Ren</span>  <span id="skip_info">Yue Zhao</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230598 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20230598" id="hidden11"></ul><div class="summary_txt"> <p>This paper presents a bandgap reference (BGR) circuit with high precision and low power, which is suitable for wide supply and temperature range DC-DC converters. A thermal compensation method is designed to improve output accuracy. A thermal shutdown detection (TSD) circuit is proposed to prevent overheating. It also adopts a two-channel pre-regulator, which reduces the current consumption and area while enhancing PSRR. The measured results show the temperature coefficient (TC) stands at 5.69 ppm/°C in the range of -40°C to 155°C. The typical current consumption is 0.84μA in the supply range from 3.5 to 40 V. The PSRR is -86dB at 1kHz.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20230634/_article">Modeling and Direct Extraction of Parameters for GaAs HBT Small- Signal Equivalent Circuit</a></h4><p><span id="skip_info">Wu Jianyu</span>  <span id="skip_info">Xu Mengdi</span>  <span id="skip_info">Zheng Yifei</span>  <span id="skip_info">Zhang Hongli</span>  <span id="skip_info">Xu Hao</span>  <br> <div class="data"> <dl><dt> </dt><dd>20230634 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20230634" id="hidden12"></ul><div class="summary_txt"> <p>Due to the low noise and high linearity characteristics of GaAs Hetero-junction Bipolar Transistors (HBTs), Low Noise Amplifiers (LNAs) are widely used in aerospace, communication, computer, and other fields. Extracting device model parameters is of great significance for subsequent research on the electromagnetic compatibility characteristics of such devices. In this paper, based on the small signal model, the model parameters of the amplifier are extracted by combining the I-V characteristics of the amplifier under different external voltage conditions. The linear model parameters are extracted using a fitting analysis method to obtain the Pspice circuit model of the GaAs amplifier under normal operating conditions. The simulation results align closely with the measured results. Compared with traditional modeling methods, this approach effectively resolves the issue of being unable to measure parameters due to chip packaging. This method holds substantial significance in extracting circuit model parameters and conducting in-depth research on circuit electromagnetic compatibility characteristics of this device.</p> </div></div></li><li><h4><DIV class="category01">Integrated optoelectronics</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240249/_article">A Decoupled Power and Data Simultaneous Transmission Method in Laser Wireless Power Transfer System</a></h4><p><span id="skip_info">Bodi Liu</span>  <span id="skip_info">Ermei Yan</span>  <span id="skip_info">Zongyu Zhang</span>  <span id="skip_info">Chengyan He</span>  <span id="skip_info">Puting Shen</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240249 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240249" id="hidden13"></ul><div class="summary_txt"> <p>The laser power transfer (LPT) system is one of the most promising systems in the long-rang wireless power transfer field. An interesting extension of LPT technology is the combination with optical communication. However, traditional optical communication technology for LPT system suffers from crosstalk issue, which leads to instability of power transmission and inaccuracy of data decoding in practical application. In this paper, a data modulation method is proposed to guide the modulation process of laser input current. Thus, the data can be directly incorporated into the optical power delivery path without inducing power fluctuation at receiver. Furthermore, based on the proposed data modulation method, a laser power supply consisting of a constant-current converter and a bidirectional converter is employed. It is possible that the desired modulated laser input current may be affected by the laser input voltage due to the bandwidth limitation of the laser power supply. Thus, a feed-forward scheme is also introduced to ensure the laser power supply can output desired modulated current. Finally, the experimental results are shown to validate the theoretical analysis.</p> </div></div></li><li><h4><DIV class="category00">Microwave and millimeter wave devices, circuits, and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240268/_article">Near end and Far end Crosstalk reduction in High-Speed Signaling Channel with Periodical Spiral Resonator Defected Microstriplines in a High Performance Printed Circuit Board</a></h4><p><span id="skip_info">Gobinath Arumugam</span>  <span id="skip_info">Suresh-Kumar Natarajan</span>  <span id="skip_info">Rajeswari Packianathan</span>  <span id="skip_info">Mohamed-Salah Karoui</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240268 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240268" id="hidden14"></ul><div class="summary_txt"> <p>High-density interconnects in modern PCBs, especially in DDR5 technology, have exacerbated near-end crosstalk (NEXT) and far-end crosstalk (FEXT), degrading signal quality. In this research, proposed Periodical Spiral Resonators (PSRs) within signal lines to mitigate these issues. The spiral structure extends and twists signal paths, increasing electrical length and altering the electric field distribution, reducing mutual coupling between traces. Experimental validation shows significant signal quality improvement up to 10GHz, with a 22.35 dB reduction in NEXT and 30.16 dB reduction in FEXT. Simulations reveal a 50.47% reduction in near-end crosstalk and an 87.72% reduction in far-end crosstalk when compared to existing techniques. Our approach holds immense potential for DDR5 memory modules, promising minimal NEXT and FEXT, and ensuring superior performance and reliability.</p> </div></div></li><li><h4><DIV class="category00">Devices, circuits and hardware for IoT and biomedical applications</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240287/_article">Wearable piezoelectrical muscle monitoring system for swimming analysis neural network</a></h4><p><span id="skip_info">Zhiqiang Wang</span>  <span id="skip_info">Xujie Hu</span>  <span id="skip_info">Zile Fan</span>  <span id="skip_info">Weining Fei</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240287 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240287" id="hidden15"></ul><div class="summary_txt"> <p>Swimming is one of the most popular worldwide sports, which offers the players healthy body, improved fitness, and endless enjoyment due to its easy accessibility and year-round availability. Monitoring swimmers can aid in the development and participation of swimming sport. However, due to the difficulty of in-water monitoring, the existing methods in tool box are still limited. In this paper, a more accessible wearable monitoring system based on a flexible piezoelectric device is developed. This system collects muscle contracting and relaxing information by measuring its generated force on a Polyvinylidene fluoride (PVDF) sensor. Then the information is transmitted via a low-frequency radio frequency (RF) signal to the receiver on land. This information is analyzed using a convolutional neural network and the classification of different strokes is realized. The system also supports monitoring at two positions by wearing multiple devices on the body. By integrating data from multiple positions, the analysis algorithm achieves a higher prediction accuracy of over 95%. This work demonstrates that the combination of wearable monitoring devices, the Internet of Things, and Artificial Intelligence, which holds significant promise for sports education, research, promotion, and development.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240333/_article">Novel Sensorless Metal Foreign Object Detection Technique for Wireless Power Transfer Systems Based on Efficiency Analysis</a></h4><p><span id="skip_info">Kun-Che Ho</span>  <span id="skip_info">Chih-Han Ho</span>  <span id="skip_info">Yu-Shan Cheng</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240333 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240333" id="hidden16"></ul><div class="summary_txt"> <p>This study develops new technology for detecting metal foreign objects to enhance the safety of wireless charging systems. The intrusion of metal objects during charging may result in reduced performance, increased energy consumption, and excessive heat generation, which may potentially damage the charging system. In this paper, we develop an innovative sensorless method of detecting foreign objects. We build an efficiency model by conducting experiments with metal objects of various sizes placed between charging coils. This approach identifies metal objects on the basis of efficiency changes, eliminating the need for sensors, thus effectively reducing costs. Finally, the effectiveness and reliability of this model are validated using the experimental platform.</p> </div></div></li><li><h4><DIV class="category00">Microwave and millimeter wave devices, circuits, and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240339/_article">A Transparent MIMO Antenna Employing Metal Mesh structure for SWB</a></h4><p><span id="skip_info">Zewei Yang</span>  <span id="skip_info">Jingchang Nan</span>  <span id="skip_info">Jing Liu</span>  <span id="skip_info">Yifei Wang</span>  <span id="skip_info">Xun Zhao</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240339 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240339" id="hidden17"></ul><div class="summary_txt"> <p>This paper presents a transparent super-wideband (SWB) MIMO antenna based on a metal mesh structure. The metal patch and substrate of the antenna are hollowed out, resulting in a transparency of up to 77% and a radiation efficiency exceeding 82%. The bandwidth of this MIMO antenna ranges from 1.6 to 19.2 GHz, achieving a bandwidth ratio of 12: 1. An engineered parasitic decoupling structure ensures that the isolation between antenna elements is greater than 25 dB, and the envelope correlation coefficient (ECC), diversity gain (DG), channel capacity loss (CCL), and total active reflection coefficient (TARC) all reach good values.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240394/_article">Illusion cloaks for complex shaped targets combining characteristic mode with transformation optics</a></h4><p><span id="skip_info">Lin Zhang</span>  <span id="skip_info">Xinxin Liu</span>  <span id="skip_info">Hongqian Zhu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240394 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240394" id="hidden18"></ul><div class="summary_txt"> <p>Based on scattering cancellation cloaking technology, we developed an illusion cloaking design mechanism for complex-shaped targets of electrically moderate or large sizes, which was achieved by combining transformation optics with the characteristic mode method. Using the transformation optics theory, the electrical size of an object can be reduced under the premise of an identical electromagnetic scattering pattern. Subsequently, a scattering-regulated shroud for the equivalent electrically small object with the same complex shape is designed using the characteristic mode and discrete dipole approximation methods. Finally, the scattering manipulation layer was transformed into the original target. We also derived a theoretical formula for functional coatings that can be used to produce illusion performances for moderate or large complex-shaped targets. The feasibility and efficiency have been demonstrated by numerical simulations.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240438/_article">PDN analysis of 3D chiplet integration with a DC-DC converter on active interposer</a></h4><p><span id="skip_info">Chengyi Liao</span>  <span id="skip_info">Huimin He</span>  <span id="skip_info">Fengze Hou</span>  <span id="skip_info">Cheng Peng</span>  <span id="skip_info">Fengman Liu</span>  <span id="skip_info">Liqiang Cao</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240438 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240438" id="hidden19"></ul><div class="summary_txt"> <p>The rapid evolution of data-intensive applications has increased the demand for multiple power levels and higher current in electronic systems, challenging the efficiency and stability of power supplies. This paper addresses these challenges by investigating the performance of power distribution networks (PDN) in 3D chiplet architectures. We established and validated an RLCG model for the active interposer interconnection path. Utilizing this model, we analyzed the PDN performance for both on-board voltage regulator modules (VRM) and on-interposer direct current to direct current (DC-DC) scheme. Comparative analysis reveals that the on-interposer DC-DC scheme PDN significantly reduces overall impedance and lowers IR-drop. The study also explores the effects of design elements like bump quantities and decoupling capacitors (de-caps) on PDN efficiency. Further, the practical application based on our findings is demonstrated through the successful implementation of a forwarding chip with on-interposer DC-DC converters.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240468/_article">Weld Seam Defect Detection Based on Deformable Convolutional Neural Networks</a></h4><p><span id="skip_info">CHEN Yan</span>  <span id="skip_info">TANG Hongyan</span>  <span id="skip_info">ZHOU Chaoyang</span>  <span id="skip_info">XIONG Gang</span>  <span id="skip_info">TANG Honglin</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240468 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240468" id="hidden20"></ul><div class="summary_txt"> <p>With the rapid advancement of smart manufacturing, automated detection of welding defects plays a crucial role in ensuring product quality and enhancing the efficiency and stability of production processes. Traditional manual detection methods struggle to meet modern production needs due to low accuracy, poor efficiency, and subjectivity.This paper utilizes a deformable convolutional neural network based on YOLOv5m to improve the accuracy of weld seam defect detection in X-ray images. It introduces deformable convolution kernels to identify irregular welding defects and employs decision and memory modules, proposing a feature repetition unit structure to optimize the network by reducing parameters and enhancing learning for small samples. Through comparative analysis with the original network, the improved deformable convolutional neural network shows significant improvements in loss, precision, and mAP metrics on small samples.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240499/_article">Power generation device based on spring oscillator system</a></h4><p><span id="skip_info">Wenchao Xue</span>  <span id="skip_info">Zhiming Liu</span>  <span id="skip_info">Xinyu Mu</span>  <span id="skip_info">Tao Zhang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240499 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240499" id="hidden21"></ul><div class="summary_txt"> <p>The application of magnetorheological equipment and its sensors in high-speed trains is restricted to a certain extent due to the demand for external power supply. Usually, there are different degrees of vibration in the operation of high-speed trains. If the vibration energy is converted into electric energy, it will be beneficial to the wide application of magnetorheological equipment in high-speed trains. In this paper, based on the load characteristics of the anti-yaw damper in high-speed trains, a ring-iron resonant power generation device based on the spring oscillator system is designed by using the amplification effect of the spring oscillator system on the amplitude. In this paper, a vibration test was carried out by an experimental prototype and two control prototypes, and the power generation capacity of the device was verified. The test results show that the maximum power generation of the device designed in this paper is 20.18 watts, which is 98 % higher than that of the control group. The average power generation in random vibration is 6 watts, which can meet the power supply demand of magnetorheological damping equipment in high-speed trains.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240520/_article">A low loss 87-97-GHz bandpass filter with ARCL-to-SCL GSG transition using 3D-micromachined air core recta-coax line</a></h4><p><span id="skip_info">Yan Ding</span>  <span id="skip_info">Xing Fan</span>  <span id="skip_info">Jianghua Wang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240520 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240520" id="hidden22"></ul><div class="summary_txt"> <p>This letter presents a millimeter-wave bandpass filter using 3D-micromachined air core recta-coax line (ARCL). The ARCL structure was fabricated through a high-precision micromachining technique which has advantages of low dielectric and radiation loss, high power capacity, and easy integration. The grounded and open stub lines, as well as impedance transformation lines contribute to the controllable transmission poles (TPs) and transmission zeros (TZs), is finally proposed to realize 87-97-GHz bandpass characteristics. Excellent in-band performance and out-of-band rejection can be obtained by control six TPs and two TZs. Detailed design method is given to guide the ARCL-based filter design. The 87-97-GHz passband filter with ARCL-to-semi-rectangular coaxial transmission line (SCL) ground-signal-ground (GSG) transition is fabricated and measured, which has a low insertion loss (IL) of 1dB, and return loss (RL) is better than -20dB in the passband.</p> </div></div></li><li><h4><DIV class="category04">Electron devices, circuits and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240525/_article">Research on damage effects of pHEMT low noise amplifiers under HPM injection</a></h4><p><span id="skip_info">Ruxin Zheng</span>  <span id="skip_info">Zhicheng Xue</span>  <span id="skip_info">Chengjie Li</span>  <span id="skip_info">Shiping Tang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240525 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240525" id="hidden23"></ul><div class="summary_txt"> <p>This work investigates the damage patterns of AlGaAs/GaAs pHEMT transistors under the injection of High-Power Microwave (HPM). Firstly, an HPM injection platform was established to implement a real-time monitoring method for the gain changes of AlGaAs/GaAs pHEMT chips under different injection powers. This method can accurately determine at what power the chip will be damaged. Then, the input-output relationship of the chip was studied, and the changes in S-parameters before and after HPM injection were tested. Subsequently, the relationship between the damage threshold of AlGaAs/GaAs pHEMT chips and the changes in pulse width and frequency was explored through experiments. By fitting the damage thresholds at different frequencies, it was found that in the highfrequency stage, the damage threshold of the device showed almost linear changes. Finally, a simulation model of the damage mechanism of AlGaAs/GaAs pHEMT was constructed, and the internal field, current density, and temperature distribution of pHEMT were analyzed through simulation.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240528/_article">A 2.8 fJ/conversion-step 10-bit 500 kS/s SAR ADC with low-power switching scheme and dynamic comparator</a></h4><p><span id="skip_info">Linlin Huang</span>  <span id="skip_info">Jianhui Wu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240528 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240528" id="hidden24"></ul><div class="summary_txt"> <p>A 10-bit 500 kS/s successive approximation register (SAR) analog-to-digital converters (ADCs) in 40-nm CMOS technology is presented in this paper. To reduce the power consumption of capacitive digital-to-analog converter (CDAC), a novel energy-efficient switching scheme is proposed without capacitor-splitting structure and additional reference. Considering the reset energy of 0.249 <i>CV</i><sup>2</sup><sub>ref</sub>, 94.93% switching energy saving and 75% total capacitor number reduction are achieved over the conventional switching technique. And the common mode voltage converges back to around <i>V</i><sub>cm</sub> by single-side switching up and then down. Furthermore, a low-power comparator is proposed based on the conventional double-tail architecture. The addition of the cross-coupled transistors avoids the unnecessary discharging of the pre-amplifier stage, decreasing 16.3% power consumption over the conventional architecture. Post-simulation results show the peak DNL/INL are +0.79/-0.28 LSB and +0.61/-0.57 LSB respectively. At 0.7 V supply, the proposed SAR ADC achieves an SNDR of 57.9 dB and an SFDR of 75.4 dB with Nyquist frequency. And the overall power consumption is 0.9047 µW, leading to a Walden’s figure of merit (<i>FOM<sub>w</sub></i>) of 2.8 fJ/conversion-step.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240538/_article">A Voltage-controllable Switched Reluctance Generator System with a ring winding structure</a></h4><p><span id="skip_info">Dayu Wang</span>  <span id="skip_info">Chunyan Ma</span>  <span id="skip_info">Yan Chen</span>  <span id="skip_info">Haitao Sun</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240538 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240538" id="hidden25"></ul><div class="summary_txt"> <p>This paper proposes a voltage-controllable switched reluctance generator (SRG) system with a ring winding structure driven by a full-bridge power converter, which is the first application of a full-bridge power converter to drive the SRG. The proposed topology inherits the advantage of low copper loss of the ring winding that combines AC and DC currents together. It connects the equivalent DC power provided by a DC-DC half-bridge circuit to the ring winding to provide circulating DC and partial excitation energy. This paper provides a detailed description of the proposed system's feedback loops and operating principle. The proposed topology is compared with the uncontrollable Circulating-Current-Excited Switched Reluctance Generator (CCEG). The comparative study is validated through simulation and experimental platform, and the results highlight the output voltage performance of the proposed topology and control method.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240542/_article">A Constant Current Regulation for Primary-side Controlled Flyback Converter</a></h4><p><span id="skip_info">Haizhou Chen</span>  <span id="skip_info">Yucheng Yao</span>  <span id="skip_info">Jingyun Yao</span>  <span id="skip_info">Wei Zou</span>  <span id="skip_info">Jun He</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240542 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240542" id="hidden26"></ul><div class="summary_txt"> <p>This article proposes a constant current regulation design for primary-side controlled flyback converter. The regulation circuit consists of two parts: an OSC circuit and an adaptive primary side peak current threshold compensation circuit. The OSC circuit generates a switching cycle signal with a fixed ratio to the demagnetization time, and the adaptive primary side peak current threshold compensation circuit. To verify the feasibility and accuracy of the proposed constant current regulation design, the designed chip was fabricated and tested. Under 12V/1.9A configuration, the test results showed that the line regulation and load regulation of the output current can achieve within ±1.7% and ±0.15%, respectively.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240544/_article">Enhanced Dual- and Triple-band Bandpass Filters Using Slot-Line Perturbed HMSIW Resonators</a></h4><p><span id="skip_info">Zhiyuan Zhao</span>  <span id="skip_info">Cheng Peng</span>  <span id="skip_info">Shuxing Wang</span>  <span id="skip_info">Li Zhang</span>  <span id="skip_info">Kai Li</span>  <span id="skip_info">Yiyong Zhu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240544 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240544" id="hidden27"></ul><div class="summary_txt"> <p>This paper designs dual- and triple-band bandpass filters (BPFs) using half-mode substrate-integrated waveguide (HMSIW) resonators with slot-line perturbations. Subsequently, the resonance and coupling characteristics of the perturbed HMSIW resonators are analyzed. A dual-band BPF featuring the TE<sub>100</sub> and TE<sub>102</sub> modes, with independently tuned passbands, is realized through the incorporation of inner coupling slot lines and metal-hole rows to compensate for external coupling effects. Furthermore, input/output matching is achieved through the inset feedings of a quasi-coplanar waveguide, simultaneously exciting the desired modes. The total layout features a size of 0.725λg × 0.44λg. Building upon this dual-band BPF design, a novel triple-band BPF is realized by incorporating three additional slot lines to excite the higher mode (TE<sub>103</sub>) for the third passband and control the second passband. Both BPFs are simulated, fabricated, and examined. Results reveal that the designed BPFs exhibit low insertion losses (<1.8 dB), along with return losses better than 14 dB. The adjacent passband isolation of both filters exceeds 20 dB, and stopband high rejection is achieved by introducing more than three transmission zeros. Overall, the experimentally measured results demonstrate good agreement with the simulated ones.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240549/_article">A Novel Multi-Resonant Isolated Three-port Converter Capable of Achieving Power Decoupling</a></h4><p><span id="skip_info">Xinsheng Zhang</span>  <span id="skip_info">Hongchen Liu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240549 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240549" id="hidden28"></ul><div class="summary_txt"> <p>A novel multi-resonant isolated three-port converter (NMI-TPC) for power decoupling. The NMI-TPC adopts a dual LC resonant structure (DLCRS) based on the three-active-bridge converter. By using the DLCRS, power decoupling between ports is achieved. The working principle of NMI-TPC is given. In order to improve the performance of the NMI-TPC, the effective value of the current (EVC) is optimized. By constructing the Lagrangian function, the problem of minimizing the EVC is solved. A prototype, operating at a power level of 1kW, has been developed to validate the theoretical framework.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240552/_article">Photovoltaic Phase-Change Conversion System with Adaptive Thermoelectric Switching Mechanism</a></h4><p><span id="skip_info">Qi Hu</span>  <span id="skip_info">Xueqing Tian</span>  <span id="skip_info">Zhangmiaoge Liu</span>  <span id="skip_info">Jian Tang</span>  <span id="skip_info">Hongzhi Jia</span>  <span id="skip_info">Yuannian Li</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240552 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240552" id="hidden29"></ul><div class="summary_txt"> <p>The performance of photovoltaic cells is critically influenced by temperature conditions. This study introduces a novel energy conversion system integrating Photovoltaic, Phase Change Material, and Thermoelectric modules (PV-PCM-TE), designed to leverage phase change thermal storage capabilities. The system dynamically monitors the PCM temperature and adaptively switches the thermoelectric module's operational state to mitigate the photovoltaic cell temperature increase, thereby enhancing the overall energy conversion efficiency. Experimental validation of the proposed system has yielded a peak energy conversion efficiency of 33.56%, presenting an innovative approach for the development of smart, energy-efficient power systems.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240556/_article">Environment analysis of high-altitude electromagnetic pulse coupling field in cavity with aperture shielding</a></h4><p><span id="skip_info">Haizhe Zhong</span>  <span id="skip_info">Jiantao Liang</span>  <span id="skip_info">Hanlin Li</span>  <span id="skip_info">Xuejian Li</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240556 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240556" id="hidden30"></ul><div class="summary_txt"> <p>The electronic system is located in the shielded chamber, but the pulse field environment in the chamber is complicated, and the test environment is difficult to simulate accurately. Therefore, in order to study the high-altitude electromagnetic pulse coupling field environment inside the screened cavity with holes, the pulse field inside the screened cavity with holes is calculated based on the CST electromagnetic simulation software, and the waveforms in the time domain and frequency domain of the internal monitoring points are analyzed. The results show that there is a main pulse in the pulse field near the hole, and the high frequency component of the high-altitude electromagnetic pulse can basically be coupled into the cavity, and the pulse field environment of the coupled cavity is affected by the aperture size, the incidence Angle and the number of holes, etc. The pulse field environment of the coupled into the shielded cavity is different under different backgrounds.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240564/_article">Analysis of vibration characteristics of amorphous alloy permanent magnet synchronous motor considering magnetostriction effect</a></h4><p><span id="skip_info">Xiaohua Li</span>  <span id="skip_info">Xu Han</span>  <span id="skip_info">Zhongchuan Han</span>  <span id="skip_info">Meiying Xue</span>  <span id="skip_info">Ruilin Pei</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240564 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240564" id="hidden31"></ul><div class="summary_txt"> <p>In comparison to silicon steel sheet motors, utilizing amorphous alloys for the motor core can enhance motor efficiency; however, their significant magnetostriction must be taken into account. Given the high magnetostriction of core materials, it is crucial to consider the impact of magnetostriction on motor vibrations. This paper initially derives the equivalent magnetostriction force and electromagnetic force based on an analytical model. By analyzing the magnetization curve and hysteresis strain curve, the radial magnetostriction force and electromagnetic force at the stator teeth of the amorphous alloy motor are examined using Ansys software. Subsequently, a broadband "electromagnetic-force-structure" multiphysics model of the amorphous alloy prototype is established to obtain the vibration characteristics of the prototype, and the spectral characteristics of magnetostrictive and electromagnetic force vibrations in the amorphous alloy motor are analyzed. Finally, the vibration characteristics of an 18-slot 4-pole amorphous alloy experimental prototype are experimentally measured and numerically analyzed. The study reveals that the magnetostriction effect exacerbates motor vibrations, although the primary source of vibration remains the electromagnetic force.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240565/_article">Investigation of the Partially Recoverable Gate Leakage On Normally-OFF Schottky-type p-GaN gate AlGaN/GaN HEMTs</a></h4><p><span id="skip_info">Xiaomin Chen</span>  <span id="skip_info">Yimin Shen</span>  <span id="skip_info">Feilong Qin</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240565 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240565" id="hidden32"></ul><div class="summary_txt"> <p>In this work, gate leakage behavior on Schottky-type p-GaN gate AlGaN/GaN HEMT is investigated, especially when the Schottky junction is damaged. A controllable degradation of the Schottky junction is achieved, then the previous semi-floated p-GaN is electrically connected to the gate electrode. Therefore, the pre-stressed GaN device exhibits an improved gate stability, as well as a normal gate control and large gate swing. Furthermore, the associated trap level is extracted by Arrhenius plot based on the exponential relationship between the recovery speed versus temperature.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240568/_article">A Self-calibrating on-chip temperature sensor for supply error based on PAFM technology</a></h4><p><span id="skip_info">GU Shuo</span>  <span id="skip_info">JIANG Qian</span>  <span id="skip_info">CAO Kang</span>  <span id="skip_info">Li Chunyan</span>  <span id="skip_info">Xiong Botao</span>  <span id="skip_info">CHANG Yuchun</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240568 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240568" id="hidden33"></ul><div class="summary_txt"> <p>This paper focuses on an on-chip integrated frequency-domain temperature sensor using a 0.18μm CMOS process. Programmable load delay units and power feedback pulse width modulation technology are employed to reduce errors caused by process variations and power supply non-idealization. In detail, this paper uses a power average feedback modulator (PAFM) to detect changes in the power supply by converting the supply voltage into a fixed periodic pulse with varying duty cycle. In addition, the quantization time of the frequency digital conversion module is adjusted linearly, effectively reducing the power sensitivity of the temperature sensor from 0.0809℃/mV to 0.0099℃/mV. The sensor shows a measured inaccuracy of −0.66℃ to +0.68℃ from −70℃ to 120℃, and occupies a compact area of 0.022 mm<sup>2</sup>.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240575/_article">A Unity Factor Input Wireless Power Transfer System Utilizing an Adaptive Tuning Capacitor</a></h4><p><span id="skip_info">Huiming Xiang</span>  <span id="skip_info">Xinyu Hu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240575 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240575" id="hidden34"></ul><div class="summary_txt"> <p>The introduction of reactive power will increase the component stress and reduce the system transmission efficiency. To realize zero reactive power input, a two-coil wireless power transfer (WPT) system utilizing an adaptive tuning capacitor (ATC) is proposed. Compared with conventional switched-controlled capacitor, no additional information sampling is needed in proposed ATC. Simultaneously, proposed ATC has a wide impedance matching range, which expand its practicality greatly. With proposed ATC structure, any possible WPT system detuning occasions caused by control strategies, compensation network or component aging can be avoided automatically. the Finally, an experimental platform is built to verify the feasibility of proposed method.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240577/_article">A hybrid interface design based on chip edge connection and inductively coupling connection for 3D stacked chips</a></h4><p><span id="skip_info">Zhuo Yang</span>  <span id="skip_info">Yang Cui</span>  <span id="skip_info">Jie Xiong</span>  <span id="skip_info">Pan Zheng</span>  <span id="skip_info">Hao Gao</span>  <span id="skip_info">Wenwen Cai</span>  <span id="skip_info">Hui Lv</span>  <span id="skip_info">Li Zhang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240577 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240577" id="hidden35"></ul><div class="summary_txt"> <p>Conventional three-dimensional packaging chips are based the through-silicon via (TSV) technology. Compared with TSV, inductively coupled interconnect (ICI) ensures reduced costs and increased flexibility. However, some limitations of ICI include high transmission delays and wire-bonding costs. Moreover, it requires the determination of the chip ID during testing. To address these issues, an automatic chip-ID-determining (Auto ID) circuit was combined with a chip edge connect (CEC) technology based on the inter-integrated circuit (IIC) protocol. The experimental results revealed that the CEC technology generated conductive channels at the chip edge, and the Auto ID circuit obtained the chip ID without additional processes. The transmission delay of IIC was one-sixth that of ICI when data were transmitted across 16-layer chips.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240578/_article">A fully non-linear column driver with a compact 12-bit DAC for LEDoS displays</a></h4><p><span id="skip_info">Zhuoyu Shi</span>  <span id="skip_info">Aiying Guo</span>  <span id="skip_info">Jingjing Liu</span>  <span id="skip_info">Jianhua Zhang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240578 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240578" id="hidden36"></ul><div class="summary_txt"> <p>This article introduces a novel, compact 12-bit column driver DAC for LED on Silicon (LEDoS)displays using HLMC 55nm process. The proposed DAC utilizes fewer switches by introducing a multi-level strategy to transform signals, with its complete nonlinearity. This novel DAC operates within an output voltage range of 0.2-4.8V, achieving a LSB of 1.1mV. Simulation results indicate maximum differential nonlinearity of 0.22 LSB and integral nonlinearity of 0.54 LSB. Under a load of 15K&ohm; resistor and 15pF capacitor, the circuit achieves a settling time of 2.4μs. It is suitable for Augmented Reality (AR) display devices with high color depth and resolution.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240582/_article">FPGA-based Implementation of Consistent Flow Configuration System for Software-defined Networking</a></h4><p><span id="skip_info">Yiwei Chang</span>  <span id="skip_info">Zhichuan Guo</span>  <span id="skip_info">Yan Jiang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240582 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240582" id="hidden37"></ul><div class="summary_txt"> <p>Software-defined networking (SDN), with its decoupled control and data planes, offers greater flexibility compared to traditional networks, making it ideal for modern, dynamic network environments. This paper proposes a consistent, protocol-independent, and flexible <i>flow configuration</i> system within a 100Gbps reconfigurable match tables (RMT) pipeline enhancing the capability of the open-source NIC framework Corundum for SDN on Field-Programmable Gate Array (FPGA). Our prototype supports concurrent <i>Write</i>, <i>Read</i>, and <i>Delete</i> operations for exact, wildcard, and stateful matching, with a single thread in our server handling up to 719.42K, 751.88K, and 1.45M flows per second for <i>Write</i>, <i>Read</i>, and <i>Delete</i> operations, respectively, which is sufficient for production networks. Additionally, managing a single <i>flow table</i> requires less than 0.1% area overhead on the Xilinx AU200 platform, and each entry is handled in a single clock cycle without blocking the processing pipeline ensuring timely and consistent <i>flow configurations</i>. In conclusion, our prototype is highly scalable, resource-efficient, and efficient.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240587/_article">Energy-Efficient Approximate Multiplier with Incomplete-Sorted 4-2 Compressor for Neural Network Applications</a></h4><p><span id="skip_info">Lin Li</span>  <span id="skip_info">Yiying Jiang</span>  <span id="skip_info">Xiaoqin Wang</span>  <span id="skip_info">Shushan Qiao</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240587 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240587" id="hidden38"></ul><div class="summary_txt"> <p>Approximate computing is a promising approach to reduce power consumption in error-resilient applications with lax precision constraints. This paper presents an energy-efficient approximate multiplier with a novel imprecise 4-2 compressor based on incomplete-sorted circuits. The proposed approximate multiplier includes three parts: a most significant bit (MSB) compressed circuit, a middle-bit accumulation circuit, and a least significant bit (LSB) truncation circuit. First, we propose an ultra-low power approximate 4-2 compressor to improve efficiency, which is used for the middle-bit accumulation circuit. Then, since the weight and input distributions in neural networks usually follow a normal distribution, the MSB compressed circuit performs approximate computation on the accumulation of the significant bits. Finally, constant compensation in the LSB truncation circuits is utilized to balance accuracy and efficiency. Experimental results show that the 8-bit proposed design significantly improves the power-delay product (PDP) by 71.49% with satisfactory performance when compared with the traditional Dadda multiplier.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240590/_article">Design of High Sensitivity Re-transmittable Chipless Tag Temperature Sensor based on Alumina Ceramic</a></h4><p><span id="skip_info">Mengnan Wang</span>  <span id="skip_info">Yawen He</span>  <span id="skip_info">Haotong Yang</span>  <span id="skip_info">Zhonghua Ma</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240590 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240590" id="hidden39"></ul><div class="summary_txt"> <p>An alumina ceramic based U-shaped slot nested re-transmitting chipless tag temperature sensor is proposed in this paper. The U-shaped nested slots are etched in the conductive layer of the top layer of the alumina ceramic. The dielectric constant of the alumina ceramic increases monotonically with temperature increase which leading to change in the resonance frequency of the U-shaped slot to produce the frequency shift. This sensor comes with an ID feature that allows for coded identification. The temperature sensing sensitivity achieves 0.5211 MHz/℃. This temperature sensor has the characteristics of high temperature sensitivity, small size, passive, and the ability to measure temperature wirelessly over long distances. It has certain application potential in the field of high-temperature wireless sensors.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240592/_article">A pulse stretch circuit with resolution of 1.55ps used in low-cost low-power TDC</a></h4><p><span id="skip_info">Linshan Pan</span>  <span id="skip_info">Zhenghao Lu</span>  <span id="skip_info">Xiaopeng Yu</span>  <span id="skip_info">Xiaohua Luo</span>  <span id="skip_info">Menglian Zhao</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240592 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240592" id="hidden40"></ul><div class="summary_txt"> <p>A pulse stretch interpolator used in low-cost and low-power CMOS time-to-digital converter (TDC) is proposed in this paper. The reference clock frequency of the TDC is 6.4 MHz and the range is 5120 us. The chip size is 0.5 mm x 0.5 mm as fabricated in the TSMC 180nm CMOS process. The time resolution can be realized as 10ps and the power consumption is 1.92 mW. The time period of an input is divided into two parts. The first step of coarse quantization uses a clock to quantize an integer number of clock cycles. The second step of fine quantization is to stretch the pulse width of less than one clock cycle after coarse quantization. The pulse stretch interpolator charges and discharges the capacitor under narrow input pulse control in order to expand the narrow pulse. In this way, TDC achieves higher resolution with low power consumption. The pulse stretch interpolator’s resolution is 1.55ps in all corners.</p> </div></div></li><li><h4><DIV class="category00">Circuits and modules for electronic displays</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240593/_article">A Multi-Channel Gamma Voltage Generator Using Transient-Enhanced Buffer for High-Resolution LCoS Driver IC</a></h4><p><span id="skip_info">Chenghe Yang</span>  <span id="skip_info">Yingqi Feng</span>  <span id="skip_info">Wenyu Yang</span>  <span id="skip_info">Junkai Zhang</span>  <span id="skip_info">Li Tian</span>  <span id="skip_info">Hui Wang</span>  <span id="skip_info">Zunkai Huang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240593 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240593" id="hidden41"></ul><div class="summary_txt"> <p>This paper introduces a multi-channel programmable gamma voltage generator. Based on the characteristics of the gamma curve, the gamma correction system applies a two-stage adjustment and a three-region output structure. The proposed programmable preset circuit allows the chip to deliver a programmable initial gamma. By integrating a transient enhancement circuit into the Class AB buffer, the amplifier achieves improvements of 27.8%/30.7% in undershoot/overshoot voltages, respectively. It also features a slew rate of 13.4 V/μs, a 0.1% settling time of 0.62 μs, and a DC gain of 138 dB.<br/><br/></p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240595/_article">Low-noise integrated balanced-mixer for 300-GHz band based on Fermi-level managed barrier diode on Si platform</a></h4><p><span id="skip_info">Hiroshi Ito</span>  <span id="skip_info">Yuma Kawamoto</span>  <span id="skip_info">Tadao Nagatsuma</span>  <span id="skip_info">Tadao Ishibashi</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240595 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240595" id="hidden42"></ul><div class="summary_txt"> <p>A balanced mixer module for operation in the J-band was developed based on Fermi-level managed barrier (FMB) diodes using epi-layer-transfer technique on a Si substrate. Deep dry etching of the Si substrate enabled an arbitrary chip shape to monolithically integrate FMB diodes, waveguide couplers, a 90-degree hybrid circuit, and low-pass filters with better design flexibility. The fabricated module integrated with a transimpedance amplifier, exhibited a double-side intermediate frequency bandwidth of about 43 GHz. The lowest noise-equivalent-power obtained was as low as 5 × 10<sup>-20</sup> W/Hz for a local oscillator power of 400 μW at a signal frequency of 300 GHz.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240596/_article">S-C Band Wideband GaN Power Amplifier MMIC for Radar Application</a></h4><p><span id="skip_info">Tingwei Gong</span>  <span id="skip_info">Zhiqun Cheng</span>  <span id="skip_info">Bangjie Zheng</span>  <span id="skip_info">Xuefei Xuan</span>  <span id="skip_info">Chao Le</span>  <span id="skip_info">Weihao Fan</span>  <span id="skip_info">Zhiwei Zhang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240596 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240596" id="hidden43"></ul><div class="summary_txt"> <p>In this letter, a broadband power amplifier ( PA ) monolithic microwave integrated circuit ( MMIC ) based on the 0.25 µm gallium nitride ( GaN ) high electron mobility transistor (HEMT) technology is presented for radar communication. The proposed PA is designed based on the optimal impedance area of the fundamental and second harmonic within the design frequency band acquired by multi-harmonic bilateral pull technique. It can be observed that good efficiency performance can still be expected when the second harmonic impedance includes the resistive-reactive with complex load impedances. As a verification, a wideband PA operating in the S-C band is implemented and measured. The results of measurement indicate that from 2-6 GHz, a saturated output power of 46.2-47.1 dBm, a power added efficiency ( PAE ) of 36.3% - 47 %, and a gain of 21.2-22.1 dB can be achieved under a drain voltage of 28V.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240597/_article">Gain Enhancement Technique for a Wideband Transimpedance Amplifier with Common Gate Feedforward in Optical Communication</a></h4><p><span id="skip_info">Takuma Yamada</span>  <span id="skip_info">Daisuke Ito</span>  <span id="skip_info">Makoto Nakamura</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240597 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240597" id="hidden44"></ul><div class="summary_txt"> <p>This paper presents a gain enhancement technique for a Common-Gate Feedforward Transimpedance Amplifier (CGFW TIA). The proposed CGFW TIA achieves gain improvement through a current injection technique and an additional feedback path. It is designed using a 0.18-µm CMOS technology. Post-layout simulation results show that the proposed CGFW TIA improves the transimpedance gain by 1.76 times without an increase in power consumption compared to conventional designs.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240603/_article">Design and Implementation of RISC-V System-on-Chip for SPWM Generation Based on FPGA</a></h4><p><span id="skip_info">Qianxi Yin</span>  <span id="skip_info">Dejian Li</span>  <span id="skip_info">Zhipeng Wu</span>  <span id="skip_info">Sio Hang Pun</span>  <span id="skip_info">Yu Liu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240603 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240603" id="hidden45"></ul><div class="summary_txt"> <p>Alternating Current (AC) motors play important roles across various fields. Traditional processors utilizing Sine Pulse Width Modulation (SPWM) to control the speed of AC motors face challenges such as high computational complexity and limited flexibility. To address these problems in the variable frequency speed control process of AC motors, this paper proposes the design of a System-on-Chip (SoC) capable of generating SPWM waves. Our proposal is based on an open-source Reduced Instruction Set Computer fifth-generation (RISC-V) processor. The proposal is verified on the Field Programmable Gate Array (FPGA) platform. The results demonstrate that, with the sine wave frequency set to 3200 Hz and the triangular wave frequency set to 15 KHz, our proposal achieves a 413× acceleration compared to the traditional software method. Compared to the previous accelerator, our design reduces (Look-Up-Table) LUT consumption by 41.10% and (Total Harmonic Distortion) THD by 17.79%.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240612/_article">An open-circuit fault diagnosis strategy for input series output parallel dual active bridge DC/DC converter based on the mean of AC voltages and currents</a></h4><p><span id="skip_info">Biao Chen</span>  <span id="skip_info">Zhongxiu Han</span>  <span id="skip_info">Liqiang Ma</span>  <span id="skip_info">Renhe Zhang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240612 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240612" id="hidden46"></ul><div class="summary_txt"> <p>A two-step fault diagnosis (FD) strategy is proposed for a single-switch open-circuit fault (OCF) of an input-series-output-parallel dual active bridge (DAB) converter in this paper. The strategy localizes the faulty switch through the primary AC voltage and current of each DAB module. The primary fault diagnosis can locate the secondary faulty switch and limit the primary faulty switch in the range of diagonal switches based on OCF characteristics. By actively controlling the relevant switches, the secondary fault diagnosis is carried out to locate the primary faulty switch. Finally, an experimental prototype is built to verify the proposed fault diagnosis strategy.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240621/_article">A low-overhead resilient circuit with partial two-phase latch</a></h4><p><span id="skip_info">Chenghong Zhang</span>  <span id="skip_info">Dongliang Xiong</span>  <span id="skip_info">Kai Huang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240621 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240621" id="hidden47"></ul><div class="summary_txt"> <p>Latch-based resilient circuits significantly increases the area overhead to address short-path (SP) issues. This work presents a low-overhead resilient circuit with partial two-phase latch, which selectively inserts negative phase latches to resolve SP issues and reduces the number of insertion points. Furthermore, the monitoring paths reduction method is also proposed by leveraging the time-borrowing capability of latches. The proposed method is implemented on a RISC-V processor, achieving a performance enhancement of up to 73.7% and a power consumption reduction of up to 33%, with only a 6.5% area penalty.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240624/_article">A high-performance 380 GHz GaAs Schottky diode based mixer and frequency doubler for Terahertz receiver front-ends</a></h4><p><span id="skip_info">Nan Wu</span>  <span id="skip_info">Zhi Jin</span>  <span id="skip_info">Jingtao Zhou</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240624 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240624" id="hidden48"></ul><div class="summary_txt"> <p>This paper presents on the design, fabrication and test of a Schottky diode based mixer driving by a frequency doubler for solid-state receiver front-ends in the 380 GHz range. The 380 GHz sub-harmonic mixer has fabricated with the GaAs membrane process on a 3 μm-thick substrate suspended in a waveguide with metal beamleads, and exhibited an impressive double-side-band conversion loss of less than 10 dB in 1-23 GHz IF band with the optimal conversion loss of merely 6.4 dB. The 190 GHz frequency doubler based on Schottky diodes is the key in the local oscillator source and sufficiently pumps the mixer with 2&sim;5 mW of input power.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240627/_article">An LED Driver with Optimized Output Voltage Control Technique</a></h4><p><span id="skip_info">Yi-Chieh Hsu</span>  <span id="skip_info">Shi-Chieh Kan</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240627 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240627" id="hidden49"></ul><div class="summary_txt"> <p>This paper presents the LED driver with optimized output voltage control technique. The characteristics of LEDs may be affected by usage time, environmental factors, and process variations. Thus, the driving voltage for each LED is not the same, which results in poor efficiency of the LED driver. The proposed LED driver with optimized output voltage control technique can achieve the design target. This work is implemented using TSMC 0.35 μm CMOS process with a chip area of about 0.28 mm<sup>2</sup>. The maximum driving current of 200 mA, and the operating frequency of 100 kHz. The simulation results demonstrate that the output voltage of the LED driver is optimized, which improves the efficiency of the system by about 7%.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240630/_article">A multi-functional high-dynamic intermediate frequency signal acquisition and processing module</a></h4><p><span id="skip_info">Feiyu Jiang</span>  <span id="skip_info">Fuxiang Liu</span>  <span id="skip_info">Bo Mo</span>  <span id="skip_info">Chao Chen</span>  <span id="skip_info">Haonan Dang</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240630 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240630" id="hidden50"></ul><div class="summary_txt"> <p>The signal acquisition and processing module, as a crucial component, is essential for achieving high-performance radar receivers. In this paper, based on key chips such as ADC, FPGA, MCU, clock, and ethernet, a multi-functional high-dynamic intermediate-frequency (IF) signal acquisition and processing module is designed. This module adopts optimized ADC analog front-end design, high-performance clock distribution, and data reception with preprocessing technology, effectively enhancing the dynamic performance of the acquisition module. Additionally, by utilizing MCU in conjunction with Ethernet communication, remote access debugging and program updates for the acquisition module are achieved, providing convenience for engineers to conduct remote maintenance in complex environments. Furthermore, functionalities such as power detection, fault detection, channel gain control, and high-speed data transmission are integrated, expanding the module's application potential. Through practical tests, the IF signal acquisition module demonstrates a signal-to-noise ratio greater than 70 dB, a spurious-free dynamic range greater than 80 dB, an effective number of bits greater than 11.5 Bits, and total harmonic distortion less than -80 dB, meeting the application requirements of ground detection radar and shipborne radar.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240633/_article">Analog Circuit Fault Diagnosis Model Based on WOA and Improved SDAE</a></h4><p><span id="skip_info">Xinmiao Lu</span>  <span id="skip_info">Yixin Zou</span>  <span id="skip_info">Qiong Wu</span>  <span id="skip_info">Longyue Yang</span>  <span id="skip_info">Yuna Zhu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240633 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240633" id="hidden51"></ul><div class="summary_txt"> <p>With the advancement of integrated circuit technology, the stable operation of electronic devices is crucial. Targeting the issue that traditional analog circuit fault diagnosis models cannot simultaneously satisfy noise resistance, stability, and accuracy in real circuit environments, this research represents an analog circuit fault diagnosis model relied on the whale optimization algorithm and an improved SDAE. The model transforms fault signals into 2D time-frequency representations using VMD and CWT to achieve initial denoising; Utilizing DSDAE for further denoising and dimensionality reduction of feature vectors; finally, RF is used for classification. The results of the simulation demonstrate that even in noisy conditions, the model can maintain excellent diagnostic accuracy and stability. making certain improvements in enhancing the operational reliability of electronic devices.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_21.20240640/_article">A wideband front-end with integrated high-voltage assisted input buffer for high-speed ADC</a></h4><p><span id="skip_info">Zilin Jiang</span>  <span id="skip_info">Danyu Wu</span>  <span id="skip_info">Xuan Guo</span>  <span id="skip_info">Hanbo Jia</span>  <span id="skip_info">Shuangbao Jia</span>  <span id="skip_info">Heping Ma</span>  <span id="skip_info">Kai Sun</span>  <span id="skip_info">Xinyu Liu</span>  <br> <div class="data"> <dl><dt> </dt><dd>20240640 : </dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elexad_21.20240640" id="hidden52"></ul><div class="summary_txt"> <p>This letter presents an integrated high-voltage assisted high-linearity wideband front end for high-speed analog-to-digital converters (ADCs). The on-chip high-voltage generation provides high-swing current injection, which effectively improves flatness within the bandwidth and power supply fluctuation suppression for input buffer. Additionally, modeling and analysis of the front end matching network, along with the inclusion of inductive compensation, increased the bandwidth by 3.1 GHz compared to traditional structures. Using 28nm CMOS technology, the front end achieves an SNDR of 56.21 dB and an SFDR of 67.48 dBc with a FoMs of 163.7dB at a 6 GHz input.</p> </div></div></li><input type="hidden" name="request_uri" value="/en_publications/elex" id="set_request_uri"><input type="hidden" name="site_url" value="https://global.ieice.org/" id="set_site_url"> </ul> </div> </section> <section class="box latest is-show"> <div class="pagination top"> <ul style="justify-content: center; text-align: center;"> <li class="prev"><a href="https://global.ieice.org/en_publications/elex/21_21"><span>Previous</span></a> </li> <li class="next"></li> </ul> </div>  <h3>Current Issues Vol.21 No.22 (2024)</h3> <div class="list"> <ul> <li><h4><DIV class="category04">Electron devices, circuits and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240336/_article">Low-cost anti-modeling attack PUF circuit based on configurable APUF</a></h4><p><span id="skip_info">Xiao Zhang</span>  <span id="skip_info">Ling Ye</span>  <span id="skip_info">Xinrui Zhu</span>  <span id="skip_info">Zhangqing He</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240336 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240336" id="hidden53"></ul><div class="summary_txt"> <p>A new low-cost configurable P-2APUF structure is proposed in this paper to solve the predictability problem of Physical Unclonable Functions (PUFs) under machine learning attacks. The structure is composed of Arbitrated PUF (APUF) and Pseudorandom generator (PRNG). By changing the configuration of incentive bits, one APUF generates two different PUF structures, and combines incentive expansion mechanism and output obfuscation mechanism to achieve anti modeling attacks. FPGA experimental results show that the circuit is predicted to be about 52.16% effective against modeling attacks with 20,000 sample sizes using 128 LUTs (look-up tables) and 5 DFFs (D-type flip-flops), and up to 94.31% reliable under different noise environments. Therefore, the P-2APUF structure maintains low overhead and high reliability while achieving resistance to modeling attacks, providing a reliable and secure solution for device authentication and key generation.</p> </div></div></li><li><h4><DIV class="category00">Microwave and millimeter wave devices, circuits, and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240485/_article">Transparent and angular stably miniaturized frequency selective surface for tri-band GSM shielding</a></h4><p><span id="skip_info">Huaxin Zhu</span>  <span id="skip_info">Shun Jin</span>  <span id="skip_info">Jianbo Shao</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240485 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240485" id="hidden54"></ul><div class="summary_txt"> <p>With the widespread application of the global system for mobile communications (GSM), the impact of GSM on human health has become a current research issue. Frequency-selective surface (FSS) shielding is a significant method to address such interference. In this article, a novel geometric design for FSS was proposed to block GSM signals and wireless communication (Wi-Fi) signals, with a cell size of 0.072λ<sub>0</sub>×0.072λ<sub>0</sub>, a transparency of 70%, and an incidence angle of up to 80° in transverse electric (TE) and transverse magnetic (TM). In addition, a novel methodology with a miniaturized design was introduced to reduce the graphic density and improve the transparency of the FSS. The relationship between the geometric element parameters and the resonant frequency was analyzed and optimized using surface currents and equivalent circuit models. Then, a prototype of the FSS was fabricated, achieving a satisfied shielding effect in a microwave darkroom. This design provided better miniaturization, transparency, and frequency stability than previous designs.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240493/_article">A high efficiency adaptively biased LDO with frequency modulated charge pump for NMOS output stage</a></h4><p><span id="skip_info">Shansong Huang</span>  <span id="skip_info">Yue Zhao</span>  <span id="skip_info">Zhiming Xiao</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240493 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240493" id="hidden55"></ul><div class="summary_txt"> <p>This paper presents an adaptive biased NMOS LDO which contains an adaptively biased pulse-frequency-modulated (PFM) charge pump to improve efficiency. Compared with conventional architecture, the ground current of the proposed LDO is halved under 3mA load current by regulating the charge pump frequency based on the sensed output current. In addition, the power supply rejection is also improved to 66dB@10kHz due to the relatively stable charge pumped. The proposed LDO achieved 99.995% current efficiency under 1A load. The proposed LDO was built with 0.18µm BCD technology. The simulated line and load regulations were 0.199mV/V and 53nV/mA, respectively.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240500/_article">A synthesizable spread spectrum clock generator based on type-II/III fractional-<I>N</I> DPLL</a></h4><p><span id="skip_info">Waleed Madany</span>  <span id="skip_info">Hòngyé Huáng</span>  <span id="skip_info">Ashbir Aviat Fadila</span>  <span id="skip_info">Zezheng Liu</span>  <span id="skip_info">Wenqian Wang</span>  <span id="skip_info">Junjun Qiu</span>  <span id="skip_info">Jill Mayeda</span>  <span id="skip_info">Atsushi Shirane</span>  <span id="skip_info">Kenichi Okada</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240500 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240500" id="hidden56"></ul><div class="summary_txt"> <p>This paper presents a fully synthesizable spread spectrum clock generator (SSCG) based on a fractional-<I>N</I> Digital PLL (DPLL). The designed SSCG adds a triangular digital signal to the frequency control word (FCW) to down-spread the frequency of the clock signal and reduce its electromagnetic interference (EMI) to near signals. Because of the linear frequency modulation of the triangular signal, the designed DPLL can be configured to operate in a Type-III mode to track the frequency variation more accurately than a Type-II setting. A proof-of-concept prototype was built using a 65nm CMOS technology. The measured EMI reduction because of the SSCG operation was 22.0dB. The designed SSCG is based on a fractional-<I>N</I> DPLL, which gives a 1.0GHz signal from a 100MHz reference frequency and consumes 4.83mW and 3.1mW from a 1.2V DC supply in the fractional and integer mode of operation, respectively. The measured rms jitter of the designed prototype was 3.95ps and 2.1ps in the fractional and integer modes of operation, respectively. The core area of the developed prototype is 0.1mm<sup>2</sup>.</p> </div></div></li><li><h4><DIV class="category00">Microwave and millimeter wave devices, circuits, and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240508/_article">Design of multi-octave power amplifier based on feedback structure of butterworth filter</a></h4><p><span id="skip_info">Zheming Zhu</span>  <span id="skip_info">Zhiqun Cheng</span>  <span id="skip_info">Minshi Jia</span>  <span id="skip_info">Kun Wang</span>  <span id="skip_info">Bingxin Li</span>  <span id="skip_info">Zhenghao Yang</span>  <span id="skip_info">Baoquan Zhong</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240508 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240508" id="hidden57"></ul><div class="summary_txt"> <p>This paper presents a novel feedback structure for a multi-octave power amplifier (PA). The topological prototype of this structure is the Bartworth low-pass filter (LPF). The passband of the LPF is designed to compensate the PA at the low performance band, enabling the bandwidth (BW) of the PA to be smoothly broadened. To verify the proposed theory, a PA is designed and fabricated using a 10-W GaN HEMT. Measurement results show that the PA operates over a multi-octave band from 0.5-3.0GHz, corresponding to a fractional bandwidth of 142.8%. This PA provides a drain efficiency (DE) of 60.2-80.2% and an output power (Pout) of 39.2-42.1dBm over the operating band.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240516/_article">A flux weakening control algorithm for permanent magnet synchronous grinding electric spindle based on sliding mode controller</a></h4><p><span id="skip_info">Wentao Shan</span>  <span id="skip_info">Jidi Zhang</span>  <span id="skip_info">Zhenhua Han</span>  <span id="skip_info">Jingqian Zhao</span>  <span id="skip_info">Xin Wang</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240516 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240516" id="hidden58"></ul><div class="summary_txt"> <p>This paper proposes a leading angle flux-weakening speed regulation strategy based on sliding mode control for surface-mounted permanent magnet synchronous motorized spindle (PMSMS). The traditional flux-weakening control strategy suffers from problems such as low-speed jitter and a narrow range of speed control. To address this issue, the proposed strategy uses a sliding mode controller instead of a PI controller to adjust the speed error and eliminate poor control performance. The sliding mode controller introduces an integral term and uses the hyperbolic tangent function to make the sliding mode switch smoother, reducing the “jitter” phenomenon and improving system control quality. The strategy also uses a three closed-loop control of the speed, current, and voltage, where the motor terminal voltage and the DC side voltage form the voltage control loop, producing the motor current field. Experimental results show that the leading angle flux-weakening speed regulating strategy based on sliding mode control has better dynamic characteristics at higher speed ranges. It improves the spindle starting process efficiency by nearly 60%, and suppresses stator current oscillation and torque ripple. Moreover, the stator current of the direct axis and the intersecting axis is significantly smaller than that of the conventional control strategy during steady speed, while the transition process is smoother, which is more conducive to subsequent high-precision machining processes. The proposed strategy improves the speed regulating performance of the permanent magnet synchronous motorized spindle, realizing high-quality drive and operation of the spindle unit.</p> </div></div></li><li><h4><DIV class="category00">Microwave and millimeter wave devices, circuits, and modules</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240531/_article">A broadband fully differential amplifier in InP DHBT using global shunt-shunt feedback</a></h4><p><span id="skip_info">Yaohua Li</span>  <span id="skip_info">Jiaxin Lou</span>  <span id="skip_info">Bowen Hu</span>  <span id="skip_info">Zhicheng Liu</span>  <span id="skip_info">Yifei Xu</span>  <span id="skip_info">Yunfei Wang</span>  <span id="skip_info">Kailong Chai</span>  <span id="skip_info">Yongbo Su</span>  <span id="skip_info">Zhi Jin</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240531 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240531" id="hidden59"></ul><div class="summary_txt"> <p>This paper presents a broadband fully differential amplifier using a 0.8-μm InP DHBT process, exhibiting a bandwidth exceeding 8GHz from DC and achieves a differential gain of 14.56dB, occupying 0.78mm × 0.7mm with all pads involved and consuming only 375mW with a -5V power supply. The core of the design leverages an operational amplifier with Cherry-Hooper architecture, incorporating global shunt-shunt feedback to ensure high gain linearity across the bandwidth. Notably, the -1dB bandwidth of this circuit extends up to 5GHz. Additionally, the design is entirely devoid of inductors, resulting in a consistent gain profile without any significant gain peaking.</p> </div></div></li><li><h4><DIV class="category00">Power devices and circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240550/_article">Detection and location of inter-turn short-circuit in a PMSM based on square of negative sequence current vector modulus</a></h4><p><span id="skip_info">Dongdong Li</span>  <span id="skip_info">Mengqi Zhu</span>  <span id="skip_info">Yao Zhao</span>  <span id="skip_info">Shunfu Lin</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240550 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240550" id="hidden60"></ul><div class="summary_txt"> <p>Inter-turn short circuit (ITSC) is a common fault in permanent synchronous motor (PMSM). To enhance the ability of fault detection and location in PMSM, a diagnosis method based on square of negative sequence current vector modulus is proposed. First, we establish mathematical models of PMSM under healthy and faulty condition. Second, the amplitude and phase angle of second harmonic component in the square of negative sequence current vector modulus are analyzed theoretically based on superposition theorem and symmetric component method. Finally, the experiment is carried out on an 8-pole, 36-slot prototype, which verifies the effectiveness and accuracy of theory.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240559/_article">Automated feature map padding and transfer circuit for CNN inference</a></h4><p><span id="skip_info">Hongying Zhang</span>  <span id="skip_info">Ming Chen</span>  <span id="skip_info">Mao Ni</span>  <span id="skip_info">Lan Chen</span>  <span id="skip_info">Yiheng Zhang</span>  <span id="skip_info">Xiaoran Hao</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240559 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240559" id="hidden61"></ul><div class="summary_txt"> <p>This paper introduces a novel hardware acceleration circuit designed to address the storage address offset issue in Convolutional Neural Networks (CNNs) during the feature map padding process. Traditional CPU-based padding and data transfer methods are computationally intensive and lead to high latency and power consumption, especially on edge devices. Our solution automates and integrates feature map padding and transfer. This significantly reduces DRAM access and improves the speed of transferring feature maps between DRAM and on-chip SRAM. The proposed circuit, tested on the ZCU102 development board using YOLOv4-tiny’s convolutional layers, demonstrates a speedup of over 20 times compared to CPU-based methods and more than 4 times compared to CPU with DMA.</p> </div></div></li><li><h4><DIV class="category06">Integrated circuits</div><a href="https://www.jstage.jst.go.jp/article/elex/21/22/21_21.20240567/_article">A fast continuous-time demodulation circuit for a Hall sensor with stack capacitor offset cancellation technique</a></h4><p><span id="skip_info">Yongjia Li</span>  <span id="skip_info">Feng Cheng</span>  <span id="skip_info">Lei Zhang</span>  <span id="skip_info">Jianlin Xia</span>  <span id="skip_info">Zhongyuan Fang</span>  <span id="skip_info">Long Zhang</span>  <span id="skip_info">Weifeng Sun</span>  <br> <div class="data"> <dl><dt> </dt><dd><span id="skip_info">20240567 : LETTER</span></dd></dl></div><div class="action"><ul><li class="summary toggle"><a onClick="ga('send', 'event', 'summary', 'click', 'ELEX');"><i class="fas fa-angle-down"></i></a></li> <input type="hidden" name="pid" value="elex_21.20240567" id="hidden62"></ul><div class="summary_txt"> <p>A demodulation circuit for Hall sensor applications, which cancels offset by employing sequential voltage iterations across stack capacitors, is proposed in this paper. The circuit utilizes stack capacitors and a summing amplifier to perform offset sampling and cancellation. As there is no holding after sampling, the chopping ripple is effectively suppressed, thereby alleviating the use of area-consuming low pass filter (LPF). Under 0.18µ<I>m</I> process, the Hall sensor with proposed stack capacitor offset cancellation (SCOC) demodulation circuit achieves higher bandwidth, better signal continuity, lower ripple and lower residual offset compared with two common offset cancellation (OC) circuits. The simulated ripple and residual offset are 38.1µ<I>T</I> and 4.1µ<I>T</I> respectively.</p> </div></div></li><input type="hidden" name="request_uri" value="/en_publications/elex" id="set_request_uri"><input type="hidden" name="site_url" value="https://global.ieice.org/" id="set_site_url"> </ul> </div> <div class="pagination"> <ul> <li class="prev"><a href="https://global.ieice.org/en_publications/elex/21_21"><span>Previous</span></a> </li> <li class="next"></li> </ul> </div> </section> </div> <div class="right_box">   <section class="latest_issue"> <h4 id="skip_info">Latest Issue</h4> <ul id="skip_info"> <li class="a"><a href="https://global.ieice.org/en_transactions/fundamentals">IEICE Trans. Fundamentals</a></li> <li class="b"><a href="https://global.ieice.org/en_transactions/communications">IEICE Trans. Communications</a></li> <li class="c"><a href="https://global.ieice.org/en_transactions/electronics">IEICE Trans. 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