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32 nm process - Wikipedia
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class="vector-toc-text"> <span class="vector-toc-numb">3.1</span> <span>28 nm & 22 nm</span> </div> </a> <ul id="toc-28_nm_&_22_nm-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Further_reading" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Further_reading"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Further reading</span> </div> </a> <ul id="toc-Further_reading-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" 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Available in 11 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-11" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">11 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-zh-min-nan mw-list-item"><a href="https://zh-min-nan.wikipedia.org/wiki/32_n%C4%81i-b%C3%AD_ch%C3%A8-t%C3%AAng" title="32 nāi-bí chè-têng – Minnan" lang="nan" hreflang="nan" data-title="32 nāi-bí chè-têng" data-language-autonym="閩南語 / Bân-lâm-gú" data-language-local-name="Minnan" class="interlanguage-link-target"><span>閩南語 / Bân-lâm-gú</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/32_nan%C3%B2metres" title="32 nanòmetres – Catalan" lang="ca" hreflang="ca" data-title="32 nanòmetres" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/32_nanometr%C5%AF" title="32 nanometrů – Czech" lang="cs" hreflang="cs" data-title="32 nanometrů" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/32_nan%C3%B3metros" title="32 nanómetros – Spanish" lang="es" hreflang="es" data-title="32 nanómetros" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/32_nm" title="32 nm – French" lang="fr" hreflang="fr" data-title="32 nm" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/32_nm_%EA%B3%B5%EC%A0%95" title="32 nm 공정 – Korean" lang="ko" hreflang="ko" data-title="32 nm 공정" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/32_nm" title="32 nm – Italian" lang="it" hreflang="it" data-title="32 nm" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-pt badge-Q70893996 mw-list-item" title=""><a href="https://pt.wikipedia.org/wiki/32_nan%C3%B4metros" title="32 nanômetros – Portuguese" lang="pt" hreflang="pt" data-title="32 nanômetros" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-wuu mw-list-item"><a href="https://wuu.wikipedia.org/wiki/32%E7%BA%B3%E7%B1%B3%E5%88%B6%E7%A8%8B" title="32纳米制程 – Wu" lang="wuu" hreflang="wuu" data-title="32纳米制程" data-language-autonym="吴语" data-language-local-name="Wu" class="interlanguage-link-target"><span>吴语</span></a></li><li class="interlanguage-link interwiki-zh-yue mw-list-item"><a href="https://zh-yue.wikipedia.org/wiki/32%E7%B4%8D%E7%B1%B3%E8%A3%BD%E7%A8%8B" title="32納米製程 – Cantonese" lang="yue" hreflang="yue" data-title="32納米製程" data-language-autonym="粵語" data-language-local-name="Cantonese" class="interlanguage-link-target"><span>粵語</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/32%E7%BA%B3%E7%B1%B3%E5%88%B6%E7%A8%8B" title="32纳米制程 – Chinese" lang="zh" hreflang="zh" data-title="32纳米制程" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a href="https://www.wikidata.org/wiki/Special:EntityPage/Q2652244#sitelinks-wikipedia" title="Edit interlanguage links" class="wbc-editpage">Edit links</a></span></div> </div> </div> </div> </header> <div class="vector-page-toolbar"> <div class="vector-page-toolbar-container"> <div id="left-navigation"> <nav aria-label="Namespaces"> <div id="p-associated-pages" class="vector-menu vector-menu-tabs mw-portlet mw-portlet-associated-pages" > <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li id="ca-nstab-main" class="selected vector-tab-noicon mw-list-item"><a href="/wiki/32_nm_process" title="View the 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a>abbr{text-decoration:inherit}.mw-parser-output .navbar-mini abbr{font-variant:small-caps;border-bottom:none;text-decoration:none;cursor:inherit}.mw-parser-output .navbar-ct-full{font-size:114%;margin:0 7em}.mw-parser-output .navbar-ct-mini{font-size:114%;margin:0 4em}html.skin-theme-clientpref-night .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}@media(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><table class="sidebar nomobile nowraplinks" style="width:auto"><tbody><tr><th class="sidebar-title" style="font-size: 110%"><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor<br />device<br />fabrication</a></th></tr><tr><td class="sidebar-image"><span typeof="mw:File"><a href="/wiki/File:4-fach-NAND-C10.JPG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d5/4-fach-NAND-C10.JPG/100px-4-fach-NAND-C10.JPG" decoding="async" width="100" height="125" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/d5/4-fach-NAND-C10.JPG/150px-4-fach-NAND-C10.JPG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/d5/4-fach-NAND-C10.JPG/200px-4-fach-NAND-C10.JPG 2x" data-file-width="967" data-file-height="1206" /></a></span></td></tr><tr><td class="sidebar-content plainlist" style="text-align:left;;text-align:center;"> <a href="/wiki/MOSFET#Scaling" title="MOSFET">MOSFET scaling</a><br />(<a href="/wiki/List_of_semiconductor_scale_examples" title="List of semiconductor scale examples">process nodes</a>)</td> </tr><tr><td class="sidebar-content plainlist" style="text-align:left;"> <div style="padding-left:14px;"> <ul><li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/20_%CE%BCm_process" class="mw-redirect" title="20 μm process">20 μm</a> – 1968</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/10_%CE%BCm_process" class="mw-redirect" title="10 μm process">10 μm</a> – 1971</li> <li><span style="visibility:hidden;color:transparent;">00</span><a href="/wiki/6_%CE%BCm_process" title="6 μm process">6 μm</a> – 1974</li> <li><span style="visibility:hidden;color:transparent;">00</span><a href="/wiki/3_%CE%BCm_process" title="3 μm process">3 μm</a> – 1977</li> <li><span style="padding-left:0.05em;"> </span><a href="/wiki/1.5_%CE%BCm_process" title="1.5 μm process">1.5 μm</a> – 1981</li> <li><span style="visibility:hidden;color:transparent;">00</span><a href="/wiki/1_%CE%BCm_process" title="1 μm process">1 μm</a> – 1984</li> <li><a href="/wiki/800_nm_process" title="800 nm process">800 nm</a> – 1987</li> <li><a href="/wiki/600_nm_process" title="600 nm process">600 nm</a> – 1990</li> <li><a href="/wiki/350_nm_process" title="350 nm process">350 nm</a> – 1993</li> <li><a href="/wiki/250_nm_process" title="250 nm process">250 nm</a> – 1996</li> <li><a href="/wiki/180_nm_process" title="180 nm process">180 nm</a> – 1999</li> <li><a href="/wiki/130_nm_process" title="130 nm process">130 nm</a> – 2001</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/90_nm_process" title="90 nm process">90 nm</a> – 2003</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/65_nm_process" title="65 nm process">65 nm</a> – 2005</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/45_nm_process" title="45 nm process">45 nm</a> – 2007</li> <li><span style="visibility:hidden;color:transparent;">0</span><a class="mw-selflink selflink">32 nm</a> – 2009</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/28_nm_process" title="28 nm process">28 nm</a> – 2010</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/22_nm_process" title="22 nm process">22 nm</a> – 2012</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/14_nm_process" title="14 nm process">14 nm</a> – 2014</li> <li><span style="visibility:hidden;color:transparent;">0</span><a href="/wiki/10_nm_process" title="10 nm process">10 nm</a> – 2016</li> <li><span style="visibility:hidden;color:transparent;">00</span><a href="/wiki/7_nm_process" title="7 nm process">7 nm</a> – 2018</li> <li><span style="visibility:hidden;color:transparent;">00</span><a href="/wiki/5_nm_process" title="5 nm process">5 nm</a> – 2020</li> <li><span style="visibility:hidden;color:transparent;">00</span><a href="/wiki/3_nm_process" title="3 nm process">3 nm</a> – 2022</li></ul> </div></td> </tr><tr><td class="sidebar-content plainlist" style="text-align:left;"> <div style="padding-left:14px;">Future <ul><li><span style="visibility:hidden;color:transparent;">00</span><a href="/wiki/2_nm_process" title="2 nm process">2 nm</a> ~ 2025</li></ul> </div></td> </tr><tr><td class="sidebar-content plainlist" style="text-align:left;"> <div style="padding-right:5px; padding-left:5px;"><hr /><div class="paragraphbreak" style="margin-top:0.5em"></div> <ul><li><a href="/wiki/Die_shrink#Half-shrink" title="Die shrink">Half-nodes</a></li> <li><a href="/wiki/Transistor_count#Transistor_density" title="Transistor count">Density</a></li> <li><a href="/wiki/CMOS" title="CMOS">CMOS</a></li> <li><a href="/wiki/Semiconductor_device" title="Semiconductor device">Device</a> (<a href="/wiki/Multigate_device" title="Multigate device">multi-gate</a>)</li> <li><a href="/wiki/Moore%27s_law" title="Moore's law">Moore's law</a></li> <li><a href="/wiki/Transistor_count" title="Transistor count">Transistor count</a></li> <li><a href="/wiki/Semiconductor" title="Semiconductor">Semiconductor</a></li> <li><a href="/wiki/Semiconductor_industry" title="Semiconductor industry">Industry</a></li> <li><a href="/wiki/Nanoelectronics" title="Nanoelectronics">Nanoelectronics</a></li></ul> </div></td> </tr><tr><td class="sidebar-below" style="padding-right: 0.5em; font-weight: normal; text-align: right; font-size: 115%"> <div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Semiconductor_manufacturing_processes" title="Template:Semiconductor manufacturing processes"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Semiconductor_manufacturing_processes" title="Template talk:Semiconductor manufacturing processes"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Semiconductor_manufacturing_processes" title="Special:EditPage/Template:Semiconductor manufacturing processes"><abbr title="Edit this template">e</abbr></a></li></ul></div></td></tr></tbody></table> <p>The <b>"32 nm" node</b> is the step following the <a href="/wiki/45_nm_process" title="45 nm process">"45 nm" process</a> in <a href="/wiki/CMOS" title="CMOS">CMOS</a> (<a href="/wiki/MOSFET" title="MOSFET">MOSFET</a>) <a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">semiconductor device fabrication</a>. "32-<a href="/wiki/Nanometre" title="Nanometre">nanometre</a>" refers to the average half-pitch (i.e., half the distance between identical features) of a <a href="/wiki/Memory_cell_(computing)" title="Memory cell (computing)">memory cell</a> at this technology level. </p><p><a href="/wiki/Toshiba" title="Toshiba">Toshiba</a> produced commercial 32<span class="nowrap"> </span><a href="/wiki/Gibibit" class="mw-redirect" title="Gibibit">GiB</a> <a href="/wiki/NAND_flash" class="mw-redirect" title="NAND flash">NAND flash</a> memory chips with the "32<span class="nowrap"> </span>nm" process in 2009.<sup id="cite_ref-toshiba2009_1-0" class="reference"><a href="#cite_note-toshiba2009-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> <a href="/wiki/Intel_Corporation" class="mw-redirect" title="Intel Corporation">Intel</a> and <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a> produced commercial microchips using the "32 nm" process in the early 2010s. IBM and the <a href="/w/index.php?title=Common_Platform&action=edit&redlink=1" class="new" title="Common Platform (page does not exist)">Common Platform</a> also developed a "32 nm" <a href="/wiki/High-%CE%BA_dielectric" title="High-κ dielectric">high-κ</a> metal gate process.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> Intel began selling its first "32 nm" processors using the <a href="/wiki/Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere architecture</a> on 7 January 2010. </p><p>Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit;<sup id="cite_ref-urlNo_More_Nanometers_–_EEJournal_3-0" class="reference"><a href="#cite_note-urlNo_More_Nanometers_–_EEJournal-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> neither gate length, nor metal pitch, nor gate pitch on a "32nm" device is thirty-two nanometers.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p><p>The <a href="/wiki/28_nm_process" title="28 nm process">"28 nm" node</a> is an intermediate half-node <a href="/wiki/Die_shrink" title="Die shrink">die shrink</a> based on the "32 nm" process. </p><p>The "32 nm" process was superseded by commercial <a href="/wiki/22_nm_process" title="22 nm process">"22 nm"</a> technology in 2012.<sup id="cite_ref-22nmIsHere_8-0" class="reference"><a href="#cite_note-22nmIsHere-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Technology_demos">Technology demos</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=32_nm_process&action=edit&section=1" title="Edit section: Technology demos"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Prototypes using "32 nm" technology first emerged in the mid-2000s. In 2004, <a href="/wiki/IBM" title="IBM">IBM</a> demonstrated a 0.143 μm<sup>2</sup> <a href="/wiki/Static_random-access_memory" title="Static random-access memory">SRAM</a> cell with a poly gate pitch of 135 nm, produced using <a href="/wiki/Electron-beam_lithography" title="Electron-beam lithography">electron-beam lithography</a> and <a href="/wiki/Photolithography" title="Photolithography">photolithography</a> on the same layer. It was observed that the cell's sensitivity to input voltage fluctuations degraded significantly at such a small scale.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> In October 2006, the <a href="/wiki/Interuniversity_Microelectronics_Centre" class="mw-redirect" title="Interuniversity Microelectronics Centre">Interuniversity Microelectronics Centre</a> (IMEC) demonstrated a 32 nm flash patterning capability based on <a href="/wiki/Double_patterning" class="mw-redirect" title="Double patterning">double patterning</a> and <a href="/wiki/Immersion_lithography" title="Immersion lithography">immersion lithography</a>.<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> The necessity of introducing double patterning and <a href="/wiki/Numerical_aperture" title="Numerical aperture">hyper-NA</a> tools to reduce memory cell area offset some of the cost advantages of moving to this node from the 45 nm node.<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> <a href="/wiki/TSMC" title="TSMC">TSMC</a> similarly used double patterning combined with immersion lithography to produce a "32 nm" node 0.183 μm<sup>2</sup> six-transistor SRAM cell in 2005.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> </p><p>Intel Corporation revealed its first "32 nm" test chips to the public on 18 September 2007 at the Intel Developer Forum. The test chips had a cell size of 0.182 μm<sup>2</sup>, used a second-generation <a href="/wiki/High-%CE%BA_dielectric" title="High-κ dielectric">high-κ</a> gate dielectric and metal gate, and contained almost two billion transistors. 193 nm immersion lithography was used for the critical layers, while 193 nm or 248 nm dry lithography was used on less critical layers. The critical pitch was 112.5 nm.<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> </p><p>In January 2011, Samsung completed development of the industry's first <a href="/wiki/DDR4" class="mw-redirect" title="DDR4">DDR4</a> <a href="/wiki/SDRAM" class="mw-redirect" title="SDRAM">SDRAM</a> module using a process technology with a size between 30 nm and 39 nm. The module could reportedly achieve data transfer rates of 2.133 Gbit/s at 1.2V, compared to 1.35V and 1.5V DDR3 DRAM at an equivalent "30 nm-class" process technology with speeds of up to 1.6 Gbit/s. The module used pseudo open drain (POD) technology, specially adapted to allow DDR4 SDRAM to consume just half the current of <a href="/wiki/DDR3" class="mw-redirect" title="DDR3">DDR3</a> when reading and writing data.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Processors_using_"32_nm"_technology"><span id="Processors_using_.2232_nm.22_technology"></span>Processors using "32 nm" technology</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=32_nm_process&action=edit&section=2" title="Edit section: Processors using "32 nm" technology"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Intel's Core i3 and i5 processors, released in January 2010, were among the first mass-produced processors to use "32 nm" technology.<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> Intel's second-generation Core processors, codenamed <a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a>, also used the "32 nm" manufacturing process. Intel's 6-core processor, codenamed <a href="/wiki/Gulftown_(microprocessor)" class="mw-redirect" title="Gulftown (microprocessor)">Gulftown</a> and built on the <a href="/wiki/Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a> architecture, was released on 16 March 2010 as the Core i7 980x Extreme Edition, retailing for approximately US$1,000.<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> Intel's lower-end 6-core, the i7-970, was released in late July 2010, priced at approximately US$900. Intel's "32nm" process has a transistor density of 7.11 million transistors per square milimeter (MTr/mm2).<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> </p><p>AMD also released "32 nm" SOI processors in the early 2010s. AMD's FX Series processors, codenamed Zambezi and based on AMD's <a href="/wiki/Bulldozer_(microarchitecture)" title="Bulldozer (microarchitecture)">Bulldozer</a> architecture, were released in October 2011. The technology utilised a "32 nm" SOI process, two CPU cores per module, and up to four modules, ranging from a quad-core design costing approximately US$130 to a $280 eight-core design. </p><p>In September 2011, <a href="/wiki/Ambarella_Inc." title="Ambarella Inc.">Ambarella Inc.</a> announced the availability of the "32 nm"-based A7L <a href="/wiki/System-on-a-chip" class="mw-redirect" title="System-on-a-chip">system-on-a-chip</a> circuit for digital still cameras, providing <a href="/wiki/1080p60" class="mw-redirect" title="1080p60">1080p60</a> high-definition video capabilities.<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Successor_node">Successor node</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=32_nm_process&action=edit&section=3" title="Edit section: Successor node"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="28_nm_&_22_nm"><span id="28_nm_.26_22_nm"></span>28 nm & 22 nm</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=32_nm_process&action=edit&section=4" title="Edit section: 28 nm & 22 nm"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The successor to "32 nm" technology was the "22 nm" node, per the <a href="/wiki/International_Technology_Roadmap_for_Semiconductors" title="International Technology Roadmap for Semiconductors">International Technology Roadmap for Semiconductors</a>. Intel began mass production of "22 nm" semiconductors in late 2011,<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> and announced the release of its first commercial "22 nm" devices in April 2012.<sup id="cite_ref-22nmIsHere_8-1" class="reference"><a href="#cite_note-22nmIsHere-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> <a href="/wiki/TSMC" title="TSMC">TSMC</a> bypassed "32<span class="nowrap"> </span>nm", jumping from "40<span class="nowrap"> </span>nm" in 2008 to "28<span class="nowrap"> </span>nm" in 2011.<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=32_nm_process&action=edit&section=5" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist reflist-columns references-column-width" style="column-width: 30em;"> <ol class="references"> <li id="cite_note-toshiba2009-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-toshiba2009_1-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation news cs1"><a rel="nofollow" class="external text" href="http://www.toshiba.co.jp/about/press/2009_02/pr1102.htm">"Toshiba Makes Major Advances in NAND Flash Memory with 3-bit-per-cell 32nm generation and with 4-bit-per-cell 43nm technology"</a>. <i><a href="/wiki/Toshiba" title="Toshiba">Toshiba</a></i>. 11 February 2009<span class="reference-accessdate">. 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Retrieved 14 February 2013.</span> </li> <li id="cite_note-21"><span class="mw-cite-backlink"><b><a href="#cite_ref-21">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.bbc.co.uk/news/business-17750330">"Intel beats analysts' first quarter forecasts"</a>. BBC. 17 April 2012. Retrieved 18 June 2013.</span> </li> <li id="cite_note-22"><span class="mw-cite-backlink"><b><a href="#cite_ref-22">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.tsmc.com/english/dedicatedFoundry/technology/28nm.htm">"28nm Technology"</a>. <a href="/wiki/TSMC" title="TSMC">TSMC</a><span class="reference-accessdate">. Retrieved <span class="nowrap">30 June</span> 2019</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=28nm+Technology&rft.pub=TSMC&rft_id=https%3A%2F%2Fwww.tsmc.com%2Fenglish%2FdedicatedFoundry%2Ftechnology%2F28nm.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3A32+nm+process" class="Z3988"></span></span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=32_nm_process&action=edit&section=6" title="Edit section: Further reading"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSteen2006" class="citation journal cs1">Steen, S.; et al. (2006). "Hybrid lithography: The marriage between optical and e-beam lithography. A method to study process integration and device performance for advanced device nodes". <i>Microelectronic Engineering</i>. <b>83</b> (4–9): 754–761. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1016%2Fj.mee.2006.01.181">10.1016/j.mee.2006.01.181</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Microelectronic+Engineering&rft.atitle=Hybrid+lithography%3A+The+marriage+between+optical+and+e-beam+lithography.+A+method+to+study+process+integration+and+device+performance+for+advanced+device+nodes&rft.volume=83&rft.issue=4%E2%80%939&rft.pages=754-761&rft.date=2006&rft_id=info%3Adoi%2F10.1016%2Fj.mee.2006.01.181&rft.aulast=Steen&rft.aufirst=S.&rfr_id=info%3Asid%2Fen.wikipedia.org%3A32+nm+process" class="Z3988"></span></li></ul> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=32_nm_process&action=edit&section=7" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="http://news.cnet.com/Chipmakers+gear+up+for+manufacturing+hurdles/2100-1006_3-6082393.html">Chipmakers gear up for manufacturing hurdles</a></li> <li><a rel="nofollow" class="external text" href="http://www.sony.net/SonyInfo/News/Press/200601/06-0112E/">Sony, IBM, and Toshiba partnering on semiconductor research</a></li> <li><a rel="nofollow" class="external text" href="http://www.pcworld.com/news/article/0,aid,117889,00.asp">IBM and AMD partnering on semiconductor research</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20060716191735/http://www.pcworld.com/news/article/0,aid,117889,00.asp">Archived</a> 2006-07-16 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li><a rel="nofollow" class="external text" href="http://hardware.slashdot.org/comments.pl?sid=189944&cid=15632847">Slashdot discussion</a></li> <li><a rel="nofollow" class="external text" href="http://www.physorg.com/news109344893.html">Intel 32 nm process</a></li> <li><a rel="nofollow" class="external text" href="http://sst.pennnet.com/display_article/309943/5/ARTCL/none/none/1/Samsung-touts-30 nm-NAND-flash-using-double-patterning/">Samsung self-aligned double patterning technology</a><sup class="noprint Inline-Template"><span style="white-space: nowrap;">[<i><a href="/wiki/Wikipedia:Link_rot" title="Wikipedia:Link rot"><span title=" Dead link tagged March 2021">permanent dead link</span></a></i><span style="visibility:hidden; color:transparent; padding-left:2px">‍</span>]</span></sup></li></ul> <table class="wikitable" style="margin:0.5em auto; font-size:95%; clear: both;"> <tbody><tr> <td style="width: 30%; text-align: center;">Preceded by<br /><b><a href="/wiki/45_nm_process" title="45 nm process">45 nm</a></b> </td> <td style="text-align: center;"><b><a href="/wiki/MOSFET" title="MOSFET">MOSFET</a> <a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">manufacturing processes</a> (<a href="/wiki/CMOS" title="CMOS">CMOS</a>)</b> </td> <td style="width: 30%; text-align: center;">Succeeded by<br /><b><a href="/wiki/22_nm_process" title="22 nm process">22 nm</a></b> </td></tr></tbody></table> <!-- NewPP limit report Parsed by mw‐web.codfw.main‐84d8f4b96‐xhx9p Cached time: 20241117070554 Cache expiry: 2592000 Reduced expiry: false Complications: [vary‐revision‐sha1, show‐toc] CPU time usage: 0.375 seconds Real time usage: 0.453 seconds Preprocessor visited node count: 1239/1000000 Post‐expand include size: 40475/2097152 bytes Template argument size: 1431/2097152 bytes Highest expansion depth: 15/100 Expensive parser function count: 3/500 Unstrip recursion depth: 1/20 Unstrip post‐expand size: 56100/5000000 bytes Lua time usage: 0.229/10.000 seconds Lua memory usage: 4488059/52428800 bytes Number of Wikibase entities loaded: 0/400 --> <!-- Transclusion expansion time report (%,ms,calls,template) 100.00% 400.250 1 -total 44.72% 179.011 1 Template:Reflist 29.52% 118.142 1 Template:Semiconductor_manufacturing_processes 28.62% 114.570 1 Template:Sidebar 28.54% 114.216 4 Template:Cite_news 14.51% 58.081 1 Template:Navbar 9.66% 38.669 1 Template:Dead_link 9.02% 36.094 1 Template:Fix 8.53% 34.158 1 Template:Use_dmy_dates 7.84% 31.375 8 Template:Cite_web --> <!-- Saved in parser cache with key enwiki:pcache:idhash:3847486-0!canonical and timestamp 20241117070554 and revision id 1251911026. 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