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System on a chip - Wikipedia

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class="vector-toc-numb">3.1</span> <span>Functional components</span> </div> </a> <ul id="toc-Functional_components-sublist" class="vector-toc-list"> <li id="toc-Processor_cores" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Processor_cores"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.1</span> <span>Processor cores</span> </div> </a> <ul id="toc-Processor_cores-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Memory" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Memory"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.2</span> <span>Memory</span> </div> </a> <ul id="toc-Memory-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Interfaces" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Interfaces"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.3</span> <span>Interfaces</span> </div> </a> <ul id="toc-Interfaces-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Digital_signal_processors" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Digital_signal_processors"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.4</span> <span>Digital signal processors</span> </div> </a> <ul id="toc-Digital_signal_processors-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Other" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Other"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.5</span> <span>Other</span> </div> </a> <ul id="toc-Other-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Intermodule_communication" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Intermodule_communication"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2</span> <span>Intermodule communication</span> </div> </a> <ul id="toc-Intermodule_communication-sublist" class="vector-toc-list"> <li id="toc-Bus-based_communication" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Bus-based_communication"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2.1</span> <span>Bus-based communication</span> </div> </a> <ul id="toc-Bus-based_communication-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Network_on_a_chip" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Network_on_a_chip"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2.2</span> <span>Network on a chip</span> </div> </a> <ul id="toc-Network_on_a_chip-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Design_flow" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Design_flow"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Design flow</span> </div> </a> <button aria-controls="toc-Design_flow-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Design flow subsection</span> </button> <ul id="toc-Design_flow-sublist" class="vector-toc-list"> <li id="toc-Design_verification" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Design_verification"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1</span> <span>Design verification</span> </div> </a> <ul id="toc-Design_verification-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Optimization_goals" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Optimization_goals"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Optimization goals</span> </div> </a> <button aria-controls="toc-Optimization_goals-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Optimization goals subsection</span> </button> <ul id="toc-Optimization_goals-sublist" class="vector-toc-list"> <li id="toc-Targets" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Targets"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1</span> <span>Targets</span> </div> </a> <ul id="toc-Targets-sublist" class="vector-toc-list"> <li id="toc-Power_consumption" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Power_consumption"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1.1</span> <span>Power consumption</span> </div> </a> <ul id="toc-Power_consumption-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Performance_per_watt" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Performance_per_watt"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1.2</span> <span>Performance per watt</span> </div> </a> <ul id="toc-Performance_per_watt-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Waste_heat" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Waste_heat"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1.3</span> <span>Waste heat</span> </div> </a> <ul id="toc-Waste_heat-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Throughput" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Throughput"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1.4</span> <span>Throughput</span> </div> </a> <ul id="toc-Throughput-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Latency" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Latency"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1.5</span> <span>Latency</span> </div> </a> <ul id="toc-Latency-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Methodologies" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Methodologies"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.2</span> <span>Methodologies</span> </div> </a> <ul id="toc-Methodologies-sublist" class="vector-toc-list"> <li id="toc-Task_scheduling" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Task_scheduling"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.2.1</span> <span>Task scheduling</span> </div> </a> <ul id="toc-Task_scheduling-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Pipelining" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Pipelining"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.2.2</span> <span>Pipelining</span> </div> </a> <ul id="toc-Pipelining-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Probabilistic_modeling" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Probabilistic_modeling"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.2.3</span> <span>Probabilistic modeling</span> </div> </a> <ul id="toc-Probabilistic_modeling-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Markov_chains" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Markov_chains"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.2.4</span> <span>Markov chains</span> </div> </a> <ul id="toc-Markov_chains-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Fabrication" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Fabrication"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>Fabrication</span> </div> </a> <ul id="toc-Fabrication-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Examples" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Examples"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>Examples</span> </div> </a> <ul id="toc-Examples-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Benchmarks" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Benchmarks"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>Benchmarks</span> </div> </a> <ul id="toc-Benchmarks-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">9</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Notes" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Notes"> <div class="vector-toc-text"> <span class="vector-toc-numb">10</span> <span>Notes</span> </div> </a> <ul id="toc-Notes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">11</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Further_reading" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Further_reading"> <div class="vector-toc-text"> <span class="vector-toc-numb">12</span> <span>Further reading</span> </div> </a> <ul id="toc-Further_reading-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">13</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Toggle the table of contents</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">System on a chip</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. Available in 38 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-38" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">38 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D9%86%D8%B8%D8%A7%D9%85_%D8%B9%D9%84%D9%89_%D8%B1%D9%82%D8%A7%D9%82%D8%A9" title="نظام على رقاقة – Arabic" lang="ar" hreflang="ar" data-title="نظام على رقاقة" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-az mw-list-item"><a href="https://az.wikipedia.org/wiki/%C3%87ip_%C3%BCz%C9%99rind%C9%99_sistem" title="Çip üzərində sistem – Azerbaijani" lang="az" hreflang="az" data-title="Çip üzərində sistem" data-language-autonym="Azərbaycanca" data-language-local-name="Azerbaijani" class="interlanguage-link-target"><span>Azərbaycanca</span></a></li><li class="interlanguage-link interwiki-bn mw-list-item"><a href="https://bn.wikipedia.org/wiki/%E0%A6%8F%E0%A6%95_%E0%A6%9A%E0%A6%BF%E0%A6%B2%E0%A6%A4%E0%A7%87-%E0%A6%AD%E0%A6%BF%E0%A6%A4%E0%A7%8D%E0%A6%A4%E0%A6%BF%E0%A6%95_%E0%A6%AC%E0%A7%8D%E0%A6%AF%E0%A6%AC%E0%A6%B8%E0%A7%8D%E0%A6%A5%E0%A6%BE" title="এক চিলতে-ভিত্তিক ব্যবস্থা – Bangla" lang="bn" hreflang="bn" data-title="এক চিলতে-ভিত্তিক ব্যবস্থা" data-language-autonym="বাংলা" data-language-local-name="Bangla" class="interlanguage-link-target"><span>বাংলা</span></a></li><li class="interlanguage-link interwiki-bg mw-list-item"><a href="https://bg.wikipedia.org/wiki/%D0%95%D0%B4%D0%BD%D0%BE%D1%87%D0%B8%D0%BF%D0%BE%D0%B2%D0%B0_%D1%81%D0%B8%D1%81%D1%82%D0%B5%D0%BC%D0%B0" title="Едночипова система – Bulgarian" lang="bg" hreflang="bg" data-title="Едночипова система" data-language-autonym="Български" data-language-local-name="Bulgarian" class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-bs mw-list-item"><a href="https://bs.wikipedia.org/wiki/Sistem_na_%C4%8Dipu" title="Sistem na čipu – Bosnian" lang="bs" hreflang="bs" data-title="Sistem na čipu" data-language-autonym="Bosanski" data-language-local-name="Bosnian" class="interlanguage-link-target"><span>Bosanski</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/SoC" title="SoC – Catalan" lang="ca" hreflang="ca" data-title="SoC" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/Syst%C3%A9m_na_%C4%8Dipu" title="Systém na čipu – Czech" lang="cs" hreflang="cs" data-title="Systém na čipu" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/System-on-a-Chip" title="System-on-a-Chip – German" lang="de" hreflang="de" data-title="System-on-a-Chip" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/S%C3%BCsteemikiip" title="Süsteemikiip – Estonian" lang="et" hreflang="et" data-title="Süsteemikiip" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Sistema_en_un_chip" title="Sistema en un chip – Spanish" lang="es" hreflang="es" data-title="Sistema en un chip" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-eo mw-list-item"><a href="https://eo.wikipedia.org/wiki/System-on-chip" title="System-on-chip – Esperanto" lang="eo" hreflang="eo" data-title="System-on-chip" data-language-autonym="Esperanto" data-language-local-name="Esperanto" class="interlanguage-link-target"><span>Esperanto</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%D8%B3%D8%A7%D9%85%D8%A7%D9%86%D9%87_%D8%B1%D9%88%DB%8C_%DB%8C%DA%A9_%D8%AA%D8%B1%D8%A7%D8%B4%D9%87" title="سامانه روی یک تراشه – Persian" lang="fa" hreflang="fa" data-title="سامانه روی یک تراشه" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Syst%C3%A8me_sur_une_puce" title="Système sur une puce – French" lang="fr" hreflang="fr" data-title="Système sur une puce" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EC%8B%9C%EC%8A%A4%ED%85%9C_%EC%98%A8_%EC%B9%A9" title="시스템 온 칩 – Korean" lang="ko" hreflang="ko" data-title="시스템 온 칩" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-hy mw-list-item"><a href="https://hy.wikipedia.org/wiki/%D5%80%D5%A1%D5%B4%D5%A1%D5%AF%D5%A1%D6%80%D5%A3_%D5%B9%D5%AB%D5%BA%D5%AB_%D5%BE%D6%80%D5%A1" title="Համակարգ չիպի վրա – Armenian" lang="hy" hreflang="hy" data-title="Համակարգ չիպի վրա" data-language-autonym="Հայերեն" data-language-local-name="Armenian" class="interlanguage-link-target"><span>Հայերեն</span></a></li><li class="interlanguage-link interwiki-id mw-list-item"><a href="https://id.wikipedia.org/wiki/Sistem_pada_sebuah_chip" title="Sistem pada sebuah chip – Indonesian" lang="id" hreflang="id" data-title="Sistem pada sebuah chip" data-language-autonym="Bahasa Indonesia" data-language-local-name="Indonesian" class="interlanguage-link-target"><span>Bahasa Indonesia</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/System-on-a-chip" title="System-on-a-chip – Italian" lang="it" hreflang="it" data-title="System-on-a-chip" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-he mw-list-item"><a href="https://he.wikipedia.org/wiki/%D7%9E%D7%A2%D7%A8%D7%9B%D7%AA_%D7%A2%D7%9C_%D7%A9%D7%91%D7%91" title="מערכת על שבב – Hebrew" lang="he" hreflang="he" data-title="מערכת על שבב" data-language-autonym="עברית" data-language-local-name="Hebrew" class="interlanguage-link-target"><span>עברית</span></a></li><li class="interlanguage-link interwiki-lv mw-list-item"><a href="https://lv.wikipedia.org/wiki/Vienkrist%C4%81lsh%C4%93ma" title="Vienkristālshēma – Latvian" lang="lv" hreflang="lv" data-title="Vienkristālshēma" data-language-autonym="Latviešu" data-language-local-name="Latvian" class="interlanguage-link-target"><span>Latviešu</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/Egylapk%C3%A1s_rendszer" title="Egylapkás rendszer – Hungarian" lang="hu" hreflang="hu" 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data-language-local-name="Romanian" class="interlanguage-link-target"><span>Română</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/%D0%A1%D0%B8%D1%81%D1%82%D0%B5%D0%BC%D0%B0_%D0%BD%D0%B0_%D0%BA%D1%80%D0%B8%D1%81%D1%82%D0%B0%D0%BB%D0%BB%D0%B5" title="Система на кристалле – Russian" lang="ru" hreflang="ru" data-title="Система на кристалле" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sco mw-list-item"><a href="https://sco.wikipedia.org/wiki/Seestem_on_a_chip" title="Seestem on a chip – Scots" lang="sco" hreflang="sco" data-title="Seestem on a chip" data-language-autonym="Scots" data-language-local-name="Scots" class="interlanguage-link-target"><span>Scots</span></a></li><li class="interlanguage-link interwiki-simple mw-list-item"><a href="https://simple.wikipedia.org/wiki/System_on_a_chip" title="System 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class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><p class="mw-empty-elt"> </p> <div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Micro-electronic component</div> <p class="mw-empty-elt"> </p> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Apple_M1.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/Apple_M1.jpg/220px-Apple_M1.jpg" decoding="async" width="220" height="262" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/Apple_M1.jpg/330px-Apple_M1.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/83/Apple_M1.jpg/440px-Apple_M1.jpg 2x" data-file-width="1248" data-file-height="1489" /></a><figcaption><a href="/wiki/Apple_M1" title="Apple M1">Apple M1</a> system on a chip</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Raspi_15807388763_6d259773fb_o.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/0/07/Raspi_15807388763_6d259773fb_o.png/220px-Raspi_15807388763_6d259773fb_o.png" decoding="async" width="220" height="146" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/0/07/Raspi_15807388763_6d259773fb_o.png/330px-Raspi_15807388763_6d259773fb_o.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/0/07/Raspi_15807388763_6d259773fb_o.png/440px-Raspi_15807388763_6d259773fb_o.png 2x" data-file-width="4000" data-file-height="2659" /></a><figcaption>A system on a chip from <a href="/wiki/Broadcom" title="Broadcom">Broadcom</a> in a <a href="/wiki/Raspberry_Pi" title="Raspberry Pi">Raspberry Pi</a></figcaption></figure> <p>A <b>system on a chip</b> or <b>system-on-chip</b> (<b>SoC</b> <span class="rt-commentedText nowrap"><span class="IPA nopopups noexcerpt" lang="en-fonipa"><a href="/wiki/Help:IPA/English" title="Help:IPA/English">/<span style="border-bottom:1px dotted"><span title="/ˌ/: secondary stress follows">ˌ</span><span title="/ˈ/: primary stress follows">ˈ</span><span title="/ɛ/: &#39;e&#39; in &#39;dress&#39;">ɛ</span><span title="&#39;s&#39; in &#39;sigh&#39;">s</span><span title="/oʊ/: &#39;o&#39; in &#39;code&#39;">oʊ</span><span title="&#39;s&#39; in &#39;sigh&#39;">s</span><span title="/iː/: &#39;ee&#39; in &#39;fleece&#39;">iː</span></span>/</a></span></span>; pl. <i>SoCs</i> <span class="rt-commentedText nowrap"><span class="IPA nopopups noexcerpt" lang="en-fonipa"><a href="/wiki/Help:IPA/English" title="Help:IPA/English">/<span style="border-bottom:1px dotted"><span title="/ˌ/: secondary stress follows">ˌ</span><span title="/ˈ/: primary stress follows">ˈ</span><span title="/ɛ/: &#39;e&#39; in &#39;dress&#39;">ɛ</span><span title="&#39;s&#39; in &#39;sigh&#39;">s</span><span title="/oʊ/: &#39;o&#39; in &#39;code&#39;">oʊ</span><span title="&#39;s&#39; in &#39;sigh&#39;">s</span><span title="/iː/: &#39;ee&#39; in &#39;fleece&#39;">iː</span><span title="&#39;z&#39; in &#39;zoom&#39;">z</span></span>/</a></span></span>) is an <a href="/wiki/Integrated_circuit" title="Integrated circuit">integrated circuit</a> that integrates most or all components of a <a href="/wiki/Computer" title="Computer">computer</a> or <a href="/wiki/Electronics" title="Electronics">electronic system</a>. These components usually include an on-chip <a href="/wiki/Central_processing_unit" title="Central processing unit">central processing unit</a> (CPU), <a href="/wiki/Computer_memory" title="Computer memory">memory</a> interfaces, <a href="/wiki/Input/output" title="Input/output">input/output</a> devices and interfaces, and <a href="/wiki/Computer_data_storage#Secondary_storage" title="Computer data storage">secondary storage</a> interfaces, often alongside other components such as <a href="/wiki/Radio_modem" title="Radio modem">radio modems</a> and a <a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">graphics processing unit</a> (GPU) &#8211; all on a single <a href="/wiki/Wafer_(electronics)" title="Wafer (electronics)">substrate</a> or microchip.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> SoCs may contain <a href="/wiki/Digital_signal_(electronics)" class="mw-redirect" title="Digital signal (electronics)">digital</a> and also <a href="/wiki/Analog_signal" title="Analog signal">analog</a>, <a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">mixed-signal</a> and often <a href="/wiki/Radio_frequency" title="Radio frequency">radio frequency</a> <a href="/wiki/Signal_processing" title="Signal processing">signal processing</a> functions (otherwise it may be considered on a discrete application processor). </p><p>High-performance SoCs are often paired with dedicated and physically separate memory and secondary storage (such as <a href="/wiki/LPDDR" title="LPDDR">LPDDR</a> and <a href="/wiki/Universal_Flash_Storage" title="Universal Flash Storage">eUFS</a> or <a href="/wiki/EMMC" class="mw-redirect" title="EMMC">eMMC</a>, respectively) chips that may be layered on top of the SoC in what is known as a <a href="/wiki/Package_on_package" class="mw-redirect" title="Package on package">package on package</a> (PoP) configuration, or be placed close to the SoC. Additionally, SoCs may use separate wireless <a href="/wiki/Modem" title="Modem">modems</a> (especially <a href="/wiki/WWAN" class="mw-redirect" title="WWAN">WWAN</a> modems).<sup id="cite_ref-QS_1_2-0" class="reference"><a href="#cite_note-QS_1-2"><span class="cite-bracket">&#91;</span>2<span class="cite-bracket">&#93;</span></a></sup> </p><p>An SoC <a href="/wiki/System_integration" title="System integration">integrates</a> a <a href="/wiki/Microcontroller" title="Microcontroller">microcontroller</a>, <a href="/wiki/Microprocessor" title="Microprocessor">microprocessor</a> or perhaps several processor cores with peripherals like a <a href="/wiki/GPU" class="mw-redirect" title="GPU">GPU</a>, <a href="/wiki/Wi-Fi" title="Wi-Fi">Wi-Fi</a> and <a href="/wiki/Cellular_network" title="Cellular network">cellular network</a> radio modems or one or more <a href="/wiki/Coprocessor" title="Coprocessor">coprocessors</a>. Similar to how a microcontroller integrates a microprocessor with peripheral circuits and memory, an SoC can be seen as integrating a microcontroller with even more advanced <a href="/wiki/Peripheral" title="Peripheral">peripherals</a>. </p><p>Compared to a multi-chip architecture, an SoC with equivalent functionality will have reduced <a href="/wiki/Power_consumption" class="mw-redirect" title="Power consumption">power consumption</a> as well as a smaller <a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">semiconductor die</a> area. This comes at the cost of reduced <a href="/wiki/Interchangeable_parts" title="Interchangeable parts">replaceability</a> of components. By definition, SoC designs are fully or nearly fully integrated across different component <a href="/wiki/Modularity" title="Modularity">modules</a>. For these reasons, there has been a general trend towards tighter integration of components in the <a href="/wiki/Semiconductor_industry" title="Semiconductor industry">computer hardware industry</a>, in part due to the influence of SoCs and lessons learned from the mobile and embedded computing markets. </p><p>SoCs are very common in the <a href="/wiki/Mobile_computing" title="Mobile computing">mobile computing</a> (as in <a href="/wiki/Smart_device" title="Smart device">smart devices</a> such as <a href="/wiki/Smartphones" class="mw-redirect" title="Smartphones">smartphones</a> and <a href="/wiki/Tablet_computer" title="Tablet computer">tablet computers</a>) and <a href="/wiki/Edge_computing" title="Edge computing">edge computing</a> markets.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">&#91;</span>4<span class="cite-bracket">&#93;</span></a></sup> </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Types">Types</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=1" title="Edit section: Types"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:ARMSoCBlockDiagram.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/85/ARMSoCBlockDiagram.svg/290px-ARMSoCBlockDiagram.svg.png" decoding="async" width="290" height="348" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/85/ARMSoCBlockDiagram.svg/435px-ARMSoCBlockDiagram.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/85/ARMSoCBlockDiagram.svg/580px-ARMSoCBlockDiagram.svg.png 2x" data-file-width="500" data-file-height="600" /></a><figcaption><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a>-based system on a chip</figcaption></figure> <p>In general, there are three distinguishable types of SoCs: </p> <ul><li>SoCs built around a <a href="/wiki/Microcontroller" title="Microcontroller">microcontroller</a>,</li> <li>SoCs built around a <a href="/wiki/Microprocessor" title="Microprocessor">microprocessor</a>, often found in mobile phones;</li> <li>Specialized <a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">application-specific integrated circuit</a> SoCs designed for specific applications that do not fit into the above two categories.</li></ul> <div class="mw-heading mw-heading2"><h2 id="Applications">Applications</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=2" title="Edit section: Applications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SoCs can be applied to any computing task. However, they are typically used in mobile computing such as tablets, smartphones, smartwatches, and netbooks as well as <a href="/wiki/Embedded_system" title="Embedded system">embedded systems</a> and in applications where previously <a href="/wiki/Microcontroller" title="Microcontroller">microcontrollers</a> would be used. </p> <div class="mw-heading mw-heading3"><h3 id="Embedded_systems">Embedded systems</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=3" title="Edit section: Embedded systems"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Where previously only microcontrollers could be used, SoCs are rising to prominence in the embedded systems market. Tighter system integration offers better reliability and <a href="/wiki/Mean_time_between_failures" title="Mean time between failures">mean time between failure</a>, and SoCs offer more advanced functionality and computing power than microcontrollers.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">&#91;</span>5<span class="cite-bracket">&#93;</span></a></sup> Applications include <a href="/wiki/AI_accelerator" title="AI accelerator">AI acceleration</a>, embedded <a href="/wiki/Machine_vision" title="Machine vision">machine vision</a>,<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">&#91;</span>6<span class="cite-bracket">&#93;</span></a></sup> <a href="/wiki/Data_collection" title="Data collection">data collection</a>, <a href="/wiki/Telemetry" title="Telemetry">telemetry</a>, <a href="/wiki/Vector_processing" class="mw-redirect" title="Vector processing">vector processing</a> and <a href="/wiki/Ambient_intelligence" title="Ambient intelligence">ambient intelligence</a>. Often embedded SoCs target the <a href="/wiki/Internet_of_things" title="Internet of things">internet of things</a>, multimedia, networking, telecommunications and <a href="/wiki/Edge_computing" title="Edge computing">edge computing</a> markets. Some examples of SoCs for embedded applications include: </p> <ul><li><a href="/wiki/AMD" title="AMD">AMD</a> <ul><li>Zynq 7000 SoC</li> <li>Zynq UltraScale+ MPSoC</li> <li>Zynq UltraScale+ RFSoC</li> <li>Versal Adaptive SoC</li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Mobile_computing">Mobile computing</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=4" title="Edit section: Mobile computing"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Nokia-9110-4.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/82/Nokia-9110-4.jpg/220px-Nokia-9110-4.jpg" decoding="async" width="220" height="169" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/82/Nokia-9110-4.jpg/330px-Nokia-9110-4.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/82/Nokia-9110-4.jpg/440px-Nokia-9110-4.jpg 2x" data-file-width="1000" data-file-height="769" /></a><figcaption>System on a chip <a href="/wiki/AMD_%C3%89lan" title="AMD Élan">AMD Élan</a> SC450 in <a href="/wiki/Nokia_9000_Communicator" title="Nokia 9000 Communicator">Nokia 9000 Communicator</a></figcaption></figure> <p><a href="/wiki/Mobile_computing" title="Mobile computing">Mobile computing</a> based SoCs always bundle processors, memories, on-chip <a href="/wiki/Cache_(computing)" title="Cache (computing)">caches</a>, <a href="/wiki/Wireless_networking" class="mw-redirect" title="Wireless networking">wireless networking</a> capabilities and often <a href="/wiki/Digital_camera" title="Digital camera">digital camera</a> hardware and firmware. With increasing memory sizes, high end SoCs will often have no memory and flash storage and instead, the memory and <a href="/wiki/Flash_memory" title="Flash memory">flash memory</a> will be placed right next to, or above (<a href="/wiki/Package_on_package" class="mw-redirect" title="Package on package">package on package</a>), the SoC.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">&#91;</span>7<span class="cite-bracket">&#93;</span></a></sup> Some examples of mobile computing SoCs include: </p> <ul><li><a href="/wiki/Samsung_Electronics" title="Samsung Electronics">Samsung Electronics</a>: <a href="/wiki/List_of_Samsung_System_on_Chips" class="mw-redirect" title="List of Samsung System on Chips">list</a>, typically based on <a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a> <ul><li><a href="/wiki/Exynos" title="Exynos">Exynos</a>, used mainly by Samsung's <a href="/wiki/Samsung_Galaxy" title="Samsung Galaxy">Galaxy</a> series of smartphones</li></ul></li> <li><a href="/wiki/Qualcomm" title="Qualcomm">Qualcomm</a>: <ul><li><a href="/wiki/Qualcomm_Snapdragon" title="Qualcomm Snapdragon">Snapdragon</a> (<a href="/wiki/List_of_Qualcomm_Snapdragon_systems-on-chip" class="mw-redirect" title="List of Qualcomm Snapdragon systems-on-chip">list</a>), used in many smartphones. In 2018, Snapdragon SoCs were being used as the backbone of <a href="/wiki/Laptop" title="Laptop">laptop computers</a> running <a href="/wiki/Windows_10" title="Windows 10">Windows 10</a>, marketed as "Always Connected PCs".<sup id="cite_ref-:3_8-0" class="reference"><a href="#cite_note-:3-8"><span class="cite-bracket">&#91;</span>8<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-:4_9-0" class="reference"><a href="#cite_note-:4-9"><span class="cite-bracket">&#91;</span>9<span class="cite-bracket">&#93;</span></a></sup></li></ul></li> <li><a href="/wiki/MediaTek" title="MediaTek">MediaTek</a>, typically based on ARM <ul><li><a href="/wiki/List_of_MediaTek_systems_on_chips" title="List of MediaTek systems on chips">Dimensity</a> &amp; Kompanio Series. Standalone application &amp; tablet processors that power devices such as Amazon Echo Show</li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Personal_computers">Personal computers</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=5" title="Edit section: Personal computers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In 1992, <a href="/wiki/Acorn_Computers" title="Acorn Computers">Acorn Computers</a> produced the <a href="/wiki/Acorn_Archimedes#New_range_and_a_laptop" title="Acorn Archimedes">A3010, A3020 and A4000 range of personal computers</a> with the ARM250 SoC. It combined the original Acorn ARM2 processor with a memory controller (MEMC), video controller (VIDC), and I/O controller (IOC). In previous Acorn <a href="/wiki/ARM_architecture" class="mw-redirect" title="ARM architecture">ARM</a>-powered computers, these were four discrete chips. The ARM7500 chip was their second-generation SoC, based on the ARM700, VIDC20 and IOMD controllers, and was widely licensed in embedded devices such as set-top-boxes, as well as later Acorn personal computers. </p><p>Tablet and laptop manufacturers have learned lessons from embedded systems and smartphone markets about reduced power consumption, better performance and reliability from tighter <a href="/wiki/System_integration" title="System integration">integration</a> of hardware and <a href="/wiki/Firmware" title="Firmware">firmware</a> <a href="/wiki/Module_system" class="mw-redirect" title="Module system">modules</a>, and <a href="/wiki/LTE_(telecommunication)" title="LTE (telecommunication)">LTE</a> and other <a href="/wiki/Wireless_network" title="Wireless network">wireless network</a> communications integrated on chip (integrated <a href="/wiki/Network_interface_controller" title="Network interface controller">network interface controllers</a>).<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">&#91;</span>10<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Structure">Structure</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=6" title="Edit section: Structure"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>An SoC consists of hardware <a href="/wiki/Functional_unit" class="mw-redirect" title="Functional unit">functional units</a>, including <a href="/wiki/Microprocessor" title="Microprocessor">microprocessors</a> that run <a href="/wiki/Computer_program" title="Computer program">software code</a>, as well as a <a href="/wiki/Communications_subsystem" class="mw-redirect" title="Communications subsystem">communications subsystem</a> to connect, control, direct and interface between these functional modules. </p> <div class="mw-heading mw-heading3"><h3 id="Functional_components">Functional components</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=7" title="Edit section: Functional components"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id="Processor_cores">Processor cores</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=8" title="Edit section: Processor cores"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>An SoC must have at least one <a href="/wiki/Processor_core" class="mw-redirect" title="Processor core">processor core</a>, but typically an SoC has more than one core. Processor cores can be a <a href="/wiki/Microcontroller" title="Microcontroller">microcontroller</a>, <a href="/wiki/Microprocessor" title="Microprocessor">microprocessor</a> (μP),<sup id="cite_ref-Furber_ARM_11-0" class="reference"><a href="#cite_note-Furber_ARM-11"><span class="cite-bracket">&#91;</span>11<span class="cite-bracket">&#93;</span></a></sup> <a href="/wiki/Digital_signal_processor" title="Digital signal processor">digital signal processor</a> (DSP) or <a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">application-specific instruction set processor</a> (ASIP) core.<sup id="cite_ref-:1_12-0" class="reference"><a href="#cite_note-:1-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup> ASIPs have <a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">instruction sets</a> that are customized for an <a href="/wiki/Application_domain" title="Application domain">application domain</a> and designed to be more efficient than general-purpose instructions for a specific type of workload. Multiprocessor SoCs have more than one processor core by definition. The <a href="/wiki/ARM_architecture" class="mw-redirect" title="ARM architecture">ARM architecture</a> is a common choice for SoC processor cores because some ARM-architecture cores are <a href="/wiki/Soft_microprocessor" title="Soft microprocessor">soft processors</a> specified as <a href="/wiki/IP_core" class="mw-redirect" title="IP core">IP cores</a>.<sup id="cite_ref-Furber_ARM_11-1" class="reference"><a href="#cite_note-Furber_ARM-11"><span class="cite-bracket">&#91;</span>11<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Memory">Memory</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=9" title="Edit section: Memory"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Further information: <a href="/wiki/Computer_memory" title="Computer memory">Computer memory</a></div> <p>SoCs must have <a href="/wiki/Semiconductor_memory" title="Semiconductor memory">semiconductor memory</a> blocks to perform their computation, as do <a href="/wiki/Microcontroller" title="Microcontroller">microcontrollers</a> and other <a href="/wiki/Embedded_system" title="Embedded system">embedded systems</a>. Depending on the application, SoC memory may form a <a href="/wiki/Memory_hierarchy" title="Memory hierarchy">memory hierarchy</a> and <a href="/wiki/Cache_hierarchy" title="Cache hierarchy">cache hierarchy</a>. In the mobile computing market, this is common, but in many <a href="/wiki/Low-power_electronics" title="Low-power electronics">low-power</a> embedded microcontrollers, this is not necessary. Memory technologies for SoCs include <a href="/wiki/Read-only_memory" title="Read-only memory">read-only memory</a> (ROM), <a href="/wiki/Random-access_memory" title="Random-access memory">random-access memory</a> (RAM), Electrically Erasable Programmable ROM (<a href="/wiki/EEPROM" title="EEPROM">EEPROM</a>) and <a href="/wiki/Flash_memory" title="Flash memory">flash memory</a>.<sup id="cite_ref-Furber_ARM_11-2" class="reference"><a href="#cite_note-Furber_ARM-11"><span class="cite-bracket">&#91;</span>11<span class="cite-bracket">&#93;</span></a></sup> As in other computer systems, RAM can be subdivided into relatively faster but more expensive <a href="/wiki/Static_random-access_memory" title="Static random-access memory">static RAM</a> (SRAM) and the slower but cheaper <a href="/wiki/Dynamic_random-access_memory" title="Dynamic random-access memory">dynamic RAM</a> (DRAM). When an SoC has a <a href="/wiki/Cache_(computing)" title="Cache (computing)">cache</a> hierarchy, SRAM will usually be used to implement <a href="/wiki/Processor_register" title="Processor register">processor registers</a> and cores' <a href="/wiki/CPU_cache" title="CPU cache">built-in caches</a> whereas DRAM will be used for <a href="/wiki/Main_memory" class="mw-redirect" title="Main memory">main memory</a>. "Main memory" may be specific to a single processor (which can be <a href="/wiki/Multi-core_processor" title="Multi-core processor">multi-core</a>) when the SoC <a href="/wiki/Multi-processor_system-on-chip" class="mw-redirect" title="Multi-processor system-on-chip">has multiple processors</a>, in this case it is <a href="/wiki/Distributed_memory" title="Distributed memory">distributed memory</a> and must be sent via <a href="#Intermodule_communication">§&#160;Intermodule communication</a> on-chip to be accessed by a different processor.<sup id="cite_ref-:1_12-1" class="reference"><a href="#cite_note-:1-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup> For further discussion of multi-processing memory issues, see <a href="/wiki/Cache_coherence" title="Cache coherence">cache coherence</a> and <a href="/wiki/Memory_latency" title="Memory latency">memory latency</a>. </p> <div class="mw-heading mw-heading4"><h4 id="Interfaces">Interfaces</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=10" title="Edit section: Interfaces"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SoCs include external <a href="/wiki/Electrical_connector" title="Electrical connector">interfaces</a>, typically for <a href="/wiki/Communication_protocol" title="Communication protocol">communication protocols</a>. These are often based upon industry standards such as <a href="/wiki/USB" title="USB">USB</a>, <a href="/wiki/Ethernet" title="Ethernet">Ethernet</a>, <a href="/wiki/Universal_synchronous_and_asynchronous_receiver-transmitter" title="Universal synchronous and asynchronous receiver-transmitter">USART</a>, <a href="/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface">SPI</a>, <a href="/wiki/HDMI" title="HDMI">HDMI</a>, <a href="/wiki/I%C2%B2C" title="I²C">I²C</a>, <a href="/wiki/Camera_Serial_Interface" title="Camera Serial Interface">CSI</a>, etc. These interfaces will differ according to the intended application. <a href="/wiki/Wireless_network" title="Wireless network">Wireless networking</a> protocols such as <a href="/wiki/Wi-Fi" title="Wi-Fi">Wi-Fi</a>, <a href="/wiki/Bluetooth" title="Bluetooth">Bluetooth</a>, <a href="/wiki/6LoWPAN" title="6LoWPAN">6LoWPAN</a> and <a href="/wiki/Near-field_communication" title="Near-field communication">near-field communication</a> may also be supported. </p><p>When needed, SoCs include <a href="/wiki/Analog_signal" title="Analog signal">analog</a> interfaces including <a href="/wiki/Analog-to-digital_converter" title="Analog-to-digital converter">analog-to-digital</a> and <a href="/wiki/Digital-to-analog_converter" title="Digital-to-analog converter">digital-to-analog converters</a>, often for <a href="/wiki/Signal_processing" title="Signal processing">signal processing</a>. These may be able to interface with different types of <a href="/wiki/Sensor" title="Sensor">sensors</a> or <a href="/wiki/Actuator" title="Actuator">actuators</a>, including <a href="/wiki/Smart_transducer" title="Smart transducer">smart transducers</a>. They may interface with application-specific <a href="/wiki/Modularity" title="Modularity">modules</a> or shields.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">&#91;</span>nb 1<span class="cite-bracket">&#93;</span></a></sup> Or they may be internal to the SoC, such as if an analog sensor is built in to the SoC and its readings must be converted to digital signals for mathematical processing. </p> <div class="mw-heading mw-heading4"><h4 id="Digital_signal_processors">Digital signal processors</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=11" title="Edit section: Digital signal processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP) cores are often included on SoCs. They perform <a href="/wiki/Signal_processing" title="Signal processing">signal processing</a> operations in SoCs for <a href="/wiki/Sensor" title="Sensor">sensors</a>, <a href="/wiki/Actuator" title="Actuator">actuators</a>, <a href="/wiki/Data_collection" title="Data collection">data collection</a>, <a href="/wiki/Data_analysis" title="Data analysis">data analysis</a> and multimedia processing. DSP cores typically feature <a href="/wiki/Very_long_instruction_word" title="Very long instruction word">very long instruction word</a> (VLIW) and <a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">single instruction, multiple data</a> (SIMD) <a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">instruction set architectures</a>, and are therefore highly amenable to exploiting <a href="/wiki/Instruction-level_parallelism" title="Instruction-level parallelism">instruction-level parallelism</a> through <a href="/wiki/Parallel_processing_(DSP_implementation)" title="Parallel processing (DSP implementation)">parallel processing</a> and <a href="/wiki/Superscalar_execution" class="mw-redirect" title="Superscalar execution">superscalar execution</a>.<sup id="cite_ref-:1_12-2" class="reference"><a href="#cite_note-:1-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: 4">&#58;&#8202;4&#8202;</span></sup> SP cores most often feature application-specific instructions, and as such are typically <a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">application-specific instruction set processors</a> (ASIP). Such application-specific instructions correspond to dedicated hardware <a href="/wiki/Functional_unit" class="mw-redirect" title="Functional unit">functional units</a> that compute those instructions. </p><p>Typical DSP instructions include <a href="/wiki/Multiply%E2%80%93accumulate_operation" title="Multiply–accumulate operation">multiply-accumulate</a>, <a href="/wiki/Fast_Fourier_transform" title="Fast Fourier transform">Fast Fourier transform</a>, <a href="/wiki/Fused_multiply-accumulate" class="mw-redirect" title="Fused multiply-accumulate">fused multiply-add</a>, and <a href="/wiki/Convolution" title="Convolution">convolutions</a>. </p> <div class="mw-heading mw-heading4"><h4 id="Other">Other</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=12" title="Edit section: Other"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>As with other computer systems, SoCs require <a href="/wiki/Clock_generator" title="Clock generator">timing sources</a> to generate <a href="/wiki/Clock_signal" title="Clock signal">clock signals</a>, control execution of SoC functions and provide time context to <a href="/wiki/Signal_processing" title="Signal processing">signal processing</a> applications of the SoC, if needed. Popular time sources are <a href="/wiki/Crystal_oscillators" class="mw-redirect" title="Crystal oscillators">crystal oscillators</a> and <a href="/wiki/Phase-locked_loop" title="Phase-locked loop">phase-locked loops</a>. </p><p>SoC <a href="/wiki/Peripheral" title="Peripheral">peripherals</a> including <a href="/wiki/Counter_(digital)" title="Counter (digital)">counter</a>-timers, real-time <a href="/wiki/Timer" title="Timer">timers</a> and <a href="/wiki/Power-on_reset" title="Power-on reset">power-on reset</a> generators. SoCs also include <a href="/wiki/Voltage_regulator" title="Voltage regulator">voltage regulators</a> and <a href="/wiki/Power_management" title="Power management">power management</a> circuits. </p> <div class="mw-heading mw-heading3"><h3 id="Intermodule_communication">Intermodule communication</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=13" title="Edit section: Intermodule communication"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SoCs comprise many <a href="/wiki/Execution_unit" title="Execution unit">execution units</a>. These units must often send data and <a href="/wiki/Instruction_(computing)" class="mw-redirect" title="Instruction (computing)">instructions</a> back and forth. Because of this, all but the most trivial SoCs require <a href="/wiki/Communications_system" title="Communications system">communications subsystems</a>. Originally, as with other <a href="/wiki/Microcomputer" title="Microcomputer">microcomputer</a> technologies, <a href="/wiki/Bus_(computing)" title="Bus (computing)">data bus</a> architectures were used, but recently designs based on sparse intercommunication networks known as <a href="/wiki/Network_on_a_chip" title="Network on a chip">networks-on-chip</a> (NoC) have risen to prominence and are forecast to overtake bus architectures for SoC design in the near future.<sup id="cite_ref-:0_14-0" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Bus-based_communication">Bus-based communication</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=14" title="Edit section: Bus-based communication"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Historically, a shared global <a href="/wiki/Bus_(computing)" title="Bus (computing)">computer bus</a> typically connected the different components, also called "blocks" of the SoC.<sup id="cite_ref-:0_14-1" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup> A very common bus for SoC communications is ARM's royalty-free Advanced Microcontroller Bus Architecture (<a href="/wiki/Advanced_Microcontroller_Bus_Architecture" title="Advanced Microcontroller Bus Architecture">AMBA</a>) standard. </p><p><a href="/wiki/Direct_memory_access" title="Direct memory access">Direct memory access</a> controllers route data directly between external interfaces and SoC memory, bypassing the CPU or <a href="/wiki/Control_unit" title="Control unit">control unit</a>, thereby increasing the data <a href="/wiki/Throughput" class="mw-redirect" title="Throughput">throughput</a> of the SoC. This is similar to some <a href="/wiki/Device_driver" title="Device driver">device drivers</a> of peripherals on component-based <a href="/wiki/Multi-chip_module" title="Multi-chip module">multi-chip module</a> PC architectures. </p><p>Wire delay is not scalable due to continued <a href="/wiki/Miniaturization" title="Miniaturization">miniaturization</a>, <a href="/wiki/Computer_performance" title="Computer performance">system performance</a> does not scale with the number of cores attached, the SoC's <a href="/wiki/Operating_frequency" class="mw-redirect" title="Operating frequency">operating frequency</a> must decrease with each additional core attached for power to be sustainable, and long wires consume large amounts of electrical power. These challenges are prohibitive to supporting <a href="/wiki/Manycore" class="mw-redirect" title="Manycore">manycore</a> systems on chip.<sup id="cite_ref-:0_14-2" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: xiii">&#58;&#8202;xiii&#8202;</span></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Network_on_a_chip">Network on a chip</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=15" title="Edit section: Network on a chip"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></div> <p>In the late 2010s, a trend of SoCs implementing <a href="/wiki/Communications_subsystem" class="mw-redirect" title="Communications subsystem">communications subsystems</a> in terms of a network-like topology instead of <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus-based</a> protocols has emerged. A trend towards <a href="/wiki/Multi-processor_system-on-chip" class="mw-redirect" title="Multi-processor system-on-chip">more processor cores on SoCs</a> has caused on-chip communication efficiency to become one of the key factors in determining the overall system performance and cost.<sup id="cite_ref-:0_14-3" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: xiii">&#58;&#8202;xiii&#8202;</span></sup> This has led to the emergence of interconnection networks with <a href="/wiki/Router_(computing)" title="Router (computing)">router</a>-based <a href="/wiki/Packet_switching" title="Packet switching">packet switching</a> known as "<a href="/wiki/Network_on_a_chip" title="Network on a chip">networks on chip</a>" (NoCs) to overcome the <a href="/wiki/Bottleneck_(engineering)" title="Bottleneck (engineering)">bottlenecks</a> of bus-based networks.<sup id="cite_ref-:0_14-4" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: xiii">&#58;&#8202;xiii&#8202;</span></sup> </p><p>Networks-on-chip have advantages including destination- and application-specific <a href="/wiki/Routing" title="Routing">routing</a>, greater power efficiency and reduced possibility of <a href="/wiki/Bus_contention" title="Bus contention">bus contention</a>. Network-on-chip architectures take inspiration from <a href="/wiki/Communication_protocols" class="mw-redirect" title="Communication protocols">communication protocols</a> like <a href="/wiki/Transmission_Control_Protocol" title="Transmission Control Protocol">TCP</a> and the <a href="/wiki/Internet_protocol_suite" title="Internet protocol suite">Internet protocol suite</a> for on-chip communication,<sup id="cite_ref-:0_14-5" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup> although they typically have fewer <a href="/wiki/Network_layer" title="Network layer">network layers</a>. Optimal network-on-chip <a href="/wiki/Network_architecture" title="Network architecture">network architectures</a> are an ongoing area of much research interest. NoC architectures range from traditional distributed computing <a href="/wiki/Network_topology" title="Network topology">network topologies</a> such as <a href="/wiki/Torus_interconnect" title="Torus interconnect">torus</a>, <a href="/wiki/Hypercube_internetwork_topology" title="Hypercube internetwork topology">hypercube</a>, <a href="/wiki/Mesh_networking" title="Mesh networking">meshes</a> and <a href="/wiki/Tree_network" title="Tree network">tree networks</a> to <a href="/wiki/Genetic_algorithm_scheduling" title="Genetic algorithm scheduling">genetic algorithm scheduling</a> to <a href="/wiki/Randomized_algorithm" title="Randomized algorithm">randomized algorithms</a> such as <a href="/wiki/Branching_random_walk" title="Branching random walk">random walks with branching</a> and randomized <a href="/wiki/Time_to_live" title="Time to live">time to live</a> (TTL). </p><p>Many SoC researchers consider NoC architectures to be the future of SoC design because they have been shown to efficiently meet power and throughput needs of SoC designs. Current NoC architectures are two-dimensional. 2D IC design has limited <a href="/wiki/Floorplan_(microelectronics)" title="Floorplan (microelectronics)">floorplanning</a> choices as the number of cores in SoCs increase, so as <a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">three-dimensional integrated circuits</a> (3DICs) emerge, SoC designers are looking towards building three-dimensional on-chip networks known as 3DNoCs.<sup id="cite_ref-:0_14-6" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Design_flow">Design flow</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=16" title="Edit section: Design flow"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-More_citations_needed_section plainlinks metadata ambox ambox-content ambox-Refimprove" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Question_book-new.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs additional citations for <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">verification</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/System_on_a_chip" title="Special:EditPage/System on a chip">improve this article</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>&#32;in this section. Unsourced material may be challenged and removed.</span> <span class="date-container"><i>(<span class="date">March 2017</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main articles: <a href="/wiki/Design_flow_(EDA)" title="Design flow (EDA)">Electronics design flow</a>, <a href="/wiki/Physical_design_(electronics)" title="Physical design (electronics)">Physical design (electronics)</a>, and <a href="/wiki/Platform-based_design" title="Platform-based design">Platform-based design</a></div><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/Systems_design" title="Systems design">Systems design</a> and <a href="/wiki/Software_design" title="Software design">Software design process</a></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:SoCDesignFlow.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/5/58/SoCDesignFlow.svg/290px-SoCDesignFlow.svg.png" decoding="async" width="290" height="359" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/5/58/SoCDesignFlow.svg/435px-SoCDesignFlow.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/5/58/SoCDesignFlow.svg/580px-SoCDesignFlow.svg.png 2x" data-file-width="560" data-file-height="693" /></a><figcaption>SoC design flow</figcaption></figure> <p>A system on a chip consists of both the <a href="/wiki/Electronic_hardware" title="Electronic hardware">hardware</a>, described in <a href="#Structure">§&#160;Structure</a>, and the software controlling the microcontroller, microprocessor or digital signal processor cores, peripherals and interfaces. The <a href="/wiki/Design_flow_(EDA)" title="Design flow (EDA)">design flow</a> for an SoC aims to develop this hardware and software at the same time, also known as architectural co-design. The design flow must also take into account optimizations (<a href="#Optimization_goals">§&#160;Optimization goals</a>) and constraints. </p><p>Most SoCs are developed from pre-qualified hardware component <a href="/wiki/Semiconductor_intellectual_property_core" title="Semiconductor intellectual property core">IP core specifications</a> for the hardware elements and <a href="/wiki/Execution_unit" title="Execution unit">execution units</a>, collectively "blocks", described above, together with software <a href="/wiki/Device_driver" title="Device driver">device drivers</a> that may control their operation. Of particular importance are the <a href="/wiki/Protocol_stack" title="Protocol stack">protocol stacks</a> that drive industry-standard interfaces like <a href="/wiki/Universal_Serial_Bus" class="mw-redirect" title="Universal Serial Bus">USB</a>. The hardware blocks are put together using <a href="/wiki/Computer-aided_design" title="Computer-aided design">computer-aided design</a> tools, specifically <a href="/wiki/Electronic_design_automation" title="Electronic design automation">electronic design automation</a> tools; the <a href="/wiki/Modular_programming" title="Modular programming">software modules</a> are integrated using a software <a href="/wiki/Integrated_development_environment" title="Integrated development environment">integrated development environment</a>. </p><p>SoCs components are also often designed in <a href="/wiki/High-level_programming_language" title="High-level programming language">high-level programming languages</a> such as <a href="/wiki/C%2B%2B" title="C++">C++</a>, <a href="/wiki/MATLAB" title="MATLAB">MATLAB</a> or <a href="/wiki/SystemC" title="SystemC">SystemC</a> and converted to <a href="/wiki/Register-transfer_level" title="Register-transfer level">RTL</a> designs through <a href="/wiki/High-level_synthesis" title="High-level synthesis">high-level synthesis</a> (HLS) tools such as <a href="/wiki/C_to_HDL" title="C to HDL">C to HDL</a> or <a href="/wiki/Flow_to_HDL" title="Flow to HDL">flow to HDL</a>.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">&#91;</span>14<span class="cite-bracket">&#93;</span></a></sup> HLS products called "algorithmic synthesis" allow designers to use C++ to model and synthesize system, circuit, software and verification levels all in one high level language commonly known to <a href="/wiki/Computer_engineers" class="mw-redirect" title="Computer engineers">computer engineers</a> in a manner independent of time scales, which are typically specified in HDL.<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">&#91;</span>15<span class="cite-bracket">&#93;</span></a></sup> Other components can remain software and be compiled and embedded onto <a href="/wiki/Soft_microprocessor" title="Soft microprocessor">soft-core processors</a> included in the SoC as modules in HDL as <a href="/wiki/Semiconductor_intellectual_property_core" title="Semiconductor intellectual property core">IP cores</a>. </p><p>Once the <a href="/wiki/Computer_architecture" title="Computer architecture">architecture</a> of the SoC has been defined, any new hardware elements are written in an abstract <a href="/wiki/Hardware_description_language" title="Hardware description language">hardware description language</a> termed <a href="/wiki/Register-transfer_level" title="Register-transfer level">register transfer level</a> (RTL) which defines the circuit behavior, or synthesized into RTL from a high level language through high-level synthesis. These elements are connected together in a hardware description language to create the full SoC design. The logic specified to connect these components and convert between possibly different interfaces provided by different vendors is called <a href="/wiki/Glue_logic" title="Glue logic">glue logic</a>. </p> <div class="mw-heading mw-heading3"><h3 id="Design_verification">Design verification</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=17" title="Edit section: Design verification"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Further information: <a href="/wiki/Functional_verification" title="Functional verification">Functional verification</a> and <a href="/wiki/Signoff_(electronic_design_automation)" title="Signoff (electronic design automation)">Signoff (electronic design automation)</a></div> <p>Chips are verified for validation correctness before being sent to a <a href="/wiki/Semiconductor_fabrication_plant" title="Semiconductor fabrication plant">semiconductor foundry</a>. This process is called <a href="/wiki/Functional_verification" title="Functional verification">functional verification</a> and it accounts for a significant portion of the time and energy expended in the <a href="/wiki/Integrated_circuit_development" class="mw-redirect" title="Integrated circuit development">chip design life cycle</a>, often quoted as 70%.<sup id="cite_ref-70%_verification?_17-0" class="reference"><a href="#cite_note-70%_verification?-17"><span class="cite-bracket">&#91;</span>16<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-verification_vs._validation_18-0" class="reference"><a href="#cite_note-verification_vs._validation-18"><span class="cite-bracket">&#91;</span>17<span class="cite-bracket">&#93;</span></a></sup> With the growing complexity of chips, <a href="/wiki/Hardware_verification_language" title="Hardware verification language">hardware verification languages</a> like <a href="/wiki/SystemVerilog" title="SystemVerilog">SystemVerilog</a>, <a href="/wiki/SystemC" title="SystemC">SystemC</a>, <a href="/wiki/E_(verification_language)" title="E (verification language)">e</a>, and OpenVera are being used. <a href="/wiki/Software_bug" title="Software bug">Bugs</a> found in the verification stage are reported to the designer. </p><p>Traditionally, engineers have employed simulation acceleration, <a href="/wiki/Emulator" title="Emulator">emulation</a> or prototyping on <a href="/wiki/Reconfigurable_computing" title="Reconfigurable computing">reprogrammable hardware</a> to verify and debug hardware and software for SoC designs prior to the finalization of the design, known as <a href="/wiki/Tape-out" title="Tape-out">tape-out</a>. <a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">Field-programmable gate arrays</a> (FPGAs) are favored for prototyping SoCs because <a href="/wiki/FPGA_prototyping" title="FPGA prototyping">FPGA prototypes</a> are reprogrammable, allow <a href="/wiki/Debugging" title="Debugging">debugging</a> and are more flexible than <a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">application-specific integrated circuits</a> (ASICs).<sup id="cite_ref-nm_prototyping_19-0" class="reference"><a href="#cite_note-nm_prototyping-19"><span class="cite-bracket">&#91;</span>18<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-Reason_to_debug_in_FPGA_20-0" class="reference"><a href="#cite_note-Reason_to_debug_in_FPGA-20"><span class="cite-bracket">&#91;</span>19<span class="cite-bracket">&#93;</span></a></sup> </p><p>With high capacity and fast compilation time, simulation acceleration and emulation are powerful technologies that provide wide visibility into systems. Both technologies, however, operate slowly, on the order of MHz, which may be significantly slower – up to 100 times slower – than the SoC's operating frequency. Acceleration and emulation boxes are also very large and expensive at over US$1&#160;million.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (May 2018)">citation needed</span></a></i>&#93;</sup> </p><p>FPGA prototypes, in contrast, use FPGAs directly to enable engineers to validate and test at, or close to, a system's full operating frequency with real-world stimuli. Tools such as Certus<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">&#91;</span>20<span class="cite-bracket">&#93;</span></a></sup> are used to insert probes in the FPGA RTL that make signals available for observation. This is used to debug hardware, firmware and software interactions across multiple FPGAs with capabilities similar to a logic analyzer. </p><p>In parallel, the hardware elements are grouped and passed through a process of <a href="/wiki/Logic_synthesis" title="Logic synthesis">logic synthesis</a>, during which performance constraints, such as operational frequency and expected signal delays, are applied. This generates an output known as a <a href="/wiki/Netlist" title="Netlist">netlist</a> describing the design as a physical circuit and its interconnections. These netlists are combined with the <a href="/wiki/Glue_logic" title="Glue logic">glue logic</a> connecting the components to produce the schematic description of the SoC as a circuit which can be <a href="/wiki/Printed_circuit_board" title="Printed circuit board">printed</a> onto a chip. This process is known as <a href="/wiki/Place_and_route" title="Place and route">place and route</a> and precedes <a href="/wiki/Tape-out" title="Tape-out">tape-out</a> in the event that the SoCs are produced as <a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">application-specific integrated circuits</a> (ASIC). </p> <div class="mw-heading mw-heading2"><h2 id="Optimization_goals">Optimization goals</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=18" title="Edit section: Optimization goals"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SoCs must optimize <a href="/wiki/Power_consumption" class="mw-redirect" title="Power consumption">power use</a>, area on <a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">die</a>, communication, positioning for <a href="/wiki/Locality_of_reference" title="Locality of reference">locality</a> between modular units and other factors. Optimization is necessarily a design goal of SoCs. If optimization was not necessary, the engineers would use a <a href="/wiki/Multi-chip_module" title="Multi-chip module">multi-chip module</a> architecture without accounting for the area use, power consumption or performance of the system to the same extent. </p><p>Common optimization targets for SoC designs follow, with explanations of each. In general, optimizing any of these quantities may be a hard <a href="/wiki/Combinatorial_optimization" title="Combinatorial optimization">combinatorial optimization</a> problem, and can indeed be <a href="/wiki/NP-hardness" title="NP-hardness">NP-hard</a> fairly easily. Therefore, sophisticated <a href="/wiki/Optimization_algorithm" class="mw-redirect" title="Optimization algorithm">optimization algorithms</a> are often required and it may be practical to use <a href="/wiki/Approximation_algorithm" title="Approximation algorithm">approximation algorithms</a> or <a href="/wiki/Heuristic_(computer_science)" title="Heuristic (computer science)">heuristics</a> in some cases. Additionally, most SoC designs contain <a href="/wiki/Multivariate_optimization" class="mw-redirect" title="Multivariate optimization">multiple variables to optimize simultaneously</a>, so <a href="/wiki/Pareto_efficiency" title="Pareto efficiency">Pareto efficient</a> solutions are sought after in SoC design. Oftentimes the goals of optimizing some of these quantities are directly at odds, further adding complexity to design optimization of SoCs and introducing <a href="/wiki/Trade-off#Engineering" title="Trade-off">trade-offs</a> in system design. </p><p>For broader coverage of trade-offs and <a href="/wiki/Requirements_analysis" title="Requirements analysis">requirements analysis</a>, see <a href="/wiki/Requirements_engineering" title="Requirements engineering">requirements engineering</a>. </p> <div class="mw-heading mw-heading3"><h3 id="Targets">Targets</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=19" title="Edit section: Targets"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading4"><h4 id="Power_consumption">Power consumption</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=20" title="Edit section: Power consumption"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SoCs are optimized to minimize the <a href="/wiki/Electric_power#Definition" title="Electric power">electrical power</a> used to perform the SoC's functions. Most SoCs must use low power. SoC systems often require long <a href="/wiki/Battery_life" class="mw-redirect" title="Battery life">battery life</a> (such as <a href="/wiki/Smartphone" title="Smartphone">smartphones</a>), can potentially spend months or years without a power source while needing to maintain autonomous function, and often are limited in power use by a high number of <a href="/wiki/Embedded_system" title="Embedded system">embedded</a> SoCs being <a href="/wiki/Distributed_computing" title="Distributed computing">networked together</a> in an area. Additionally, energy costs can be high and conserving energy will reduce the <a href="/wiki/Total_cost_of_ownership" title="Total cost of ownership">total cost of ownership</a> of the SoC. Finally, <a href="/wiki/Waste_heat" title="Waste heat">waste heat</a> from high energy consumption can damage other circuit components if too much heat is dissipated, giving another pragmatic reason to conserve energy. The amount of energy used in a circuit is the <a href="/wiki/Integral" title="Integral">integral</a> of <a href="/wiki/Power_(physics)" title="Power (physics)">power</a> consumed with respect to time, and the <a href="/wiki/Mean_value_theorem" title="Mean value theorem">average rate</a> of power consumption is the product of <a href="/wiki/Electric_current" title="Electric current">current</a> by <a href="/wiki/Voltage" title="Voltage">voltage</a>. Equivalently, by <a href="/wiki/Ohm%27s_law" title="Ohm&#39;s law">Ohm's law</a>, power is current squared times resistance or voltage squared divided by <a href="/wiki/Resistance_(physics)" class="mw-redirect" title="Resistance (physics)">resistance</a>: </p><p><span class="mwe-math-element"><span class="mwe-math-mathml-display mwe-math-mathml-a11y" style="display: none;"><math display="block" xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle P=IV={\frac {V^{2}}{R}}={I^{2}}{R}}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mi>P</mi> <mo>=</mo> <mi>I</mi> <mi>V</mi> <mo>=</mo> <mrow class="MJX-TeXAtom-ORD"> <mfrac> <msup> <mi>V</mi> <mrow class="MJX-TeXAtom-ORD"> <mn>2</mn> </mrow> </msup> <mi>R</mi> </mfrac> </mrow> <mo>=</mo> <mrow class="MJX-TeXAtom-ORD"> <msup> <mi>I</mi> <mrow class="MJX-TeXAtom-ORD"> <mn>2</mn> </mrow> </msup> </mrow> <mrow class="MJX-TeXAtom-ORD"> <mi>R</mi> </mrow> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle P=IV={\frac {V^{2}}{R}}={I^{2}}{R}}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/b7ea74b4b52b63f4bf75bcf2eaeecd3c8333bb32" class="mwe-math-fallback-image-display mw-invert skin-invert" aria-hidden="true" style="vertical-align: -2.005ex; width:21.842ex; height:5.843ex;" alt="{\displaystyle P=IV={\frac {V^{2}}{R}}={I^{2}}{R}}"></span>SoCs are frequently embedded in <a href="/wiki/Mobile_device" title="Mobile device">portable devices</a> such as <a href="/wiki/Smartphones" class="mw-redirect" title="Smartphones">smartphones</a>, <a href="/wiki/GPS_navigation_device" class="mw-redirect" title="GPS navigation device">GPS navigation devices</a>, digital <a href="/wiki/Digital_watch" class="mw-redirect" title="Digital watch">watches</a> (including <a href="/wiki/Smartwatch" title="Smartwatch">smartwatches</a>) and <a href="/wiki/Netbook" title="Netbook">netbooks</a>. Customers want long battery lives for <a href="/wiki/Mobile_computing" title="Mobile computing">mobile computing</a> devices, another reason that power consumption must be minimized in SoCs. <a href="/wiki/Multimedia_application" class="mw-redirect" title="Multimedia application">Multimedia applications</a> are often executed on these devices, including video games, <a href="/wiki/Video_streaming" class="mw-redirect" title="Video streaming">video streaming</a>, <a href="/wiki/Image_processing" class="mw-redirect" title="Image processing">image processing</a>; all of which have grown in <a href="/wiki/Computational_complexity" title="Computational complexity">computational complexity</a> in recent years with user demands and expectations for higher-<a href="/wiki/Video_quality" title="Video quality">quality</a> multimedia. Computation is more demanding as expectations move towards <a href="/wiki/3D_video" class="mw-redirect" title="3D video">3D video</a> at <a href="/wiki/High_resolution" class="mw-redirect" title="High resolution">high resolution</a> with <a href="/wiki/List_of_video_compression_formats" class="mw-redirect" title="List of video compression formats">multiple standards</a>, so SoCs performing multimedia tasks must be computationally capable platform while being low power to run off a standard mobile battery.<sup id="cite_ref-:1_12-3" class="reference"><a href="#cite_note-:1-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: 3">&#58;&#8202;3&#8202;</span></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Performance_per_watt">Performance per watt</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=21" title="Edit section: Performance per watt"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/Green_computing" title="Green computing">Green computing</a></div> <p>SoCs are optimized to maximize <a href="/wiki/Power_efficiency" class="mw-redirect" title="Power efficiency">power efficiency</a> in performance per watt: maximize the performance of the SoC given a budget of power usage. Many applications such as <a href="/wiki/Edge_computing" title="Edge computing">edge computing</a>, <a href="/wiki/Distributed_processing" class="mw-redirect" title="Distributed processing">distributed processing</a> and <a href="/wiki/Ambient_intelligence" title="Ambient intelligence">ambient intelligence</a> require a certain level of <a href="/wiki/Computer_performance" title="Computer performance">computational performance</a>, but power is limited in most SoC environments. </p> <div class="mw-heading mw-heading4"><h4 id="Waste_heat">Waste heat</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=22" title="Edit section: Waste heat"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Heat_generation_in_integrated_circuits" title="Heat generation in integrated circuits">Heat generation in integrated circuits</a></div><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/Thermal_management_(electronics)" title="Thermal management (electronics)">Thermal management in electronics</a> and <a href="/wiki/Thermal_design_power" title="Thermal design power">Thermal design power</a></div> <p>SoC designs are optimized to minimize <a href="/wiki/Waste_heat" title="Waste heat">waste heat</a> <a href="/wiki/Dissipation" title="Dissipation">output</a> on the chip. As with other <a href="/wiki/Integrated_circuit" title="Integrated circuit">integrated circuits</a>, heat generated due to high <a href="/wiki/Power_density" title="Power density">power density</a> are the <a href="/wiki/Bottleneck_(engineering)" title="Bottleneck (engineering)">bottleneck</a> to further <a href="/wiki/Miniaturization" title="Miniaturization">miniaturization</a> of components.<sup id="cite_ref-:2_22-0" class="reference"><a href="#cite_note-:2-22"><span class="cite-bracket">&#91;</span>21<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: 1">&#58;&#8202;1&#8202;</span></sup> The power densities of high speed integrated circuits, particularly microprocessors and including SoCs, have become highly uneven. Too much waste heat can damage circuits and erode <a href="/wiki/Reliability_(semiconductor)" title="Reliability (semiconductor)">reliability</a> of the circuit over time. High temperatures and thermal stress negatively impact reliability, <a href="/wiki/Stress_migration" title="Stress migration">stress migration</a>, decreased <a href="/wiki/Mean_time_between_failures" title="Mean time between failures">mean time between failures</a>, <a href="/wiki/Electromigration" title="Electromigration">electromigration</a>, <a href="/wiki/Wire_bonding" title="Wire bonding">wire bonding</a>, <a href="/wiki/Metastability_(electronics)" title="Metastability (electronics)">metastability</a> and other performance degradation of the SoC over time.<sup id="cite_ref-:2_22-1" class="reference"><a href="#cite_note-:2-22"><span class="cite-bracket">&#91;</span>21<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: 2–9">&#58;&#8202;2–9&#8202;</span></sup> </p><p>In particular, most SoCs are in a small physical area or volume and therefore the effects of waste heat are compounded because there is little room for it to diffuse out of the system. Because of high <a href="/wiki/Transistor_count" title="Transistor count">transistor counts</a> on modern devices, oftentimes a layout of sufficient throughput and high <a href="/wiki/Transistors_density" class="mw-redirect" title="Transistors density">transistor density</a> is physically realizable from <a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">fabrication processes</a> but would result in unacceptably high amounts of heat in the circuit's volume.<sup id="cite_ref-:2_22-2" class="reference"><a href="#cite_note-:2-22"><span class="cite-bracket">&#91;</span>21<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: 1">&#58;&#8202;1&#8202;</span></sup> </p><p>These thermal effects force SoC and other chip designers to apply conservative <a href="/wiki/Design_margin" class="mw-redirect" title="Design margin">design margins</a>, creating less performant devices to mitigate the risk of <a href="/wiki/Catastrophic_failure" title="Catastrophic failure">catastrophic failure</a>. Due to increased <a href="/wiki/Transistors_density" class="mw-redirect" title="Transistors density">transistor densities</a> as length scales get smaller, each <a href="/wiki/Semiconductor_node" class="mw-redirect" title="Semiconductor node">process generation</a> produces more heat output than the last. Compounding this problem, SoC architectures are usually heterogeneous, creating spatially inhomogeneous <a href="/wiki/Heat_flux" title="Heat flux">heat fluxes</a>, which cannot be effectively mitigated by uniform <a href="/wiki/Passive_cooling" title="Passive cooling">passive cooling</a>.<sup id="cite_ref-:2_22-3" class="reference"><a href="#cite_note-:2-22"><span class="cite-bracket">&#91;</span>21<span class="cite-bracket">&#93;</span></a></sup><sup class="reference nowrap"><span title="Page / location: 1">&#58;&#8202;1&#8202;</span></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Throughput">Throughput</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=23" title="Edit section: Throughput"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2018</span>)</i></span></div></td></tr></tbody></table> <p>SoCs are optimized to maximize computational and communications <a href="/wiki/Throughput" class="mw-redirect" title="Throughput">throughput</a>. </p> <div class="mw-heading mw-heading4"><h4 id="Latency">Latency</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=24" title="Edit section: Latency"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2018</span>)</i></span></div></td></tr></tbody></table> <p>SoCs are optimized to minimize <a href="/wiki/Latency_(engineering)" title="Latency (engineering)">latency</a> for some or all of their functions. This can be accomplished by <a href="/wiki/Integrated_circuit_layout" title="Integrated circuit layout">laying out</a> elements with proper proximity and <a href="/wiki/Locality_of_reference" title="Locality of reference">locality</a> to each-other to minimize the interconnection delays and maximize the speed at which data is communicated between modules, <a href="/wiki/Execution_unit" title="Execution unit">functional units</a> and memories. In general, optimizing to minimize latency is an <a href="/wiki/NP-completeness" title="NP-completeness">NP-complete</a> problem equivalent to the <a href="/wiki/Boolean_satisfiability_problem" title="Boolean satisfiability problem">Boolean satisfiability problem</a>. </p><p>For <a href="/wiki/Task_(computing)" title="Task (computing)">tasks</a> running on processor cores, latency and throughput can be improved with <a href="/wiki/Scheduling_(computing)" title="Scheduling (computing)">task scheduling</a>. Some tasks run in application-specific hardware units, however, and even task scheduling may not be sufficient to optimize all software-based tasks to meet timing and throughput constraints. </p> <div class="mw-heading mw-heading3"><h3 id="Methodologies">Methodologies</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=25" title="Edit section: Methodologies"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Further information: <a href="/wiki/Multi-objective_optimization" title="Multi-objective optimization">Multi-objective optimization</a>, <a href="/wiki/Multiple-criteria_decision_analysis" title="Multiple-criteria decision analysis">Multiple-criteria decision analysis</a>, and <a href="/wiki/Architecture_tradeoff_analysis_method" title="Architecture tradeoff analysis method">Architecture tradeoff analysis</a></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-Expand_section plainlinks metadata ambox ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/44px-Wiki_letter_w_cropped.svg.png" decoding="async" width="44" height="31" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/66px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/88px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2018</span>)</i></span></div></td></tr></tbody></table> <p>Systems on chip are modeled with standard hardware <a href="/wiki/Verification_and_validation" title="Verification and validation">verification and validation</a> techniques, but additional techniques are used to model and optimize SoC design alternatives to make the system optimal with respect to <a href="/wiki/Multiple-criteria_decision_analysis" title="Multiple-criteria decision analysis">multiple-criteria decision analysis</a> on the above optimization targets. </p> <div class="mw-heading mw-heading4"><h4 id="Task_scheduling">Task scheduling</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=26" title="Edit section: Task scheduling"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><a href="/wiki/Scheduling_(computing)" title="Scheduling (computing)">Task scheduling</a> is an important activity in any computer system with multiple <a href="/wiki/Process_(computing)" title="Process (computing)">processes</a> or <a href="/wiki/Thread_(computing)" title="Thread (computing)">threads</a> sharing a single processor core. It is important to reduce <a href="#Latency">§&#160;Latency</a> and increase <a href="#Throughput">§&#160;Throughput</a> for <a href="/wiki/Embedded_software" title="Embedded software">embedded software</a> running on an SoC's <a href="#Processor_cores">§&#160;Processor cores</a>. Not every important computing activity in a SoC is performed in software running on on-chip processors, but scheduling can drastically improve performance of software-based tasks and other tasks involving <a href="/wiki/Shared_resource" title="Shared resource">shared resources</a>. </p><p>Software running on SoCs often schedules tasks according to <a href="/wiki/Network_scheduling" class="mw-redirect" title="Network scheduling">network scheduling</a> and <a href="/wiki/Stochastic_scheduling" title="Stochastic scheduling">randomized scheduling</a> algorithms. </p> <div class="mw-heading mw-heading4"><h4 id="Pipelining">Pipelining</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=27" title="Edit section: Pipelining"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">For broader coverage of this topic, see <a href="/wiki/Pipeline_(computing)" title="Pipeline (computing)">Pipeline (computing)</a>.</div> <p>Hardware and software tasks are often pipelined in <a href="/wiki/Processor_design" title="Processor design">processor design</a>. Pipelining is an important principle for <a href="/wiki/Speedup" title="Speedup">speedup</a> in <a href="/wiki/Computer_architecture" title="Computer architecture">computer architecture</a>. They are frequently used in <a href="/wiki/GPU" class="mw-redirect" title="GPU">GPUs</a> (<a href="/wiki/Graphics_pipeline" title="Graphics pipeline">graphics pipeline</a>) and RISC processors (evolutions of the <a href="/wiki/Classic_RISC_pipeline" title="Classic RISC pipeline">classic RISC pipeline</a>), but are also applied to application-specific tasks such as <a href="/wiki/Digital_signal_processing" title="Digital signal processing">digital signal processing</a> and multimedia manipulations in the context of SoCs.<sup id="cite_ref-:1_12-4" class="reference"><a href="#cite_note-:1-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Probabilistic_modeling">Probabilistic modeling</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=28" title="Edit section: Probabilistic modeling"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SoCs are often analyzed though <a href="/wiki/Probabilistic_model" class="mw-redirect" title="Probabilistic model">probabilistic models</a>, <a href="/wiki/Queueing_theory#Queueing_networks" title="Queueing theory">queueing networks</a>, and <a href="/wiki/Markov_chain" title="Markov chain">Markov chains</a>. For instance, <a href="/wiki/Little%27s_law" title="Little&#39;s law">Little's law</a> allows SoC states and NoC buffers to be modeled as arrival processes and analyzed through <a href="/wiki/Poisson_random_variable" class="mw-redirect" title="Poisson random variable">Poisson random variables</a> and <a href="/wiki/Poisson_process" class="mw-redirect" title="Poisson process">Poisson processes</a>. </p> <div class="mw-heading mw-heading4"><h4 id="Markov_chains">Markov chains</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=29" title="Edit section: Markov chains"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SoCs are often modeled with <a href="/wiki/Markov_chain" title="Markov chain">Markov chains</a>, both <a href="/wiki/Markov_chain#Discrete-time_Markov_chain" title="Markov chain">discrete time</a> and <a href="/wiki/Markov_chain#Continuous-time_Markov_chain" title="Markov chain">continuous time</a> variants. Markov chain modeling allows <a href="/wiki/Asymptotic_analysis" title="Asymptotic analysis">asymptotic analysis</a> of the SoC's <a href="/wiki/Markov_chain#Steady-state_analysis_and_limiting_distributions" title="Markov chain">steady state distribution</a> of power, heat, latency and other factors to allow design decisions to be optimized for the common case. </p> <div class="mw-heading mw-heading2"><h2 id="Fabrication">Fabrication</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=30" title="Edit section: Fabrication"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-More_citations_needed_section plainlinks metadata ambox ambox-content ambox-Refimprove" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Question_book-new.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs additional citations for <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">verification</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/System_on_a_chip" title="Special:EditPage/System on a chip">improve this article</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>&#32;in this section. Unsourced material may be challenged and removed.</span> <span class="date-container"><i>(<span class="date">March 2017</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Further information: <a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></div> <p>SoC chips are typically <a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">fabricated</a> using <a href="/wiki/Metal%E2%80%93oxide%E2%80%93semiconductor" class="mw-redirect" title="Metal–oxide–semiconductor">metal–oxide–semiconductor</a> (MOS) technology.<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">&#91;</span>22<span class="cite-bracket">&#93;</span></a></sup> The netlists described above are used as the basis for the physical design (<a href="/wiki/Place_and_route" title="Place and route">place and route</a>) flow to convert the designers' intent into the design of the SoC. Throughout this conversion process, the design is analyzed with static timing modeling, simulation and other tools to ensure that it meets the specified operational parameters such as frequency, power consumption and dissipation, functional integrity (as described in the register transfer level code) and electrical integrity. </p><p>When all known bugs have been rectified and these have been re-verified and all physical design checks are done, the physical design files describing each layer of the chip are sent to the foundry's mask shop where a full set of glass lithographic masks will be etched. These are sent to a wafer fabrication plant to create the SoC dice before packaging and testing. </p><p>SoCs can be fabricated by several technologies, including: </p> <ul><li><a href="/wiki/Full_custom" title="Full custom">Full custom</a> <a href="/wiki/ASIC" class="mw-redirect" title="ASIC">ASIC</a></li> <li><a href="/wiki/Standard_cell" title="Standard cell">Standard cell</a> ASIC</li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">Field-programmable gate array</a> (FPGA)</li></ul> <p>ASICs consume less power and are faster than FPGAs but cannot be reprogrammed and are expensive to manufacture. FPGA designs are more suitable for lower volume designs, but after enough units of production ASICs reduce the total cost of ownership.<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">&#91;</span>23<span class="cite-bracket">&#93;</span></a></sup> </p><p>SoC designs consume less power and have a lower cost and higher reliability than the multi-chip systems that they replace. With fewer packages in the system, assembly costs are reduced as well. </p><p>However, like most <a href="/wiki/Very-large-scale_integration" title="Very-large-scale integration">very-large-scale integration</a> (VLSI) designs, the total cost<sup class="noprint Inline-Template" style="margin-left:0.1em; white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Please_clarify" title="Wikipedia:Please clarify"><span title="what kind of cost? (May 2018)">clarification needed</span></a></i>&#93;</sup> is higher for one large chip than for the same functionality distributed over several smaller chips, because of <a href="/wiki/Semiconductor_device_fabrication#Device_test" title="Semiconductor device fabrication">lower yields</a><sup class="noprint Inline-Template" style="margin-left:0.1em; white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Please_clarify" title="Wikipedia:Please clarify"><span title="confusing to non-experts (May 2018)">clarification needed</span></a></i>&#93;</sup> and higher <a href="/wiki/Non-recurring_engineering" title="Non-recurring engineering">non-recurring engineering</a> costs. </p><p>When it is not feasible to construct an SoC for a particular application, an alternative is a <a href="/wiki/System_in_package" class="mw-redirect" title="System in package">system in package</a> (SiP) comprising a number of chips in a single <a href="/wiki/Chip_carrier" title="Chip carrier">package</a>. When produced in large volumes, SoC is more cost-effective than SiP because its packaging is simpler.<sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">&#91;</span>24<span class="cite-bracket">&#93;</span></a></sup> Another reason SiP may be preferred is <a href="/wiki/Waste_heat" title="Waste heat">waste heat</a> may be too high in a SoC for a given purpose because functional components are too close together, and in an SiP heat will dissipate better from different functional modules since they are physically further apart. </p> <div class="mw-heading mw-heading2"><h2 id="Examples">Examples</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=31" title="Edit section: Examples"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Some examples of systems on a chip are: </p> <ul><li><a href="/wiki/Apple_A_series" class="mw-redirect" title="Apple A series">Apple A series</a></li> <li><a href="/wiki/Cell_(processor)" title="Cell (processor)">Cell processor</a></li> <li><a href="/wiki/Adapteva" class="mw-redirect" title="Adapteva">Adapteva</a>'s Epiphany architecture</li> <li><a href="/wiki/Xilinx" title="Xilinx">Xilinx</a> Zynq UltraScale</li> <li><a href="/wiki/Qualcomm_Snapdragon" title="Qualcomm Snapdragon">Qualcomm Snapdragon</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Benchmarks">Benchmarks</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=32" title="Edit section: Benchmarks"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2018</span>)</i></span></div></td></tr></tbody></table> <p>SoC <a href="/wiki/Research_and_development" title="Research and development">research and development</a> often compares many options. Benchmarks, such as COSMIC,<sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">&#91;</span>25<span class="cite-bracket">&#93;</span></a></sup> are developed to help such evaluations. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=33" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Chiplet" title="Chiplet">Chiplet</a></li> <li><a href="/wiki/List_of_system_on_a_chip_suppliers" title="List of system on a chip suppliers">List of system on a chip suppliers</a></li> <li><a href="/wiki/Post-silicon_validation" title="Post-silicon validation">Post-silicon validation</a></li> <li><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM architecture family</a></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/Single-board_computer" title="Single-board computer">Single-board computer</a></li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific instruction set processor</a> (ASIP)</li> <li><a href="/wiki/Platform-based_design" title="Platform-based design">Platform-based design</a></li> <li><a href="/wiki/Lab-on-a-chip" title="Lab-on-a-chip">Lab-on-a-chip</a></li> <li><a href="/wiki/Organ-on-a-chip" title="Organ-on-a-chip">Organ-on-a-chip</a> in biomedical technology</li> <li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a></li> <li><a href="/wiki/Parallel_computing" title="Parallel computing">Parallel computing</a></li> <li><a href="/wiki/ARM_big.LITTLE" title="ARM big.LITTLE">ARM big.LITTLE</a> co-architecture</li> <li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=34" title="Edit section: Notes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text">In <a href="/wiki/Embedded_system" title="Embedded system">embedded systems</a>, "shields" are analogous to <a href="/wiki/Expansion_card" title="Expansion card">expansion cards</a> for <a href="/wiki/Personal_computer" title="Personal computer">PCs</a>. They often fit over a <a href="/wiki/Microcontroller" title="Microcontroller">microcontroller</a> such as an <a href="/wiki/Arduino" title="Arduino">Arduino</a> or <a href="/wiki/Single-board_computer" title="Single-board computer">single-board computer</a> such as the <a href="/wiki/Raspberry_Pi" title="Raspberry Pi">Raspberry Pi</a> and function as <a href="/wiki/Peripheral" title="Peripheral">peripherals</a> for the device.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=35" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFShah2017" class="citation web cs1">Shah, Agam (January 3, 2017). <a rel="nofollow" class="external text" href="https://www.networkworld.com/article/3154386/7-dazzling-smartphone-improvements-with-qualcomms-snapdragon-835-chip.html">"7 dazzling smartphone improvements with Qualcomm's Snapdragon 835 chip"</a>. <i>Network World</i>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=unknown&amp;rft.jtitle=Network+World&amp;rft.atitle=7+dazzling+smartphone+improvements+with+Qualcomm%27s+Snapdragon+835+chip&amp;rft.date=2017-01-03&amp;rft.aulast=Shah&amp;rft.aufirst=Agam&amp;rft_id=https%3A%2F%2Fwww.networkworld.com%2Farticle%2F3154386%2F7-dazzling-smartphone-improvements-with-qualcomms-snapdragon-835-chip.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-QS_1-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-QS_1_2-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFAmadeo,_R.2020" class="citation web cs1">Amadeo, R. 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Retrieved July 28, 2015.</span> </li> <li id="cite_note-:2-22"><span class="mw-cite-backlink">^ <a href="#cite_ref-:2_22-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:2_22-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-:2_22-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-:2_22-3"><sup><i><b>d</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFOgrenci-Memik2015" class="citation book cs1">Ogrenci-Memik, Seda (2015). <i>Heat Management in Integrated circuits: On-chip and system-level monitoring and cooling</i>. London, United Kingdom: The Institution of Engineering and Technology. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/978-1-84919-935-3" title="Special:BookSources/978-1-84919-935-3"><bdi>978-1-84919-935-3</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a>&#160;<a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/934678500">934678500</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Heat+Management+in+Integrated+circuits%3A+On-chip+and+system-level+monitoring+and+cooling&amp;rft.place=London%2C+United+Kingdom&amp;rft.pub=The+Institution+of+Engineering+and+Technology&amp;rft.date=2015&amp;rft_id=info%3Aoclcnum%2F934678500&amp;rft.isbn=978-1-84919-935-3&amp;rft.aulast=Ogrenci-Memik&amp;rft.aufirst=Seda&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-23"><span class="mw-cite-backlink"><b><a href="#cite_ref-23">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLin2007" class="citation book cs1">Lin, Youn-Long Steve (2007). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=7OV9lEn9LiQC&amp;pg=PA176"><i>Essential Issues in SOC Design: Designing Complex Systems-on-Chip</i></a>. <a href="/wiki/Springer_Science_%26_Business_Media" class="mw-redirect" title="Springer Science &amp; Business Media">Springer Science &amp; Business Media</a>. p.&#160;176. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/978-1-4020-5352-8" title="Special:BookSources/978-1-4020-5352-8"><bdi>978-1-4020-5352-8</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Essential+Issues+in+SOC+Design%3A+Designing+Complex+Systems-on-Chip&amp;rft.pages=176&amp;rft.pub=Springer+Science+%26+Business+Media&amp;rft.date=2007&amp;rft.isbn=978-1-4020-5352-8&amp;rft.aulast=Lin&amp;rft.aufirst=Youn-Long+Steve&amp;rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3D7OV9lEn9LiQC%26pg%3DPA176&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-24"><span class="mw-cite-backlink"><b><a href="#cite_ref-24">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://numato.com/blog/differences-between-fpga-and-asics/">"FPGA vs ASIC: Differences between them and which one to use? – Numato Lab Help Center"</a>. <i>numato.com</i>. July 17, 2018<span class="reference-accessdate">. Retrieved <span class="nowrap">October 17,</span> 2018</span>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=unknown&amp;rft.jtitle=numato.com&amp;rft.atitle=FPGA+vs+ASIC%3A+Differences+between+them+and+which+one+to+use%3F+%E2%80%93+Numato+Lab+Help+Center&amp;rft.date=2018-07-17&amp;rft_id=https%3A%2F%2Fnumato.com%2Fblog%2Fdifferences-between-fpga-and-asics%2F&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span></span> </li> <li id="cite_note-25"><span class="mw-cite-backlink"><b><a href="#cite_ref-25">^</a></b></span> <span class="reference-text"><a href="/wiki/EE_Times" title="EE Times">EE Times</a>. "<a rel="nofollow" class="external text" href="http://www.eetimes.com/document.asp?doc_id=1153043">The Great Debate: SOC vs. SIP</a>." March 21, 2005. Retrieved July 28, 2015.</span> </li> <li id="cite_note-26"><span class="mw-cite-backlink"><b><a href="#cite_ref-26">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.ece.ust.hk/~eexu/COSMIC.html">"COSMIC"</a>. <i>www.ece.ust.hk</i><span class="reference-accessdate">. Retrieved <span class="nowrap">October 8,</span> 2018</span>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=unknown&amp;rft.jtitle=www.ece.ust.hk&amp;rft.atitle=COSMIC&amp;rft_id=http%3A%2F%2Fwww.ece.ust.hk%2F~eexu%2FCOSMIC.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=36" title="Edit section: Further reading"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBadawyJullien2003" class="citation book cs1">Badawy, Wael; Jullien, Graham A., eds. (2003). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=Ha76NqrqPVIC"><i>System-on-Chip for Real-Time Applications</i></a>. Kluwer international series in engineering and computer science, SECS 711. Boston: <a href="/wiki/Wolters_Kluwer" title="Wolters Kluwer">Kluwer Academic Publishers</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/978-1-4020-7254-3" title="Special:BookSources/978-1-4020-7254-3"><bdi>978-1-4020-7254-3</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a>&#160;<a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/50478525">50478525</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=System-on-Chip+for+Real-Time+Applications&amp;rft.place=Boston&amp;rft.series=Kluwer+international+series+in+engineering+and+computer+science%2C+SECS+711&amp;rft.pub=Kluwer+Academic+Publishers&amp;rft.date=2003&amp;rft_id=info%3Aoclcnum%2F50478525&amp;rft.isbn=978-1-4020-7254-3&amp;rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DHa76NqrqPVIC&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span> 465 pages.</li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFFurber,_Stephen_B.2000" class="citation book cs1">Furber, Stephen B. (2000). <a href="/wiki/ARM_system-on-chip_architecture" class="mw-redirect" title="ARM system-on-chip architecture"><i>ARM system-on-chip architecture</i></a>. Boston: Addison-Wesley. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/0-201-67519-6" title="Special:BookSources/0-201-67519-6"><bdi>0-201-67519-6</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=ARM+system-on-chip+architecture&amp;rft.place=Boston&amp;rft.pub=Addison-Wesley&amp;rft.date=2000&amp;rft.isbn=0-201-67519-6&amp;rft.au=Furber%2C+Stephen+B.&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFKunduChattopadhyay2014" class="citation book cs1">Kundu, Santanu; Chattopadhyay, Santanu (2014). <i>Network-on-chip: the Next Generation of System-on-Chip Integration</i> (1st&#160;ed.). Boca Raton, FL: CRC Press. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/978-1-4665-6527-2" title="Special:BookSources/978-1-4665-6527-2"><bdi>978-1-4665-6527-2</bdi></a>. <a href="/wiki/OCLC_(identifier)" class="mw-redirect" title="OCLC (identifier)">OCLC</a>&#160;<a rel="nofollow" class="external text" href="https://search.worldcat.org/oclc/895661009">895661009</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=book&amp;rft.btitle=Network-on-chip%3A+the+Next+Generation+of+System-on-Chip+Integration&amp;rft.place=Boca+Raton%2C+FL&amp;rft.edition=1st&amp;rft.pub=CRC+Press&amp;rft.date=2014&amp;rft_id=info%3Aoclcnum%2F895661009&amp;rft.isbn=978-1-4665-6527-2&amp;rft.aulast=Kundu&amp;rft.aufirst=Santanu&amp;rft.au=Chattopadhyay%2C+Santanu&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ASystem+on+a+chip" class="Z3988"></span></li></ul> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=System_on_a_chip&amp;action=edit&amp;section=37" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="http://www.ieee-socc.org/">SOCC</a> Annual <a href="/wiki/Institute_of_Electrical_and_Electronics_Engineers" title="Institute of Electrical and Electronics Engineers">IEEE</a> International SoC Conference</li> <li><a rel="nofollow" class="external text" href="http://www.edautils.com/Baya.html">Baya</a> free SoC platform assembly and IP integration tool</li> <li><a rel="nofollow" class="external text" href="http://www.eng.auburn.edu/~nelson/courses/elec5260_6260/Systems%20on%20Chip%20(SoC).pdf">Systems on Chip for Embedded Applications</a>, <a href="/wiki/Auburn_University" title="Auburn University">Auburn University</a> seminar in <a href="/wiki/Very-large-scale_integration" title="Very-large-scale integration">VLSI</a></li> <li><a rel="nofollow" class="external text" href="http://www.fpga-cores.com/instant-soc/">Instant SoC</a> SoC for FPGAs defined by C++</li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20130614083645/http://mpsoc-forum.org/">MPSoC – Annual Conference on MPSoC</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20090215035428/http://www.u-aizu.ac.jp/~benab/conferences/mcsoc-09/">Annual Symposium</a></li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output 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href="/wiki/Template:System_on_a_chip" title="Template:System on a chip"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:System_on_a_chip" title="Template talk:System on a chip"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:System_on_a_chip" title="Special:EditPage/Template:System on a chip"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="System_on_a_chip_(SoC)" style="font-size:114%;margin:0 4em"><a class="mw-selflink selflink">System on a chip</a> (SoC)</div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microprocessor" title="Microprocessor">Microprocessor</a> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">cores</a></li> <li><a href="/wiki/Chipset" title="Chipset">controllers</a></li></ul></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li> <li><a href="/wiki/Image_processor" title="Image processor">Image processor</a></li> <li><a href="/wiki/Media_processor" title="Media processor">Media processor</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">AI accelerator</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a> (NoC)</li> <li><a href="/wiki/Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor SoC</a> (MPSoC)</li> <li><a href="/wiki/Programmable_system_on_a_chip" class="mw-redirect" title="Programmable system on a chip">Programmable SoC</a> (PSoC)</li> <li><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a> (MCU)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Alternatives</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a> (SiP)</li> <li><a href="/wiki/Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor</a> <ul><li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">chronology</a></li> <li><a href="/wiki/Processor_design" title="Processor design">design</a></li></ul></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li> <li><a href="/wiki/Embedded_system" title="Embedded system">Embedded systems</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/List_of_system_on_a_chip_suppliers" title="List of system on a chip suppliers">List of SoC suppliers</a></li> <li><a href="/wiki/Mobile_computing" title="Mobile computing">Mobile computing</a></li> <li><a href="/wiki/Unified_memory" class="mw-redirect" title="Unified memory">Unified memory</a></li></ul> </div></td></tr></tbody></table></div><div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Processor_technologies" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Processor_technologies" title="Template:Processor technologies"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Processor_technologies" title="Template talk:Processor technologies"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Processor_technologies" title="Special:EditPage/Template:Processor technologies"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Processor_technologies" style="font-size:114%;margin:0 4em"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor technologies</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Model_of_computation" title="Model of computation">Models</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Abstract_machine" title="Abstract machine">Abstract machine</a></li> <li><a href="/wiki/Stored-program_computer" title="Stored-program computer">Stored-program computer</a></li> <li><a href="/wiki/Finite-state_machine" title="Finite-state machine">Finite-state machine</a> <ul><li><a href="/wiki/Finite-state_machine_with_datapath" class="mw-redirect" title="Finite-state machine with datapath">with datapath</a></li> <li><a href="/wiki/Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical</a></li> <li><a href="/wiki/Deterministic_finite_automaton" title="Deterministic finite automaton">Deterministic finite automaton</a></li> <li><a href="/wiki/Queue_automaton" title="Queue automaton">Queue automaton</a></li> <li><a href="/wiki/Cellular_automaton" title="Cellular automaton">Cellular automaton</a></li> <li><a href="/wiki/Quantum_cellular_automaton" title="Quantum cellular automaton">Quantum cellular automaton</a></li></ul></li> <li><a href="/wiki/Turing_machine" title="Turing machine">Turing machine</a> <ul><li><a href="/wiki/Alternating_Turing_machine" title="Alternating Turing machine">Alternating Turing machine</a></li> <li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal</a></li> <li><a href="/wiki/Post%E2%80%93Turing_machine" title="Post–Turing machine">Post–Turing</a></li> <li><a href="/wiki/Quantum_Turing_machine" title="Quantum Turing machine">Quantum</a></li> <li><a href="/wiki/Nondeterministic_Turing_machine" title="Nondeterministic Turing machine">Nondeterministic Turing machine</a></li> <li><a href="/wiki/Probabilistic_Turing_machine" title="Probabilistic Turing machine">Probabilistic Turing machine</a></li> <li><a href="/wiki/Hypercomputation" title="Hypercomputation">Hypercomputation</a></li> <li><a href="/wiki/Zeno_machine" title="Zeno machine">Zeno machine</a></li></ul></li> <li><a href="/wiki/History_of_general-purpose_CPUs#Belt_machine_architecture" title="History of general-purpose CPUs">Belt machine</a></li> <li><a href="/wiki/Stack_machine" title="Stack machine">Stack machine</a></li> <li><a href="/wiki/Register_machine" title="Register machine">Register machines</a> <ul><li><a href="/wiki/Counter_machine" title="Counter machine">Counter</a></li> <li><a href="/wiki/Pointer_machine" title="Pointer machine">Pointer</a></li> <li><a href="/wiki/Random-access_machine" title="Random-access machine">Random-access</a></li> <li><a href="/wiki/Random-access_stored-program_machine" title="Random-access stored-program machine">Random-access stored program</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architecture</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></li> <li><a href="/wiki/Von_Neumann_architecture" title="Von Neumann architecture">Von Neumann</a></li> <li><a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard</a> <ul><li><a href="/wiki/Modified_Harvard_architecture" title="Modified Harvard architecture">modified</a></li></ul></li> <li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport-triggered</a></li> <li><a href="/wiki/Cellular_architecture" title="Cellular architecture">Cellular</a></li> <li><a href="/wiki/Endianness" title="Endianness">Endianness</a></li> <li><a href="/wiki/Computer_data_storage" title="Computer data storage">Memory access</a> <ul><li><a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></li> <li><a href="/wiki/Uniform_memory_access" title="Uniform memory access">HUMA</a></li> <li><a href="/wiki/Load%E2%80%93store_architecture" title="Load–store architecture">Load–store</a></li> <li><a href="/wiki/Register%E2%80%93memory_architecture" title="Register–memory architecture">Register/memory</a></li></ul></li> <li><a href="/wiki/Cache_hierarchy" title="Cache hierarchy">Cache hierarchy</a></li> <li><a href="/wiki/Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a> <ul><li><a href="/wiki/Virtual_memory" title="Virtual memory">Virtual memory</a></li> <li><a href="/wiki/Secondary_storage" class="mw-redirect" title="Secondary storage">Secondary storage</a></li></ul></li> <li><a href="/wiki/Heterogeneous_System_Architecture" title="Heterogeneous System Architecture">Heterogeneous</a></li> <li><a href="/wiki/Fabric_computing" title="Fabric computing">Fabric</a></li> <li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessing</a></li> <li><a href="/wiki/Cognitive_computing" title="Cognitive computing">Cognitive</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set<br />architectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Orthogonal_instruction_set" title="Orthogonal instruction set">Orthogonal instruction set</a></li> <li><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></li> <li><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific</a></li> <li><a href="/wiki/Explicit_data_graph_execution" title="Explicit data graph execution">EDGE</a> <ul><li><a href="/wiki/TRIPS_architecture" title="TRIPS architecture">TRIPS</a></li></ul></li> <li><a href="/wiki/Very_long_instruction_word" title="Very long instruction word">VLIW</a> <ul><li><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></li></ul></li> <li><a href="/wiki/Minimal_instruction_set_computer" title="Minimal instruction set computer">MISC</a></li> <li><a href="/wiki/One-instruction_set_computer" title="One-instruction set computer">OISC</a></li> <li><a href="/wiki/No_instruction_set_computing" title="No instruction set computing">NISC</a></li> <li><a href="/wiki/Zero_instruction_set_computer" class="mw-redirect" title="Zero instruction set computer">ZISC</a></li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Quantum_computing" title="Quantum computing">Quantum computing</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Comparison</a> <ul><li><a href="/wiki/Addressing_mode" title="Addressing mode">Addressing modes</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instruction<br />sets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Motorola_68000_series" title="Motorola 68000 series">Motorola 68000 series</a></li> <li><a href="/wiki/VAX" title="VAX">VAX</a></li> <li><a href="/wiki/PDP-11_architecture" title="PDP-11 architecture">PDP-11</a></li> <li><a href="/wiki/X86" title="X86">x86</a></li> <li><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a></li> <li><a href="/wiki/Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li> <li><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a></li> <li><a href="/wiki/MIPS-X" title="MIPS-X">MIPS-X</a></li> <li>Power <ul><li><a href="/wiki/IBM_POWER_architecture" title="IBM POWER architecture">POWER</a></li> <li><a href="/wiki/PowerPC" title="PowerPC">PowerPC</a></li> <li><a href="/wiki/Power_ISA" title="Power ISA">Power ISA</a></li></ul></li> <li><a href="/wiki/Clipper_architecture" title="Clipper architecture">Clipper architecture</a></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a></li> <li><a href="/wiki/SuperH" title="SuperH">SuperH</a></li> <li><a href="/wiki/DEC_Alpha" title="DEC Alpha">DEC Alpha</a></li> <li><a href="/wiki/ETRAX_CRIS" title="ETRAX CRIS">ETRAX CRIS</a></li> <li><a href="/wiki/M32R" title="M32R">M32R</a></li> <li><a href="/wiki/Unicore" title="Unicore">Unicore</a></li> <li><a href="/wiki/IA-64" title="IA-64">Itanium</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a></li> <li><a href="/wiki/Little_man_computer" title="Little man computer">LMC</a></li> <li>System/3x0 <ul><li><a href="/wiki/IBM_System/360_architecture" title="IBM System/360 architecture">S/360</a></li> <li><a href="/wiki/IBM_System/370" title="IBM System/370">S/370</a></li> <li><a href="/wiki/IBM_System/390" title="IBM System/390">S/390</a></li> <li><a href="/wiki/Z/Architecture" title="Z/Architecture">z/Architecture</a></li></ul></li> <li>Tilera ISA</li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Adapteva#Products" class="mw-redirect" title="Adapteva">Epiphany architecture</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Others</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_cycle" title="Instruction cycle">Execution</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Instruction pipelining</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Pipeline_stall" title="Pipeline stall">Pipeline stall</a></li> <li><a href="/wiki/Operand_forwarding" title="Operand forwarding">Operand forwarding</a></li> <li><a href="/wiki/Classic_RISC_pipeline" title="Classic RISC pipeline">Classic RISC pipeline</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hazard_(computer_architecture)" title="Hazard (computer architecture)">Hazards</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Data_dependency" title="Data dependency">Data dependency</a></li> <li><a href="/wiki/Structural_hazard" class="mw-redirect" title="Structural hazard">Structural</a></li> <li><a href="/wiki/Control_hazard" class="mw-redirect" title="Control hazard">Control</a></li> <li><a href="/wiki/False_sharing" title="False sharing">False sharing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Out-of-order_execution" title="Out-of-order execution">Out-of-order</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Scoreboarding" title="Scoreboarding">Scoreboarding</a></li> <li><a href="/wiki/Tomasulo%27s_algorithm" title="Tomasulo&#39;s algorithm">Tomasulo's algorithm</a> <ul><li><a href="/wiki/Reservation_station" title="Reservation station">Reservation station</a></li> <li><a href="/wiki/Re-order_buffer" title="Re-order buffer">Re-order buffer</a></li></ul></li> <li><a href="/wiki/Register_renaming" title="Register renaming">Register renaming</a></li> <li><a href="/wiki/Wide-issue" title="Wide-issue">Wide-issue</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Speculative_execution" title="Speculative execution">Speculative</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch prediction</a></li> <li><a href="/wiki/Memory_dependence_prediction" title="Memory dependence prediction">Memory dependence prediction</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Parallel_computing" title="Parallel computing">Parallelism</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Level</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bit-level_parallelism" title="Bit-level parallelism">Bit</a> <ul><li><a href="/wiki/Bit-serial_architecture" title="Bit-serial architecture">Bit-serial</a></li> <li><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word</a></li></ul></li> <li><a href="/wiki/Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li> <li><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Pipelining</a> <ul><li><a href="/wiki/Scalar_processor" title="Scalar processor">Scalar</a></li> <li><a href="/wiki/Superscalar_processor" title="Superscalar processor">Superscalar</a></li></ul></li> <li><a href="/wiki/Task_parallelism" title="Task parallelism">Task</a> <ul><li><a href="/wiki/Thread_(computing)" title="Thread (computing)">Thread</a></li> <li><a href="/wiki/Process_(computing)" title="Process (computing)">Process</a></li></ul></li> <li><a href="/wiki/Data_parallelism" title="Data parallelism">Data</a> <ul><li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li></ul></li> <li><a href="/wiki/Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li> <li><a href="/wiki/Distributed_architecture" class="mw-redirect" title="Distributed architecture">Distributed</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Temporal_multithreading" title="Temporal multithreading">Temporal</a></li> <li><a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a> <ul><li><a href="/wiki/Hyper-threading" title="Hyper-threading">Hyperthreading</a></li> <li><a href="/wiki/Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li></ul></li> <li><a href="/wiki/Speculative_multithreading" title="Speculative multithreading">Speculative</a></li> <li><a href="/wiki/Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li> <li><a href="/wiki/Cooperative_multitasking" title="Cooperative multitasking">Cooperative</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Flynn%27s_taxonomy" title="Flynn&#39;s taxonomy">Flynn's taxonomy</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single_instruction,_single_data" title="Single instruction, single data">SISD</a></li> <li><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> <ul><li><a href="/wiki/Single_instruction,_multiple_threads" title="Single instruction, multiple threads">Array processing (SIMT)</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Pipelined_processor" title="Flynn&#39;s taxonomy">Pipelined processing</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Associative_processor" title="Flynn&#39;s taxonomy">Associative processing</a></li> <li><a href="/wiki/SWAR" title="SWAR">SWAR</a></li></ul></li> <li><a href="/wiki/Multiple_instruction,_single_data" title="Multiple instruction, single data">MISD</a></li> <li><a href="/wiki/Multiple_instruction,_multiple_data" title="Multiple instruction, multiple data">MIMD</a> <ul><li><a href="/wiki/Single_program,_multiple_data" title="Single program, multiple data">SPMD</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_performance" title="Computer performance">Processor<br />performance</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transistor_count" title="Transistor count">Transistor count</a></li> <li><a href="/wiki/Instructions_per_cycle" title="Instructions per cycle">Instructions per cycle</a> (IPC) <ul><li><a href="/wiki/Cycles_per_instruction" title="Cycles per instruction">Cycles per instruction</a> (CPI)</li></ul></li> <li><a href="/wiki/Instructions_per_second" title="Instructions per second">Instructions per second</a> (IPS)</li> <li><a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">Floating-point operations per second</a> (FLOPS)</li> <li><a href="/wiki/Transactions_per_second" title="Transactions per second">Transactions per second</a> (TPS)</li> <li><a href="/wiki/SUPS" title="SUPS">Synaptic updates per second</a> (SUPS)</li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li> <li><a href="/wiki/Cache_performance_measurement_and_metric" title="Cache performance measurement and metric">Cache performance metrics</a></li> <li><a href="/wiki/Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Types</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Central processing unit</a> (CPU)</li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU) <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li></ul></li> <li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li> <li><a href="/wiki/Barrel_processor" title="Barrel processor">Barrel</a></li> <li><a href="/wiki/Stream_processing" title="Stream processing">Stream</a></li> <li><a href="/wiki/Tile_processor" title="Tile processor">Tile processor</a></li> <li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Field-programmable_object_array" title="Field-programmable object array">FPOA</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a> (SiP)</li> <li><a href="/wiki/Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">By application</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Embedded_system" title="Embedded system">Embedded system</a></li> <li><a href="/wiki/Microprocessor" title="Microprocessor">Microprocessor</a></li> <li><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a></li> <li><a href="/wiki/Mobile_processor" title="Mobile processor">Mobile</a></li> <li><a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">Ultra-low-voltage</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">ASIP</a></li> <li><a href="/wiki/Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Systems<br />on chip</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a class="mw-selflink selflink">System on a chip</a> (SoC)</li> <li><a href="/wiki/Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor</a> (MPSoC)</li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a> (NoC)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware<br />accelerators</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">AI accelerator</a></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li> <li><a href="/wiki/Image_processor" title="Image processor">Image processor</a></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Vision processing unit</a> (VPU)</li> <li><a href="/wiki/Physics_processing_unit" title="Physics processing unit">Physics processing unit</a> (PPU)</li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li> <li><a href="/wiki/Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li> <li><a href="/wiki/Secure_cryptoprocessor" title="Secure cryptoprocessor">Secure cryptoprocessor</a></li> <li><a href="/wiki/Network_processor" title="Network processor">Network processor</a></li> <li><a href="/wiki/Baseband_processor" title="Baseband processor">Baseband processor</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word size</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/1-bit_computing" title="1-bit computing">1-bit</a></li> <li><a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a></li> <li><a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a></li> <li><a href="/wiki/12-bit_computing" title="12-bit computing">12-bit</a></li> <li><a href="/wiki/Apollo_Guidance_Computer" title="Apollo Guidance Computer">15-bit</a></li> <li><a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a></li> <li><a href="/wiki/24-bit_computing" title="24-bit computing">24-bit</a></li> <li><a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a></li> <li><a href="/wiki/48-bit_computing" title="48-bit computing">48-bit</a></li> <li><a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a></li> <li><a href="/wiki/128-bit_computing" title="128-bit computing">128-bit</a></li> <li><a href="/wiki/256-bit_computing" title="256-bit computing">256-bit</a></li> <li><a href="/wiki/512-bit_computing" title="512-bit computing">512-bit</a></li> <li><a href="/wiki/Bit_slicing" title="Bit slicing">bit slicing</a></li> <li><a href="/wiki/Word_(computer_architecture)#Table_of_word_sizes" title="Word (computer architecture)">others</a> <ul><li><a href="/wiki/Word_(computer_architecture)#Variable-word_architectures" title="Word (computer architecture)">variable</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Core count</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single-core" title="Single-core">Single-core</a></li> <li><a href="/wiki/Multi-core_processor" title="Multi-core processor">Multi-core</a></li> <li><a href="/wiki/Manycore_processor" title="Manycore processor">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous architecture</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Core</a></li> <li><a href="/wiki/Cache_(computing)" title="Cache (computing)">Cache</a> <ul><li><a href="/wiki/CPU_cache" title="CPU cache">CPU cache</a></li> <li><a href="/wiki/Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li> <li><a href="/wiki/Data_cache" class="mw-redirect" title="Data cache">Data cache</a></li> <li><a href="/wiki/Instruction_cache" class="mw-redirect" title="Instruction cache">Instruction cache</a></li> <li><a href="/wiki/Cache_replacement_policies" title="Cache replacement policies">replacement policies</a></li> <li><a href="/wiki/Cache_coherence" title="Cache coherence">coherence</a></li></ul></li> <li><a href="/wiki/Bus_(computing)" title="Bus (computing)">Bus</a></li> <li><a href="/wiki/Clock_rate" title="Clock rate">Clock rate</a></li> <li><a href="/wiki/Clock_signal" title="Clock signal">Clock signal</a></li> <li><a href="/wiki/FIFO_(computing_and_electronics)" title="FIFO (computing and electronics)">FIFO</a></li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Execution_unit" title="Execution unit">Functional<br />units</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">Arithmetic logic unit</a> (ALU)</li> <li><a href="/wiki/Address_generation_unit" title="Address generation unit">Address generation unit</a> (AGU)</li> <li><a href="/wiki/Floating-point_unit" title="Floating-point unit">Floating-point unit</a> (FPU)</li> <li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a> (MMU) <ul><li><a href="/wiki/Load%E2%80%93store_unit" title="Load–store unit">Load–store unit</a></li> <li><a href="/wiki/Translation_lookaside_buffer" title="Translation lookaside buffer">Translation lookaside buffer</a> (TLB)</li></ul></li> <li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch predictor</a></li> <li><a href="/wiki/Branch_target_predictor" title="Branch target predictor">Branch target predictor</a></li> <li><a href="/wiki/Memory_controller" title="Memory controller">Integrated memory controller</a> (IMC) <ul><li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a></li></ul></li> <li><a href="/wiki/Instruction_decoder" class="mw-redirect" title="Instruction decoder">Instruction decoder</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Logic_gate" title="Logic gate">Logic</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Combinational_logic" title="Combinational logic">Combinational</a></li> <li><a href="/wiki/Sequential_logic" title="Sequential logic">Sequential</a></li> <li><a href="/wiki/Glue_logic" title="Glue logic">Glue</a></li> <li><a href="/wiki/Logic_gate" title="Logic gate">Logic gate</a> <ul><li><a href="/wiki/Quantum_logic_gate" title="Quantum logic gate">Quantum</a></li> <li><a href="/wiki/Gate_array" title="Gate array">Array</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_register" title="Hardware register">Registers</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Processor_register" title="Processor register">Processor register</a></li> <li><a href="/wiki/Status_register" title="Status register">Status register</a></li> <li><a href="/wiki/Stack_register" title="Stack register">Stack register</a></li> <li><a href="/wiki/Register_file" title="Register file">Register file</a></li> <li><a href="/wiki/Memory_buffer_register" title="Memory buffer register">Memory buffer</a></li> <li><a href="/wiki/Memory_address_register" title="Memory address register">Memory address register</a></li> <li><a href="/wiki/Program_counter" title="Program counter">Program counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Control_unit" title="Control unit">Control unit</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Hardwired_control_unit" class="mw-redirect" title="Hardwired control unit">Hardwired control unit</a></li> <li><a href="/wiki/Instruction_unit" title="Instruction unit">Instruction unit</a></li> <li><a href="/wiki/Data_buffer" title="Data buffer">Data buffer</a></li> <li><a href="/wiki/Write_buffer" title="Write buffer">Write buffer</a></li> <li><a href="/wiki/Microcode" title="Microcode">Microcode</a> <a href="/wiki/ROM_image" title="ROM image">ROM</a></li> <li><a href="/wiki/Counter_(digital)" title="Counter (digital)">Counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Datapath" title="Datapath">Datapath</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multiplexer" title="Multiplexer">Multiplexer</a></li> <li><a href="/wiki/Demultiplexer" class="mw-redirect" title="Demultiplexer">Demultiplexer</a></li> <li><a href="/wiki/Adder_(electronics)" title="Adder (electronics)">Adder</a></li> <li><a href="/wiki/Binary_multiplier" title="Binary multiplier">Multiplier</a> <ul><li><a href="/wiki/CPU_multiplier" title="CPU multiplier">CPU</a></li></ul></li> <li><a href="/wiki/Binary_decoder" title="Binary decoder">Binary decoder</a> <ul><li><a href="/wiki/Address_decoder" title="Address decoder">Address decoder</a></li> <li><a href="/wiki/Sum-addressed_decoder" title="Sum-addressed decoder">Sum-addressed decoder</a></li></ul></li> <li><a href="/wiki/Barrel_shifter" title="Barrel shifter">Barrel shifter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Electronic_circuit" title="Electronic circuit">Circuitry</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> <ul><li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D</a></li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal</a></li> <li><a href="/wiki/Power_management_integrated_circuit" title="Power management integrated circuit">Power management</a></li></ul></li> <li><a href="/wiki/Boolean_circuit" title="Boolean circuit">Boolean</a></li> <li><a href="/wiki/Circuit_(computer_science)" title="Circuit (computer science)">Digital</a></li> <li><a href="/wiki/Analogue_electronics" title="Analogue electronics">Analog</a></li> <li><a href="/wiki/Quantum_circuit" title="Quantum circuit">Quantum</a></li> <li><a href="/wiki/Switch#Electronic_switches" title="Switch">Switch</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Power_management" title="Power management">Power<br />management</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Power_Management_Unit" title="Power Management Unit">PMU</a></li> <li><a href="/wiki/Advanced_Power_Management" title="Advanced Power Management">APM</a></li> <li><a href="/wiki/ACPI" title="ACPI">ACPI</a></li> <li><a href="/wiki/Dynamic_frequency_scaling" title="Dynamic frequency scaling">Dynamic frequency scaling</a></li> <li><a href="/wiki/Dynamic_voltage_scaling" title="Dynamic voltage scaling">Dynamic voltage scaling</a></li> <li><a href="/wiki/Clock_gating" title="Clock gating">Clock gating</a></li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/History_of_general-purpose_CPUs" title="History of general-purpose CPUs">History of general-purpose CPUs</a></li> <li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">Microprocessor chronology</a></li> <li><a href="/wiki/Processor_design" title="Processor design">Processor design</a></li> <li><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></li> <li><a href="/wiki/Hardware_security_module" title="Hardware security module">Hardware security module</a></li> <li><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li> <li><a href="/wiki/Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li> <li><a href="/wiki/Pin_grid_array" title="Pin grid array">Pin grid array</a></li> <li><a href="/wiki/Chip_carrier" title="Chip carrier">Chip carrier</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Single-board_computer_and_single-board_microcontroller" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Single-board_computer" title="Template:Single-board computer"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Single-board_computer" title="Template talk:Single-board computer"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Single-board_computer" title="Special:EditPage/Template:Single-board computer"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Single-board_computer_and_single-board_microcontroller" style="font-size:114%;margin:0 4em"><a href="/wiki/Single-board_computer" title="Single-board computer">Single-board computer</a> and <a href="/wiki/Single-board_microcontroller" title="Single-board microcontroller">single-board microcontroller</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Devices</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Arduino" title="Arduino">Arduino</a></li> <li><a href="/wiki/Arndale_Board" title="Arndale Board">Arndale Board</a></li> <li><a href="/wiki/Asus_Tinker_Board" title="Asus Tinker Board">Asus Tinker Board</a></li> <li><a href="/wiki/Banana_Pi" title="Banana Pi">Banana Pi</a></li> <li><a href="/wiki/BeagleBoard" title="BeagleBoard">BeagleBoard</a></li> <li><a href="/wiki/Cotton_Candy_(single-board_computer)" title="Cotton Candy (single-board computer)">Cotton Candy</a></li> <li><a href="/wiki/CHIP_(computer)" title="CHIP (computer)">CHIP</a></li> <li><a href="/wiki/Cubieboard" title="Cubieboard">Cubieboard</a></li> <li><a href="/wiki/Intel_Edison" title="Intel Edison">Edison</a></li> <li><a href="/wiki/Intel_Galileo" title="Intel Galileo">Galileo</a></li> <li><a href="/wiki/Gumstix" title="Gumstix">Gumstix</a></li> <li><a href="/wiki/Hawkboard" title="Hawkboard">Hawkboard</a></li> <li><a href="/wiki/IGEPv2" title="IGEPv2">IGEPv2</a></li> <li><a href="/wiki/LattePanda" title="LattePanda">LattePanda</a></li> <li><a href="/wiki/Drive_PX-series" class="mw-redirect" title="Drive PX-series">Nvidia Drive</a></li> <li><a href="/wiki/Nano_Pi" title="Nano Pi">Nano Pi</a></li> <li><a href="/wiki/Nvidia_Jetson" title="Nvidia Jetson">Nvidia Jetson</a></li> <li><a href="/wiki/ODROID" title="ODROID">ODROID</a></li> <li><a href="/wiki/OLinuXino" title="OLinuXino">OLinuXino</a></li> <li><a href="/wiki/PandaBoard" title="PandaBoard">PandaBoard</a></li> <li><a href="/wiki/Pine64" title="Pine64">Pine64</a></li> <li><a href="/wiki/Adapteva#Parallella_project" class="mw-redirect" title="Adapteva">Parallella</a></li> <li><a href="/wiki/Rascal_(single-board_computer)" title="Rascal (single-board computer)">Rascal</a></li> <li><a href="/wiki/Raspberry_Pi" title="Raspberry Pi">Raspberry Pi</a></li> <li><a href="/wiki/Snowball_(single-board_computer)" title="Snowball (single-board computer)">Snowball</a></li> <li><a href="/w/index.php?title=UDOO&amp;action=edit&amp;redlink=1" class="new" title="UDOO (page does not exist)">UDOO</a></li> <li><a href="/w/index.php?title=Vicharak&amp;action=edit&amp;redlink=1" class="new" title="Vicharak (page does not exist)">Vaaman</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a class="mw-selflink selflink">SoCs</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Actions_Semiconductor" title="Actions Semiconductor">Actions</a></li> <li><a href="/wiki/Allwinner_Technology#SoC_.28System_on_Chip.29" title="Allwinner Technology">Allwinner</a></li> <li><a href="/wiki/Apple_silicon#A_series" title="Apple silicon">Ax</a></li> <li><a href="/wiki/Apple_M1" title="Apple M1">Apple M1</a></li> <li><a href="/wiki/Exynos_(system_on_chip)" class="mw-redirect" title="Exynos (system on chip)">Exynos</a></li> <li><a href="/wiki/I.MX" title="I.MX">i.MX</a></li> <li><a href="/wiki/HiSilicon#K3V3" title="HiSilicon">HiSiliconK3V3</a></li> <li><a href="/wiki/MediaTek" title="MediaTek">MediaTek</a></li> <li><a href="/wiki/Nomadik" title="Nomadik">Nomadik</a></li> <li><a href="/wiki/NovaThor" title="NovaThor">NovaThor</a></li> <li><a href="/wiki/OMAP" title="OMAP">OMAP</a></li> <li><a href="/wiki/Rockchip" title="Rockchip">Rockchip</a></li> <li><a href="/wiki/Qualcomm_Snapdragon" title="Qualcomm Snapdragon">Qualcomm Snapdragon</a></li> <li><a href="/wiki/Tegra" title="Tegra">Tegra</a></li> <li><a href="/wiki/WonderMedia#Products" title="WonderMedia">WonderMedia</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Ingenic#XBurst1-based_SoCs" class="mw-redirect" title="Ingenic">Jz</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86" title="X86">x86</a>/<a href="/wiki/X86-64" title="X86-64">x86-64</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_%C3%89lan" title="AMD Élan">AMD Élan</a></li> <li><a href="/wiki/Atom_(system_on_chip)" class="mw-redirect" title="Atom (system on chip)">Atom</a></li> <li><a href="/wiki/Jaguar_(microarchitecture)" title="Jaguar (microarchitecture)">Jaguar</a>-based</li> <li><a href="/wiki/Puma_(microarchitecture)" title="Puma (microarchitecture)">Puma</a>-based</li> <li><a href="/wiki/Intel_Quark" title="Intel Quark">Quark</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Software</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Apache_Hadoop" title="Apache Hadoop">Apache Hadoop</a></li> <li><a href="/wiki/Linaro" title="Linaro">Linaro</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link 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programmable logic device">CPLD</a></li> <li><a href="/wiki/Programmable_logic_device#EPLDs" title="Programmable logic device">EPLD</a></li> <li><a href="/wiki/Programmable_logic_array" title="Programmable logic array">PLA</a></li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li> <li><a href="/wiki/Generic_array_logic" class="mw-redirect" title="Generic array logic">GAL</a></li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">PSoC</a></li> <li><a href="/wiki/Reconfigurable_computing" title="Reconfigurable computing">Reconfigurable computing</a> <ul><li><a href="/wiki/Xputer" title="Xputer">Xputer</a></li></ul></li> <li><a href="/wiki/Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li> <li><a href="/wiki/Circuit_underutilization" title="Circuit underutilization">Circuit underutilization</a></li> <li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a></li> <li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_description_language" title="Hardware description language">Languages</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Verilog" title="Verilog">Verilog</a> <ul><li><a href="/wiki/Verilog-A" title="Verilog-A">A</a></li> <li><a href="/wiki/Verilog-AMS" title="Verilog-AMS">AMS</a></li></ul></li> <li><a href="/wiki/VHDL" title="VHDL">VHDL</a> <ul><li><a href="/wiki/VHDL-AMS" title="VHDL-AMS">AMS</a></li> <li><a href="/wiki/VHDL-VITAL" title="VHDL-VITAL">VITAL</a></li></ul></li> <li><a href="/wiki/SystemVerilog" title="SystemVerilog">SystemVerilog</a> <ul><li><a href="/wiki/SystemVerilog_DPI" title="SystemVerilog DPI">DPI</a></li></ul></li> <li><a href="/wiki/SystemC" title="SystemC">SystemC</a></li> <li><a href="/wiki/Altera_Hardware_Description_Language" title="Altera Hardware Description Language">AHDL</a></li> <li><a href="/wiki/Handel-C" title="Handel-C">Handel-C</a></li> <li><a href="/wiki/Lola_(computing)" title="Lola (computing)">Lola</a></li> <li><a href="/wiki/Property_Specification_Language" title="Property Specification Language">PSL</a></li> <li><a href="/wiki/Unified_Power_Format" title="Unified Power Format">UPF</a></li> <li><a href="/wiki/PALASM" title="PALASM">PALASM</a></li> <li><a href="/wiki/Advanced_Boolean_Expression_Language" title="Advanced Boolean Expression Language">ABEL</a></li> <li><a href="/wiki/Programmable_Array_Logic#CUPL" title="Programmable Array Logic">CUPL</a></li> <li><a href="/wiki/C_to_HDL" title="C to HDL">C to HDL</a></li> <li><a href="/wiki/Flow_to_HDL" title="Flow to HDL">Flow to HDL</a></li> <li><a href="/wiki/MyHDL" title="MyHDL">MyHDL</a></li> <li><a href="/wiki/ELLA_(programming_language)" title="ELLA (programming language)">ELLA</a></li> <li><a href="/wiki/Chisel_(programming_language)" title="Chisel (programming language)">Chisel</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Companies</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Accellera" title="Accellera">Accellera</a></li> <li><a href="/wiki/Achronix" title="Achronix">Achronix</a></li> <li><a href="/wiki/AMD" title="AMD">AMD</a></li> <li><a href="/wiki/Aldec" title="Aldec">Aldec</a></li> <li><a href="/wiki/Arm_Holdings" title="Arm Holdings">Arm</a></li> <li><a href="/wiki/Cadence_Design_Systems" title="Cadence Design Systems">Cadence</a></li> <li><a href="/wiki/Infineon_Technologies" title="Infineon Technologies">Infineon</a></li> <li><a href="/wiki/Intel" title="Intel">Intel</a></li> <li><a href="/wiki/Lattice_Semiconductor" title="Lattice Semiconductor">Lattice</a></li> <li><a href="/wiki/Microchip_Technology" title="Microchip Technology">Microchip Technology</a></li> <li><a href="/wiki/NXP_Semiconductors" title="NXP Semiconductors">NXP</a></li> <li><a href="/wiki/Siemens" title="Siemens">Siemens</a></li> <li><a href="/wiki/Synopsys" title="Synopsys">Synopsys</a></li> <li><a href="/wiki/Texas_Instruments" title="Texas Instruments">Texas Instruments</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Hardware</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ICE_(FPGA)" title="ICE (FPGA)">iCE</a></li> <li><a href="/wiki/Stratix" title="Stratix">Stratix</a></li> <li><a href="/wiki/Virtex_(FPGA)" title="Virtex (FPGA)">Virtex</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Software</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Quartus_Prime" title="Intel Quartus Prime">Intel Quartus Prime</a></li> <li><a href="/wiki/Xilinx_ISE" title="Xilinx ISE">Xilinx ISE</a></li> <li><a href="/wiki/Vivado" title="Vivado">Vivado</a></li> <li><a href="/wiki/ModelSim" title="ModelSim">ModelSim</a></li> <li><a href="/wiki/Verilog-to-Routing" title="Verilog-to-Routing">VTR</a></li> <li><a href="/wiki/List_of_HDL_simulators" title="List of HDL simulators">Simulators</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Intellectual_property" title="Intellectual property">Intellectual<br />property</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Proprietary_hardware" title="Proprietary hardware">Proprietary</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ARC_(processor)" title="ARC (processor)">ARC</a></li> <li><a href="/wiki/ARM_Cortex-M" title="ARM Cortex-M">ARM Cortex-M</a></li> <li><a href="/wiki/LEON" title="LEON">LEON</a></li> <li><a href="/wiki/LatticeMico8" title="LatticeMico8">LatticeMico8</a></li> <li><a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a></li> <li><a href="/wiki/PicoBlaze" title="PicoBlaze">PicoBlaze</a></li> <li><a href="/wiki/Nios_embedded_processor" title="Nios embedded processor">Nios</a></li> <li><a href="/wiki/Nios_II" title="Nios II">Nios II</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Open-source_hardware" title="Open-source hardware">Open-source</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Java_Optimized_Processor" title="Java Optimized Processor">JOP</a></li> <li><a href="/wiki/LatticeMico32" title="LatticeMico32">LatticeMico32</a></li> <li><a href="/wiki/OpenCores" title="OpenCores">OpenCores</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a> <ul><li><a href="/wiki/OpenRISC_1200" title="OpenRISC 1200">1200</a></li></ul></li> <li><a href="/wiki/Power_ISA" title="Power ISA">Power ISA</a> <ul><li><a href="/wiki/Libre-SOC" title="Libre-SOC">Libre-SOC</a></li> <li><a href="/wiki/OpenPOWER_Microwatt" title="OpenPOWER Microwatt">Microwatt</a></li></ul></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Computer_science" style="padding:3px"><table class="nowraplinks hlist mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Computer_science" title="Template:Computer science"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a 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href="/wiki/Printed_circuit_board" title="Printed circuit board">Printed circuit board</a></li> <li><a href="/wiki/Peripheral" title="Peripheral">Peripheral</a></li> <li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a></li> <li><a href="/wiki/Very_Large_Scale_Integration" class="mw-redirect" title="Very Large Scale Integration">Very Large Scale Integration</a></li> <li><a class="mw-selflink selflink">Systems on Chip (SoCs)</a></li> <li><a href="/wiki/Green_computing" title="Green computing">Energy consumption (Green computing)</a></li> <li><a href="/wiki/Electronic_design_automation" title="Electronic design automation">Electronic design automation</a></li> <li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li> <li><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor</a></li> <li><a href="/wiki/List_of_computer_size_categories" title="List of computer size categories">Size</a> / <a href="/wiki/Form_factor_(design)" title="Form factor (design)">Form</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Computer systems organization</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Computer_architecture" title="Computer architecture">Computer architecture</a></li> <li><a href="/wiki/Computational_complexity" title="Computational complexity">Computational complexity</a></li> <li><a href="/wiki/Dependability" title="Dependability">Dependability</a></li> <li><a href="/wiki/Embedded_system" title="Embedded system">Embedded system</a></li> <li><a href="/wiki/Real-time_computing" title="Real-time computing">Real-time computing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_network" title="Computer network">Networks</a></th><td class="navbox-list-with-group navbox-list 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construction">Compiler</a></li> <li><a href="/wiki/Domain-specific_language" title="Domain-specific language">Domain-specific language</a></li> <li><a href="/wiki/Modeling_language" title="Modeling language">Modeling language</a></li> <li><a href="/wiki/Software_framework" title="Software framework">Software framework</a></li> <li><a href="/wiki/Integrated_development_environment" title="Integrated development environment">Integrated development environment</a></li> <li><a href="/wiki/Software_configuration_management" title="Software configuration management">Software configuration management</a></li> <li><a href="/wiki/Library_(computing)" title="Library (computing)">Software library</a></li> <li><a href="/wiki/Software_repository" title="Software repository">Software repository</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Software_development" title="Software development">Software development</a></th><td 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href="/wiki/Programming_team" title="Programming team">Programming team</a></li> <li><a href="/wiki/Open-source_software" title="Open-source software">Open-source model</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Theory_of_computation" title="Theory of computation">Theory of computation</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Model_of_computation" title="Model of computation">Model of computation</a> <ul><li><a href="/wiki/Stochastic_computing" title="Stochastic computing">Stochastic</a></li></ul></li> <li><a href="/wiki/Formal_language" title="Formal language">Formal language</a></li> <li><a href="/wiki/Automata_theory" title="Automata theory">Automata theory</a></li> <li><a href="/wiki/Computability_theory" title="Computability theory">Computability theory</a></li> <li><a href="/wiki/Computational_complexity_theory" title="Computational complexity theory">Computational complexity theory</a></li> <li><a href="/wiki/Logic_in_computer_science" title="Logic in computer science">Logic</a></li> <li><a href="/wiki/Semantics_(computer_science)" title="Semantics (computer science)">Semantics</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Algorithm" title="Algorithm">Algorithms</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Algorithm_design" class="mw-redirect" title="Algorithm design">Algorithm design</a></li> <li><a href="/wiki/Analysis_of_algorithms" title="Analysis of algorithms">Analysis of algorithms</a></li> <li><a href="/wiki/Algorithmic_efficiency" title="Algorithmic efficiency">Algorithmic efficiency</a></li> <li><a href="/wiki/Randomized_algorithm" title="Randomized algorithm">Randomized algorithm</a></li> <li><a href="/wiki/Computational_geometry" title="Computational geometry">Computational geometry</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Mathematics of <a href="/wiki/Computing" title="Computing">computing</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Discrete_mathematics" title="Discrete mathematics">Discrete mathematics</a></li> <li><a href="/wiki/Probability" title="Probability">Probability</a></li> <li><a href="/wiki/Statistics" title="Statistics">Statistics</a></li> <li><a href="/wiki/Mathematical_software" title="Mathematical software">Mathematical software</a></li> <li><a href="/wiki/Information_theory" title="Information theory">Information theory</a></li> <li><a href="/wiki/Mathematical_analysis" title="Mathematical analysis">Mathematical analysis</a></li> <li><a href="/wiki/Numerical_analysis" title="Numerical analysis">Numerical analysis</a></li> <li><a href="/wiki/Theoretical_computer_science" title="Theoretical computer science">Theoretical computer science</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Information_system" title="Information system">Information systems</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Database" title="Database">Database management system</a></li> <li><a href="/wiki/Computer_data_storage" title="Computer data storage">Information storage systems</a></li> <li><a href="/wiki/Enterprise_information_system" title="Enterprise information system">Enterprise information system</a></li> <li><a href="/wiki/Social_software" title="Social software">Social information systems</a></li> <li><a href="/wiki/Geographic_information_system" title="Geographic information system">Geographic information system</a></li> <li><a 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security</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Human%E2%80%93computer_interaction" title="Human–computer interaction">Human–computer interaction</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Interaction_design" title="Interaction design">Interaction design</a></li> <li><a href="/wiki/Social_computing" title="Social computing">Social computing</a></li> <li><a href="/wiki/Ubiquitous_computing" title="Ubiquitous computing">Ubiquitous computing</a></li> <li><a href="/wiki/Visualization_(graphics)" title="Visualization (graphics)">Visualization</a></li> <li><a href="/wiki/Computer_accessibility" title="Computer accessibility">Accessibility</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Concurrency_(computer_science)" title="Concurrency (computer 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</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Machine_learning" title="Machine learning">Machine learning</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Supervised_learning" title="Supervised learning">Supervised learning</a></li> <li><a href="/wiki/Unsupervised_learning" title="Unsupervised learning">Unsupervised learning</a></li> <li><a href="/wiki/Reinforcement_learning" title="Reinforcement learning">Reinforcement learning</a></li> <li><a href="/wiki/Multi-task_learning" title="Multi-task learning">Multi-task learning</a></li> <li><a href="/wiki/Cross-validation_(statistics)" title="Cross-validation (statistics)">Cross-validation</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_graphics" title="Computer graphics">Graphics</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Computer_animation" title="Computer animation">Animation</a></li> <li><a href="/wiki/Rendering_(computer_graphics)" title="Rendering (computer graphics)">Rendering</a></li> <li><a href="/wiki/Photograph_manipulation" title="Photograph manipulation">Photograph manipulation</a></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a></li> <li><a href="/wiki/Mixed_reality" title="Mixed reality">Mixed reality</a></li> <li><a href="/wiki/Virtual_reality" title="Virtual reality">Virtual reality</a></li> <li><a href="/wiki/Image_compression" title="Image compression">Image compression</a></li> <li><a href="/wiki/Solid_modeling" title="Solid modeling">Solid modeling</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Applied computing</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Quantum_Computing" class="mw-redirect" title="Quantum Computing">Quantum Computing</a></li> <li><a href="/wiki/E-commerce" title="E-commerce">E-commerce</a></li> <li><a href="/wiki/Enterprise_software" title="Enterprise software">Enterprise software</a></li> <li><a href="/wiki/Computational_mathematics" title="Computational mathematics">Computational mathematics</a></li> <li><a href="/wiki/Computational_physics" title="Computational physics">Computational physics</a></li> <li><a href="/wiki/Computational_chemistry" title="Computational chemistry">Computational chemistry</a></li> <li><a href="/wiki/Computational_biology" title="Computational biology">Computational biology</a></li> <li><a href="/wiki/Computational_social_science" title="Computational social science">Computational social science</a></li> <li><a href="/wiki/Computational_engineering" title="Computational engineering">Computational engineering</a></li> <li><a href="/wiki/Template:Differentiable_computing" title="Template:Differentiable computing">Differentiable computing</a></li> <li><a href="/wiki/Health_informatics" title="Health informatics">Computational healthcare</a></li> <li><a href="/wiki/Digital_art" title="Digital art">Digital art</a></li> <li><a href="/wiki/Electronic_publishing" title="Electronic publishing">Electronic publishing</a></li> <li><a href="/wiki/Cyberwarfare" title="Cyberwarfare">Cyberwarfare</a></li> <li><a href="/wiki/Electronic_voting" title="Electronic voting">Electronic voting</a></li> <li><a href="/wiki/Video_game" title="Video game">Video games</a></li> <li><a href="/wiki/Word_processor" title="Word processor">Word processing</a></li> <li><a href="/wiki/Operations_research" title="Operations research">Operations research</a></li> <li><a href="/wiki/Educational_technology" title="Educational technology">Educational technology</a></li> <li><a href="/wiki/Document_management_system" title="Document management system">Document management</a></li></ul> </div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div> <ul><li><span class="noviewer" typeof="mw:File"><span title="Category"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/16px-Symbol_category_class.svg.png" decoding="async" width="16" height="16" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/23px-Symbol_category_class.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/31px-Symbol_category_class.svg.png 2x" data-file-width="180" data-file-height="185" /></span></span> <a href="/wiki/Category:Computer_science" title="Category:Computer science">Category</a></li> <li><span class="noviewer" typeof="mw:File"><span title="Outline"><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/4/41/Global_thinking.svg/10px-Global_thinking.svg.png" decoding="async" width="10" height="16" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/4/41/Global_thinking.svg/15px-Global_thinking.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/4/41/Global_thinking.svg/21px-Global_thinking.svg.png 2x" data-file-width="130" data-file-height="200" /></span></span> <a href="/wiki/Outline_of_computer_science" title="Outline of computer science">Outline</a></li> <li><span class="noviewer" typeof="mw:File"><span><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/e/e0/Symbol_question.svg/16px-Symbol_question.svg.png" decoding="async" width="16" height="16" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/e/e0/Symbol_question.svg/23px-Symbol_question.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/e/e0/Symbol_question.svg/31px-Symbol_question.svg.png 2x" data-file-width="180" data-file-height="185" /></span></span> <a href="/wiki/Template:Glossaries_of_computers" title="Template:Glossaries of computers">Glossaries</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Hardware_acceleration" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Hardware_acceleration" title="Template:Hardware acceleration"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Hardware_acceleration" title="Template talk:Hardware acceleration"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Hardware_acceleration" title="Special:EditPage/Template:Hardware acceleration"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Hardware_acceleration" style="font-size:114%;margin:0 4em"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Models_of_computation" class="mw-redirect" title="Models of computation">Theory</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal Turing machine</a></li> <li><a href="/wiki/Parallel_computing" title="Parallel computing">Parallel computing</a></li> <li><a href="/wiki/Distributed_computing" title="Distributed computing">Distributed computing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Applications</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">GPU</a> <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li> <li><a href="/wiki/DirectX_Video_Acceleration" title="DirectX Video Acceleration">DirectX</a></li></ul></li> <li><a href="/wiki/Sound_card" title="Sound card">Audio</a></li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processing</a></li> <li><a href="/wiki/Hardware_random_number_generator" title="Hardware random number generator">Hardware random number generation</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">Artificial intelligence</a></li> <li><a href="/wiki/Cryptographic_accelerator" title="Cryptographic accelerator">Cryptography</a> <ul><li><a href="/wiki/TLS_acceleration" title="TLS acceleration">TLS</a></li></ul></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Machine vision</a></li> <li><a href="/wiki/Custom_hardware_attack" title="Custom hardware attack">Custom hardware attack</a> <ul><li><a href="/wiki/Scrypt" title="Scrypt">scrypt</a></li></ul></li> <li><a href="/wiki/Network_processor" title="Network processor">Networking</a></li> <li><a href="/wiki/Data_processing_unit" title="Data processing unit">Data</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Implementations</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a> <ul><li><a href="/wiki/C_to_HDL" title="C to HDL">C to HDL</a></li></ul></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a class="mw-selflink selflink">System on a chip</a> <ul><li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architectures</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport triggered</a></li> <li><a href="/wiki/Multicore" class="mw-redirect" title="Multicore">Multicore</a></li> <li><a href="/wiki/Manycore" class="mw-redirect" title="Manycore">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous</a></li> <li><a href="/wiki/In-memory_processing" title="In-memory processing">In-memory computing</a></li> <li><a href="/wiki/Systolic_array" title="Systolic array">Systolic array</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Programmable_logic" class="mw-redirect" title="Programmable logic">Programmable logic</a></li> <li><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor</a> <ul><li><a href="/wiki/Processor_design" title="Processor design">design</a></li> <li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">chronology</a></li></ul></li> <li><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></li> <li><a href="/wiki/Virtualization" title="Virtualization">Virtualization</a> <ul><li><a href="/wiki/Hardware_emulation" title="Hardware emulation">Hardware emulation</a></li></ul></li> <li><a href="/wiki/Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li> <li><a href="/wiki/Embedded_system" title="Embedded system">Embedded systems</a></li></ul> </div></td></tr></tbody></table></div> <!-- NewPP limit report Parsed by mw‐web.codfw.main‐78f4c97c5d‐68qk8 Cached time: 20241129025008 Cache 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