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Race condition - Wikipedia

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<div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Workarounds</span> </div> </a> <ul id="toc-Workarounds-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-In_software" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#In_software"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>In software</span> </div> </a> <button aria-controls="toc-In_software-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle In software subsection</span> </button> <ul id="toc-In_software-sublist" class="vector-toc-list"> <li id="toc-Example" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Example"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1</span> <span>Example</span> </div> </a> <ul id="toc-Example-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Data_race" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Data_race"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2</span> <span>Data race</span> </div> </a> <ul id="toc-Data_race-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Example_definitions_of_data_races_in_particular_concurrency_models" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Example_definitions_of_data_races_in_particular_concurrency_models"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3</span> <span>Example definitions of data races in particular concurrency models</span> </div> </a> <ul id="toc-Example_definitions_of_data_races_in_particular_concurrency_models-sublist" class="vector-toc-list"> <li id="toc-Sequential_Consistency_for_Data_Race_Freedom" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Sequential_Consistency_for_Data_Race_Freedom"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3.1</span> <span>Sequential Consistency for Data Race Freedom</span> </div> </a> <ul id="toc-Sequential_Consistency_for_Data_Race_Freedom-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Computer_security" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Computer_security"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.4</span> <span>Computer security</span> </div> </a> <ul id="toc-Computer_security-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-File_systems" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#File_systems"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.5</span> <span>File systems</span> </div> </a> <ul id="toc-File_systems-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Networking" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Networking"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.6</span> <span>Networking</span> </div> </a> <ul id="toc-Networking-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Life-critical_systems" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Life-critical_systems"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.7</span> <span>Life-critical systems</span> </div> </a> <ul id="toc-Life-critical_systems-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Tools" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Tools"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.8</span> <span>Tools</span> </div> </a> <ul id="toc-Tools-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-In_other_areas" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#In_other_areas"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>In other areas</span> </div> </a> <ul id="toc-In_other_areas-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled 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Available in 26 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-26" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">26 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D8%AD%D8%A7%D9%84%D8%A9_%D8%AA%D8%B3%D8%A7%D8%A8%D9%82" title="حالة تسابق – Arabic" lang="ar" hreflang="ar" data-title="حالة تسابق" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-az mw-list-item"><a href="https://az.wikipedia.org/wiki/Yar%C4%B1%C5%9F_durumu" title="Yarış durumu – Azerbaijani" lang="az" hreflang="az" data-title="Yarış durumu" data-language-autonym="Azərbaycanca" data-language-local-name="Azerbaijani" class="interlanguage-link-target"><span>Azərbaycanca</span></a></li><li class="interlanguage-link interwiki-azb mw-list-item"><a href="https://azb.wikipedia.org/wiki/%DB%8C%D8%A7%D8%B1%DB%8C%D8%B4%D9%85%D8%A7_%D8%AF%D9%88%D8%B1%D9%88%D9%85%D9%88" title="یاریشما دورومو – South Azerbaijani" lang="azb" hreflang="azb" data-title="یاریشما دورومو" data-language-autonym="تۆرکجه" data-language-local-name="South Azerbaijani" class="interlanguage-link-target"><span>تۆرکجه</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Situaci%C3%B3_de_competici%C3%B3" title="Situació de competició – Catalan" lang="ca" hreflang="ca" data-title="Situació de competició" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/Soub%C4%9Bh" title="Souběh – Czech" lang="cs" hreflang="cs" data-title="Souběh" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Wettlaufsituation" title="Wettlaufsituation – German" lang="de" hreflang="de" data-title="Wettlaufsituation" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Condici%C3%B3n_de_carrera" title="Condición de carrera – Spanish" lang="es" hreflang="es" data-title="Condición de carrera" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-eo mw-list-item"><a href="https://eo.wikipedia.org/wiki/Konkura_kondi%C4%89o" title="Konkura kondiĉo – Esperanto" lang="eo" hreflang="eo" data-title="Konkura kondiĉo" data-language-autonym="Esperanto" data-language-local-name="Esperanto" class="interlanguage-link-target"><span>Esperanto</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%D9%88%D8%B6%D8%B9%DB%8C%D8%AA_%D8%B1%D9%82%D8%A7%D8%A8%D8%AA%DB%8C" title="وضعیت رقابتی – Persian" lang="fa" hreflang="fa" data-title="وضعیت رقابتی" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Situation_de_comp%C3%A9tition" title="Situation de compétition – French" lang="fr" hreflang="fr" data-title="Situation de compétition" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EA%B2%BD%EC%9F%81_%EC%83%81%ED%83%9C" title="경쟁 상태 – Korean" lang="ko" hreflang="ko" data-title="경쟁 상태" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-id mw-list-item"><a href="https://id.wikipedia.org/wiki/Kondisi_berebut" title="Kondisi berebut – Indonesian" lang="id" hreflang="id" data-title="Kondisi berebut" data-language-autonym="Bahasa Indonesia" data-language-local-name="Indonesian" class="interlanguage-link-target"><span>Bahasa Indonesia</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Race_condition" title="Race condition – Italian" lang="it" hreflang="it" data-title="Race condition" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-he mw-list-item"><a href="https://he.wikipedia.org/wiki/%D7%9E%D7%A8%D7%95%D7%A5_%D7%AA%D7%94%D7%9C%D7%99%D7%9B%D7%99%D7%9D" title="מרוץ תהליכים – Hebrew" lang="he" hreflang="he" data-title="מרוץ תהליכים" data-language-autonym="עברית" data-language-local-name="Hebrew" class="interlanguage-link-target"><span>עברית</span></a></li><li class="interlanguage-link interwiki-lt mw-list-item"><a href="https://lt.wikipedia.org/wiki/Lenktyni%C5%B3_aplinka" title="Lenktynių aplinka – Lithuanian" lang="lt" hreflang="lt" data-title="Lenktynių aplinka" data-language-autonym="Lietuvių" data-language-local-name="Lithuanian" class="interlanguage-link-target"><span>Lietuvių</span></a></li><li class="interlanguage-link interwiki-lmo mw-list-item"><a href="https://lmo.wikipedia.org/wiki/Race_condition" title="Race condition – Lombard" lang="lmo" hreflang="lmo" data-title="Race condition" data-language-autonym="Lombard" data-language-local-name="Lombard" class="interlanguage-link-target"><span>Lombard</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/Versenyhelyzet" title="Versenyhelyzet – Hungarian" lang="hu" hreflang="hu" data-title="Versenyhelyzet" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-mn mw-list-item"><a href="https://mn.wikipedia.org/wiki/%D3%A8%D1%80%D1%81%D3%A9%D0%BB%D0%B4%D3%A9%D3%A9%D0%BD%D1%82_%D0%BD%D3%A9%D1%85%D1%86%D3%A9%D0%BB" title="Өрсөлдөөнт нөхцөл – Mongolian" lang="mn" hreflang="mn" data-title="Өрсөлдөөнт нөхцөл" data-language-autonym="Монгол" data-language-local-name="Mongolian" class="interlanguage-link-target"><span>Монгол</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/%E7%AB%B6%E5%90%88%E7%8A%B6%E6%85%8B" title="競合状態 – Japanese" lang="ja" hreflang="ja" data-title="競合状態" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Hazard_(elektronika)" title="Hazard (elektronika) – Polish" lang="pl" hreflang="pl" data-title="Hazard (elektronika)" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Condi%C3%A7%C3%A3o_de_corrida" title="Condição de corrida – Portuguese" lang="pt" hreflang="pt" data-title="Condição de corrida" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/%D0%A1%D0%BE%D1%81%D1%82%D0%BE%D1%8F%D0%BD%D0%B8%D0%B5_%D0%B3%D0%BE%D0%BD%D0%BA%D0%B8" title="Состояние гонки – Russian" lang="ru" hreflang="ru" data-title="Состояние гонки" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-simple mw-list-item"><a href="https://simple.wikipedia.org/wiki/Race_condition" title="Race condition – Simple English" lang="en-simple" hreflang="en-simple" data-title="Race condition" data-language-autonym="Simple English" data-language-local-name="Simple English" class="interlanguage-link-target"><span>Simple English</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/%D0%A1%D1%82%D0%B0%D0%BD_%D0%B3%D0%BE%D0%BD%D0%B8%D1%82%D0%B2%D0%B8" title="Стан гонитви – Ukrainian" lang="uk" hreflang="uk" data-title="Стан гонитви" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh-yue mw-list-item"><a href="https://zh-yue.wikipedia.org/wiki/%E7%AB%B6%E7%88%AD%E5%8D%B1%E5%AE%B3" title="競爭危害 – Cantonese" lang="yue" hreflang="yue" data-title="競爭危害" data-language-autonym="粵語" data-language-local-name="Cantonese" class="interlanguage-link-target"><span>粵語</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/%E7%AB%B6%E7%88%AD%E5%8D%B1%E5%AE%B3" title="競爭危害 – Chinese" lang="zh" hreflang="zh" data-title="競爭危害" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a 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.hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">"Critical race" redirects here. For the academic movement, see <a href="/wiki/Critical_race_theory" title="Critical race theory">Critical race theory</a>.</div> <figure typeof="mw:File/Frame"><a href="/wiki/File:Race_condition.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/7/78/Race_condition.svg/262px-Race_condition.svg.png" decoding="async" width="262" height="349" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/7/78/Race_condition.svg/393px-Race_condition.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/7/78/Race_condition.svg/524px-Race_condition.svg.png 2x" data-file-width="262" data-file-height="349" /></a><figcaption>Race condition in a logic circuit. Here, <span class="texhtml">∆<i>t</i><sub>1</sub></span> and <span class="texhtml">∆<i>t</i><sub>2</sub></span> represent the <a href="/wiki/Propagation_delay" title="Propagation delay">propagation delays</a> of the logic elements. When the input value <span class="texhtml mvar" style="font-style:italic;">A</span> changes from low to high, the circuit outputs a short spike of duration <span class="texhtml">(∆<i>t</i><sub>1</sub> + ∆<i>t</i><sub>2</sub>) − ∆<i>t</i><sub>2</sub> = ∆<i>t</i><sub>1</sub></span>.</figcaption></figure> <p>A <b>race condition</b> or <b>race hazard</b> is the condition of an <a href="/wiki/Electronics" title="Electronics">electronics</a>, <a href="/wiki/Software" title="Software">software</a>, or other <a href="/wiki/System" title="System">system</a> where the system's substantive behavior is <a href="/wiki/Sequential_logic" title="Sequential logic">dependent</a> on the sequence or timing of other uncontrollable events, leading to unexpected or inconsistent results. It becomes a <a href="/wiki/Software_bug" title="Software bug">bug</a> when one or more of the possible behaviors is undesirable. </p><p>The term <i>race condition</i> was already in use by 1954, for example in <a href="/wiki/David_A._Huffman" title="David A. Huffman">David A. Huffman</a>'s doctoral thesis "The synthesis of sequential switching circuits".<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">&#91;</span>1<span class="cite-bracket">&#93;</span></a></sup> </p><p>Race conditions can occur especially in <a href="/wiki/Logic_circuit" class="mw-redirect" title="Logic circuit">logic circuits</a> or <a href="/wiki/Thread_(computing)" title="Thread (computing)">multithreaded</a> or <a href="/wiki/Distributed_computing" title="Distributed computing">distributed</a> software programs. Using <a href="/wiki/Mutual_exclusion" title="Mutual exclusion">mutual exclusion</a> can prevent race conditions in distributed software systems. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="In_electronics">In electronics</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=1" title="Edit section: In electronics"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A typical example of a race condition may occur when a <a href="/wiki/Logic_gate" title="Logic gate">logic gate</a> combines signals that have traveled along different paths from the same source. The inputs to the gate can change at slightly different times in response to a change in the source signal. The output may, for a brief period, change to an unwanted state before settling back to the designed state. Certain systems can tolerate such <a href="/wiki/Glitch" title="Glitch">glitches</a> but if this output functions as a <a href="/wiki/Clock_signal" title="Clock signal">clock signal</a> for further systems that contain memory, for example, the system can rapidly depart from its designed behaviour (in effect, the temporary glitch becomes a permanent glitch). </p><p>Consider, for example, a two-input <a href="/wiki/AND_gate" title="AND gate">AND gate</a> fed with the following logic: <span class="mwe-math-element"><span class="mwe-math-mathml-display mwe-math-mathml-a11y" style="display: none;"><math display="block" xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle {\text{output}}=A\wedge {\overline {A}}}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mrow class="MJX-TeXAtom-ORD"> <mtext>output</mtext> </mrow> <mo>=</mo> <mi>A</mi> <mo>&#x2227;<!-- ∧ --></mo> <mrow class="MJX-TeXAtom-ORD"> <mover> <mi>A</mi> <mo accent="false">&#xaf;<!-- ¯ --></mo> </mover> </mrow> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle {\text{output}}=A\wedge {\overline {A}}}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/b410162bf2bb412fc94a08f4a74c3b51611b766c" class="mwe-math-fallback-image-display mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.671ex; width:16.132ex; height:3.343ex;" alt="{\displaystyle {\text{output}}=A\wedge {\overline {A}}}" /></span>A logic signal <span class="mwe-math-element"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle A}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mi>A</mi> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle A}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/7daff47fa58cdfd29dc333def748ff5fa4c923e3" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:1.743ex; height:2.176ex;" alt="{\displaystyle A}" /></span> on one input and its negation, <span class="mwe-math-element"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle \neg A}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mi mathvariant="normal">&#xac;<!-- ¬ --></mi> <mi>A</mi> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle \neg A}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/195aae731102b36b14a902a091d04ac5c6a5af49" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:3.293ex; height:2.176ex;" alt="{\displaystyle \neg A}" /></span> (the ¬ is a <a href="/wiki/Negation" title="Negation">Boolean negation</a>), on another input in theory never output a true value: <span class="mwe-math-element"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle A\wedge {\overline {A}}\neq 1}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mi>A</mi> <mo>&#x2227;<!-- ∧ --></mo> <mrow class="MJX-TeXAtom-ORD"> <mover> <mi>A</mi> <mo accent="false">&#xaf;<!-- ¯ --></mo> </mover> </mrow> <mo>&#x2260;<!-- ≠ --></mo> <mn>1</mn> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle A\wedge {\overline {A}}\neq 1}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/c264bf660daf63e01d3da144ca3179c87d4dd7a8" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.838ex; width:10.445ex; height:3.509ex;" alt="{\displaystyle A\wedge {\overline {A}}\neq 1}" /></span>. If, however, changes in the value of <span class="mwe-math-element"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle A}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mi>A</mi> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle A}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/7daff47fa58cdfd29dc333def748ff5fa4c923e3" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:1.743ex; height:2.176ex;" alt="{\displaystyle A}" /></span> take longer to propagate to the second input than the first when <span class="mwe-math-element"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle A}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mi>A</mi> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle A}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/7daff47fa58cdfd29dc333def748ff5fa4c923e3" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:1.743ex; height:2.176ex;" alt="{\displaystyle A}" /></span> changes from false to true then a brief period will ensue during which both inputs are true, and so the gate's output will also be true.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">&#91;</span>2<span class="cite-bracket">&#93;</span></a></sup> </p><p>A practical example of a race condition can occur when logic circuitry is used to detect certain outputs of a counter. If all the bits of the counter do not change exactly simultaneously, there will be intermediate patterns that can trigger false matches. </p> <div class="mw-heading mw-heading3"><h3 id="Critical_and_non-critical_forms">Critical and non-critical forms</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=2" title="Edit section: Critical and non-critical forms"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A <i>critical race condition</i> occurs when the order in which internal variables are changed determines the eventual state that the <a href="/wiki/State_machine" class="mw-redirect" title="State machine">state machine</a> will end up in. </p><p>A <i>non-critical race condition</i> occurs when the order in which internal variables are changed does not determine the eventual state that the state machine will end up in. </p> <div class="mw-heading mw-heading3"><h3 id="Static,_dynamic,_and_essential_forms"><span id="Static.2C_dynamic.2C_and_essential_forms"></span>Static, dynamic, and essential forms</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=3" title="Edit section: Static, dynamic, and essential forms"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A <i>static race condition</i> occurs when a signal and its complement are combined. </p><p>A <i>dynamic race condition</i> occurs when it results in multiple transitions when only one is intended. They are due to interaction between gates. It can be eliminated by using no more than two levels of gating. </p><p>An <i>essential race condition</i> occurs when an input has two transitions in less than the total feedback propagation time. Sometimes they are cured using inductive <a href="/wiki/Analog_delay_line" title="Analog delay line">delay line</a> elements to effectively increase the time duration of an input signal. </p> <div class="mw-heading mw-heading2"><h2 id="Workarounds">Workarounds</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=4" title="Edit section: Workarounds"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Design techniques such as <a href="/wiki/Karnaugh_map" title="Karnaugh map">Karnaugh maps</a> encourage designers to recognize and eliminate race conditions before they cause problems. Often <a href="/wiki/Logic_redundancy" title="Logic redundancy">logic redundancy</a> can be added to eliminate some kinds of races. </p><p>As well as these problems, some logic elements can enter <a href="/wiki/Metastability_(electronics)" title="Metastability (electronics)">metastable states</a>, which create further problems for circuit designers. </p> <div class="mw-heading mw-heading2"><h2 id="In_software">In software</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=5" title="Edit section: In software"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A race condition can arise in software when a computer program has multiple code paths that are executing at the same time. If the multiple code paths take a different amount of time than expected, they can finish in a different order than expected, which can cause software bugs due to unanticipated behavior. A race can also occur between two programs, resulting in security issues. </p><p>Critical race conditions cause invalid execution and <a href="/wiki/Software_bug" title="Software bug">software bugs</a>. Critical race conditions often happen when the processes or threads depend on some shared state. Operations upon shared states are done in <a href="/wiki/Critical_section" title="Critical section">critical sections</a> that must be <a href="/wiki/Mutual_exclusion" title="Mutual exclusion">mutually exclusive</a>. Failure to obey this rule can corrupt the shared state. </p><p>A data race is a type of race condition. Data races are important parts of various formal <a href="/wiki/Memory_model_(programming)" title="Memory model (programming)">memory models</a>. The memory model defined in the <a href="/wiki/C11_(C_standard_revision)" title="C11 (C standard revision)">C11</a> and <a href="/wiki/C%2B%2B11" title="C++11">C++11</a> standards specify that a C or C++ program containing a data race has <a href="/wiki/Undefined_behavior" title="Undefined behavior">undefined behavior</a>.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">&#91;</span>3<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">&#91;</span>4<span class="cite-bracket">&#93;</span></a></sup> </p><p>A race condition can be difficult to reproduce and debug because the end result is <a href="/wiki/Nondeterministic_algorithm" title="Nondeterministic algorithm">nondeterministic</a> and depends on the relative timing between interfering threads. Problems of this nature can therefore disappear when running in debug mode, adding extra logging, or attaching a debugger. A bug that disappears like this during debugging attempts is often referred to as a "<a href="/wiki/Heisenbug" title="Heisenbug">Heisenbug</a>". It is therefore better to avoid race conditions by careful software design. </p> <div class="mw-heading mw-heading3"><h3 id="Example">Example</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=6" title="Edit section: Example"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Assume that two threads each increment the value of a global integer variable by 1. Ideally, the following sequence of operations would take place: </p> <table class="wikitable" style="text-align: center;"> <tbody><tr> <th>Thread 1</th> <th>Thread 2</th> <th></th> <th>Integer value </th></tr> <tr> <td></td> <td></td> <td></td> <td>0 </td></tr> <tr> <td>read value</td> <td></td> <td>←</td> <td>0 </td></tr> <tr> <td style="background: wheat;">increase value</td> <td></td> <td></td> <td>0 </td></tr> <tr> <td>write back</td> <td></td> <td>→</td> <td>1 </td></tr> <tr> <td></td> <td>read value</td> <td>←</td> <td>1 </td></tr> <tr> <td></td> <td style="background: wheat;">increase value</td> <td></td> <td>1 </td></tr> <tr> <td></td> <td>write back</td> <td>→</td> <td>2 </td></tr></tbody></table> <p>In the case shown above, the final value is 2, as expected. However, if the two threads run simultaneously without locking or synchronization (via <a href="/wiki/Semaphore_(programming)" title="Semaphore (programming)">semaphores</a>), the outcome of the operation could be wrong. The alternative sequence of operations below demonstrates this scenario: </p> <table class="wikitable" style="text-align: center;"> <tbody><tr> <th>Thread 1</th> <th>Thread 2</th> <th></th> <th>Integer value </th></tr> <tr> <td></td> <td></td> <td></td> <td>0 </td></tr> <tr> <td>read value</td> <td></td> <td>←</td> <td>0 </td></tr> <tr> <td></td> <td>read value</td> <td>←</td> <td>0 </td></tr> <tr> <td style="background: wheat;">increase value</td> <td></td> <td></td> <td>0 </td></tr> <tr> <td></td> <td style="background: wheat;">increase value</td> <td></td> <td>0 </td></tr> <tr> <td>write back</td> <td></td> <td>→</td> <td>1 </td></tr> <tr> <td></td> <td>write back</td> <td>→</td> <td>1 </td></tr></tbody></table> <p>In this case, the final value is 1 instead of the expected result of 2. This occurs because here the increment operations are not mutually exclusive. Mutually exclusive operations are those that cannot be interrupted while accessing some resource such as a memory location. </p> <div class="mw-heading mw-heading3"><h3 id="Data_race">Data race</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=7" title="Edit section: Data race"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Not everyone regards data races as a subset of race conditions.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">&#91;</span>5<span class="cite-bracket">&#93;</span></a></sup> The precise definition of data race is specific to the formal concurrency model being used, but typically it refers to a situation where a memory operation in one thread could potentially attempt to access a memory location at the same time that a memory operation in another thread is writing to that memory location, in a context where this is dangerous. This implies that a data race is different from a race condition as it is possible to have <a href="/wiki/Indeterminacy_in_computation" class="mw-disambig" title="Indeterminacy in computation">nondeterminism</a> due to timing even in a program without data races, for example, in a program in which all memory accesses use only <a href="/wiki/Atomic_operation" class="mw-redirect" title="Atomic operation">atomic operations</a>. </p><p>This can be dangerous because on many platforms, if two threads write to a memory location at the same time, it may be possible for the memory location to end up holding a value that is some arbitrary and meaningless combination of the bits representing the values that each thread was attempting to write; this could result in memory corruption if the resulting value is one that neither thread attempted to write (sometimes this is called a '<a href="/w/index.php?title=Torn_write&amp;action=edit&amp;redlink=1" class="new" title="Torn write (page does not exist)">torn write</a>'). Similarly, if one thread reads from a location while another thread is writing to it, it may be possible for the read to return a value that is some arbitrary and meaningless combination of the bits representing the value that the memory location held before the write, and of the bits representing the value being written. </p><p>On many platforms, special memory operations are provided for simultaneous access; in such cases, typically simultaneous access using these special operations is safe, but simultaneous access using other memory operations is dangerous. Sometimes such special operations (which are safe for simultaneous access) are called <i>atomic</i> or <i>synchronization</i> operations, whereas the ordinary operations (which are unsafe for simultaneous access) are called <i>data</i> operations. This is probably why the term is <i>data</i> race; on many platforms, where there is a race condition involving only <i>synchronization</i> operations, such a race may be nondeterministic but otherwise safe; but a <i>data</i> race could lead to memory corruption or undefined behavior. </p> <div class="mw-heading mw-heading3"><h3 id="Example_definitions_of_data_races_in_particular_concurrency_models">Example definitions of data races in particular concurrency models</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=8" title="Edit section: Example definitions of data races in particular concurrency models"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The precise definition of data race differs across formal concurrency models. This matters because concurrent behavior is often non-intuitive and so formal reasoning is sometimes applied. </p><p>The <i>C++ standard</i>, in draft N4296 (2014-11-19), defines data race as follows in section 1.10.23 (page 14)<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">&#91;</span>6<span class="cite-bracket">&#93;</span></a></sup> </p> <blockquote> <p>Two actions are <i>potentially concurrent</i> if </p> <ul><li>they are performed by different threads, or</li> <li>they are unsequenced, and at least one is performed by a signal handler.</li></ul> <p>The execution of a program contains a <i>data race</i> if it contains two potentially concurrent conflicting actions, at least one of which is not atomic, and neither happens before the other, except for the special case for signal handlers described below [omitted]. Any such data race results in undefined behavior. </p> </blockquote> <p>The parts of this definition relating to signal handlers are idiosyncratic to C++ and are not typical of definitions of <i>data race</i>. </p><p>The paper <i>Detecting Data Races on Weak Memory Systems</i><sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">&#91;</span>7<span class="cite-bracket">&#93;</span></a></sup> provides a different definition: </p> <blockquote><p>"two memory operations <i>conflict</i> if they access the same location and at least one of them is a write operation&#160;... "Two memory operations, x and y, in a sequentially consistent execution form a race 〈x,y〉, <a href="/wiki/Iff" class="mw-redirect" title="Iff">iff</a> x and y conflict, and they are not ordered by the hb1 relation of the execution. The race 〈x,y〉, is a <i>data race</i> iff at least one of x or y is a data operation.</p></blockquote> <p>Here we have two memory operations accessing the same location, one of which is a write. </p><p>The hb1 relation is defined elsewhere in the paper, and is an example of a typical "<a href="/wiki/Happens-before" class="mw-redirect" title="Happens-before">happens-before</a>" relation; intuitively, if we can prove that we are in a situation where one memory operation X is guaranteed to be executed to completion before another memory operation Y begins, then we say that "X happens-before Y". If neither "X happens-before Y" nor "Y happens-before X", then we say that X and Y are "not ordered by the hb1 relation". So, the clause "...&#160;and they are not ordered by the hb1 relation of the execution" can be intuitively translated as "...&#160;and X and Y are potentially concurrent". </p><p>The paper considers dangerous only those situations in which at least one of the memory operations is a "data operation"; in other parts of this paper, the paper also defines a class of "<a href="/w/index.php?title=Synchronization_operations&amp;action=edit&amp;redlink=1" class="new" title="Synchronization operations (page does not exist)">synchronization operations</a>" which are safe for potentially simultaneous use, in contrast to "data operations". </p><p>The <i>Java Language Specification</i><sup id="cite_ref-auto_8-0" class="reference"><a href="#cite_note-auto-8"><span class="cite-bracket">&#91;</span>8<span class="cite-bracket">&#93;</span></a></sup> provides a different definition: </p> <blockquote><p>Two accesses to (reads of or writes to) the same variable are said to be conflicting if at least one of the accesses is a write&#160;... When a program contains two conflicting accesses (§17.4.1) that are not ordered by a happens-before relationship, it is said to contain a data race&#160;... a data race cannot cause incorrect behavior such as returning the wrong length for an array.</p></blockquote> <p>A critical difference between the C++ approach and the Java approach is that in C++, a data race is undefined behavior, whereas in Java, a data race merely affects "inter-thread actions".<sup id="cite_ref-auto_8-1" class="reference"><a href="#cite_note-auto-8"><span class="cite-bracket">&#91;</span>8<span class="cite-bracket">&#93;</span></a></sup> This means that in C++, an attempt to execute a program containing a data race could (while still adhering to the spec) crash or could exhibit insecure or bizarre behavior, whereas in Java, an attempt to execute a program containing a data race may produce undesired concurrency behavior but is otherwise (assuming that the implementation adheres to the spec) safe. </p> <div class="mw-heading mw-heading4"><h4 id="Sequential_Consistency_for_Data_Race_Freedom">Sequential Consistency for Data Race Freedom</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=9" title="Edit section: Sequential Consistency for Data Race Freedom"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>An important facet of data races is that in some contexts, a program that is free of data races is guaranteed to execute in a <a href="/wiki/Sequentially_consistent" class="mw-redirect" title="Sequentially consistent">sequentially consistent</a> manner, greatly easing reasoning about the concurrent behavior of the program. Formal memory models that provide such a guarantee are said to exhibit an "SC for DRF" (Sequential Consistency for Data Race Freedom) property. This approach has been said to have achieved recent consensus (presumably compared to approaches which guarantee sequential consistency in all cases, or approaches which do not guarantee it at all).<sup id="cite_ref-auto1_9-0" class="reference"><a href="#cite_note-auto1-9"><span class="cite-bracket">&#91;</span>9<span class="cite-bracket">&#93;</span></a></sup> </p><p>For example, in Java, this guarantee is directly specified:<sup id="cite_ref-auto_8-2" class="reference"><a href="#cite_note-auto-8"><span class="cite-bracket">&#91;</span>8<span class="cite-bracket">&#93;</span></a></sup> </p> <blockquote> <p>A program is correctly synchronized if and only if all sequentially consistent executions are free of data races. </p><p>If a program is correctly synchronized, then all executions of the program will appear to be sequentially consistent (§17.4.3). </p><p><i>This is an extremely strong guarantee for programmers. Programmers do not need to reason about reorderings to determine that their code contains data races. Therefore they do not need to reason about reorderings when determining whether their code is correctly synchronized. Once the determination that the code is correctly synchronized is made, the programmer does not need to worry that reorderings will affect his or her code.</i> </p><p><i>A program must be correctly synchronized to avoid the kinds of counterintuitive behaviors that can be observed when code is reordered. The use of correct synchronization does not ensure that the overall behavior of a program is correct. However, its use does allow a programmer to reason about the possible behaviors of a program in a simple way; the behavior of a correctly synchronized program is much less dependent on possible reorderings. Without correct synchronization, very strange, confusing and counterintuitive behaviors are possible.</i> </p> </blockquote> <p>By contrast, a draft C++ specification does not directly require an SC for DRF property, but merely observes that there exists a theorem providing it: </p> <blockquote> <p>[Note:It can be shown that programs that correctly use mutexes and memory_order_seq_cst operations to prevent all data races and use no other synchronization operations behave as if the operations executed by their constituent threads were simply interleaved, with each value computation of an object being taken from the last side effect on that object in that interleaving. This is normally referred to as “sequential consistency”. However, this applies only to data-race-free programs, and data-race-free programs cannot observe most program transformations that do not change single-threaded program semantics. In fact, most single-threaded program transformations continue to be allowed, since any program that behaves differently as a result must perform an undefined operation.— end note </p> </blockquote> <p>Note that the C++ draft specification admits the possibility of programs that are valid but use synchronization operations with a memory_order other than memory_order_seq_cst, in which case the result may be a program which is correct but for which no guarantee of sequentially consistency is provided. In other words, in C++, some correct programs are not sequentially consistent. This approach is thought to give C++ programmers the freedom to choose faster program execution at the cost of giving up ease of reasoning about their program.<sup id="cite_ref-auto1_9-1" class="reference"><a href="#cite_note-auto1-9"><span class="cite-bracket">&#91;</span>9<span class="cite-bracket">&#93;</span></a></sup> </p><p>There are various theorems, often provided in the form of memory models, that provide SC for DRF guarantees given various contexts. The premises of these theorems typically place constraints upon both the memory model (and therefore upon the implementation), and also upon the programmer; that is to say, typically it is the case that there are programs which do not meet the premises of the theorem and which could not be guaranteed to execute in a sequentially consistent manner. </p><p>The DRF1 memory model<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">&#91;</span>10<span class="cite-bracket">&#93;</span></a></sup> provides SC for DRF and allows the optimizations of the WO (weak ordering), RCsc (<a href="/wiki/Release_Consistency" class="mw-redirect" title="Release Consistency">Release Consistency</a> with sequentially consistent special operations), VAX memory model, and data-race-free-0 memory models. The PLpc memory model<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">&#91;</span>11<span class="cite-bracket">&#93;</span></a></sup> provides SC for DRF and allows the optimizations of the TSO (<a href="/w/index.php?title=Total_Store_Order&amp;action=edit&amp;redlink=1" class="new" title="Total Store Order (page does not exist)">Total Store Order</a>), PSO, PC (<a href="/wiki/Processor_Consistency" class="mw-redirect" title="Processor Consistency">Processor Consistency</a>), and RCpc (<a href="/wiki/Release_Consistency" class="mw-redirect" title="Release Consistency">Release Consistency</a> with processor consistency special operations) models. DRFrlx<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">&#91;</span>12<span class="cite-bracket">&#93;</span></a></sup> provides a sketch of an SC for DRF theorem in the presence of relaxed atomics. </p> <div class="mw-heading mw-heading3"><h3 id="Computer_security">Computer security</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=10" title="Edit section: Computer security"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Many software race conditions have associated <a href="/wiki/Computer_security" title="Computer security">computer security</a> implications. A race condition allows an attacker with access to a shared resource to cause other actors that utilize that resource to malfunction, resulting in effects including <a href="/wiki/Denial_of_service" class="mw-redirect" title="Denial of service">denial of service</a><sup id="cite_ref-CVE-2015-8461_13-0" class="reference"><a href="#cite_note-CVE-2015-8461-13"><span class="cite-bracket">&#91;</span>13<span class="cite-bracket">&#93;</span></a></sup> and <a href="/wiki/Privilege_escalation" title="Privilege escalation">privilege escalation</a>.<sup id="cite_ref-CVE-2017-6512_14-0" class="reference"><a href="#cite_note-CVE-2017-6512-14"><span class="cite-bracket">&#91;</span>14<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-lighttpd-issue-2724_15-0" class="reference"><a href="#cite_note-lighttpd-issue-2724-15"><span class="cite-bracket">&#91;</span>15<span class="cite-bracket">&#93;</span></a></sup> </p><p>A specific kind of race condition involves checking for a predicate (e.g. for <a href="/wiki/Authentication" title="Authentication">authentication</a>), then acting on the predicate, while the state can change between the <i>time-of-check</i> and the <i>time-of-use</i>. When this kind of <a href="/wiki/Computer_bug" class="mw-redirect" title="Computer bug">bug</a> exists in security-sensitive code, a <a href="/wiki/Security_vulnerability" class="mw-redirect" title="Security vulnerability">security vulnerability</a> called a <a href="/wiki/Time-of-check-to-time-of-use" class="mw-redirect" title="Time-of-check-to-time-of-use">time-of-check-to-time-of-use</a> (<i>TOCTTOU</i>) bug is created. </p><p>Race conditions are also intentionally used to create <a href="/wiki/Hardware_random_number_generator" title="Hardware random number generator">hardware random number generators</a> and <a href="/wiki/Physically_unclonable_function" class="mw-redirect" title="Physically unclonable function">physically unclonable functions</a>.<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">&#91;</span>16<span class="cite-bracket">&#93;</span></a></sup><sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="The previous reference is one example and does not support the general rule as stated. (February 2018)">citation needed</span></a></i>&#93;</sup> PUFs can be created by designing circuit topologies with identical paths to a node and relying on manufacturing variations to randomly determine which paths will complete first. By measuring each manufactured circuit's specific set of race condition outcomes, a profile can be collected for each circuit and kept secret in order to later verify a circuit's identity. </p> <div class="mw-heading mw-heading3"><h3 id="File_systems">File systems</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=11" title="Edit section: File systems"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Two or more programs may collide in their attempts to modify or access a file system, which can result in data corruption or privilege escalation.<sup id="cite_ref-CVE-2017-6512_14-1" class="reference"><a href="#cite_note-CVE-2017-6512-14"><span class="cite-bracket">&#91;</span>14<span class="cite-bracket">&#93;</span></a></sup> <a href="/wiki/File_locking" title="File locking">File locking</a> provides a commonly used solution. A more cumbersome remedy involves organizing the system in such a way that one unique process (running a <a href="/wiki/Daemon_(computing)" title="Daemon (computing)">daemon</a> or the like) has exclusive access to the file, and all other processes that need to access the data in that file do so only via interprocess communication with that one process. This requires synchronization at the process level. </p><p>A different form of race condition exists in file systems where unrelated programs may affect each other by suddenly using up available resources such as disk space, memory space, or processor cycles. Software not carefully designed to anticipate and handle this race situation may then become unpredictable. Such a risk may be overlooked for a long time in a system that seems very reliable. But eventually enough data may accumulate or enough other software may be added to critically destabilize many parts of a system. An example of this occurred with <a href="/wiki/Timeline_of_Spirit#Sol_17_flash_memory_management_anomaly" title="Timeline of Spirit">the near loss of the Mars Rover "Spirit"</a> not long after landing, which occurred due to deleted file entries causing the file system library to consume all available memory space.<sup id="cite_ref-r229_17-0" class="reference"><a href="#cite_note-r229-17"><span class="cite-bracket">&#91;</span>17<span class="cite-bracket">&#93;</span></a></sup> A solution is for software to request and reserve all the resources it will need before beginning a task; if this request fails then the task is postponed, avoiding the many points where failure could have occurred. Alternatively, each of those points can be equipped with error handling, or the success of the entire task can be verified afterwards, before continuing. A more common approach is to simply verify that enough system resources are available before starting a task; however, this may not be adequate because in complex systems the actions of other running programs can be unpredictable. </p> <div class="mw-heading mw-heading3"><h3 id="Networking">Networking</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=12" title="Edit section: Networking"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In networking, consider a distributed chat network like <a href="/wiki/IRC" title="IRC">IRC</a>, where a user who starts a channel automatically acquires channel-operator privileges. If two users on different servers, on different ends of the same network, try to start the same-named channel at the same time, each user's respective server will grant channel-operator privileges to each user, since neither server will yet have received the other server's signal that it has allocated that channel. (This problem has been largely <a href="/wiki/Internet_Relay_Chat#Abuse_prevention" class="mw-redirect" title="Internet Relay Chat">solved</a> by various IRC server implementations.) </p><p>In this case of a race condition, the concept of the "<a href="/wiki/Shared_resource" title="Shared resource">shared resource</a>" covers the state of the network (what channels exist, as well as what users started them and therefore have what privileges), which each server can freely change as long as it signals the other servers on the network about the changes so that they can update their conception of the state of the network. However, the <a href="/wiki/Network_latency" class="mw-redirect" title="Network latency">latency</a> across the network makes possible the kind of race condition described. In this case, heading off race conditions by imposing a form of control over access to the shared resource—say, appointing one server to control who holds what privileges—would mean turning the distributed network into a centralized one (at least for that one part of the network operation). </p><p>Race conditions can also exist when a computer program is written with <a href="/wiki/Berkeley_sockets#Blocking_vs._non-blocking_mode" title="Berkeley sockets">non-blocking sockets</a>, in which case the performance of the program can be dependent on the speed of the network link. </p> <div class="mw-heading mw-heading3"><h3 id="Life-critical_systems">Life-critical systems</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=13" title="Edit section: Life-critical systems"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Software flaws in <a href="/wiki/Life-critical_system" class="mw-redirect" title="Life-critical system">life-critical systems</a> can be disastrous. Race conditions were among the flaws in the <a href="/wiki/Therac-25" title="Therac-25">Therac-25</a> <a href="/wiki/Radiation_therapy" title="Radiation therapy">radiation therapy</a> machine, which led to the death of at least three patients and injuries to several more.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">&#91;</span>18<span class="cite-bracket">&#93;</span></a></sup> </p><p>Another example is the <a href="/wiki/Energy_management_system" title="Energy management system">energy management system</a> provided by <a href="/wiki/GE_Energy" class="mw-redirect" title="GE Energy">GE Energy</a> and used by <a href="/wiki/Ohio" title="Ohio">Ohio</a>-based <a href="/wiki/FirstEnergy_Corp" class="mw-redirect" title="FirstEnergy Corp">FirstEnergy Corp</a> (among other power facilities). A race condition existed in the alarm subsystem; when three sagging power lines were tripped simultaneously, the condition prevented alerts from being raised to the monitoring technicians, delaying their awareness of the problem. This software flaw eventually led to the <a href="/wiki/2003_North_America_blackout" class="mw-redirect" title="2003 North America blackout">North American Blackout of 2003</a>.<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">&#91;</span>19<span class="cite-bracket">&#93;</span></a></sup> GE Energy later developed a software patch to correct the previously undiscovered error. </p> <div class="mw-heading mw-heading3"><h3 id="Tools">Tools</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=14" title="Edit section: Tools"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Many software tools exist to help detect race conditions in software. They can be largely categorized into two groups: <a href="/wiki/Static_program_analysis" title="Static program analysis">static analysis</a> tools and <a href="/wiki/Dynamic_program_analysis" title="Dynamic program analysis">dynamic analysis</a> tools. </p><p>Thread Safety Analysis is a static analysis tool for annotation-based intra-procedural static analysis, originally implemented as a branch of gcc, and now reimplemented in <a href="/wiki/Clang" title="Clang">Clang</a>, supporting PThreads.<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">&#91;</span>20<span class="cite-bracket">&#93;</span></a></sup><sup class="noprint Inline-Template noprint Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:No_original_research#Primary,_secondary_and_tertiary_sources" title="Wikipedia:No original research"><span title="This claim needs references to reliable secondary sources. (December 2016)">non-primary source needed</span></a></i>&#93;</sup> </p><p>Dynamic analysis tools include: </p> <ul><li><a href="/wiki/Intel_Inspector" title="Intel Inspector">Intel Inspector</a>, a memory and thread checking and debugging tool to increase the reliability, security, and accuracy of C/C++ and Fortran applications; <a href="/wiki/Intel_Advisor" title="Intel Advisor">Intel Advisor</a>, a sampling based, SIMD vectorization optimization and shared memory threading assistance tool for C, C++, C#, and Fortran software developers and architects;</li> <li>ThreadSanitizer, which uses binary (<a href="/wiki/Valgrind" title="Valgrind">Valgrind</a>-based) or source, <a href="/wiki/LLVM" title="LLVM">LLVM</a>-based instrumentation, and supports PThreads;<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">&#91;</span>21<span class="cite-bracket">&#93;</span></a></sup><sup class="noprint Inline-Template noprint Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:No_original_research#Primary,_secondary_and_tertiary_sources" title="Wikipedia:No original research"><span title="This claim needs references to reliable secondary sources. (December 2016)">non-primary source needed</span></a></i>&#93;</sup> and Helgrind, a <a href="/wiki/Valgrind" title="Valgrind">Valgrind</a> tool for detecting synchronisation errors in C, C++ and Fortran programs that use the POSIX pthreads threading primitives.<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">&#91;</span>22<span class="cite-bracket">&#93;</span></a></sup><sup class="noprint Inline-Template noprint Template-Fact" style="white-space:nowrap;">&#91;<i><a href="/wiki/Wikipedia:No_original_research#Primary,_secondary_and_tertiary_sources" title="Wikipedia:No original research"><span title="This claim needs references to reliable secondary sources. (December 2016)">non-primary source needed</span></a></i>&#93;</sup></li> <li>Data Race Detector<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">&#91;</span>23<span class="cite-bracket">&#93;</span></a></sup> is designed to find data races in the Go Programming language.</li></ul> <p>There are several benchmarks designed to evaluate the effectiveness of data race detection tools </p> <ul><li>DataRaceBench<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">&#91;</span>24<span class="cite-bracket">&#93;</span></a></sup> is a benchmark suite designed to systematically and quantitatively evaluate data race detection tools which analyze multi-threaded applications written in <a href="/wiki/OpenMP" title="OpenMP">OpenMP</a>.</li></ul> <div class="mw-heading mw-heading2"><h2 id="In_other_areas">In other areas</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=15" title="Edit section: In other areas"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 1.5x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Race_condition&amp;action=edit&amp;section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2016</span>)</i></span></div></td></tr></tbody></table> <p>Neuroscience is demonstrating that race conditions can occur in mammal brains as well.<sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">&#91;</span>25<span class="cite-bracket">&#93;</span></a></sup><sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">&#91;</span>26<span class="cite-bracket">&#93;</span></a></sup> </p><p>In <a href="/wiki/UK_railway_signalling" title="UK railway signalling">UK railway signalling</a>, a race condition would arise in the carrying out of <a href="/wiki/Rule_55" title="Rule 55">Rule 55</a>. According to this rule, if a train was stopped on a running line by a signal, the locomotive fireman would walk to the signal box in order to remind the signalman that the train was present. In at least one case, at <a href="/wiki/Winwick_rail_crash" title="Winwick rail crash">Winwick</a> in 1934, an accident occurred because the signalman accepted another train before the fireman arrived. Modern signalling practice removes the race condition by making it possible for the driver to instantaneously contact the signal box by radio. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=16" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Call_collision" title="Call collision">Call collision</a></li> <li><a href="/wiki/Concurrency_control" title="Concurrency control">Concurrency control</a></li> <li><a href="/wiki/Deadlock_(computer_science)" title="Deadlock (computer science)">Deadlock</a></li> <li><a href="/wiki/Hazard_(logic)" title="Hazard (logic)">Hazard (logic)</a></li> <li><a href="/wiki/Linearizability" title="Linearizability">Linearizability</a></li> <li><a href="/wiki/Racetrack_problem" title="Racetrack problem">Racetrack problem</a></li> <li><a href="/wiki/Symlink_race" title="Symlink race">Symlink race</a></li> <li><a href="/wiki/Synchronization_(computer_science)" title="Synchronization (computer science)">Synchronization (computer science)</a></li> <li><a href="/wiki/Time-of-check_to_time-of-use" title="Time-of-check to time-of-use">Time-of-check to time-of-use</a></li> <li><a href="/wiki/Test-and-set" title="Test-and-set">Test-and-set</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=17" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">Huffman, David A. "<a rel="nofollow" class="external text" href="https://dspace.mit.edu/bitstream/handle/1721.1/4804/RLE-TR-274-14266383.pdf?sequence=1">The synthesis of sequential switching circuits.</a>" (1954).</span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFUnger1995" class="citation journal cs1">Unger, S.H. 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Retrieved <span class="nowrap">2013-08-07</span></span>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=unknown&amp;rft.jtitle=Neuroskeptic&amp;rft.atitle=How+Brains+Race+to+Cancel+Errant+Movements&amp;rft.date=2013-08-03&amp;rft_id=https%3A%2F%2Fblogs.discovermagazine.com%2Fneuroskeptic%2F2013%2F08%2F03%2Fthe-race-to-stop-an-errant-movement%2F&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ARace+condition" class="Z3988"></span></span> </li> <li id="cite_note-26"><span class="mw-cite-backlink"><b><a href="#cite_ref-26">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite id="CITEREFSchmidtLeventhalMalletChen2013" class="citation journal cs1">Schmidt, Robert; Leventhal, Daniel K; Mallet, Nicolas; Chen, Fujun; Berke, Joshua D (2013). <a rel="nofollow" class="external text" href="https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3733500">"Canceling actions involves a race between basal ganglia pathways"</a>. <i>Nature Neuroscience</i>. <b>16</b> (8): <span class="nowrap">1118–</span>24. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1038%2Fnn.3456">10.1038/nn.3456</a>. <a href="/wiki/PMC_(identifier)" class="mw-redirect" title="PMC (identifier)">PMC</a>&#160;<span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3733500">3733500</a></span>. <a href="/wiki/PMID_(identifier)" class="mw-redirect" title="PMID (identifier)">PMID</a>&#160;<a rel="nofollow" class="external text" href="https://pubmed.ncbi.nlm.nih.gov/23852117">23852117</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=Nature+Neuroscience&amp;rft.atitle=Canceling+actions+involves+a+race+between+basal+ganglia+pathways&amp;rft.volume=16&amp;rft.issue=8&amp;rft.pages=%3Cspan+class%3D%22nowrap%22%3E1118-%3C%2Fspan%3E24&amp;rft.date=2013&amp;rft_id=https%3A%2F%2Fwww.ncbi.nlm.nih.gov%2Fpmc%2Farticles%2FPMC3733500%23id-name%3DPMC&amp;rft_id=info%3Apmid%2F23852117&amp;rft_id=info%3Adoi%2F10.1038%2Fnn.3456&amp;rft.aulast=Schmidt&amp;rft.aufirst=Robert&amp;rft.au=Leventhal%2C+Daniel+K&amp;rft.au=Mallet%2C+Nicolas&amp;rft.au=Chen%2C+Fujun&amp;rft.au=Berke%2C+Joshua+D&amp;rft_id=https%3A%2F%2Fwww.ncbi.nlm.nih.gov%2Fpmc%2Farticles%2FPMC3733500&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ARace+condition" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Race_condition&amp;action=edit&amp;section=18" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite id="CITEREFKaramBuhr1990" class="citation journal cs1">Karam, G.M.; Buhr, R.J.A. (August 1990). "Starvation and Critical Race Analyzers for Ada". <i><a href="/wiki/IEEE_Transactions_on_Software_Engineering" title="IEEE Transactions on Software Engineering">IEEE Transactions on Software Engineering</a></i>. <b>16</b> (8): <span class="nowrap">829–</span>843. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2F32.57622">10.1109/32.57622</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=article&amp;rft.jtitle=IEEE+Transactions+on+Software+Engineering&amp;rft.atitle=Starvation+and+Critical+Race+Analyzers+for+Ada&amp;rft.volume=16&amp;rft.issue=8&amp;rft.pages=%3Cspan+class%3D%22nowrap%22%3E829-%3C%2Fspan%3E843&amp;rft.date=1990-08&amp;rft_id=info%3Adoi%2F10.1109%2F32.57622&amp;rft.aulast=Karam&amp;rft.aufirst=G.M.&amp;rft.au=Buhr%2C+R.J.A.&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ARace+condition" class="Z3988"></span></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite id="CITEREFFuhrerLinNowick1995" class="citation book cs1">Fuhrer, R.M.; Lin, B.; Nowick, S.M. (March 1995). "Algorithms for the optimal state assignment of asynchronous state machines". <i>Advanced Research in VLSI, 1995. Proceedings., 16th Conference on</i>. pp.&#160;<span class="nowrap">59–</span>75. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FARVLSI.1995.515611">10.1109/ARVLSI.1995.515611</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&#160;<a href="/wiki/Special:BookSources/978-0-8186-7047-3" title="Special:BookSources/978-0-8186-7047-3"><bdi>978-0-8186-7047-3</bdi></a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a>&#160;<a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:4435912">4435912</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=bookitem&amp;rft.atitle=Algorithms+for+the+optimal+state+assignment+of+asynchronous+state+machines&amp;rft.btitle=Advanced+Research+in+VLSI%2C+1995.+Proceedings.%2C+16th+Conference+on&amp;rft.pages=%3Cspan+class%3D%22nowrap%22%3E59-%3C%2Fspan%3E75&amp;rft.date=1995-03&amp;rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A4435912%23id-name%3DS2CID&amp;rft_id=info%3Adoi%2F10.1109%2FARVLSI.1995.515611&amp;rft.isbn=978-0-8186-7047-3&amp;rft.aulast=Fuhrer&amp;rft.aufirst=R.M.&amp;rft.au=Lin%2C+B.&amp;rft.au=Nowick%2C+S.M.&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ARace+condition" class="Z3988"></span> <a rel="nofollow" class="external text" href="https://www.cs.columbia.edu/~rmf/arvlsi-95.pdf">as PDF</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20210610233249/http://www.cs.columbia.edu/~rmf/arvlsi-95.pdf">Archived</a> 2021-06-10 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li> <li>Paper "<a rel="nofollow" class="external text" href="http://citeseer.ist.psu.edu/11804.html">A Novel Framework for Solving the State Assignment Problem for Event-Based Specifications</a>" by Luciano Lavagno, Cho W. Moon, <a href="/wiki/Robert_K._Brayton" class="mw-redirect" title="Robert K. Brayton">Robert K. Brayton</a>, and <a href="/wiki/Alberto_Sangiovanni-Vincentelli" title="Alberto Sangiovanni-Vincentelli">Alberto Sangiovanni-Vincentelli</a></li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite id="CITEREFWheeler2004" class="citation web cs1">Wheeler, David A. (7 October 2004). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20090201132237/http://www-128.ibm.com/developerworks/linux/library/l-sprace.html">"Secure programmer: Prevent race conditions—Resource contention can be used against you"</a>. <i>IBM developerWorks</i>. Archived from <a rel="nofollow" class="external text" href="http://www-128.ibm.com/developerworks/linux/library/l-sprace.html">the original</a> <span class="cs1-format">(PDF)</span> on February 1, 2009.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.genre=unknown&amp;rft.jtitle=IBM+developerWorks&amp;rft.atitle=Secure+programmer%3A+Prevent+race+conditions%E2%80%94Resource+contention+can+be+used+against+you&amp;rft.date=2004-10-07&amp;rft.aulast=Wheeler&amp;rft.aufirst=David+A.&amp;rft_id=http%3A%2F%2Fwww-128.ibm.com%2Fdeveloperworks%2Flinux%2Flibrary%2Fl-sprace.html&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ARace+condition" class="Z3988"></span> <a rel="nofollow" class="external text" href="http://www.ida.liu.se/~TDDC90/literature/papers/SP-race-conditions.pdf">Alt URL</a></li> <li>Chapter "<a rel="nofollow" class="external text" href="http://www.dwheeler.com/secure-programs/Secure-Programs-HOWTO/avoid-race.html">Avoid Race Conditions</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20140309200513/http://www.dwheeler.com/secure-programs/Secure-Programs-HOWTO/avoid-race.html">Archived</a> 2014-03-09 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>" (Secure Programming for Linux and Unix HOWTO)</li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070926215258/http://chiralsoftware.com/blog/Race-condition-vulnerability-in-syscall-wrappers-fa3e57c594119803.html">Race conditions, security, and immutability in Java</a>, with sample source code and comparison to C code, by Chiral Software</li> <li><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite id="CITEREFKarpov2009" class="citation web cs1">Karpov, Andrey (6 April 2009). <a rel="nofollow" class="external text" href="https://pvs-studio.com/en/blog/posts/cpp/a0041/">"Interview with Dmitriy Vyukov - the author of Relacy Race Detector (RRD)"</a>.</cite><span title="ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.genre=unknown&amp;rft.btitle=Interview+with+Dmitriy+Vyukov+-+the+author+of+Relacy+Race+Detector+%28RRD%29&amp;rft.date=2009-04-06&amp;rft.aulast=Karpov&amp;rft.aufirst=Andrey&amp;rft_id=https%3A%2F%2Fpvs-studio.com%2Fen%2Fblog%2Fposts%2Fcpp%2Fa0041%2F&amp;rfr_id=info%3Asid%2Fen.wikipedia.org%3ARace+condition" class="Z3988"></span></li> <li><a rel="nofollow" class="external text" href="http://support.microsoft.com/kb/317723">Microsoft Support description</a></li> <li><a rel="nofollow" class="external text" href="https://blog.regehr.org/archives/490">Race Condition vs. Data Race</a></li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist 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talk:Parallel computing"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Parallel_computing" title="Special:EditPage/Template:Parallel computing"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Parallel_computing346" style="font-size:114%;margin:0 4em"><a href="/wiki/Parallel_computing" title="Parallel computing">Parallel computing</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">General</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Distributed_computing" title="Distributed computing">Distributed computing</a></li> <li><a href="/wiki/Parallel_computing" title="Parallel computing">Parallel computing</a></li> <li><a href="/wiki/Massively_parallel" title="Massively parallel">Massively parallel</a></li> <li><a href="/wiki/Cloud_computing" title="Cloud computing">Cloud computing</a></li> <li><a href="/wiki/High-performance_computing" title="High-performance computing">High-performance computing</a></li> <li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessing</a></li> <li><a href="/wiki/Manycore_processor" title="Manycore processor">Manycore processor</a></li> <li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li> <li><a href="/wiki/Computer_network" title="Computer network">Computer network</a></li> <li><a href="/wiki/Systolic_array" title="Systolic array">Systolic array</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Levels</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bit-level_parallelism" title="Bit-level parallelism">Bit</a></li> <li><a href="/wiki/Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li> <li><a href="/wiki/Task_parallelism" title="Task parallelism">Thread</a></li> <li><a href="/wiki/Task_parallelism" title="Task parallelism">Task</a></li> <li><a href="/wiki/Data_parallelism" title="Data parallelism">Data</a></li> <li><a href="/wiki/Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li> <li><a href="/wiki/Loop-level_parallelism" title="Loop-level parallelism">Loop</a></li> <li><a href="/wiki/Pipeline_(computing)" title="Pipeline (computing)">Pipeline</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Temporal_multithreading" title="Temporal multithreading">Temporal</a></li> <li><a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a> (SMT)</li> <li><a href="/wiki/Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li> <li><a href="/wiki/Speculative_multithreading" title="Speculative multithreading">Speculative</a> (SpMT)</li> <li><a href="/wiki/Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li> <li><a href="/wiki/Computer_multitasking#Cooperative_multitasking" title="Computer multitasking">Cooperative</a></li> <li><a href="/wiki/Bulldozer_(microarchitecture)#Bulldozer_core" title="Bulldozer (microarchitecture)">Clustered multi-thread</a> (CMT)</li> <li><a href="/wiki/Hardware_scout" title="Hardware scout">Hardware scout</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Theory</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Parallel_RAM" title="Parallel RAM">PRAM model</a></li> <li><a href="/wiki/Parallel_external_memory" title="Parallel external memory">PEM model</a></li> <li><a href="/wiki/Analysis_of_parallel_algorithms" title="Analysis of parallel algorithms">Analysis of parallel algorithms</a></li> <li><a href="/wiki/Amdahl%27s_law" title="Amdahl&#39;s law">Amdahl's law</a></li> <li><a href="/wiki/Gustafson%27s_law" title="Gustafson&#39;s law">Gustafson's law</a></li> <li><a href="/wiki/Cost_efficiency" title="Cost efficiency">Cost efficiency</a></li> <li><a href="/wiki/Karp%E2%80%93Flatt_metric" title="Karp–Flatt metric">Karp–Flatt metric</a></li> <li><a href="/wiki/Parallel_slowdown" title="Parallel slowdown">Slowdown</a></li> <li><a href="/wiki/Speedup" title="Speedup">Speedup</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Elements</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Process_(computing)" title="Process (computing)">Process</a></li> <li><a href="/wiki/Thread_(computing)" title="Thread (computing)">Thread</a></li> <li><a href="/wiki/Fiber_(computer_science)" title="Fiber (computer science)">Fiber</a></li> <li><a href="/wiki/Instruction_window" title="Instruction window">Instruction window</a></li> <li><a href="/wiki/Array_(data_structure)" title="Array (data structure)">Array</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Coordination</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessing</a></li> <li><a href="/wiki/Memory_coherence" title="Memory coherence">Memory coherence</a></li> <li><a href="/wiki/Cache_coherence" title="Cache coherence">Cache coherence</a></li> <li><a href="/wiki/Cache_invalidation" title="Cache invalidation">Cache invalidation</a></li> <li><a href="/wiki/Barrier_(computer_science)" title="Barrier (computer science)">Barrier</a></li> <li><a href="/wiki/Synchronization_(computer_science)" title="Synchronization (computer science)">Synchronization</a></li> <li><a href="/wiki/Application_checkpointing" title="Application checkpointing">Application checkpointing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_programming" title="Computer programming">Programming</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Stream_processing" title="Stream processing">Stream processing</a></li> <li><a href="/wiki/Dataflow_programming" title="Dataflow programming">Dataflow programming</a></li> <li><a href="/wiki/Parallel_programming_model" title="Parallel programming model">Models</a> <ul><li><a href="/wiki/Implicit_parallelism" title="Implicit parallelism">Implicit parallelism</a></li> <li><a href="/wiki/Explicit_parallelism" title="Explicit parallelism">Explicit parallelism</a></li> <li><a href="/wiki/Concurrency_(computer_science)" title="Concurrency (computer science)">Concurrency</a></li></ul></li> <li><a href="/wiki/Non-blocking_algorithm" title="Non-blocking algorithm">Non-blocking algorithm</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_hardware" title="Computer hardware">Hardware</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Flynn%27s_taxonomy" title="Flynn&#39;s taxonomy">Flynn's taxonomy</a> <ul><li><a href="/wiki/Single_instruction,_single_data" title="Single instruction, single data">SISD</a></li> <li><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> <ul><li><a href="/wiki/Single_instruction,_multiple_threads" title="Single instruction, multiple threads">Array processing</a> (SIMT)</li> <li><a href="/wiki/Flynn%27s_taxonomy#Pipelined_processor" title="Flynn&#39;s taxonomy">Pipelined processing</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Associative_processor" title="Flynn&#39;s taxonomy">Associative processing</a></li></ul></li> <li><a href="/wiki/Multiple_instruction,_single_data" title="Multiple instruction, single data">MISD</a></li> <li><a href="/wiki/Multiple_instruction,_multiple_data" title="Multiple instruction, multiple data">MIMD</a></li></ul></li> <li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow architecture</a></li> <li><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Pipelined processor</a></li> <li><a href="/wiki/Superscalar_processor" title="Superscalar processor">Superscalar processor</a></li> <li><a href="/wiki/Vector_processor" title="Vector processor">Vector processor</a></li> <li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessor</a> <ul><li><a href="/wiki/Symmetric_multiprocessing" title="Symmetric multiprocessing">symmetric</a></li> <li><a href="/wiki/Asymmetric_multiprocessing" title="Asymmetric multiprocessing">asymmetric</a></li></ul></li> <li><a href="/wiki/Semiconductor_memory" title="Semiconductor memory">Memory</a> <ul><li><a href="/wiki/Shared_memory" title="Shared memory">shared</a></li> <li><a href="/wiki/Distributed_memory" title="Distributed memory">distributed</a></li> <li><a href="/wiki/Distributed_shared_memory" title="Distributed shared memory">distributed shared</a></li> <li><a href="/wiki/Uniform_memory_access" title="Uniform memory access">UMA</a></li> <li><a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></li> <li><a href="/wiki/Cache-only_memory_architecture" title="Cache-only memory architecture">COMA</a></li></ul></li> <li><a href="/wiki/Massively_parallel" title="Massively parallel">Massively parallel</a> computer</li> <li><a href="/wiki/Computer_cluster" title="Computer cluster">Computer cluster</a> <ul><li><a href="/wiki/Beowulf_cluster" title="Beowulf cluster">Beowulf cluster</a></li></ul></li> <li><a href="/wiki/Grid_computing" title="Grid computing">Grid computer</a></li> <li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/API" title="API">APIs</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Ateji_PX" title="Ateji PX">Ateji PX</a></li> <li><a href="/wiki/Boost_(C%2B%2B_libraries)" title="Boost (C++ libraries)">Boost</a></li> <li><a href="/wiki/Chapel_(programming_language)" title="Chapel (programming language)">Chapel</a></li> <li><a href="/wiki/HPX" title="HPX">HPX</a></li> <li><a href="/wiki/Charm%2B%2B" title="Charm++">Charm++</a></li> <li><a href="/wiki/Cilk" title="Cilk">Cilk</a></li> <li><a href="/wiki/Coarray_Fortran" title="Coarray Fortran">Coarray Fortran</a></li> <li><a href="/wiki/CUDA" title="CUDA">CUDA</a></li> <li><a href="/wiki/Dryad_(programming)" title="Dryad (programming)">Dryad</a></li> <li><a href="/wiki/C%2B%2B_AMP" title="C++ AMP">C++ AMP</a></li> <li><a href="/wiki/Global_Arrays" title="Global Arrays">Global Arrays</a></li> <li><a href="/wiki/GPUOpen" title="GPUOpen">GPUOpen</a></li> <li><a href="/wiki/Message_Passing_Interface" title="Message Passing Interface">MPI</a></li> <li><a href="/wiki/OpenMP" title="OpenMP">OpenMP</a></li> <li><a href="/wiki/OpenCL" title="OpenCL">OpenCL</a></li> <li><a href="/wiki/OpenHMPP" title="OpenHMPP">OpenHMPP</a></li> <li><a href="/wiki/OpenACC" title="OpenACC">OpenACC</a></li> <li><a href="/wiki/Parallel_Extensions" title="Parallel Extensions">Parallel Extensions</a></li> <li><a href="/wiki/Parallel_Virtual_Machine" title="Parallel Virtual Machine">PVM</a></li> <li><a href="/wiki/Pthreads" title="Pthreads">pthreads</a></li> <li><a href="/wiki/RaftLib" title="RaftLib">RaftLib</a></li> <li><a href="/wiki/ROCm" title="ROCm">ROCm</a></li> <li><a href="/wiki/Unified_Parallel_C" title="Unified Parallel C">UPC</a></li> <li><a href="/wiki/Threading_Building_Blocks" title="Threading Building Blocks">TBB</a></li> <li><a href="/wiki/ZPL_(programming_language)" class="mw-redirect" title="ZPL (programming language)">ZPL</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Problems</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Automatic_parallelization" title="Automatic parallelization">Automatic parallelization</a></li> <li><a href="/wiki/Deadlock_(computer_science)" title="Deadlock (computer science)">Deadlock</a></li> <li><a href="/wiki/Deterministic_algorithm" title="Deterministic algorithm">Deterministic algorithm</a></li> <li><a href="/wiki/Embarrassingly_parallel" title="Embarrassingly parallel">Embarrassingly parallel</a></li> <li><a href="/wiki/Parallel_slowdown" title="Parallel slowdown">Parallel slowdown</a></li> <li><a class="mw-selflink selflink">Race condition</a></li> <li><a href="/wiki/Software_lockout" title="Software lockout">Software lockout</a></li> <li><a href="/wiki/Scalability" title="Scalability">Scalability</a></li> <li><a href="/wiki/Starvation_(computer_science)" title="Starvation (computer science)">Starvation</a></li></ul> </div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div> <ul><li><span class="noviewer" typeof="mw:File"><span title="Category"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/16px-Symbol_category_class.svg.png" decoding="async" width="16" height="16" class="mw-file-element" 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