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class="cite-bracket">]</span></a></sup> is the aggregation and interconnection of components before traditional <a href="/wiki/Integrated_circuit_packaging" title="Integrated circuit packaging">integrated circuit packaging</a> where a single die is packaged. Advanced packaging allows multiple devices, including electrical, mechanical, or semiconductor devices, to be merged and packaged as a single electronic device. Advanced packaging uses processes and techniques that are typically performed at <a href="/wiki/Semiconductor_fabrication_plant" title="Semiconductor fabrication plant">semiconductor fabrication facilities</a>, unlike traditional integrated circuit packaging, which does not. Advanced packaging thus sits between <a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">fabrication</a> and traditional packaging -- or, in other terminology, between <a href="/wiki/Back_end_of_line" title="Back end of line">BEoL</a> and post-fab. Advanced packaging includes <a href="/wiki/Multi-chip_module" title="Multi-chip module">multi-chip modules</a>, <a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D ICs</a>,<sup id="cite_ref-auto1_2-0" class="reference"><a href="#cite_note-auto1-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> <a href="/wiki/2.5D_integrated_circuit" title="2.5D integrated circuit">2.5D ICs</a>,<sup id="cite_ref-auto1_2-1" class="reference"><a href="#cite_note-auto1-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> <a href="/wiki/Heterogeneous_integration" class="mw-redirect" title="Heterogeneous integration">heterogeneous integration</a>,<sup id="cite_ref-auto_3-0" class="reference"><a href="#cite_note-auto-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> <a href="/wiki/Fan-out_wafer-level_packaging" title="Fan-out wafer-level packaging">fan-out wafer-level packaging</a>,<sup id="cite_ref-auto1_2-2" class="reference"><a href="#cite_note-auto1-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> <a href="/wiki/System_in_a_package" title="System in a package">system-in-package</a>, <a href="/wiki/Quilt_packaging" title="Quilt packaging">quilt packaging</a>, combining logic (processors) and memory in a single package, die stacking, wafer bonding/stacking, several <a href="/wiki/Chiplet" title="Chiplet">chiplets</a> or dies in a package,<sup id="cite_ref-auto1_2-3" class="reference"><a href="#cite_note-auto1-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> combinations of these techniques, and others. 2.5D and 3D ICs are also called 2.5D or 3D packages.<sup id="cite_ref-auto_3-1" class="reference"><a href="#cite_note-auto-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </p><p>Advanced packaging can help achieve performance gains through the integration of several devices in one package and associated efficiency gains (by reducing the distances signals have to travel, in other words reducing signal paths), and allowing for high numbers of connections between devices, without having to resort to smaller transistors which have become increasingly more difficult to manufacture.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> Fan-out packaging is seen as a low cost option for advanced packaging.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p><p>Advanced Packaging is considered fundamental in expanding the Moore’s Law.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-auto1_2-4" class="reference"><a href="#cite_note-auto1-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> An example of heterogeneus integration is Intel's EMIB, which uses "bridges" made on silicon substrates, to connect different dies together.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> Another example is TSMC's CoWoS technology which uses an <a href="/wiki/Interposer" title="Interposer">interposer</a>.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> Advanced packaging is closely related to system integration,<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> used in systems related to "artificial intelligence, machine learning, automotive, and 5G" to name a few.<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> System integration consists of "ways to avoid putting everything on a single chip by creating a system that interconnects multiple smaller chips, or chiplets"<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> Advanced packages can have chiplets from several vendors.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> To enable this, standards for connecting chiplets have been developed such as UCie.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Advanced_packaging_(semiconductors)&action=edit&section=1" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output 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href="https://semiengineering.com/knowledge_centers/packaging/advanced-packaging/">"Advanced Packaging"</a>. Semiconductor Engineering<span class="reference-accessdate">. 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