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vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button 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0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-No_footnotes plainlinks metadata ambox ambox-style ambox-No_footnotes" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><span><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/a/a4/Text_document_with_red_question_mark.svg/40px-Text_document_with_red_question_mark.svg.png" decoding="async" width="40" height="40" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/a/a4/Text_document_with_red_question_mark.svg/60px-Text_document_with_red_question_mark.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/a/a4/Text_document_with_red_question_mark.svg/80px-Text_document_with_red_question_mark.svg.png 2x" data-file-width="48" data-file-height="48" /></span></span></div></td><td class="mbox-text"><div class="mbox-text-span">This article includes a <a href="/wiki/Wikipedia:Citing_sources" title="Wikipedia:Citing sources">list of references</a>, <a href="/wiki/Wikipedia:Further_reading" title="Wikipedia:Further reading">related reading</a>, or <a href="/wiki/Wikipedia:External_links" title="Wikipedia:External links">external links</a>, <b>but its sources remain unclear because it lacks <a href="/wiki/Wikipedia:Citing_sources#Inline_citations" title="Wikipedia:Citing sources">inline citations</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Wikipedia:WikiProject_Fact_and_Reference_Check" class="mw-redirect" title="Wikipedia:WikiProject Fact and Reference Check">improve</a> this article by <a href="/wiki/Wikipedia:When_to_cite" title="Wikipedia:When to cite">introducing</a> more precise citations.</span> <span class="date-container"><i>(<span class="date">September 2016</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p>The <b>DEC 7000 AXP</b> and <b>DEC 10000 AXP</b> are a series of high-end <a href="/wiki/Multiprocessor" class="mw-redirect" title="Multiprocessor">multiprocessor</a> <a href="/wiki/Server_(computing)" title="Server (computing)">server computers</a> developed and manufactured by <a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">Digital Equipment Corporation</a>, introduced on 10 November 1992 (although the DEC 10000 AXP was not available until the following year). These systems formed part of the first generation of systems based on the <a href="/wiki/64-bit" class="mw-redirect" title="64-bit">64-bit</a> <a href="/wiki/Alpha_AXP" class="mw-redirect" title="Alpha AXP">Alpha AXP</a> <a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">architecture</a> and at the time of introduction, ran Digital's <a href="/wiki/OpenVMS" title="OpenVMS">OpenVMS AXP</a> <a href="/wiki/Operating_system" title="Operating system">operating system</a>, with <a href="/wiki/Tru64_UNIX" title="Tru64 UNIX">DEC OSF/1 AXP</a> available in March 1993. They were designed in parallel with the <a href="/wiki/VAX_7000/10000" class="mw-redirect" title="VAX 7000/10000">VAX 7000</a> and <a href="/wiki/VAX_7000/10000" class="mw-redirect" title="VAX 7000/10000">VAX 10000</a> <a href="/wiki/Minicomputer" title="Minicomputer">minicomputers</a>, and are identical except for the processor module(s) and supported bus interfaces. A field upgrade from a VAX 7000/10000 to a DEC 7000/10000 AXP was possible by means of swapping the processor boards. </p><p>The DEC 7000/10000 AXP were intended to supersede the <a href="/wiki/VAX_6000" title="VAX 6000">VAX 6000</a> series, and themselves were succeeded in 1995 by the <a href="/wiki/AlphaServer" title="AlphaServer">AlphaServer</a> 8200 and 8400 (<i>TurboLaser</i>) enterprise servers. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Models">Models</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=1" title="Edit section: Models"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The DEC 7000 AXP was positioned as a <a href="/wiki/Data_center" title="Data center">data center</a> system, whereas the DEC 10000 AXP was positioned as a "<a href="/wiki/Mainframe_computer" title="Mainframe computer">mainframe</a>" system. From a hardware point of view, the DEC 10000 AXP was essentially a larger configuration of the DEC 7000 AXP. Both shared the same System Cabinet, but the DEC 10000 AXP was configured as standard with one <i>Expander Cabinet</i> housing storage devices, and one <i>Battery Cabinet</i> housing an <a href="/wiki/Uninterruptible_power_supply" title="Uninterruptible power supply">uninterruptible power supply</a>. These were optional for a DEC 7000 AXP system. </p><p>There are two models of the DEC 7000 AXP: </p> <ul><li><b>Model 6x0</b>, code-named <i>Laser/Ruby</i>: 182 MHz <a href="/wiki/Alpha_21064" title="Alpha 21064">DECchip 21064</a> (EV4) processor(s) and when introduced, the base price was US$168,000. In October 1993, it was available with 200 MHz DECchip 21064 (EV4S) processor(s) (code-named <i>Laser/Ruby+</i>) and was priced from US$126,300. It was discontinued on 10 June 1995 and on 31 December 1995 for Europe. Upgrades were offered for an additional year after discontinuation.</li> <li><b>Model 7x0</b>, code-named <i>Laser/Ruby45</i>: 275 MHz <a href="/wiki/Alpha_21064" title="Alpha 21064">DECchip 21064A</a> (EV45) processor(s). This model was introduced on 3 November 1994.</li></ul> <p>There was one model of the DEC 10000 AXP: </p> <ul><li><b>Model 6x0</b>, code-named <i>Blazer/Ruby</i>: 200 MHz DECchip 21064 (EV4) processor(s). When introduced, the base price was US$316,000.</li></ul> <p>The possible values of 'x' is 1 to 6. These numbers specify the number of microprocessors in the system. </p> <div class="mw-heading mw-heading2"><h2 id="Cabinets">Cabinets</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=2" title="Edit section: Cabinets"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The DEC 7000/10000 AXP system is housed in the system cabinet. The upper part of the cabinet contains the LSB card cage on the left and the control panel and power subsystem on the right. Below is the cooling system, which occupies the middle of the cabinet. It consists of a single blower that draws air from the top and bottom of the cabinet, expelling it through vents in the middle. Under the blower are four plug-in unit (PIU) quadrants for PIUs, enclosures which house options. </p><p>The expander cabinet houses additional PIUs. It is identical to the system cabinet except that the LSB card cage is replaced by two additional PIU quadrants, identified as 5 and 6. Up to none, one or two expander cabinets are supported by the DEC 7000/10000 AXP systems. The expander cabinets are placed against the sides of the system cabinet, with the first placed to the left and the second to the right. </p><p>The DEC 10000 AXP may utilize an additional type of cabinet, the battery cabinet, of which up to two may be installed against the sides of the expander cabinet(s), with the first to the left and the second to the right. These cabinets are different than the other cabinets in every respect, they are narrower physically and only provide space for two PIUs, one above the other. These PIUs are used only for additional battery PIUs to prolong the continued operation of the system in the event of the power failure in comparison to a system using only battery PIUs housed in the system or expander cabinets. </p> <div class="mw-heading mw-heading2"><h2 id="Hardware_description">Hardware description</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=3" title="Edit section: Hardware description"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The DEC 7000/10000 AXP are six-way <a href="/wiki/Symmetric_multiprocessing" title="Symmetric multiprocessing">symmetric multiprocessing</a> capable systems based on nine nodes that are interconnected by the 128-bit Laser System Bus (LSB). The bus operates at 50 MHz and is pipelined, yielding a maximum bandwidth of 800 MB/s and a usable bandwidth of 640 MB/s. Eight of the nine nodes can be populated by a combination of CPU and memory modules, as long as the number of CPU modules is one to six, and one to seven for memory modules. The inclusion of an <a href="/wiki/Input/Output" class="mw-redirect" title="Input/Output">I/O</a> module at node nine is mandatory and the slot for the module was physically incompatible with other modules to ensure this. </p><p>The modules are <a href="/wiki/Printed_circuit_board" title="Printed circuit board">printed circuit boards</a> contained within an enclosure that plug into nine slots located on a <a href="/wiki/Backplane#Midplane" title="Backplane">centerplane</a>, which contains the LSB bus. The front side of centerplane, from left to right, has four slots for nodes zero to three and a Power Filter module, while the rear side, from left to right, has five slots for nodes four to eight. Slot eight is reserved for the I/O module. The modules and centerplane are housed in the LSB card cage. The centerplane is 350 mm wide by 500 mm high. The modules are 410 mm high and 340 mm deep. </p> <div class="mw-heading mw-heading3"><h3 id="CPU_module">CPU module</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=4" title="Edit section: CPU module"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The Model 600 systems used the KN7AA CPU module, which contained either a 182 MHz <a href="/wiki/Alpha_21064" title="Alpha 21064">DECchip 21064</a> (EV4) or 200 MHz DECchip 21064 (EV4S) <a href="/wiki/Microprocessor" title="Microprocessor">microprocessor</a>. The 182 MHz version was only used in DEC 7000 AXP, with the 200 MHz version used in the DEC 10000 AXP at first, and later in the DEC 7000 AXP. The Model 700 systems used the KN7AB CPU module containing a 275 MHz <a href="/wiki/Alpha_21064" title="Alpha 21064">DECchip 21064A</a> (EV45). </p><p>Other than the differences in the microprocessor used and their clock frequencies, all CPU modules also featured 4 MB of B-cache (<a href="/wiki/CPU_cache" title="CPU cache">L2 cache</a>) and two LEVI <a href="/wiki/Gate_array" title="Gate array">gate arrays</a> for interfacing the module to the LSB bus. The B-cache size of 4 MB was chosen as it was the largest size achievable with 4-bit <a href="/wiki/Static_random-access_memory" title="Static random-access memory">SRAMs</a> containing 262,144 words (128 KB) on a 128-bit system bus. The B-cache SRAMs and drivers reside on both sides of the CPU module. </p><p>The LEVI also implement the Gbus, an 8-bit bus to which hardware providing <a href="/wiki/System_console" class="mw-redirect" title="System console">console</a> functionality is connected to. Devices connected to the Gbus are a set of seven 128 KB (8-bit by 131,072-word) <a href="/wiki/Flash_ROM" class="mw-redirect" title="Flash ROM">flash ROMs</a> for storing the console program, an 8 KB (8-bit by 8,192-entry) <a href="/wiki/EEPROM" title="EEPROM">EEPROM</a> for storing miscellaneous parameter and log information, three devices containing two <a href="/wiki/UART" class="mw-redirect" title="UART">UARTs</a> each for implementing six serial lines and a watch chip containing a time-of-year clock, 50 bytes of battery-backed-up RAM and a lithium battery rated to last for 10 years. </p> <div class="mw-heading mw-heading3"><h3 id="Memory_modules">Memory modules</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=5" title="Edit section: Memory modules"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The DEC 7000 AXP and DEC 10000 AXP supported two types of memory module, the <b>MS7AA</b> and the <b>MS7BB</b>, which differ in function. The MS7AA provided <a href="/wiki/Dynamic_random_access_memory" class="mw-redirect" title="Dynamic random access memory">dynamic random access memory</a> (DRAM) for implementing the <a href="/wiki/Main_memory" class="mw-redirect" title="Main memory">main memory</a>, whereas the MS7BB provided a <a href="/wiki/Non-volatile_memory" title="Non-volatile memory">non-volatile</a> <a href="/wiki/Cache_(computing)" title="Cache (computing)">cache</a> for accelerating <a href="/wiki/Network_File_System_(protocol)" class="mw-redirect" title="Network File System (protocol)">Network File System</a> (NFS) performance when used in conjunction with Prestoserve software from Legato Systems. </p> <div class="mw-heading mw-heading4"><h4 id="MS7AA">MS7AA</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=6" title="Edit section: MS7AA"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The <b>MS7AA</b> memory module has capacities of 64 MB, 128 MB, 256 MB, 512 MB and 2 GB. The module and its components are clocked at 50 MHz. The MIC (Memory Interface Controller), provides the interface to the LSB bus, and is made up of two gate arrays, MIC-A and MIC-B. The two gate arrays both provide a 64-bit data path, which when combined results in a 128-bit data path that matches the width of the LSB bus. The two gate arrays, while similar, are not identical. MIC-A also serves as the <a href="/wiki/Memory_controller" title="Memory controller">memory controller</a>, interfaces to the LSB bus' control lines and coordinates the operation of MIC-B, which provides the module with <a href="/wiki/SECDED" class="mw-redirect" title="SECDED">SECDED</a> <a href="/wiki/Error_detection_and_correction#Error-correcting_code" title="Error detection and correction">ECC</a> capability. </p><p>Also on the module are 18 MDC (Memory Data Controller) chips. The purpose of the MDCs is to act as a buffer between the 512-bit memory bus and the 128-bit LSB bus. During memory read operations, the MDCs buffer a 512-bit transaction from the memory and forwards it to the MIC in four 128-bit transactions over four 20 nanosecond cycles. Memory write operations are similar, but with the roles reversed. The MDCs instead accumulate four 128-bit transactions from the MIC over four 20 nanosecond cycles before writing to the memory in one 512-bit transaction. </p><p>The memory is implemented with 512 KB or 2 MB <a href="/wiki/DRAM" class="mw-redirect" title="DRAM">DRAM</a> chips and organised into one to eight "strings", the smallest group of DRAMs required to fill the width of a 64-byte LSB bus transaction. Each string consists of 144 DRAM chips. Depending on the module's capacity, the DRAM chips are either <a href="/wiki/Surface_mount_technology" class="mw-redirect" title="Surface mount technology">surface mounted</a> on both sides of the <a href="/wiki/Printed_circuit_board" title="Printed circuit board">board</a> or mounted on <a href="/wiki/SIMM" title="SIMM">SIMMs</a> that are soldered onto the board. The SIMMs are not socketed as Digital's engineers found the arrangement to be unreliable. </p><p>The modules and the memory subsystem of the DEC 7000/1000 supports <a href="/wiki/Memory_organization" class="mw-redirect" title="Memory organization">interleaving</a>. Modules with more than two strings supports two-way interleaving. At a system level, the memory subsystem supports a maximum of eight-way interleaving. If the configuration results in more levels of interleaving than the memory subsystem can support, multiple memory modules are then grouped into larger banks so the level of interleaving in the memory subsystem does not exceed the maximum of eight ways. </p> <div class="mw-heading mw-heading4"><h4 id="MS7BB">MS7BB</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=7" title="Edit section: MS7BB"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The <b>MS7BB</b> memory module was a NFS accelerator. It contained 16 MB of non-volatile memory used to cache writes to the file system. The non-volatile memory was built from SRAM, and in event of power failure, a battery pack containing 14 batteries located on the module would power the SRAM for up to 48 hours, retaining the data. </p> <div class="mw-heading mw-heading3"><h3 id="I/O_port_module"><span id="I.2FO_port_module"></span>I/O port module</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=8" title="Edit section: I/O port module"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The I/O port module provides the means to implement I/O buses. It contains four parallel ports (not to be confused with the <a href="/wiki/Parallel_port" title="Parallel port">parallel ports</a> found in <a href="/wiki/Personal_computer" title="Personal computer">personal computers</a>) that connect to adapters, which implement an expansion bus, in the plug-in units (PIUs) housed in the system cabinet or expander cabinet via cables that are up to three meters long. An I/O controller gate array on the module interfaces the parallel ports to the LSB bus by serving as a bridge, receiving a transaction from a bus and passing it on to another. The I/O controller has 256 MB/s of bandwidth that the four parallel ports share. Each parallel port, if sending data from the memory to the I/O subsystem, has a maximum bandwidth of 88 MB/s. If the parallel port is sending data from the I/O subsystem to the memory, it has a maximum bandwidth of 135 MB/s. </p> <div class="mw-heading mw-heading3"><h3 id="Plug-in_units">Plug-in units</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=9" title="Edit section: Plug-in units"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:DEC_VAX_XMI_T2027_DEMFA_FDDI_Controller.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/0/0c/DEC_VAX_XMI_T2027_DEMFA_FDDI_Controller.jpg/220px-DEC_VAX_XMI_T2027_DEMFA_FDDI_Controller.jpg" decoding="async" width="220" height="261" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/0/0c/DEC_VAX_XMI_T2027_DEMFA_FDDI_Controller.jpg/330px-DEC_VAX_XMI_T2027_DEMFA_FDDI_Controller.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/0/0c/DEC_VAX_XMI_T2027_DEMFA_FDDI_Controller.jpg/440px-DEC_VAX_XMI_T2027_DEMFA_FDDI_Controller.jpg 2x" data-file-width="7887" data-file-height="9350" /></a><figcaption>XMI plug-in board implementing a FDDI network controller</figcaption></figure> <p>Plug-in units (PIUs) are modular enclosures that house options. The DEC 7000/10000 AXP supported PIUs implementing the <a href="/wiki/Futurebus" title="Futurebus">Futurebus+ Profile B</a> and <a href="/wiki/VAX" title="VAX">XMI</a>, PIUs housing <a href="/wiki/SCSI" title="SCSI">SCSI</a> and <a href="/wiki/Digital_Storage_Systems_Interconnect" title="Digital Storage Systems Interconnect">DSSI</a> drives, and a PIU housing batteries. </p><p>Futurebus expansion capability was provided by the <b>DWLAA</b> PIU. It contains a card cage with nine usable slots and the <b>DWLAA</b> adapter, which implements the bus and interfaces it to the I/O controller on the I/O port module. The Futurebus PIU can be installed in PIU quadrants 2 and 4 and. Futurebus capability was optional and up to three can be installed in a system, with a maximum of two per cabinet. Futurebus capability required the system to have a XMI bus. </p><p>XMI expansion capability was provided by the <b>DWLMA</b> PIU. It contains a card cage with 14 slots, with 12 of those slots usable by adapters. Two slots are unusable as they are reserved by the control and interface modules, the <b>DWLMA</b> module, which implements the XMI bus and interfaces it to the I/O controller on the I/O port module, and clock and arbitration module, which provides the XMI clock. The XMI PIU requires two PIU quadrants as they are twice as deep as the other PIUs, and can be installed only in the bottom left or right PIU quadrants. One to four XMI PIUs are supported in a system, with a maximum of two per any type of cabinet. </p><p>SCSI devices are housed in the <b>BA655</b> PIU, which contains two modular expansion shelves placed side by side. The left shelf can house seven 3.5-inch (89 mm) drives and the right shelf can house two 5.25-inch (133 mm) drives. The system cabinet can have up to two SCSI PIUs and expander cabinet up to four. DSSI devices are housed in the <b>BA654</b> PIU which contains three Storage Array Building Blocks (SBBs), each housing two 5.25-inch (133 mm) drives. The system cabinet can have up to two DSSI PIUs and the expander cabinet up to six. </p><p>The SCSI and DSSI PIUs did not contain hardware that provides the SCSI or DSSI bus to which the drives connect to. Instead, they are connected to a <b>KZMSA-AB</b> adapter for SCSI, or a <b>KFMSB</b> adapter for DSSI, which is installed in the XMI PIU. The KZMSA-AB adapter provides two 8-bit single-ended SCSI-2 buses (or differential 8-bit SCSI-2 buses if <b>DWZZA</b> bus converters are used) that support seven drives each, while the KFMSB adapter provides two DSSI buses. Unlike the Futurebus and XMI PIUs, the SCSI and DSSI PIUs can be installed in any PIU quadrant. </p> <div class="mw-heading mw-heading2"><h2 id="Rackmount_model">Rackmount model</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=10" title="Edit section: Rackmount model"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A rackmount model of the DEC 7000 AXP also existed. A system consisted of one BA700-AA <i>Laser System Bus Chassis</i> and one to four BA601-AC <i>Extended Memory Interconnect Chassis</i> mounted in a <a href="/wiki/19-inch_rack" title="19-inch rack">19-inch rack</a>. The BA700-AA housed the LSB card cage, which contained five slots for one to three CPU modules, one or two memory modules and an I/O port module. </p> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=DEC_7000_AXP_and_DEC_10000_AXP&action=edit&section=11" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20080525155034/http://h18002.www1.hp.com/alphaserver/archive/comp/mar94.html">AlphaServer comparison chart, March 1994 edition</a></li> <li><a rel="nofollow" class="external text" href="http://vt100.net/mirror/mds-199909/cd1/alpha/kn7aatm1.pdf"><i>DEC 7000/10000 AXP KN7AA CPU Technical Manual</i>, EK-KN7AA-TM.001, July 1993, Digital Equipment Corporation</a><sup class="noprint Inline-Template"><span style="white-space: nowrap;">[<i><a href="/wiki/Wikipedia:Link_rot" title="Wikipedia:Link rot"><span title=" Dead link tagged July 2019">permanent dead link</span></a></i><span style="visibility:hidden; color:transparent; padding-left:2px">‍</span>]</span></sup></li> <li><a rel="nofollow" class="external text" href="http://vt100.net/mirror/mds-199909/cd1/vax/7000atm1.pdf"><i>DEC 7000/10000 AXP, VAX 7000/10000 Platform Technical Manual</i>, EK-7000A-TM.001, August 1993, Digital Equipment Corporation</a><sup class="noprint Inline-Template"><span style="white-space: nowrap;">[<i><a href="/wiki/Wikipedia:Link_rot" title="Wikipedia:Link rot"><span title=" Dead link tagged July 2019">permanent dead link</span></a></i><span style="visibility:hidden; color:transparent; padding-left:2px">‍</span>]</span></sup></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110712225645/http://h18002.www1.hp.com/alphaserver/vax/download/aa-71xea-ov-a01.pdf"><i>DEC 7000/10000 AXP, VAX 7000/10000 Systems Overview</i>, EK–71XEA–OV.A01, First Printing, August 1993, Digital Equipment Corporation.</a></li> <li><a rel="nofollow" class="external text" href="http://www.pghardy.net/paul/programs/vms_cpus.html">Paul Hardy's VMS CPU Model Summary</a></li> <li><a rel="nofollow" class="external text" href="http://www.hpl.hp.com/hpjournal/dtj/vol4num4/vol4num4art6.pdf">Allison, Brian R. and van Ingen, Catharine, "Technical Description of the DEC 7000 and DEC 10000 AXP Family", <i>Digital Technical Journal</i> <b>4</b>(4).</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20080830055202/http://www.hpl.hp.com/hpjournal/dtj/vol4num4/vol4num4art6.pdf">Archived</a> 2008-08-30 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a></li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output 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style="width:1%"><a href="/wiki/12-bit_computing" title="12-bit computing">12-bit</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/LINC" title="LINC">LINC</a> <ul><li><a href="/wiki/LINC-8" title="LINC-8">LINC-8</a></li></ul></li> <li><a href="/wiki/PDP-5" title="PDP-5">PDP-5</a></li> <li><a href="/wiki/PDP-8" title="PDP-8">PDP-8</a> <ul><li><a href="/wiki/PDP-8/e" title="PDP-8/e">PDP-8/e</a></li></ul></li> <li><a href="/wiki/PDP-12" title="PDP-12">PDP-12</a></li> <li><a href="/wiki/DECmate" title="DECmate">DECmate</a></li> <li><a href="/wiki/PDP-14" title="PDP-14">PDP-14</a></li></ul> </div></td></tr></tbody></table><div> </div></td><td class="navbox-list" style="border-left:2px solid #fdfdfd;padding:0px;vertical-align:top;width:50%;"><div> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a 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title="DECstation">DECstation</a></li> <li><a href="/wiki/DECsystem" title="DECsystem">DECsystem servers</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/DEC_Alpha" title="DEC Alpha">Alpha</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/DEC_3000_AXP" title="DEC 3000 AXP">DEC 3000 AXP</a></li> <li><a href="/wiki/DEC_4000_AXP" title="DEC 4000 AXP">DEC 4000 AXP</a></li> <li><a class="mw-selflink selflink">DEC 7000 AXP and DEC 10000 AXP</a></li> <li><a href="/wiki/DECpc_AXP_150" title="DECpc AXP 150">DECpc AXP 150</a></li> <li><a href="/wiki/DECpc_AXP_150#DEC_2000_AXP" title="DECpc AXP 150">DEC 2000 AXP</a></li> <li><a href="/wiki/DEC_Multia" title="DEC Multia">Multia</a></li> <li><a href="/wiki/AlphaServer" title="AlphaServer">AlphaServer</a></li> <li><a href="/wiki/AlphaStation" title="AlphaStation">AlphaStation</a></li> <li><a href="/wiki/Digital_Personal_Workstation" title="Digital Personal Workstation">Digital Personal Workstation</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">See also</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Compaq_Professional_Workstation" title="Compaq Professional Workstation">Compaq Professional Workstation 1000 XP</a></li> <li><a href="/wiki/Itsy_Pocket_Computer" title="Itsy Pocket Computer">Itsy Pocket Computer</a></li> <li><a href="/wiki/Jupiter_project" title="Jupiter project">Jupiter project</a></li> <li><a href="/wiki/List_of_VAX_computers" title="List of VAX computers">List of VAX computers</a></li></ul> </div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div> <ul><li><span class="noviewer" typeof="mw:File"><span title="Category"><img alt="" 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