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Simulating Plasma, NERSC Systems Enable Efficient Microchip Production
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Production</h1> <h2 class="SubTitle">Science Highlight</h2> <p class="DateAuthors"> <span class="Date">March 4, 2024</span> </p> <div class="Contact"> <p><strong>By Elizabeth Ball</strong><br><strong>Contact: <a href="mailto:cscomms@lbl.gov">cscomms@lbl.gov</a></strong></p> </div> </div> <section> <div class="captionImage MainImage right"> <a class="shadowbox" href="/assets/Uploads/Microchip-image.jpeg" class="right"><img width="230" height="230" alt="Microchip image" src="/assets/Uploads/Microchip-image__ScaleWidthWzIzMF0.jpeg" loading="lazy" /> </a> <p class="caption">Improved methods of using plasma to produce microchips could boost the American microchip industry. (Credit: © Raimond Spekking / CC BY-SA 4.0 (via Wikimedia Commons)</p> </div> <section><div class="Content"><h2>Science Breakthrough</h2><p>Researchers at the Princeton Plasma Physics Laboratory (PPPL) used supercomputers at the National Energy Research Scientific Computing Center (NERSC) to develop new simulation codes that improve upon current methods of producing microchips using the electrically charged state of matter called plasma. These simulation methods could make microchip manufacturing faster and more efficient and boost the American microchip industry. Their work <a title="Read the paper "Direct implicit and explicit energy-conserving particle-in-cell methods for modeling of capacitively coupled plasma devices"" rel="noopener noreferrer" href="https://pubs.aip.org/aip/pop/article-abstract/30/10/103509/2918585/Direct-implicit-and-explicit-energy-conserving?redirectedFrom=PDF" target="_blank">was published in Physics of Plasmas in October</a>.</p><h2>Science Background</h2><p>In the production of the microchips that power devices such as computers and smartphones, low-temperature plasmas (LTPs) can be used to etch minuscule channels into tiny wafers of silicon. These channels form the microcircuitry that powers the chips. Researchers use simulations to understand how the plasmas behave and how they might be used more efficiently in the manufacturing process; however, the detailed particle-in-cell simulations that yield the most accurate information can prove very computationally expensive. To develop less resource-intensive algorithms, the researchers looked for existing algorithms that might be useful. They ultimately produced the Low-Temperature Plasma Particle-in-Cell code (LTP-PIC), which takes advantage of the parallel GPU architectures in supercomputers like the Perlmutter system at NERSC to perform the necessary computations more sustainably. These faster and less expensive computations could allow chip manufacturers to prototype and iterate quickly, a key to more efficient production.</p><h2>Science Breakdown</h2><p>Earlier versions of this work were well-suited to CPU-based architectures and were successful on NERSC’s Cori system, which was retired in 2023. This iteration took advantage of Perlmutter’s hybrid CPU/GPU architecture, particularly the parallelism enabled by Perlmutter’s GPUs. Distributing the work lightened the computational load for each GPU and resulted in a significant speedup.</p><p>Specifically, the research used a pair of open-source PIC modeling codes to perform parametric investigations. Research lead Haomin Sun used EDIPIC-2D, a CPU code designed for smaller simulations in two dimensions, while his teammate Andrew Tasman Powis at PPPL used LTR-PIC 3D, a code appropriate for larger simulations and 3D simulations. Together, the simulations offered insights into the behavior of numerical effects during the process and the energy that can be deposited into the plasma from an oscillating electric field.</p><h2>Research Lead</h2><p>Haomin Sun, Swiss Plasma Center (SPC), École Polytechnique Fédérale de Lausanne (EPFL)</p><h2>Co-authors</h2><p>Soham Banerjee, Sarveshwar Sharma, Andrew Tasman Powis, Alexander V. Khabrov, Dmytro Sydorenko, Jian Chen, Igor D. Kaganovich</p><h2>Publication</h2><p>Phys. Plasmas 30, 103509 (2023) https://doi.org/10.1063/5.0160853</p><h2>Funding</h2><p>This work was funded by the U.S. Department of Energy Office of Science, Office of Fusion Energy Studies, in addition to the U.S. Department of Energy’s Laboratory-Directed Research and Development (LDRD) program under grant R112.</p><h2>User Facilities</h2><p>National Energy Research Scientific Computing Center (NERSC)</p></div></section> <hr /> <div class="AboutBoilerplate"><p><strong>About NERSC and Berkeley Lab</strong><br> The National Energy Research Scientific Computing Center (NERSC) is a U.S. Department of Energy Office of Science User Facility that serves as the primary high performance computing center for scientific research sponsored by the Office of Science. Located at Lawrence Berkeley National Laboratory, NERSC serves almost 10,000 scientists at national laboratories and universities researching a wide range of problems in climate, fusion energy, materials science, physics, chemistry, computational biology, and other disciplines. <a href="http://www.lbl.gov/">Berkeley Lab</a> is a DOE national laboratory located in Berkeley, California. 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