{"title":"130 nm CMOS Mixer and VCO for 2.4 GHz Low-power Wireless Personal Area Networks","authors":"Gianluca Cornetta, David J. Santos","volume":22,"journal":"International Journal of Electronics and Communication Engineering","pagesStart":2231,"pagesEnd":2237,"ISSN":"1307-6892","URL":"https:\/\/publications.waset.org\/pdf\/11137","abstract":"This paper describes a 2.4 GHz passive switch mixer\r\nand a 5\/2.5 GHz voltage-controlled negative Gm oscillator (VCO)\r\nwith an inversion-mode MOS varactor. Both circuits are implemented\r\nusing a 1P8M 0.13 \u03bcm process. The switch mixer has an input\r\nreferred 1 dB compression point of -3.89 dBm and a conversion\r\ngain of -0.96 dB when the local oscillator power is +2.5 dBm.\r\nThe VCO consumes only 1.75 mW, while drawing 1.45 mA from a\r\n1.2 V supply voltage. In order to reduce the passives size, the VCO\r\nnatural oscillation frequency is 5 GHz. A clocked CMOS divideby-\r\ntwo circuit is used for frequency division and quadrature phase\r\ngeneration. The VCO has a -109 dBc\/Hz phase noise at 1 MHz\r\nfrequency offset and a 2.35-2.5 GHz tuning range (after the frequency\r\ndivision), thus complying with ZigBee requirements.","references":"[1] Seo H-M., Moon, Y., Park, Y-K., Kim, D., Kim, D-S., Lee, Y-S., Won,\r\nK-H., Kim, S-D., and Choi, P.,A Low-Power Fully CMOS Integrated RF\r\nTransceiver IC for Wireless Sensor Networks, IEEE Trans. on VLSI\r\nSystems, v. 15, n. 2, February 2007, pp.227-231.\r\n[2] Timarm, A., Vamos, A., and Bognar, G.,Comprehensive design of a high\r\nfrequency PLL synthesizer for ZigBee application, 9th IEEE Workshop\r\non Design and Diagnostics of Electronic Circuits and systems, Prague,\r\nCzech Republic, April 18-21, 2006, pp. 37-41\r\n[3] Darabi, H., and Abidi, A. A.Noise in RF-CMOS Mixers: A Simple\r\nPhysical Model, IEEE Jour. of Solid State Circuits, Vol. 35, n. 1, January\r\n2004, pp. 15-25.\r\n[4] Shahani, A. R., Shaeffer, D. K., and Lee, T. H. A 12 mW Wide Dynamic\r\nRange CMOS Front-End for a Portable GPS Receiver, IEEE Jour. of\r\nSolid State Circuits, Vol. 39, n. 6, June 2004, pp. 952-955.\r\n[5] Bernstein, K., Carrig, K. M., Durham, C. M., Hansen, P. R., Hogenmiller,\r\nD., Nowak, E. J., and Rohrer, N. J.High Speed CMOS Design Styles,\r\nDordrecht, The Netherlands: Kluwer Academic Publishers, 1998.\r\n[6] Caverly, R.,CMOS RFIC Design Principles, Boston, MA: Artech House,\r\n2007.\r\n[7] Razavi, B.,RF Microelectronics, Upper Saddle River, NJ: Prentice Hall,\r\n1998.\r\n[8] Chi, B., and Shi, B. Low-power CMOS and its Divide-by-two Dividers\r\nwith Quadrature Outputs for 5 GHz\/2.5 GHz WLAN Transceivers, IEEE\r\nConference on Communication Circuits and Systems, June 2002, pp. 57-\r\n60.\r\n[9] Plouchart, J-O., Ainspan, H., Soyner, M., and Ruehli, A. A Fully-\r\nMonotlithic SiGe Differential Voltage-Controlled Oscillator for 5 GHz\r\nWireless Applications, IEEE Symp. on Radio Frequency Integrated\r\nCircuits, June 2000, pp. 57-60.\r\n[10] Kim, H-R., Cha, C-Y., Oh, S-M., Yang, M-S., and Lee, S-G. A Very\r\nLow-Power Quadrature VCO with Back-Gate Coupling, IEEE Jour. of\r\nSolid State Circuits, Vol. 39, n. 6, June 2004, pp. 952-955.\r\n[11] Tsai, Y-C., Shen, Y-S., and Jou, C. F. A Low-Power Quadrature VCO\r\nUsing Current-reused Technique and Back-Gate Coupling, PIERS\r\nOnline, Vol. 3, n. 7, July 2007, pp. 952-955.\r\n[12] Gil, J., Kwon, I., and Shin, H. CMOS Implementation of a 2.4-GHz\r\nSwitch Mixer and Quadrature VCO, Jour. of the Korean Physical Society,\r\nVol. 42, n. 3, February 2003, pp. 241-245.","publisher":"World Academy of Science, Engineering and Technology","index":"Open Science Index 22, 2008"}