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class="vector-toc-numb">2</span> <span>Related component speeds</span> </div> </a> <button aria-controls="toc-Related_component_speeds-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Related component speeds subsection</span> </button> <ul id="toc-Related_component_speeds-sublist" class="vector-toc-list"> <li id="toc-CPU" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#CPU"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>CPU</span> </div> </a> <ul id="toc-CPU-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Memory" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Memory"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2</span> <span>Memory</span> </div> </a> <ul id="toc-Memory-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Peripheral_buses" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Peripheral_buses"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3</span> <span>Peripheral buses</span> </div> </a> <ul id="toc-Peripheral_buses-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Overclocking" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Overclocking"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.4</span> <span>Overclocking</span> </div> </a> <ul id="toc-Overclocking-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Evolution" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Evolution"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Evolution</span> </div> </a> <ul id="toc-Evolution-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Transfer_rates" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Transfer_rates"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Transfer rates</span> </div> </a> <button aria-controls="toc-Transfer_rates-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Transfer rates subsection</span> </button> <ul id="toc-Transfer_rates-sublist" class="vector-toc-list"> <li id="toc-Intel_processors" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Intel_processors"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1</span> <span>Intel processors</span> </div> </a> <ul id="toc-Intel_processors-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-AMD_processors" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#AMD_processors"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.2</span> <span>AMD processors</span> </div> </a> <ul id="toc-AMD_processors-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Toggle the table of contents</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">Front-side bus</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" 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Available in 32 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-32" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">32 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D9%85%D8%B3%D8%B1%D9%89_%D8%A3%D9%85%D8%A7%D9%85%D9%8A" title="مسرى أمامي – Arabic" lang="ar" hreflang="ar" data-title="مسرى أمامي" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-bg mw-list-item"><a href="https://bg.wikipedia.org/wiki/%D0%A1%D0%B8%D1%81%D1%82%D0%B5%D0%BC%D0%BD%D0%B0_%D1%88%D0%B8%D0%BD%D0%B0" title="Системна шина – Bulgarian" lang="bg" hreflang="bg" data-title="Системна шина" data-language-autonym="Български" data-language-local-name="Bulgarian" class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-bs mw-list-item"><a href="https://bs.wikipedia.org/wiki/Prednja_sabirnica" title="Prednja sabirnica – Bosnian" lang="bs" hreflang="bs" data-title="Prednja sabirnica" data-language-autonym="Bosanski" data-language-local-name="Bosnian" class="interlanguage-link-target"><span>Bosanski</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Front_side_bus" title="Front side bus – Catalan" lang="ca" hreflang="ca" data-title="Front side bus" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/Front_Side_Bus" title="Front Side Bus – Czech" lang="cs" hreflang="cs" data-title="Front Side Bus" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-da mw-list-item"><a href="https://da.wikipedia.org/wiki/Front_Side_Bus" title="Front Side Bus – Danish" lang="da" hreflang="da" data-title="Front Side Bus" data-language-autonym="Dansk" data-language-local-name="Danish" class="interlanguage-link-target"><span>Dansk</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Front_Side_Bus" title="Front Side Bus – German" lang="de" hreflang="de" data-title="Front Side Bus" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/Esisiin" title="Esisiin – Estonian" lang="et" hreflang="et" data-title="Esisiin" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Bus_frontal" title="Bus frontal – Spanish" lang="es" hreflang="es" data-title="Bus frontal" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%DA%AF%D8%B0%D8%B1%DA%AF%D8%A7%D9%87_%D8%B3%D9%85%D8%AA-%D8%AC%D9%84%D9%88" title="گذرگاه سمت-جلو – Persian" lang="fa" hreflang="fa" data-title="گذرگاه سمت-جلو" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Front_side_bus" title="Front side bus – French" lang="fr" hreflang="fr" data-title="Front side bus" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%ED%94%84%EB%A1%A0%ED%8A%B8_%EC%82%AC%EC%9D%B4%EB%93%9C_%EB%B2%84%EC%8A%A4" title="프론트 사이드 버스 – Korean" lang="ko" hreflang="ko" data-title="프론트 사이드 버스" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-hi mw-list-item"><a href="https://hi.wikipedia.org/wiki/%E0%A4%AB%E0%A4%BC%E0%A5%8D%E0%A4%B0%E0%A4%82%E0%A4%9F_%E0%A4%B8%E0%A4%BE%E0%A4%87%E0%A4%A1_%E0%A4%AC%E0%A4%B8" title="फ़्रंट साइड बस – Hindi" lang="hi" hreflang="hi" data-title="फ़्रंट साइड बस" data-language-autonym="हिन्दी" data-language-local-name="Hindi" class="interlanguage-link-target"><span>हिन्दी</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Front_Side_Bus" title="Front Side Bus – Italian" lang="it" hreflang="it" data-title="Front Side Bus" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-lt mw-list-item"><a href="https://lt.wikipedia.org/wiki/FSB_magistral%C4%97" title="FSB magistralė – Lithuanian" lang="lt" hreflang="lt" data-title="FSB magistralė" data-language-autonym="Lietuvių" data-language-local-name="Lithuanian" class="interlanguage-link-target"><span>Lietuvių</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/Front-side_bus" title="Front-side bus – Hungarian" lang="hu" hreflang="hu" data-title="Front-side bus" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-ml mw-list-item"><a href="https://ml.wikipedia.org/wiki/%E0%B4%AB%E0%B5%8D%E0%B4%B0%E0%B4%A3%E0%B5%8D%E0%B4%9F%E0%B5%8D-%E0%B4%B8%E0%B5%88%E0%B4%A1%E0%B5%8D_%E0%B4%AC%E0%B4%B8%E0%B5%8D" title="ഫ്രണ്ട്-സൈഡ് ബസ് – Malayalam" lang="ml" hreflang="ml" data-title="ഫ്രണ്ട്-സൈഡ് ബസ്" data-language-autonym="മലയാളം" data-language-local-name="Malayalam" class="interlanguage-link-target"><span>മലയാളം</span></a></li><li class="interlanguage-link interwiki-ms mw-list-item"><a href="https://ms.wikipedia.org/wiki/Bas_bahagian_hadapan" title="Bas bahagian hadapan – Malay" lang="ms" hreflang="ms" data-title="Bas bahagian hadapan" data-language-autonym="Bahasa Melayu" data-language-local-name="Malay" class="interlanguage-link-target"><span>Bahasa Melayu</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Front-side_bus" title="Front-side bus – Dutch" lang="nl" hreflang="nl" data-title="Front-side bus" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/%E3%83%95%E3%83%AD%E3%83%B3%E3%83%88%E3%82%B5%E3%82%A4%E3%83%89%E3%83%90%E3%82%B9" title="フロントサイドバス – Japanese" lang="ja" hreflang="ja" data-title="フロントサイドバス" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Front_side_bus" title="Front side bus – Polish" lang="pl" hreflang="pl" data-title="Front side bus" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Barramento_frontal" title="Barramento frontal – Portuguese" lang="pt" hreflang="pt" data-title="Barramento frontal" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Front_Side_Bus" title="Front Side Bus – Russian" lang="ru" hreflang="ru" data-title="Front Side Bus" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-si mw-list-item"><a href="https://si.wikipedia.org/wiki/%E0%B6%B4%E0%B6%BB%E0%B7%92%E0%B6%9C%E0%B6%AB%E0%B6%9A_%E0%B7%80%E0%B6%BD_%E0%B6%89%E0%B6%AF%E0%B7%92%E0%B6%BB%E0%B7%92%E0%B6%B4%E0%B7%83_%E0%B6%B6%E0%B7%83%E0%B6%BA" title="පරිගණක වල ඉදිරිපස බසය – Sinhala" lang="si" hreflang="si" data-title="පරිගණක වල ඉදිරිපස බසය" data-language-autonym="සිංහල" data-language-local-name="Sinhala" class="interlanguage-link-target"><span>සිංහල</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Front-side_bus" title="Front-side bus – Slovak" lang="sk" hreflang="sk" data-title="Front-side bus" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-sr mw-list-item"><a href="https://sr.wikipedia.org/wiki/%D0%9C%D0%B0%D0%B3%D0%B8%D1%81%D1%82%D1%80%D0%B0%D0%BB%D0%B0_%D1%81%D0%B0_%D0%BF%D1%80%D0%B5%D0%B4%D1%9A%D0%B5_%D1%81%D1%82%D1%80%D0%B0%D0%BD%D0%B5" title="Магистрала са предње стране – Serbian" lang="sr" hreflang="sr" data-title="Магистрала са предње стране" data-language-autonym="Српски / srpski" data-language-local-name="Serbian" class="interlanguage-link-target"><span>Српски / srpski</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/Suoritinv%C3%A4yl%C3%A4" title="Suoritinväylä – Finnish" lang="fi" hreflang="fi" data-title="Suoritinväylä" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Front_side_bus" title="Front side bus – Swedish" lang="sv" hreflang="sv" data-title="Front side bus" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-th mw-list-item"><a href="https://th.wikipedia.org/wiki/%E0%B8%9F%E0%B8%A3%E0%B8%AD%E0%B8%99%E0%B8%95%E0%B9%8C%E0%B9%84%E0%B8%8B%E0%B8%94%E0%B9%8C%E0%B8%9A%E0%B8%B1%E0%B8%AA" title="ฟรอนต์ไซด์บัส – Thai" lang="th" hreflang="th" data-title="ฟรอนต์ไซด์บัส" data-language-autonym="ไทย" data-language-local-name="Thai" class="interlanguage-link-target"><span>ไทย</span></a></li><li class="interlanguage-link interwiki-tr mw-list-item"><a href="https://tr.wikipedia.org/wiki/Sistem_yolu" title="Sistem yolu – Turkish" lang="tr" hreflang="tr" data-title="Sistem yolu" data-language-autonym="Türkçe" data-language-local-name="Turkish" class="interlanguage-link-target"><span>Türkçe</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/Front_Side_Bus" title="Front Side Bus – Ukrainian" lang="uk" hreflang="uk" data-title="Front Side Bus" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/%E5%89%8D%E7%AB%AF%E6%80%BB%E7%BA%BF" title="前端总线 – Chinese" lang="zh" hreflang="zh" data-title="前端总线" data-language-autonym="中文" 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id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Type of computer communication interface</div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Dual_Core_Generic.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/ec/Dual_Core_Generic.svg/220px-Dual_Core_Generic.svg.png" decoding="async" width="220" height="255" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/ec/Dual_Core_Generic.svg/330px-Dual_Core_Generic.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/ec/Dual_Core_Generic.svg/440px-Dual_Core_Generic.svg.png 2x" data-file-width="617" data-file-height="715" /></a><figcaption>Within a <a href="/wiki/Multi-core_processor" title="Multi-core processor">multi-core processor</a>, the <a href="/wiki/Back-side_bus" title="Back-side bus">back-side bus</a> is often internal, with front-side bus for external communication.</figcaption></figure> <p>The <b>front-side bus</b> (<b>FSB</b>) is a computer communication interface (<a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a>) that was often used in <a href="/wiki/Intel" title="Intel">Intel</a>-chip-based computers during the 1990s and 2000s. The EV6 bus served the same function for competing AMD CPUs. Both typically carry data between the <a href="/wiki/Central_processing_unit" title="Central processing unit">central processing unit</a> (CPU) and a memory controller hub, known as the <a href="/wiki/Northbridge_(computing)" title="Northbridge (computing)">northbridge</a>.<sup id="cite_ref-pcs_1-0" class="reference"><a href="#cite_note-pcs-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p><p>Depending on the implementation, some computers may also have a <a href="/wiki/Back-side_bus" title="Back-side bus">back-side bus</a> that connects the CPU to the <a href="/wiki/CPU_cache" title="CPU cache">cache</a>. This bus and the cache connected to it are faster than accessing the system memory (or RAM) via the front-side bus. The speed of the front side bus is often used as an important measure of the performance of a computer. </p><p>The original front-side bus architecture was replaced by <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a>, <a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">Intel QuickPath Interconnect</a>, and <a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface</a>, followed by <a href="/wiki/Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Intel Ultra Path Interconnect</a> and AMD's <a href="/wiki/Infinity_Fabric" class="mw-redirect" title="Infinity Fabric">Infinity Fabric</a>. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="History">History</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=1" title="Edit section: History"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The term came into use by Intel Corporation about the time the <a href="/wiki/Pentium_Pro" title="Pentium Pro">Pentium Pro</a> and <a href="/wiki/Pentium_II" title="Pentium II">Pentium II</a> products were announced, in the 1990s. </p><p>"Front side" refers to the external interface from the processor to the rest of the computer system, as opposed to the back side, where the <a href="/wiki/Back-side_bus" title="Back-side bus">back-side bus</a> connects the cache (and potentially other CPUs).<sup id="cite_ref-intel_2-0" class="reference"><a href="#cite_note-intel-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> </p><p>A front-side bus (FSB) is mostly used on PC-related <a href="/wiki/Motherboard" title="Motherboard">motherboards</a> (including personal computers and servers). They are seldom used in <a href="/wiki/Embedded_system" title="Embedded system">embedded systems</a> or similar small computers. The FSB design was a performance improvement over the single <a href="/wiki/System_bus" title="System bus">system bus</a> designs of the previous decades, but these front-side buses are sometimes referred to as the "system bus". </p><p>Front-side buses usually connect the CPU and the rest of the hardware via a <a href="/wiki/Chipset" title="Chipset">chipset</a>, which Intel implemented as a <a href="/wiki/Northbridge_(computing)" title="Northbridge (computing)">northbridge</a> and a <a href="/wiki/Southbridge_(computing)" title="Southbridge (computing)">southbridge</a>. Other buses like the <a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">Peripheral Component Interconnect</a> (PCI), <a href="/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port">Accelerated Graphics Port</a> (AGP), and memory buses all connect to the chipset in order for data to flow between the connected devices. These secondary system buses usually run at speeds derived from the front-side bus clock, but are not necessarily <a href="/wiki/Synchronization_(computer_science)" title="Synchronization (computer science)">synchronized</a> to it. </p><p>In response to <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>'s <a href="/wiki/Torrenza" title="Torrenza">Torrenza</a> initiative, Intel opened its FSB CPU socket to third party devices.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> Prior to this announcement, made in Spring 2007 at <a href="/wiki/Intel_Developer_Forum" title="Intel Developer Forum">Intel Developer Forum</a> in Beijing, Intel had very closely guarded who had access to the FSB, only allowing Intel processors in the CPU socket. The first example was <a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">field-programmable gate array</a> (FPGA) co-processors, a result of collaboration between Intel-<a href="/wiki/Xilinx" title="Xilinx">Xilinx</a>-<a href="/wiki/Nallatech" title="Nallatech">Nallatech</a><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> and Intel-<a href="/wiki/Altera" title="Altera">Altera</a>-XtremeData (which shipped in 2008).<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Related_component_speeds">Related component speeds</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=2" title="Edit section: Related component speeds"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:Motherboard_diagram.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/bd/Motherboard_diagram.svg/300px-Motherboard_diagram.svg.png" decoding="async" width="300" height="462" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/bd/Motherboard_diagram.svg/450px-Motherboard_diagram.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/b/bd/Motherboard_diagram.svg/600px-Motherboard_diagram.svg.png 2x" data-file-width="370" data-file-height="570" /></a><figcaption>A typical chipset layout from the Pentium II/III era</figcaption></figure> <div class="mw-heading mw-heading3"><h3 id="CPU">CPU</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=3" title="Edit section: CPU"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The <a href="/wiki/Frequency" title="Frequency">frequency</a> at which a processor (CPU) operates is determined by applying a clock multiplier to the front-side bus (FSB) speed in some cases. For example, a processor running at 3200 <a href="/wiki/Megahertz" class="mw-redirect" title="Megahertz">MHz</a> might be using a 400 MHz FSB. This means there is an internal <a href="/wiki/CPU_multiplier" title="CPU multiplier">clock multiplier</a> setting (also called bus/core ratio) of 8. That is, the CPU is set to run at 8 times the frequency of the front-side bus: 400 MHz × 8 = 3200 MHz. Different CPU speeds are achieved by varying either the FSB frequency or the CPU multiplier, this is referred to as <a href="/wiki/Overclocking" title="Overclocking">overclocking</a> or <a href="/wiki/Underclocking" title="Underclocking">underclocking</a>. </p> <div class="mw-heading mw-heading3"><h3 id="Memory">Memory</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=4" title="Edit section: Memory"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">See also: <a href="/wiki/Memory_divider" title="Memory divider">Memory divider</a></div> <p>Setting an FSB speed is related directly to the speed grade of memory a system must use. The memory bus connects the northbridge and RAM, just as the front-side bus connects the CPU and northbridge. Often, these two buses must operate at the same frequency. Increasing the front-side bus to 450 MHz in most cases also means running the memory at 450 MHz. </p><p>In newer systems, it is possible to see memory ratios of "4:5" and the like. The memory will run 5/4 times as fast as the FSB in this situation, meaning a 400 MHz bus can run with the memory at 500 MHz. This is often referred to as an 'asynchronous' system. Due to differences in CPU and system architecture, overall system performance can vary in unexpected ways with different FSB-to-memory ratios. </p><p>In image, audio, video, gaming, <a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a> synthesis and scientific applications that perform a small amount of work on each element of a large <a href="/wiki/Data_set" title="Data set">data set</a>, FSB speed becomes a major performance issue. A slow FSB will cause the CPU to spend significant amounts of time waiting for data to arrive from <a href="/wiki/Random-access_memory" title="Random-access memory">system memory</a>. However, if the computations involving each element are more complex, the processor will spend longer performing these; therefore, the FSB will be able to keep pace because the rate at which the memory is accessed is reduced. </p> <div class="mw-heading mw-heading3"><h3 id="Peripheral_buses">Peripheral buses</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=5" title="Edit section: Peripheral buses"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Similar to the memory bus, the PCI and AGP buses can also be run asynchronously from the front-side bus. In older systems, these buses are operated at a set fraction of the front-side bus frequency. This fraction was set by the <a href="/wiki/BIOS" title="BIOS">BIOS</a>. In newer systems, the PCI, AGP, and <a href="/wiki/PCI_Express" title="PCI Express">PCI Express</a> peripheral buses often receive their own <a href="/wiki/Clock_signal" title="Clock signal">clock signals</a>, which eliminates their dependence on the front-side bus for timing. </p> <div class="mw-heading mw-heading3"><h3 id="Overclocking">Overclocking</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=6" title="Edit section: Overclocking"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Overclocking" title="Overclocking">Overclocking</a></div> <p><a href="/wiki/Overclocking" title="Overclocking">Overclocking</a> is the practice of making computer components operate beyond their stock performance levels by manipulating the frequencies at which the component is set to run, and, when necessary, modifying the voltage sent to the component to allow it to operate at these higher frequencies with more stability. </p><p>Many motherboards allow the user to manually set the clock multiplier and FSB settings by changing <a href="/wiki/Jumper_(computing)" title="Jumper (computing)">jumpers</a> or BIOS settings. Almost all CPU manufacturers now "lock" a preset multiplier setting into the chip. It is possible to unlock some locked CPUs; for instance, some AMD <a href="/wiki/Athlon" title="Athlon">Athlon</a> processors can be unlocked by connecting <a href="/wiki/Electrical_contact" title="Electrical contact">electrical contacts</a> across points on the CPU's surface. Some other processors from AMD and Intel are unlocked from the factory and labeled as an "enthusiast-grade" processors by end users and retailers because of this feature. For all processors, increasing the FSB speed can be done to boost processing speed by reducing <a href="/wiki/Latency_(engineering)" title="Latency (engineering)">latency</a> between CPU and the northbridge. </p><p>This practice pushes components beyond their specifications and may cause erratic behavior, overheating or premature failure. Even if the computer appears to run normally, problems may appear under a heavy load. Most <a href="/wiki/Personal_computer" title="Personal computer">PCs</a> purchased from retailers or manufacturers, such as <a href="/wiki/Hewlett-Packard" title="Hewlett-Packard">Hewlett-Packard</a> or <a href="/wiki/Dell" title="Dell">Dell</a>, do not allow the user to change the multiplier or FSB settings due to the probability of erratic behavior or failure. Motherboards purchased separately to build a custom machine are more likely to allow the user to edit the multiplier and FSB settings in the PC's BIOS. </p> <div class="mw-heading mw-heading2"><h2 id="Evolution">Evolution</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=7" title="Edit section: Evolution"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The front-side bus had the advantage of high flexibility and low cost when it was first designed. Simple <a href="/wiki/Symmetric_multiprocessor" class="mw-redirect" title="Symmetric multiprocessor">symmetric multiprocessors</a> place a number of CPUs on a shared FSB, though performance could not scale linearly due to bandwidth <a href="https://en.wiktionary.org/wiki/bottleneck" class="extiw" title="wikt:bottleneck">bottlenecks</a>. </p><p>The front-side bus was used in all <a href="/wiki/Intel_Atom" title="Intel Atom">Intel Atom</a>, <a href="/wiki/Celeron" title="Celeron">Celeron</a>, <a href="/wiki/Intel_P5_(microarchitecture)" class="mw-redirect" title="Intel P5 (microarchitecture)">Pentium</a>, <a href="/wiki/Core_2" class="mw-redirect" title="Core 2">Core 2</a>, and <a href="/wiki/Xeon" title="Xeon">Xeon</a> processor models through about 2008<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> and was eliminated in 2009.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> Originally, this bus was a central connecting point for all system devices and the CPU. </p><p>The potential of a faster CPU is wasted if it cannot fetch instructions and data as quickly as it can execute them. The CPU may spend significant time idle while waiting to read or write data in main memory, and high-performance processors therefore require high bandwidth and low latency access to memory. The front-side bus was criticized by <a href="/wiki/AMD" title="AMD">AMD</a> as being an old and slow technology that limits system performance.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> </p><p>More modern designs use point-to-point and serial connections like AMD's <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> and Intel's <a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">DMI 2.0</a> or <a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">QuickPath Interconnect</a> (QPI). These implementations remove the traditional <a href="/wiki/Northbridge_(computing)" title="Northbridge (computing)">northbridge</a> in favor of a direct link from the CPU to the system memory, high-speed peripherals, and the <a href="/wiki/Platform_Controller_Hub" title="Platform Controller Hub">Platform Controller Hub</a>, <a href="/wiki/Southbridge_(computing)" title="Southbridge (computing)">southbridge</a> or I/O controller.<sup id="cite_ref-QPI_11-0" class="reference"><a href="#cite_note-QPI-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> </p><p>In a traditional architecture, the front-side bus served as the immediate data link between the CPU and all other devices in the system, including main memory. In HyperTransport- and QPI-based systems, system memory is accessed independently by means of a <a href="/wiki/Memory_controller" title="Memory controller">memory controller</a> integrated into the CPU, leaving the bandwidth on the HyperTransport or QPI link for other uses. This increases the complexity of the CPU design but offers greater throughput as well as superior scaling in multiprocessor systems. </p> <div class="mw-heading mw-heading2"><h2 id="Transfer_rates">Transfer rates</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=8" title="Edit section: Transfer rates"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The <a href="/wiki/Bandwidth_(computing)" title="Bandwidth (computing)">bandwidth</a> or maximum theoretical throughput of the front-side bus is determined by the product of the width of its data path, its <a href="/wiki/Clock_rate" title="Clock rate">clock frequency</a> (cycles per second) and the number of data transfers it performs per clock cycle. For example, a 64-<a href="/wiki/Bit" title="Bit">bit</a> (8-<a href="/wiki/Byte" title="Byte">byte</a>) wide FSB operating at a frequency of 100 MHz that performs 4 transfers per cycle has a bandwidth of 3200 <a href="/wiki/Megabytes_per_second" class="mw-redirect" title="Megabytes per second">megabytes per second</a> (MB/s): </p> <dl><dd>8 bytes/transfer × 100 MHz × 4 transfers/cycle = 3200 MB/s</dd></dl> <p>The number of transfers per <a href="/wiki/Cycles_per_instruction" title="Cycles per instruction">clock cycle</a> depends on the technology used. For example, <a href="/wiki/GTL%2B" class="mw-redirect" title="GTL+">GTL+</a> performs 1 transfer/cycle, <a href="/wiki/Alpha_21264#External_interface" title="Alpha 21264">EV6</a> 2 transfers/cycle, and <a href="/wiki/AGTL%2B" class="mw-redirect" title="AGTL+">AGTL+</a> 4 transfers/cycle. Intel calls the technique of four transfers per cycle <a href="/wiki/Quad_Data_Rate" class="mw-redirect" title="Quad Data Rate">Quad Pumping</a>. </p><p>Many manufacturers publish the frequency of the front-side bus in MHz, but marketing materials often list the theoretical effective signaling rate (which is commonly called <a href="/wiki/Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">megatransfers</a> per second or MT/s). For example, if a motherboard (or processor) has its bus set at 200 MHz and performs 4 transfers per clock cycle, the FSB is rated at 800 MT/s. </p><p>The specifications of several generations of popular processors are indicated below. </p> <div class="mw-heading mw-heading3"><h3 id="Intel_processors">Intel processors</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=9" title="Edit section: Intel processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable"> <tbody><tr> <th>CPU</th> <th>FSB Frequency (MHz)</th> <th>Transfers/Cycle</th> <th>Bus Width</th> <th>Transfer Rate (MB/sec) </th></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=135&lng=1">Pentium</a></td> <td>50 - 66</td> <td>1</td> <td>64-bit</td> <td>400 - 528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://www.cpu-collection.de/?tn=0&l0=co&l1=Intel&l2=Pentium+OverDrive">Pentium Overdrive</a></td> <td>25 - 66</td> <td>1</td> <td>32 or 64-bit</td> <td>200 - 528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/2024">Pentium Pro</a></td> <td>60 / 66</td> <td>1</td> <td>64-bit</td> <td>480 - 528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=135&lng=1">Pentium MMX</a></td> <td>60 / 66</td> <td>1</td> <td>64-bit</td> <td>480 - 528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=137&lng=1">Pentium MMX Overdrive</a></td> <td>50 / 60 / 66</td> <td>1</td> <td>64-bit</td> <td>400 - 528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/583">Pentium II</a></td> <td>66 / 100</td> <td>1</td> <td>64-bit</td> <td>528 / 800 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/2023">Pentium II Xeon</a></td> <td>100</td> <td>1</td> <td>64-bit</td> <td>800 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Pentium-II/Intel-Pentium%20II%20Overdrive%20333%20-%20PODP66X333%20%28UBPODP66X333%29.html">Pentium II Overdrive</a></td> <td>60 / 66</td> <td>1</td> <td>64-bit</td> <td>480 - 528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/590">Pentium III</a></td> <td>100 / 133</td> <td>1</td> <td>64-bit</td> <td>800 / 1064 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/590">Pentium III Xeon</a></td> <td>100 / 133</td> <td>1</td> <td>64-bit</td> <td>800 / 1064 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=113&lng=1">Pentium III-M</a></td> <td>100 / 133</td> <td>1</td> <td>64-bit</td> <td>800 / 1064 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/581">Pentium 4</a></td> <td>100 / 133</td> <td>4</td> <td>64-bit</td> <td>3200 - 4256 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=117&lng=1">Pentium 4-M</a></td> <td>100</td> <td>4</td> <td>64-bit</td> <td>3200 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/581">Pentium 4 HT</a></td> <td>133 / 200</td> <td>4</td> <td>64-bit</td> <td>4256 / 6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/581">Pentium 4 HT Extreme Edition</a></td> <td>200 / 266</td> <td>4</td> <td>64-bit</td> <td>6400 / 8512 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/7944">Pentium D</a></td> <td>133 / 200</td> <td>4</td> <td>64-bit</td> <td>4256 - 6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=123&lng=1">Pentium Extreme Edition</a></td> <td>200 / 266</td> <td>4</td> <td>64-bit</td> <td>6400 / 8512 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=124&lng=1">Pentium M</a></td> <td>100 / 133</td> <td>4</td> <td>64-bit</td> <td>3200 / 4256 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=122&lng=1">Pentium Dual-Core</a></td> <td>200 / 266</td> <td>4</td> <td>64-bit</td> <td>6400 / 8512 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=140&lng=1">Pentium Dual-Core Mobile</a></td> <td>133 - 200</td> <td>4</td> <td>64-bit</td> <td>6400 - 8512 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/288">Celeron</a></td> <td>66 - 200</td> <td>1-4</td> <td>64-bit</td> <td>528 - 6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/43401">Celeron Mobile</a></td> <td>133 - 200</td> <td>1-4</td> <td>64-bit</td> <td>4256 - 6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/5263">Celeron D</a></td> <td>133</td> <td>4</td> <td>64-bit</td> <td>4256 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/3799">Celeron M</a></td> <td>66 - 200</td> <td>1-4</td> <td>64-bit</td> <td>528 - 6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=102&lng=1">Celeron Dual-Core</a></td> <td>200</td> <td>4</td> <td>64-bit</td> <td>6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=142&lng=1">Celeron Dual-Core Mobile</a></td> <td>133 - 200</td> <td>4</td> <td>64-bit</td> <td>4256 - 6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=150&lng=1">Itanium</a></td> <td>133</td> <td>2</td> <td>64-bit</td> <td>2133 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Itanium_2/index.html">Itanium 2</a></td> <td>200 - 333</td> <td>2</td> <td>128-bit</td> <td>6400 - 10666 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/Xeon/index.html">Xeon</a></td> <td>100 - 400</td> <td>4</td> <td>64-bit</td> <td>3200 - 12800 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/18995">Core Solo</a></td> <td>133 / 166</td> <td>4</td> <td>64-bit</td> <td>4256 / 5312 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/22731">Core Duo</a></td> <td>133 / 166</td> <td>4</td> <td>64-bit</td> <td>4256 / 5312 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/32257">Core 2 Solo</a></td> <td>133 - 200</td> <td>4</td> <td>64-bit</td> <td>4256 - 6400 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/26547">Core 2 Duo</a></td> <td>200 - 333</td> <td>4</td> <td>64-bit</td> <td>6400 - 10656 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/26548">Core 2 Duo Mobile</a></td> <td>133 - 266</td> <td>4</td> <td>64-bit</td> <td>4256 - 8512 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/28398">Core 2 Quad</a></td> <td>266 / 333</td> <td>4</td> <td>64-bit</td> <td>8512 / 10656 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/37361">Core 2 Quad Mobile</a></td> <td>266</td> <td>4</td> <td>64-bit</td> <td>8512 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/34522">Core 2 Extreme</a></td> <td>266 - 400</td> <td>4</td> <td>64-bit</td> <td>8512 - 12800 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/34520">Core 2 Extreme Mobile</a></td> <td>200 / 266</td> <td>4</td> <td>64-bit</td> <td>6400 / 8512 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://ark.intel.com/products/family/29035">Atom</a></td> <td>100 - 166</td> <td>4</td> <td>64-bit</td> <td>3200 - 5312 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="AMD_processors">AMD processors</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=10" title="Edit section: AMD processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable"> <tbody><tr> <th>CPU</th> <th>FSB Frequency (MHz)</th> <th>Transfers/Cycle</th> <th>Bus Width</th> <th>Transfer Rate (MB/sec) </th></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=13&lng=1">K5</a></td> <td>50 - 66</td> <td>1</td> <td>64-bit</td> <td>400 - 528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=14&lng=1">K6</a></td> <td>66</td> <td>1</td> <td>64-bit</td> <td>528 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=15&lng=1">K6-II</a></td> <td>66 - 100</td> <td>1</td> <td>64-bit</td> <td>528 - 800 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=16&lng=1">K6-III</a></td> <td>66 / 100</td> <td>1</td> <td>64-bit</td> <td>528 - 800 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=1&lng=1">Athlon</a></td> <td>100 / 133</td> <td>2</td> <td>64-bit</td> <td>1600 - 2128 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=8&lng=1">Athlon XP</a></td> <td>100 / 133 / 166 / 200</td> <td>2</td> <td>64-bit</td> <td>1600 - 3200 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=7&lng=1">Athlon MP</a></td> <td>100 / 133</td> <td>2</td> <td>64-bit</td> <td>1600 - 2128 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://www.cpu-world.com/CPUs/K7/TYPE-Mobile%20Athlon%204.html">Mobile Athlon 4</a></td> <td>100</td> <td>2</td> <td>64-bit</td> <td>1600 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=9&lng=1">Athlon XP-M</a></td> <td>100 / 133</td> <td>2</td> <td>64-bit</td> <td>1600 - 2128 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=10&lng=1">Duron</a></td> <td>100 / 133</td> <td>2</td> <td>64-bit</td> <td>1600 - 2128 </td></tr> <tr> <td><a rel="nofollow" class="external text" href="http://cpu-data.info/index.php?gr=24&lng=1">Sempron</a></td> <td>166 / 200</td> <td>2</td> <td>64-bit</td> <td>2656 - 3200 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Front-side_bus&action=edit&section=11" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-pcs-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-pcs_1-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFScott_Mueller2003" class="citation book cs1">Scott Mueller (2003). <span class="id-lock-registration" title="Free registration required"><a rel="nofollow" class="external text" href="https://archive.org/details/upgradingrepair100muel"><i>Upgrading and repairing PCs</i></a></span> (15th ed.). Que Publishing. p. <a rel="nofollow" class="external text" href="https://archive.org/details/upgradingrepair100muel/page/314">314</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-7897-2974-3" title="Special:BookSources/978-0-7897-2974-3"><bdi>978-0-7897-2974-3</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Upgrading+and+repairing+PCs&rft.pages=314&rft.edition=15th&rft.pub=Que+Publishing&rft.date=2003&rft.isbn=978-0-7897-2974-3&rft.au=Scott+Mueller&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2Fupgradingrepair100muel&rfr_id=info%3Asid%2Fen.wikipedia.org%3AFront-side+bus" class="Z3988"></span></span> </li> <li id="cite_note-intel-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-intel_2-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFTodd_Langley_and_Rob_Kowalczyk2009" class="citation web cs1">Todd Langley and Rob Kowalczyk (January 2009). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20110607114224/http://download.intel.com/design/intarch/papers/321087.pdf">"Introduction to Intel Architecture: The Basics"</a> <span class="cs1-format">(PDF)</span>. <i>White paper</i>. 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href="/wiki/Daisy_chain_(electrical_engineering)" title="Daisy chain (electrical engineering)">Daisy chain</a></li> <li><a href="/wiki/Control_bus" title="Control bus">Control bus</a></li> <li><a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">Address bus</a></li> <li><a href="/wiki/Bus_contention" title="Bus contention">Bus contention</a></li> <li><a href="/wiki/Bus_mastering" title="Bus mastering">Bus mastering</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li> <li><a href="/wiki/Plug_and_play" title="Plug and play">Plug and play</a></li> <li><a href="/wiki/List_of_interface_bit_rates#Computer_buses" title="List of interface bit rates">List of bus bandwidths</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Standards</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/SS-50_bus" title="SS-50 bus">SS-50 bus</a></li> <li><a href="/wiki/S-100_bus" title="S-100 bus">S-100 bus</a></li> <li><a href="/wiki/Multibus" title="Multibus">Multibus</a></li> <li><a href="/wiki/Unibus" title="Unibus">Unibus</a></li> <li><a href="/wiki/VAXBI_bus" title="VAXBI bus">VAXBI</a></li> <li><a href="/wiki/MBus_(SPARC)" title="MBus (SPARC)">MBus</a></li> <li><a href="/wiki/STD_Bus" title="STD Bus">STD Bus</a></li> <li><a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a></li> <li><a href="/wiki/Q-Bus" title="Q-Bus">Q-Bus</a></li> <li><a href="/wiki/Europe_Card_Bus" title="Europe Card Bus">Europe Card Bus</a></li> <li><a href="/wiki/Industry_Standard_Architecture" title="Industry Standard Architecture">ISA</a></li> <li><a href="/wiki/STEbus" title="STEbus">STEbus</a></li> <li><a href="/wiki/Amiga_Zorro_II" title="Amiga Zorro II">Zorro II</a></li> <li><a href="/wiki/Amiga_Zorro_III" title="Amiga Zorro III">Zorro III</a></li> <li><a href="/wiki/Computer_Automated_Measurement_and_Control" title="Computer Automated Measurement and Control">CAMAC</a></li> <li><a href="/wiki/FASTBUS" title="FASTBUS">FASTBUS</a></li> <li><a href="/wiki/Low_Pin_Count" title="Low Pin Count">LPC</a></li> <li><a href="/wiki/HP_Precision_Bus" title="HP Precision Bus">HP Precision Bus</a></li> <li><a href="/wiki/Extended_Industry_Standard_Architecture" title="Extended Industry Standard Architecture">EISA</a></li> <li><a href="/wiki/VMEbus" title="VMEbus">VME</a></li> <li><a href="/wiki/VME_eXtensions_for_Instrumentation" title="VME eXtensions for Instrumentation">VXI</a></li> <li><a href="/wiki/VXS" title="VXS">VXS</a></li> <li><a href="/wiki/VPX" title="VPX">VPX</a></li> <li><a href="/wiki/NuBus" title="NuBus">NuBus</a></li> <li><a href="/wiki/TURBOchannel" title="TURBOchannel">TURBOchannel</a></li> <li><a href="/wiki/Micro_Channel_architecture" title="Micro Channel architecture">MCA</a></li> <li><a href="/wiki/SBus" title="SBus">SBus</a></li> <li><a href="/wiki/VESA_Local_Bus" title="VESA Local Bus">VLB</a></li> <li><a href="/wiki/GSC_bus" title="GSC bus">HP GSC bus</a></li> <li><a href="/wiki/InfiniBand" title="InfiniBand">InfiniBand</a></li> <li><a href="/wiki/Ethernet" title="Ethernet">Ethernet</a></li> <li><a href="/wiki/Ultra_Port_Architecture" title="Ultra Port Architecture">UPA</a></li> <li><a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a></li> <li><a href="/wiki/PCI-X" title="PCI-X">PCI Extended (PCI-X)</a></li> <li><a href="/wiki/PCI_eXtensions_for_Instrumentation" title="PCI eXtensions for Instrumentation">PXI</a></li> <li><a href="/wiki/PCI_Express" title="PCI Express">PCI Express (PCIe)</a></li> <li><a href="/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port">AGP</a></li> <li><a href="/wiki/Compute_Express_Link" title="Compute Express Link">Compute Express Link (CXL)</a></li> <li><a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface (DMI)</a></li> <li><a href="/wiki/RapidIO" title="RapidIO">RapidIO</a></li> <li><a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">Intel QuickPath Interconnect</a></li> <li><a href="/wiki/NVLink" title="NVLink">NVLink</a></li> <li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> <ul><li><a href="/wiki/Infinity_Fabric" class="mw-redirect" title="Infinity Fabric">Infinity Fabric</a></li></ul></li> <li><a href="/wiki/Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Intel Ultra Path Interconnect</a></li> <li><a href="/wiki/Coherent_Accelerator_Processor_Interface" title="Coherent Accelerator Processor Interface">Coherent Accelerator Processor Interface (CAPI)</a></li> <li><a href="/wiki/SpaceWire" title="SpaceWire">SpaceWire</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Storage</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ST-506/ST-412" title="ST-506/ST-412">ST-506</a></li> <li><a href="/wiki/Enhanced_Small_Disk_Interface" title="Enhanced Small Disk Interface">ESDI</a></li> <li><a href="/wiki/Intelligent_Peripheral_Interface" title="Intelligent Peripheral Interface">IPI</a></li> <li><a href="/wiki/Storage_Module_Device" title="Storage Module Device">SMD</a></li> <li><a href="/wiki/Parallel_ATA" title="Parallel ATA">Parallel ATA (PATA)</a></li> <li><a href="/wiki/Bus_and_Tag" title="Bus and Tag">Bus and Tag</a></li> <li><a href="/wiki/Digital_Storage_Systems_Interconnect" title="Digital Storage Systems Interconnect">DSSI</a></li> <li><a href="/wiki/HIPPI" title="HIPPI">HIPPI</a></li> <li><a href="/wiki/SATA" title="SATA">Serial ATA (SATA)</a></li> <li><a href="/wiki/SCSI" title="SCSI">SCSI</a> <ul><li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel</a></li> <li><a href="/wiki/Serial_Attached_SCSI" title="Serial Attached SCSI">SAS</a></li></ul></li> <li><a href="/wiki/ESCON" title="ESCON">ESCON</a></li> <li><a href="/wiki/Fibre_Channel" title="Fibre Channel">Fibre Channel</a></li> <li><a href="/wiki/Serial_Storage_Architecture" title="Serial Storage Architecture">SSA</a></li> <li><a href="/wiki/SATA_Express" title="SATA Express">SATAe</a></li> <li>PCI Express (via <a href="/wiki/Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">AHCI</a> or <a href="/wiki/NVM_Express" title="NVM Express">NVMe</a> logical device interface)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Peripheral</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Apple_Desktop_Bus" title="Apple Desktop Bus">Apple Desktop Bus</a></li> <li><a href="/wiki/Atari_SIO" title="Atari SIO">Atari SIO</a></li> <li><a href="/wiki/Digital_Control_Bus" title="Digital Control Bus">DCB</a></li> <li><a href="/wiki/Commodore_bus" title="Commodore bus">Commodore bus</a></li> <li><a href="/wiki/HP-IL" title="HP-IL">HP-IL</a></li> <li><a href="/wiki/HIL_bus" title="HIL bus">HIL</a></li> <li><a href="/wiki/MIDI" title="MIDI">MIDI</a></li> <li><a href="/wiki/RS-232" title="RS-232">RS-232</a></li> <li><a href="/wiki/RS-422" title="RS-422">RS-422</a></li> <li><a href="/wiki/RS-423" title="RS-423">RS-423</a></li> <li><a href="/wiki/RS-485" title="RS-485">RS-485</a></li> <li><a href="/wiki/Lightning_(connector)" title="Lightning (connector)">Lightning</a></li> <li><a href="/wiki/DMX512#DMX512-A" title="DMX512">DMX512-A</a></li> <li><a href="/wiki/IEEE-488" class="mw-redirect" title="IEEE-488">IEEE-488 (GPIB)</a></li> <li><a href="/wiki/IEEE_1284" title="IEEE 1284">IEEE-1284 (parallel port)</a></li> <li><a href="/wiki/IEEE_1394" title="IEEE 1394">IEEE-1394 (FireWire)</a></li> <li><a href="/wiki/UNI/O" title="UNI/O">UNI/O</a></li> <li><a href="/wiki/1-Wire" title="1-Wire">1-Wire</a></li> <li><a href="/wiki/I%C2%B2C" title="I²C">I²C</a> (<a href="/wiki/ACCESS.bus" title="ACCESS.bus">ACCESS.bus</a>, <a href="/wiki/Power_Management_Bus" title="Power Management Bus">PMBus</a>, <a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a>)</li> <li><a href="/wiki/I3C_(bus)" title="I3C (bus)">I3C</a></li> <li><a href="/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface">SPI</a></li> <li><a href="/wiki/IEC_61030" title="IEC 61030">D²B</a></li> <li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel SCSI</a></li> <li><a href="/wiki/Profibus" title="Profibus">Profibus</a></li> <li><a href="/wiki/USB" title="USB">USB</a></li> <li><a href="/wiki/Camera_Link" title="Camera Link">Camera Link</a></li> <li><a href="/wiki/PCI_Express#PCI_Express_External_Cabling" title="PCI Express">External PCIe</a></li> <li><a href="/wiki/Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Audio</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ADAT_Lightpipe" title="ADAT Lightpipe">ADAT Lightpipe</a></li> <li><a href="/wiki/AES3" title="AES3">AES3</a></li> <li><a href="/wiki/Intel_High_Definition_Audio" title="Intel High Definition Audio">Intel HD Audio</a></li> <li><a href="/wiki/I%C2%B2S" title="I²S">I²S</a></li> <li><a href="/wiki/MADI" title="MADI">MADI</a></li> <li><a href="/wiki/McASP" title="McASP">McASP</a></li> <li><a href="/wiki/S/PDIF" title="S/PDIF">S/PDIF</a></li> <li><a href="/wiki/TOSLINK" title="TOSLINK">TOSLINK</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Portable</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/PC_Card" title="PC Card">PC Card</a></li> <li><a href="/wiki/ExpressCard" title="ExpressCard">ExpressCard</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Embedded</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multidrop_bus" title="Multidrop bus">Multidrop bus</a></li> <li><a href="/wiki/CoreConnect" title="CoreConnect">CoreConnect</a></li> <li><a href="/wiki/Advanced_Microcontroller_Bus_Architecture" title="Advanced Microcontroller Bus Architecture">AMBA</a> (<a href="/wiki/Advanced_eXtensible_Interface" title="Advanced eXtensible Interface">AXI</a>)</li> <li><a href="/wiki/Wishbone_(computer_bus)" title="Wishbone (computer bus)">Wishbone</a></li> <li><a href="/wiki/SLIMbus" title="SLIMbus">SLIMbus</a></li></ul> </div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><small>Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.</small><br /><span class="noviewer" typeof="mw:File"><span title="Category"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/16px-Symbol_category_class.svg.png" decoding="async" width="16" height="16" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/23px-Symbol_category_class.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/31px-Symbol_category_class.svg.png 2x" data-file-width="180" data-file-height="185" /></span></span> <a href="/wiki/Category:Computer_buses" title="Category:Computer buses">Category</a></div></td></tr></tbody></table></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div 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