Verilating — Verilator Devel 5.031 documentation (2024)

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5.031 documentation (2024) </h1> <div class="bg-primary-100 text-common !leading-common rounded-lg pl-5 pr-2 py-4 mb-2 space-y-2 text-primary-500"> <div class="font-semibold">Table of Contents</div> <a class="list-item toc-h2" href="#toc-0">Binary, C++ and SystemC Generation¶</a> <a class="list-item toc-h2" href="#toc-1">Hierarchical Verilation¶</a> <a class="list-item toc-h3" href="#toc-2">Usage¶</a> <a class="list-item toc-h3" href="#toc-3">Limitations¶</a> <a class="list-item toc-h3" href="#toc-4">Overlapping Verilation and Compilation¶</a> <a class="list-item toc-h2" href="#toc-5">Cross Compilation¶</a> <a class="list-item toc-h2" href="#toc-6">Multithreading¶</a> <a class="list-item toc-h3" href="#toc-7">Multithreaded Verilog and Library Support¶</a> <a class="list-item toc-h2" href="#toc-8">GNU Make¶</a> <a class="list-item toc-h2" href="#toc-9">CMake¶</a> <a class="list-item toc-h3" href="#toc-10">Verilate in CMake¶</a> <a class="list-item toc-h3" href="#toc-11">SystemC Link in CMake¶</a> <a class="list-item toc-h2" href="#toc-12">Verilation Summary Report¶</a> <a class="list-item toc-h2" href="#references">References</a> </div> <div class="text-center my-2 sm:my-4 " > <ins class="adsbygoogle adsense h-ad3 " data-ad-client="ca-pub-5240180246042932" style="display:block" data-ad-format="auto" data-ad-slot="9667766790" data-full-width-responsive="true" data-adtest="off" > </ins> <script> (adsbygoogle = window.adsbygoogle || []).push({}); </script> </div> <article class="article-detail"> <section class="entry-content paragraph"><div> <nav data-toggle="wy-nav-shift"> <div> <div> <p><span> </span></p><p> Devel 5.031 </p> </div> <div data-spy="affix"> <p><span>Getting Started</span><div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p><ul><li><span>Overview</span></li><li><span>Examples</span></li><li><span>Installation</span></li><li><span>CMake Installation</span></li></ul><p><span>User's Guide</span></p><ul><li><span>Verilating</span><ul><li><span>Binary, C++ and SystemC Generation</span></li><li><span>Hierarchical Verilation</span><ul><li><span>Usage</span></li><li><span>Limitations</span></li><li><span>Overlapping Verilation and Compilation</span></li></ul></li><li><span>Cross Compilation</span></li><li><span>Multithreading</span><ul><li><span>Multithreaded Verilog and Library Support</span></li></ul></li><li><span>GNU Make</span></li><li><span>CMake</span><ul><li><span>Verilate in CMake</span></li><li><span>SystemC Link in CMake</span></li></ul></li><li><span>Verilation Summary Report</span></li></ul></li><li><span>Connecting to Verilated Models</span></li><li><span>Simulating (Verilated-Model Runtime)</span></li><li><span>Contributing and Reporting Bugs</span></li><li><span>FAQ/Frequently Asked Questions</span></li></ul><p><span>Reference Guide</span></p><ul><li><span>Input Languages</span></li><li><span>Language Extensions</span></li><li><span>Executable and Argument Reference</span></li><li><span>Errors and Warnings</span></li><li><span>Files</span></li><li><span>Environment</span></li><li><span>Make Variables</span></li><li><span>Deprecations</span></li><li><span>Contributors and Origins</span></li><li><span>Revision History</span></li><li><span>Copyright</span></li></ul> </div> </div> </nav> <section data-toggle="wy-nav-shift"> <nav> <i data-toggle="wy-nav-top"></i> <span>Verilator</span> </nav> <div> <div> <div> <ul> <li><span></span> »</li> <li>Verilating</li> <li> <a href="https://github.com/verilator/verilator/blob/master/docs/guide/verilating.rst" rel="noopener nofollow" target="_blank"> Edit on GitHub</a> </li> </ul> </div> <div> <div> <div><p>Verilator may be used in five major ways:</p><ul><li><p>With the <span>--binary</span> option, Verilator will translate the designinto an executable, via generating C++ and compiling it. See<span>Binary, C++ and SystemC Generation</span>.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></li><li><p>With the <span>--cc</span> or <span>--sc</span> options, Verilator will translatethe design into C++ or SystemC code, respectively. See <span>Binary, C++ and SystemC Generation</span>.</p></li><li><p>With the <span>--lint-only</span> option, Verilator will lint the design tocheck for warnings but will not typically create any output files.</p></li><li><p>With the <span>--xml-only</span> option, Verilator will create XML outputthat may be used to feed into other user-designed tools. See<code><span>docs/xml.rst</span></code> in the distribution.</p></li><li><p>With the <span>-E</span> option, Verilator will preprocess the code accordingto IEEE preprocessing rules and write the output to standard out. Thisis useful to feed other tools and to debug how “`define” statements areexpanded.</p></li></ul><div><h2 id="toc-0">Binary, C++ and SystemC Generation<span>¶</span></h2><p>Verilator will translate a SystemVerilog design into C++ with the<span>--cc</span> option, or into SystemC with the <span>--sc</span> option. Itwill translate into C++ and compile it into an executable binary with the<span>--binary</span> option.</p><p>When using these options:</p><ol><li><p>Verilator reads the input Verilog code and determines all “top modules”, thatis, modules or programs that are not used as instances under other cells.If <span>--top-module</span> is used, then that determines the top module, andall other top modules are removed; otherwise a <span>MULTITOP</span> warningis given.</p></li><li><p>Verilator writes the C++/SystemC code to output files into the<span>--Mdir</span> option-specified directory, or defaults to “obj_dir”.The prefix is set with <span>--prefix</span>, or defaults to the name of thetop module.</p></li><li><p>If <span>--binary</span> or <span>--main</span> is used, Verilator creates a C++top wrapper to read command line arguments, create the model, andexecute the model.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></li><li><p>If <span>--binary</span> or <span>--exe</span> is used, Verilator createsmakefiles to generate a simulation executable, otherwise, it createsmakefiles to generate an archive (.a) containing the objects.</p></li><li><p>If <span>--binary</span> or <span>--build</span> is used, it calls <span>GNU Make</span> or <span>CMake</span> to build the model.</p></li></ol><p>Once a model is built, the next step is typically for the user to run it,see <span>Simulating (Verilated-Model Runtime)</span>.</p></div><div><h2 id="toc-1">Hierarchical Verilation<span>¶</span></h2><p>Large designs may take long (e.g., 10+ minutes) and huge memory (e.g., 100+GB) to Verilate. In hierarchical mode, the user manually selects somelarge lower-level hierarchy blocks to separate from the larger design. Forexample, a core may be the hierarchy block separated out of a multi-coreSoC design.</p><p>Verilator is run in hierarchical mode on the whole SoC. Verilator willmake two models, one for the CPU hierarchy block and one for the SoC. TheVerilated code for the SoC will automatically call the CPU Verilated model.</p><p>The current hierarchical Verilation is based on <span>--lib-create</span>. Eachhierarchy block is Verilated into a library. User modules of the hierarchyblocks will see a tiny wrapper generated by <span>--lib-create</span>.</p><div><h3 id="toc-2">Usage<span>¶</span></h3><p>Users need to mark one or more moderate-size modules as hierarchy block(s).There are two ways to mark a module:</p><ul><li><p>Write <span>/*verilatorhier_block*/</span> metacomment in HDL code.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></li><li><p>Add a <span>hier_block</span> line in the <span>Configuration Files</span>.</p></li></ul><p>Then pass the <span>--hierarchical</span> option to Verilator.</p><p>The compilation is the same as when not using hierarchical mode.<div class="bg-primary-100 rounded-lg my-6 px-2 py-3 font-semibold insert" style="color: rgb(37, 99, 235)"><div class="text-common !leading-common ml-1 insert" style="margin-top: 0.2rem; margin-bottom: 0.2rem">See Also</div><a class="list-item toc-h2 py-1" style="border-bottom: none" href="https://peterec.com/article/installation-verilator-devel-5-031-documentation/4697" target="_blank" rel="noopener">Installation — Verilator Devel 5.031 documentation</a></div></p><div><div><pre><span></span>make -C obj_dir -f Vtop_module_name.mk</pre></div></div></div><div><h3 id="toc-3">Limitations<span>¶</span></h3><p>Hierarchy blocks have some limitations, including:</p><ul><li><p>The hierarchy block cannot be accessed using dot (.) from the uppermodule(s) or other hierarchy blocks.</p></li><li><p>Signals in the block cannot be traced.</p></li><li><p>Modport cannot be used at the hierarchical block boundary.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></li><li><p>The simulation speed is likely not as fast as flat Verilation, in whichall modules are globally scheduled.</p></li><li><p>Generated clocks may not work correctly if generated in the hierarchicalmodel and passed into another hierarchical model or the top module.</p></li><li><p>Delays are not allowed in hierarchy blocks.</p></li></ul><p>But, the following usage is supported:</p><ul><li><p>Nested hierarchy blocks. A hierarchy block may instantiate otherhierarchy blocks.</p></li><li><p>Parameterized hierarchy block. Parameters of a hierarchy block can beoverridden using <code><span>#(.param_name(value))</span></code> construct.</p></li></ul></div><div><h3 id="toc-4">Overlapping Verilation and Compilation<span>¶</span></h3><p>Verilator needs to run 2 + <em>N</em> times in hierarchical Verilation, where <em>N</em>is the number of hierarchy blocks. One of the two is for the top module,which refers to the wrappers of all other hierarchy blocks. The second of thetwo is the initial run that searches modules marked with<span>/*verilatorhier_block*/</span> metacomment and creates a plan andwrite in <code><em><span>prefix</span></em><span>_hier.mk</span></code>. This initial run internally invokesother <em>N</em> + 1 runs, so you don’t have to care about these <em>N</em> + 1 times ofrun. The additional <em>N</em> is the Verilator run for each hierarchical block.</p><p>If :<span>-j {jobs}</span> option is specified, Verilation for hierarchyblocks runs in parallel.</p><p>If <span>--build</span> option is specified, C++ compilation also runs as soonas a hierarchy block is Verilated. C++ compilation and Verilation for otherhierarchy blocks run simultaneously.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></div></div><div><h2 id="toc-5">Cross Compilation<span>¶</span></h2><p>Verilator supports cross-compiling Verilated code. This is generally usedto run Verilator on a Linux system and produce C++ code that is then compiledon Windows.</p><p>Cross-compilation involves up to three different OSes. The build system iswhere you configure and compile Verilator, the host system is where you runVerilator, and the target system is where you compile the Verilated codeand run the simulation.</p><p>Verilator requires the build and host system types to be thesame, though the target system type may be different. To support this,<strong>./configure</strong> and make Verilator on the build system. Then, runVerilator on the host system. Finally, the output of Verilator may becompiled on the different target system.</p><p>To support this, none of the files that Verilator produces will referenceany configure-generated build-system-specific files, such as<code><span>config.h</span></code> (which is renamed in Verilator to <code><span>config_package.h</span></code>to reduce confusion.) The disadvantage of this approach is that<code><span>include/verilatedos.h</span></code> must self-detect the requirements of thetarget system, rather than using configure.</p><p>The target system may also require edits to the Makefiles, the simpleMakefiles produced by Verilator presume the target system is the same typeas the build system.</p></div><div><h2 id="toc-6">Multithreading<span>¶</span></h2><p>Verilator supports multithreaded simulation models.</p><p>With <span>--threads 1</span>, the generated model issingle-threaded; however, the support libraries are multithread safe. Thisallows different instantiations of the model(s) to potentially each be rununder a different thread. All threading is the responsibility of the user’sC++ testbench.</p><p>With <span>--threads {N}</span>, where N is at least 2, thegenerated model will be designed to run in parallel on N threads. Thethread calling eval() provides one of those threads, and the generatedmodel will create and manage the other N-1 threads. It’s the client’sresponsibility not to oversubscribe the available CPU cores. Under CPUoversubscription, the Verilated model should not livelock nor deadlock;however, you can expect performance to be far worse than it would be withthe proper ratio of threads and CPU cores.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p><p>The thread used for constructing a model must be the same thread that calls<code><span>eval()</span></code> into the model; this is called the “eval thread”. The threadused to perform certain global operations, such as saving and tracing, mustbe done by a “main thread”. In most cases, the eval thread and main threadare the same thread (i.e. the user’s top C++ testbench runs on a singlethread), but this is not required.</p><p>When making frequent use of DPI imported functions in a multithreadedmodel, it may be beneficial to performance to adjust the<span>--instr-count-dpi</span> option based on some experimentation. Thisinfluences the partitioning of the model by adjusting the assumed executiontime of DPI imports.</p><p>When using <span>--trace</span> to perform VCD tracing, the VCD traceconstruction is parallelized using the same number of threads as specifiedwith <span>--threads</span>, and is executed on the same thread pool as the model.</p><p>The <span>--trace-threads</span> options can be used with <span>--trace-fst</span>to offload FST tracing using multiple threads. If <span>--trace-threads</span> isgiven without <span>--threads</span>, then <span>--trace-threads</span> will imply<span>--threads 1</span>, i.e., the support libraries will bethread safe.</p><p>With <span>--trace-threads 0</span>, trace dumps are producedon the main thread. This again gives the highest single-thread performance.</p><p>With <span>--trace-threads {N}</span>, where N is at least 1,up to N additional threads will be created and managed by the trace files(e.g., VerilatedFstC), to offload construction of the trace dump. The mainthread will be released to proceed with execution as soon as possible, thoughsome main thread blocking is still necessary while capturing thetrace. FST tracing can utilize up to 2 offload threads, so there is no useof setting <span>--trace-threads</span> higher than 2 at the moment.</p><p>When running a multithreaded model, the default Linux task scheduler oftenworks against the model by assuming short-lived threads and thusit often schedules threads using multiple hyperthreads within the samephysical core. For best performance, use the <strong>numactl</strong> program to(when the threading count fits) select unique physical cores on the samesocket. The same applies for <span>--trace-threads</span> as well.</p><p>As an example, if a model was Verilated with<span>--threads 4</span>, we consult:</p><div><div><pre><span></span>egrep <span>'processor|physical id|core id'</span> /proc/cpuinfo</pre><div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></div></div><p>To select cores 0, 1, 2, and 3 that are all located on the same socket (0)but have different physical cores. (Also useful is<strong>numactl --hardware</strong>, or <strong>lscpu</strong>, but those don’t showhyperthreading cores.) Then we execute:</p><div><div><pre><span></span>numactl -m <span>0</span> -C <span>0</span>,1,2,3 -- verilated_executable_name</pre></div></div><p>This will limit memory to socket 0, and threads to cores 0, 1, 2, 3,(presumably on socket 0), optimizing performance. Of course, this must beadjusted if you want another simulator to use, e.g., socket 1, or if youVerilated with a different number of threads. To see what CPUs areactually used, use <span>--prof-exec</span>.</p><div><h3 id="toc-7">Multithreaded Verilog and Library Support<span>¶</span></h3><p>$display/$stop/$finish are delayed until the end of an eval() callto maintain ordering between threads. This may result in additional taskscompleting after the $stop or $finish.</p><p>If using <span>--coverage</span>, the coverage routines are fully thread-safe.</p><p>If using the DPI, Verilator assumes pure DPI imports are thread-safe,balancing performance versus safety. See <span>--threads-dpi</span>.</p><p>If using <span>--savable</span>, the save/restore classes are not multithreadedand must be called only by the eval thread.</p><p>If using <span>--sc</span>, the SystemC kernel is not thread-safe; therefore,the eval thread and main thread must be the same.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p><p>If using <span>--trace</span>, the tracing classes must be constructed andcalled from the main thread.</p><p>If using <span>--vpi</span>, since SystemVerilog VPI was not architected byIEEE to be multithreaded, Verilator requires all VPI calls are only madefrom the main thread.</p></div></div><div><h2 id="toc-8">GNU Make<span>¶</span></h2><p>Verilator defaults to creating GNU Make makefiles for the model. Verilatorwill call make automatically when the <span>--build</span> option is used.</p><p>If calling Verilator from a makefile, the <span>--MMD</span> option will createa dependency file, allowing Make to only run Verilator if input Verilogfiles change.</p></div><div><h2 id="toc-9">CMake<span>¶</span></h2><p>Verilator can be run using CMake, which takes care of both runningVerilator and compiling the output. There is a CMake example in the<code><span>examples/</span></code> directory. The following is a minimal CMakeLists.txt thatwould build the code listed in <span>Example C++ Execution</span></p><div><div><pre><span></span><span>project</span><span>(</span><span>cmake_example</span><span>)</span><span>find_package</span><span>(</span><span>verilator</span> <span>HINTS</span> <span>$ENV{</span><span>VERILATOR_ROOT</span><span>}</span><span>)</span><span>add_executable</span><span>(</span><span>Vour</span> <span>sim_main.cpp</span><span>)</span><span>verilate</span><span>(</span><span>Vour</span> <span>SOURCES</span> <span>our.v</span><span>)</span></pre></div></div><p><code><span>find_package</span></code> will automatically find an installed copy ofVerilator, or use a local build if VERILATOR_ROOT is set.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p><p>Using CMake >= 3.12 and the Ninja generator is recommended, though othercombinations should work. To build with CMake, change to the foldercontaining CMakeLists.txt and run:</p><div><div><pre><span></span>mkdir build<span>cd</span> buildcmake -GNinja ..ninja</pre></div></div><p>Or to build with your system default generator:</p><div><div><pre><span></span>mkdir build<span>cd</span> buildcmake ..cmake --build .</pre></div></div><p>If you’re building the example, you should have an executable to run:</p><div><div><pre><span></span>./Vour</pre></div></div><p>The package sets the CMake variables verilator_FOUND, VERILATOR_ROOT,and VERILATOR_BIN to the appropriate values and creates a verilate()function. verilate() will automatically create custom commands to runVerilator and add the generated C++ sources to the target specified.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p><div><h3 id="toc-10">Verilate in CMake<span>¶</span></h3><div><div><pre><span></span><span>verilate</span><span>(</span><span>target</span> <span>SOURCES</span> <span>source</span> <span>...</span> <span>[TOP_MODULE</span> <span>top]</span> <span>[PREFIX</span> <span>name]</span> <span>[TRACE]</span> <span>[TRACE_FST]</span> <span>[SYSTEMC]</span> <span>[COVERAGE]</span> <span>[INCLUDE_DIRS</span> <span>dir</span> <span>...]</span> <span>[OPT_SLOW</span> <span>...]</span> <span>[OPT_FAST</span> <span>...]</span> <span>[OPT_GLOBAL</span> <span>..]</span> <span>[DIRECTORY</span> <span>dir]</span> <span>[THREADS</span> <span>num]</span> <span>[TRACE_THREADS</span> <span>num]</span> <span>[VERILATOR_ARGS</span> <span>...]</span><span>)</span></pre></div></div><p>Lowercase and … should be replaced with arguments; the uppercase partsdelimit the arguments and can be passed in any order or left out entirelyif optional.</p><p>verilate(target …) can be called multiple times to add other Verilogmodules to an executable or library target.</p><p>When generating Verilated SystemC sources, you should list theSystemC include directories and link to the SystemC libraries.</p><dl><dt><code><span>target</span></code></dt><dd><p>Name of a target created by add_executable or add_library.</p></dd></dl><dl><dt><code><span>COVERAGE</span></code></dt><dd><p>Optional. Enables coverage if present, equivalent to “VERILATOR_ARGS–coverage”.</p></dd></dl><dl><dt><code><span>DIRECTORY</span></code></dt><dd><p>Optional. Set the verilator output directory. It is preferable to usethe default, which will avoid collisions with other files.</p></dd></dl><dl><dt><code><span>INCLUDE_DIRS</span></code></dt><dd><p>Optional. Sets directories that Verilator searches (same as -y).<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></dd></dl><dl><dt><code><span>OPT_SLOW</span></code></dt><dd><p>Optional. Set compiler options for the slow path. You may want to reducethe optimization level to improve compile times with large designs.</p></dd></dl><dl><dt><code><span>OPT_FAST</span></code></dt><dd><p>Optional. Set compiler options for the fast path.</p></dd></dl><dl><dt><code><span>OPT_GLOBAL</span></code></dt><dd><p>Optional. Set compiler options for the common runtime library used byVerilated models.</p></dd></dl><dl><dt><code><span>PREFIX</span></code></dt><dd><p>Optional. Sets the Verilator output prefix. Defaults to the name of thefirst source file with a “V” prepended. It must be unique in each callto verilate(), so this is necessary if you build a module multiple timeswith different parameters. It must be a valid C++ identifier, i.e., itcontains no white space and only characters A-Z, a-z, 0-9 or _.</p></dd></dl><dl><dt><code><span>SOURCES</span></code></dt><dd><p>List of Verilog files to Verilate. You must provide at least one file.</p></dd></dl><dl><dt><code><span>SYSTEMC</span></code></dt><dd><p>Optional. Enables SystemC mode, defaults to C++ if not specified.</p><p>When using Accellera’s SystemC with CMake support, a CMake target isavailable that simplifies the SystemC steps. This will only work ifCMake can find the SystemC installation, and this can be configured bysetting the CMAKE_PREFIX_PATH variable during CMake configuration.</p><p>Don’t forget to set the same C++ standard for the Verilated sources asthe SystemC library. This can be specified using the SYSTEMC_CXX_FLAGSenvironment variable.</p></dd></dl><dl><dt><code><span>THREADS</span></code></dt><dd><p>Optional. Enable a multithreaded model; see <span>--threads</span>.</p></dd></dl><dl><dt><code><span>TRACE_THREADS</span></code></dt><dd><p>Optional. Enable multithreaded FST trace; see <span>--trace-threads</span>.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></dd></dl><dl><dt><code><span>TOP_MODULE</span></code></dt><dd><p>Optional. Sets the name of the top module. Defaults to the name of thefirst file in the SOURCES array.</p></dd></dl><dl><dt><code><span>TRACE</span></code></dt><dd><p>Optional. Enables VCD tracing if present, equivalent to “VERILATOR_ARGS–trace”.</p></dd></dl><dl><dt><code><span>TRACE_FST</span></code></dt><dd><p>Optional. Enables FST tracing if present, equivalent to “VERILATOR_ARGS–trace-fst”.</p></dd></dl><dl><dt><code><span>VERILATOR_ARGS</span></code></dt><dd><p>Optional. Extra arguments to Verilator. Do not specify <span>--Mdir</span>or <span>--prefix</span> here; use DIRECTORY or PREFIX.</p></dd></dl></div><div><h3 id="toc-11">SystemC Link in CMake<span>¶</span></h3><p>Verilator’s CMake support provides a convenience function to automaticallyfind and link to the SystemC library. It can be used as:</p><div><div><pre><span></span><span>verilator_link_systemc</span><span>(</span><span>target</span><span>)</span></pre></div></div><p>where target is the name of your target.</p><p>The search paths can be configured by setting some variables:<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p><dl><dt><code><span>SYSTEMC_INCLUDE</span></code></dt><dd><p>Sets the direct path to the SystemC includes.</p></dd></dl><dl><dt><code><span>SYSTEMC_LIBDIR</span></code></dt><dd><p>Sets the direct path to the SystemC libraries.</p></dd></dl><dl><dt><code><span>SYSTEMC_ROOT</span></code></dt><dd><p>Sets the installation prefix of an installed SystemC library.</p></dd></dl><dl><dt><code><span>SYSTEMC</span></code></dt><dd><p>Sets the installation prefix of an installed SystemC library. (Same asSYSTEMC_ROOT).</p></dd></dl></div></div><div><h2 id="toc-12">Verilation Summary Report<span>¶</span></h2><p>When Verilator generates code, unless <span>--quiet-stats</span> is used, itwill print a report to stdout summarizing the build. For example:</p><div><div><pre><span></span><span>-</span> <span>V</span> <span>e</span> <span>r</span> <span>i</span> <span>l</span> <span>a</span> <span>t</span> <span>i</span> <span>o</span> <span>n</span> <span>R</span> <span>e</span> <span>p</span> <span>o</span> <span>r</span> <span>t</span><span>:</span> <span>Verilator</span> <span>....</span><span>-</span> <span>Verilator</span><span>:</span> <span>Built</span> <span>from</span> <span>354</span> <span>MB</span> <span>sources</span> <span>in</span> <span>247</span> <span>modules</span><span>,</span> <span>into</span> <span>74</span> <span>MB</span> <span>in</span> <span>89</span> <span>C</span><span>++</span> <span>files</span> <span>needing</span> <span>0.192</span> <span>MB</span><span>-</span> <span>Verilator</span><span>:</span> <span>Walltime</span> <span>26.580</span> <span>s</span> <span>(</span><span>elab</span><span>=</span><span>2.096</span><span>,</span> <span>cvt</span><span>=</span><span>18.268</span><span>,</span> <span>bld</span><span>=</span><span>2.100</span><span>);</span> <span>cpu</span> <span>26.548</span> <span>s</span> <span>on</span> <span>1</span> <span>threads</span><span>;</span> <span>alloced</span> <span>2894.672</span> <span>MB</span></pre></div></div><p>The information in this report is:</p><dl><dt><code><span>"Verilator</span> <span>..."</span></code></dt><dd><p>Program version.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></dd></dl><dl><dt><code><span>"234</span> <span>MB</span> <span>sources"</span></code></dt><dd><p>Characters of post-preprocessed text in all inputVerilog and Verilator Control files in megabytes.</p></dd></dl><dl><dt><code><span>"247</span> <span>modules"</span></code></dt><dd><p>Number of interfaces/modules/classes/packages in design beforeelaboration.</p></dd></dl><dl><dt><code><span>"into</span> <span>74</span> <span>MB"</span></code></dt><dd><p>Characters of output C++ code, including comments in megabytes.</p></dd></dl><dl><dt><code><span>"89</span> <span>C++</span> <span>files"</span></code></dt><dd><p>Number of .cpp files created.</p></dd></dl><dl><dt><code><span>"needing</span> <span>192MB"</span></code></dt><dd><p>Verilation-time minimum-bound estimate of memory needed to run model inmegabytes. (Expect to need significantly more.)</p></dd></dl><dl><dt><code><span>"Walltime</span> <span>26.580</span> <span>s"</span></code></dt><dd><p>Real elapsed wall time for Verilation and build.</p></dd></dl><dl><dt><code><span>"elab=2.096"</span></code></dt><dd><p>Wall time to read in files and complete elaboration.</p></dd></dl><dl><dt><code><span>"cvt=18.268"</span></code></dt><dd><p>Wall time for Verilator to process and write output.</p></dd></dl><dl><dt><code><span>"bld=2.1"</span></code></dt><dd><p>Wall time to compile gcc/clang (if using <span>--build</span>).</p></dd></dl><dl><dt><code><span>"cpu</span> <span>22.548</span> <span>s"</span></code></dt><dd><p>CPU time used, total across all CPU threads.<div class="sm:flex sm:items-center sm:justify-center sm:flex-row sm:space-x-1 insert" style="margin-top:0; margin-bottom:0;"><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script><ins class="adsbygoogle sm:w-1/2" style="display:block; text-align:center;" data-ad-layout="in-article" data-ad-format="fluid" data-full-width-responsive="true" data-ad-slot="9667766790" data-ad-client="ca-pub-5240180246042932" data-adtest="off"></ins><script>(adsbygoogle = window.adsbygoogle || []).push({});</script></div></p></dd></dl><dl><dt><code><span>"4</span> <span>threads"</span></code></dt><dd><p>Number of simultaneous threads used.</p></dd></dl><dl><dt><code><span>"alloced</span> <span>123</span> <span>MB"</span></code></dt><dd><p>Total memory used during build by Verilator executable (excludes<span>--build</span> compiler’s usage) in megabytes.</p></dd></dl></div></div> </div> </div> </div> </div> </section> </div></section> <img class="lazyload" data-src="https://ts2.mm.bing.net/th?q=Verilating — Verilator Devel 5.031 documentation (2024)" alt="Verilating — Verilator Devel 5.031 documentation (2024)" src="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAAEAAAABCAQAAAC1HAwCAAAAC0lEQVR42mP8/h8AAvMB+NzmkbcAAAAASUVORK5CYII="/> <section> </section> </article> <h2 id="references" class="text-xl font-semibold mt-3 mb-3">References</h2> <ul class="ml-5 list-disc"> <li><a target="_blank" rel="noopener nofollow" class="text-sm break-all" href="https://verilator.org/guide/latest/install.html">https://verilator.org/guide/latest/install.html</a> </li> <li><a target="_blank" rel="noopener nofollow" class="text-sm break-all" href="https://verilator.org/guide/latest/verilating.html">https://verilator.org/guide/latest/verilating.html</a> </li> </ul> <div class="text-2xl font-semibold mt-5 mb-5">Top Articles</div> <div class="container-doc"> <a href="https://peterec.com/article/intersecting-histories-and-identities-celebrating-pride-and-indigenous-history-in-june/4697" target="_blank" rel="noopener" class="group mb-20 flex flex-col items-center"> <img class="lazyload h-56 object-cover" data-src="https://ts2.mm.bing.net/th?q=Intersecting Histories and Identities: Celebrating Pride and Indigenous History in June" src="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAAEAAAABCAQAAAC1HAwCAAAAC0lEQVR42mP8/h8AAvMB+NzmkbcAAAAASUVORK5CYII="/> <div class="group-hover:text-primary-500 block font-medium mt-5 text-2xl"> Intersecting Histories and Identities: Celebrating Pride and Indigenous History in June </div> </a> <a href="https://peterec.com/article/dalton-s-atomic-theory-article-khan-academy/4697" target="_blank" rel="noopener" class="group mb-20 flex flex-col items-center"> <img class="lazyload h-56 object-cover" data-src="https://ts2.mm.bing.net/th?q=Dalton's atomic theory (article) | Khan Academy" src="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAAEAAAABCAQAAAC1HAwCAAAAC0lEQVR42mP8/h8AAvMB+NzmkbcAAAAASUVORK5CYII="/> <div class="group-hover:text-primary-500 block font-medium mt-5 text-2xl"> Dalton's atomic theory (article) | Khan Academy </div> </a> <a href="https://peterec.com/article/review-matrix-college-pal/4697" target="_blank" rel="noopener" class="group mb-20 flex flex-col items-center"> <img class="lazyload h-56 object-cover" data-src="https://ts2.mm.bing.net/th?q=Review Matrix - College Pal" src="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAAEAAAABCAQAAAC1HAwCAAAAC0lEQVR42mP8/h8AAvMB+NzmkbcAAAAASUVORK5CYII="/> <div class="group-hover:text-primary-500 block font-medium mt-5 text-2xl"> Review Matrix - College Pal </div> </a> </div> <div class="text-2xl font-semibold mt-5 mb-5">Latest Posts</div> <div class="container-doc"> <a href="https://peterec.com/article/what-gift-cards-can-be-used-at-an-atm-and-other-questions-you-might-have/4697" target="_blank" rel="noopener" class="group mb-20 flex flex-col items-center"> <img class="lazyload h-56 object-cover" data-src="https://ts2.mm.bing.net/th?q=What Gift Cards Can Be Used at An ATM? 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