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0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-More_citations_needed plainlinks metadata ambox ambox-content ambox-Refimprove" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Question_book-new.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This article <b>needs additional citations for <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">verification</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/Memory_type_range_register" title="Special:EditPage/Memory type range register">improve this article</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>. Unsourced material may be challenged and removed.<br /><small><span class="plainlinks"><i>Find sources:</i> <a rel="nofollow" class="external text" href="https://www.google.com/search?as_eq=wikipedia&q=%22Memory+type+range+register%22">"Memory type range register"</a> – <a rel="nofollow" class="external text" href="https://www.google.com/search?tbm=nws&q=%22Memory+type+range+register%22+-wikipedia&tbs=ar:1">news</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?&q=%22Memory+type+range+register%22&tbs=bkt:s&tbm=bks">newspapers</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?tbs=bks:1&q=%22Memory+type+range+register%22+-wikipedia">books</a> <b>·</b> <a rel="nofollow" class="external text" href="https://scholar.google.com/scholar?q=%22Memory+type+range+register%22">scholar</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.jstor.org/action/doBasicSearch?Query=%22Memory+type+range+register%22&acc=on&wc=on">JSTOR</a></span></small></span> <span class="date-container"><i>(<span class="date">October 2009</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p><b>Memory type range registers</b> (<b>MTRRs</b>) are a set of <a href="/wiki/Processor_supplementary_capability" title="Processor supplementary capability">processor supplementary capability</a> <a href="/wiki/Control_register" title="Control register">control registers</a> that provide <a href="/wiki/System_software" title="System software">system software</a> with control of how accesses to <a href="/wiki/Computer_storage" class="mw-redirect" title="Computer storage">memory</a> ranges by the <a href="/wiki/CPU" class="mw-redirect" title="CPU">CPU</a> are <a href="/wiki/CPU_cache" title="CPU cache">cached</a>. It uses a set of programmable <a href="/wiki/Model-specific_register" title="Model-specific register">model-specific registers</a> (MSRs) which are special registers provided by most modern CPUs. Possible access modes to memory ranges can be uncached, <a href="/wiki/Write-through" class="mw-redirect" title="Write-through">write-through</a>, <a href="/wiki/Write-combining" class="mw-redirect" title="Write-combining">write-combining</a>, write-protect, and <a href="/wiki/Write-back" class="mw-redirect" title="Write-back">write-back</a>. In write-back mode, writes are written to the <a href="/wiki/CPU" class="mw-redirect" title="CPU">CPU</a>'s <a href="/wiki/CPU_cache" title="CPU cache">cache</a> and the cache is marked dirty, so that its contents are written to memory later. </p><p>Write-combining allows <a href="/wiki/Computer_bus" class="mw-redirect" title="Computer bus">bus</a> write transfers to be combined into a larger transfer before <a href="/wiki/Burst_mode_(computing)" title="Burst mode (computing)">bursting</a> them over the bus to allow more efficient writes to system resources like <a href="/wiki/Graphics_card" title="Graphics card">graphics card</a> memory. This often increases the speed of image write operations by several times, at the cost of losing the simple sequential read/write semantics of normal memory. Additional bits which are provided on some <a href="/wiki/Computer_architecture" title="Computer architecture">computer architectures</a>, such as <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, allow the shadowing of <a href="/wiki/Read-only_memory" title="Read-only memory">ROM</a> contents in <a href="/wiki/Random-access_memory" title="Random-access memory">memory</a> (shadow ROM), and the configuration of <a href="/wiki/Memory-mapped_I/O" class="mw-redirect" title="Memory-mapped I/O">memory-mapped I/O</a>. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="MTRRs_in_x86-PC_processors">MTRRs in x86-PC processors<span class="anchor" id="FIXED-RANGE"></span><span class="anchor" id="VARIABLE-RANGE"></span></h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Memory_type_range_register&action=edit&section=1" title="Edit section: MTRRs in x86-PC processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In early <a href="/wiki/X86_architecture" class="mw-redirect" title="X86 architecture">x86 architecture</a> systems, especially where the <a href="/wiki/CPU_cache" title="CPU cache">cache</a> was provided by separate chips outside of the CPU package, this function was controlled by the <a href="/wiki/Chipset" title="Chipset">chipset</a> and configured through <a href="/wiki/BIOS" title="BIOS">BIOS</a> settings. </p><p>When the CPU cache was moved inside the CPU, the CPUs implemented <i>fixed-range MTRRs</i> which cover the first <a href="/wiki/Megabyte" title="Megabyte">megabyte</a> of memory to be compatible to what PC-BIOSes provided at that time. These are used to control the cache policy needed for <a href="/wiki/VGA" class="mw-redirect" title="VGA">VGA</a> accesses and all other memory-accesses done while the system is in <a href="/wiki/Real_mode" title="Real mode">real mode</a>. Above 1 MB, CPUs provide a number of <i>variable-range MTRRs</i>, which can be freely placed and even overlap. These variable-range MTRRs can be used to set the caching policy of graphics memory and other memory ranges used by <a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a> devices. </p><p>The MTRR count varies: </p> <ul><li>The Intel <a href="/wiki/P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a> family of processors (<a href="/wiki/Pentium_Pro" title="Pentium Pro">Pentium Pro</a>, <a href="/wiki/Pentium_II" title="Pentium II">Pentium II</a>) and later have MTRRs which may be used to control access to memory ranges.<sup id="cite_ref-The_Linux_Gamers_1-0" class="reference"><a href="#cite_note-The_Linux_Gamers-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup></li> <li>The <a href="/wiki/Cyrix" title="Cyrix">Cyrix</a> <a href="/wiki/6x86" class="mw-redirect" title="6x86">6x86</a>, <a href="/wiki/6x86MX" class="mw-redirect" title="6x86MX">6x86MX</a> and <a href="/wiki/Cyrix_MII" class="mw-redirect" title="Cyrix MII">MII</a> processors have <a href="/wiki/Address_Range_Registers" class="mw-redirect" title="Address Range Registers">Address Range Registers</a> (ARRs) which provide similar functionality to MTRRs.</li> <li>The <a href="/wiki/Centaur_Technology" title="Centaur Technology">Centaur</a> C6 <a href="/wiki/WinChip" title="WinChip">WinChip</a> has 8 MCRs, allowing write-combining.</li> <li>The <a href="/wiki/VIA_Technologies" title="VIA Technologies">VIA</a> <a href="/wiki/Cyrix_III" title="Cyrix III">Cyrix III</a> and <a href="/wiki/VIA_C3" title="VIA C3">VIA C3</a> CPUs offer 8 Intel-style MTRRs.</li> <li>The <a href="/wiki/AMD" title="AMD">AMD</a> <a href="/wiki/Athlon" title="Athlon">Athlon</a> family provide 8 Intel-style MTRRs.</li> <li>The <a href="/wiki/AMD" title="AMD">AMD</a> <a href="/wiki/K6-2" class="mw-redirect" title="K6-2">K6-2</a> (stepping 8 and above) and <a href="/wiki/K6-III" class="mw-redirect" title="K6-III">K6-III</a> processors have two MTRRs.</li></ul> <p>The memory interface of <a href="/wiki/Advanced_Micro_Devices#Athlon_64,_Opteron_and_Phenom" class="mw-redirect" title="Advanced Micro Devices">AMD K8</a> CPUs supports "Extended fixed-range MTRR Type-Field Encodings" which allows one to specify whether accesses to certain address ranges are executed by accessing <a href="/wiki/Random-access_memory" title="Random-access memory">RAM</a> through the <a href="/wiki/Direct_Connect_Architecture" class="mw-redirect" title="Direct Connect Architecture">Direct Connect Architecture</a> or by executing <a href="/wiki/Memory-mapped_I/O" class="mw-redirect" title="Memory-mapped I/O">memory-mapped I/O</a>. This allows, for example, <a href="/wiki/Random-access_memory#Shadow_RAM" title="Random-access memory">shadow RAM</a> to be implemented by copying ROM contents into RAM. </p> <div class="mw-heading mw-heading2"><h2 id="Successor">Successor</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Memory_type_range_register&action=edit&section=2" title="Edit section: Successor"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Newer x86 CPUs support a more advanced technique called <a href="/wiki/Page_attribute_table" title="Page attribute table">page attribute tables</a> (PATs) that allow for per-page setting of these modes, instead of having a limited number of low-granularity registers to deal with modern memory sizes that can be as high as 64 <a href="/wiki/Giga_byte" class="mw-redirect" title="Giga byte">GB</a> even on a laptop, and several times that amount on a desktop system. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Memory_type_range_register&action=edit&section=3" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Address-range_register" title="Address-range register">Address-range register</a></li> <li><a href="/wiki/Page_attribute_table" title="Page attribute table">Page attribute table</a> (PAT)</li> <li><a href="/wiki/Write_barrier" title="Write barrier">Write barrier</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Memory_type_range_register&action=edit&section=4" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-The_Linux_Gamers-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-The_Linux_Gamers_1-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://tldp.org/HOWTO/Linux-Gamers-HOWTO/x343.html">"The Linux Gamers' HOWTO"</a>. <i>The Linux Gamers' HOWTO</i>. tldp.org<span class="reference-accessdate">. Retrieved <span class="nowrap">2009-10-03</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=The+Linux+Gamers%27+HOWTO&rft.atitle=The+Linux+Gamers%27+HOWTO&rft_id=http%3A%2F%2Ftldp.org%2FHOWTO%2FLinux-Gamers-HOWTO%2Fx343.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMemory+type+range+register" class="Z3988"></span></span> </li> </ol></div></div> <ul><li>Details on how MTRRs work are described in the processor manuals from CPU vendors.</li></ul> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Memory_type_range_register&action=edit&section=5" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="https://www.meduna.org/txt_mtrr_en.html">Speeding up graphics with MTRR</a> includes explanation</li> <li><a rel="nofollow" class="external text" href="https://support.amd.com/TechDocs/24593.pdf">AMD64 Architecture Programmer's Manual Volume 2: System Programming</a> (<a href="/wiki/PDF" title="PDF">PDF</a>)</li> <li><a rel="nofollow" class="external text" href="http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html"> Intel 64 and IA-32 Architectures Software Developer's Manuals</a> See <i>Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide</i> section 11.11 <i>MEMORY TYPE RANGE REGISTERS (MTRRS)</i></li> <li><a rel="nofollow" class="external text" href="http://rayer.g6.cz/programm/programe.htm#MTRRLFBE">MTRRLFBE utility for DOS by RayeR</a> - it can set caching modes for VGA and LFB memory range to significantly boost performance of DOS graphics apps. On modern Core 2 Duo PC with PCI-E VGA it can be 10-times faster when write combining is set.</li> <li><a rel="nofollow" class="external text" href="https://www.kernel.org/doc/Documentation/x86/mtrr.txt">MTRR (Memory Type Range Register) control</a> by Richard Gooch</li></ul>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=Memory_type_range_register&oldid=1240076935">https://en.wikipedia.org/w/index.php?title=Memory_type_range_register&oldid=1240076935</a>"</div></div> <div id="catlinks" class="catlinks" data-mw="interface"><div id="mw-normal-catlinks" class="mw-normal-catlinks"><a href="/wiki/Help:Category" title="Help:Category">Category</a>: <ul><li><a href="/wiki/Category:Digital_registers" title="Category:Digital registers">Digital registers</a></li></ul></div><div id="mw-hidden-catlinks" class="mw-hidden-catlinks mw-hidden-cats-hidden">Hidden categories: <ul><li><a href="/wiki/Category:Articles_needing_additional_references_from_October_2009" title="Category:Articles needing additional references from October 2009">Articles needing additional references from October 2009</a></li><li><a href="/wiki/Category:All_articles_needing_additional_references" title="Category:All articles needing additional references">All articles needing additional references</a></li></ul></div></div> </div> </main> </div> <div class="mw-footer-container"> <footer id="footer" class="mw-footer" > <ul id="footer-info"> <li id="footer-info-lastmod"> This page was last edited on 13 August 2024, at 11:39<span class="anonymous-show"> (UTC)</span>.</li> <li id="footer-info-copyright">Text is available under the <a href="/wiki/Wikipedia:Text_of_the_Creative_Commons_Attribution-ShareAlike_4.0_International_License" title="Wikipedia:Text of the Creative Commons Attribution-ShareAlike 4.0 International License">Creative Commons Attribution-ShareAlike 4.0 License</a>; additional terms may apply. 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