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srcset="//upload.wikimedia.org/wikipedia/commons/thumb/c/cd/OCP-8K-top.jpg/330px-OCP-8K-top.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/c/cd/OCP-8K-top.jpg/440px-OCP-8K-top.jpg 2x" data-file-width="4608" data-file-height="3456" /></a><figcaption> <a href="/wiki/SolidRun" title="SolidRun">SolidRun</a>'s SolidNet OCP-8K SmartNIC </figcaption></figure> <p>A <b>data processing unit</b> (<b>DPU</b>) is a programmable <a href="/wiki/Processor_(computing)" title="Processor (computing)">computer processor</a> that tightly integrates a general-purpose <a href="/wiki/CPU" class="mw-redirect" title="CPU">CPU</a> with <a href="/wiki/Network_interface_controller" title="Network interface controller">network interface</a> hardware.<sup id="cite_ref-davie-2021_1-0" class="reference"><a href="#cite_note-davie-2021-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> Sometimes they are called "IPUs" (for "infrastructure processing unit") or "SmartNICs".<sup id="cite_ref-sharwood-2023_2-0" class="reference"><a href="#cite_note-sharwood-2023-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> They can be used in place of traditional <a href="/wiki/Network_interface_controller" title="Network interface controller">NICs</a> to relieve the main CPU of complex networking responsibilities and other "infrastructural" duties; although their features vary, they may be used to perform <a href="/wiki/Encryption" title="Encryption">encryption/decryption</a>, serve as a <a href="/wiki/Firewall_(computing)" title="Firewall (computing)">firewall</a>, handle <a href="/wiki/TCP/IP" class="mw-redirect" title="TCP/IP">TCP/IP</a>, process <a href="/wiki/HTTP" title="HTTP">HTTP</a> requests, or even function as a <a href="/wiki/Hypervisor" title="Hypervisor">hypervisor</a> or <a href="/wiki/Disk_array_controller" title="Disk array controller">storage controller</a>.<sup id="cite_ref-davie-2021_1-1" class="reference"><a href="#cite_note-davie-2021-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> These devices can be attractive to <a href="/wiki/Cloud_computing" title="Cloud computing">cloud computing</a> providers whose servers might otherwise spend a significant amount of CPU time on these tasks, cutting into the cycles they can provide to guests.<sup id="cite_ref-davie-2021_1-2" class="reference"><a href="#cite_note-davie-2021-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Examples_of_DPUs">Examples of DPUs</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Data_processing_unit&action=edit&section=1" title="Edit section: Examples of DPUs"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Azure_Boost_DPU">Azure Boost DPU</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Data_processing_unit&action=edit&section=2" title="Edit section: Azure Boost DPU"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In 2024, Microsoft introduced the <b>Azure Boost DPU</b>, a custom-designed data processing unit aimed at optimizing network and infrastructure efficiency across its Azure cloud platform. This DPU offloads network-related tasks such as packet processing, security enforcement, and traffic management from central CPUs, enabling better performance for application workloads.<sup id="cite_ref-TechCommunity_4-0" class="reference"><a href="#cite_note-TechCommunity-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-VentureBeat_5-0" class="reference"><a href="#cite_note-VentureBeat-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="Key_Features">Key Features</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Data_processing_unit&action=edit&section=3" title="Edit section: Key Features"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><b>Network Optimization</b>: The Azure Boost DPU enhances network throughput and reduces latency by processing data packets and offloading these tasks from traditional CPUs.<sup id="cite_ref-TechCrunch_6-0" class="reference"><a href="#cite_note-TechCrunch-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup></li> <li><b>Security Capabilities</b>: It integrates advanced isolation techniques to secure multi-tenant environments, protecting sensitive workloads.<sup id="cite_ref-VentureBeat_5-1" class="reference"><a href="#cite_note-VentureBeat-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup></li> <li><b>Hyperscale Adaptability</b>: Designed for large-scale data centers, the DPU supports Azure’s hyperscale infrastructure, ensuring scalability for modern cloud applications.<sup id="cite_ref-TechCommunity_4-1" class="reference"><a href="#cite_note-TechCommunity-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup></li></ul> <div class="mw-heading mw-heading4"><h4 id="Industry_Context">Industry Context</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Data_processing_unit&action=edit&section=4" title="Edit section: Industry Context"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The Azure Boost DPU aligns with the trend of custom silicon development in hyperscale cloud environments. Similar to AWS’s <b>Nitro System</b> and NVIDIA’s <b>BlueField DPUs</b>, Microsoft’s DPU focuses on enhancing cloud efficiency while addressing rising energy and security demands.<sup id="cite_ref-VentureBeat_5-2" class="reference"><a href="#cite_note-VentureBeat-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> This innovation positions Microsoft alongside other cloud leaders leveraging DPUs to optimize data center operations and provide cost-effective, high-performance solutions for customers.<sup id="cite_ref-TechCrunch_6-1" class="reference"><a href="#cite_note-TechCrunch-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Impact_on_Cloud_Computing">Impact on Cloud Computing</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Data_processing_unit&action=edit&section=5" title="Edit section: Impact on Cloud Computing"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The introduction of DPUs like Azure Boost reflects a broader shift in the cloud computing industry toward offloading specific functions from general-purpose processors to specialized hardware. Microsoft’s Azure Boost DPU represents its strategy to reduce costs, enhance security, and achieve sustainability goals while improving infrastructure efficiency.<sup id="cite_ref-TechCommunity_4-2" class="reference"><a href="#cite_note-TechCommunity-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-VentureBeat_5-3" class="reference"><a href="#cite_note-VentureBeat-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Data_processing_unit&action=edit&section=6" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Compute_Express_Link" title="Compute Express Link">Compute Express Link</a> (CXL)</li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Data_processing_unit&action=edit&section=7" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-davie-2021-1"><span class="mw-cite-backlink">^ <a href="#cite_ref-davie-2021_1-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-davie-2021_1-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-davie-2021_1-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFDavie2021" class="citation news cs1"><a href="/wiki/Bruce_Davie" title="Bruce Davie">Davie, Bruce</a> (November 24, 2021). <a rel="nofollow" class="external text" href="https://www.theregister.com/AMP/2021/11/24/infrastructure_processing_units/">"SmartNICs, IPUs, DPUs de-hyped: Why and how cloud giants are offloading work from server CPUs"</a>. <i><a href="/wiki/The_Register" title="The Register">The Register</a></i><span class="reference-accessdate">. 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Retrieved <span class="nowrap">2023-07-11</span></span>. <q>…Infrastructure Processing Unit – the same kind of kit that others call SmartNICs or Data Processing Units…</q></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=The+Register&rft.atitle=Google+Cloud+upgrades+with+next-gen+accelerator+that+embiggens+its+VMs&rft.date=2023-05-23&rft.aulast=Sharwood&rft.aufirst=Simon&rft_id=https%3A%2F%2Fwww.theregister.com%2F2023%2F05%2F23%2Fgoogle_cloud_c3_ipu%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AData+processing+unit" class="Z3988"></span></span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.pcmag.com/encyclopedia/term/smartnic">"Definition of SmartNIC"</a>. <i><a href="/wiki/PCMag" title="PCMag">PCMag</a></i>. <a href="/wiki/Ziff_Davis" title="Ziff Davis">Ziff Davis</a><span class="reference-accessdate">. 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title="Distributed computing">Distributed computing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Applications</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">GPU</a> <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li> <li><a href="/wiki/DirectX_Video_Acceleration" title="DirectX Video Acceleration">DirectX</a></li></ul></li> <li><a href="/wiki/Sound_card" title="Sound card">Audio</a></li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processing</a></li> <li><a href="/wiki/Hardware_random_number_generator" title="Hardware random number generator">Hardware random number generation</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">Artificial intelligence</a></li> <li><a href="/wiki/Cryptographic_accelerator" title="Cryptographic accelerator">Cryptography</a> <ul><li><a href="/wiki/TLS_acceleration" title="TLS acceleration">TLS</a></li></ul></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Machine vision</a></li> <li><a href="/wiki/Custom_hardware_attack" title="Custom hardware attack">Custom hardware attack</a> <ul><li><a href="/wiki/Scrypt" title="Scrypt">scrypt</a></li></ul></li> <li><a href="/wiki/Network_processor" title="Network processor">Networking</a></li> <li><a class="mw-selflink selflink">Data</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Implementations</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a> <ul><li><a href="/wiki/C_to_HDL" title="C to HDL">C to HDL</a></li></ul></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> <ul><li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architectures</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport triggered</a></li> <li><a href="/wiki/Multicore" class="mw-redirect" title="Multicore">Multicore</a></li> <li><a href="/wiki/Manycore" class="mw-redirect" title="Manycore">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous</a></li> <li><a href="/wiki/In-memory_processing" title="In-memory processing">In-memory computing</a></li> <li><a href="/wiki/Systolic_array" title="Systolic array">Systolic array</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Programmable_logic" class="mw-redirect" title="Programmable logic">Programmable logic</a></li> <li><a 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