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<span>Books</span> </div> </a> <button aria-controls="toc-Books-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Books subsection</span> </button> <ul id="toc-Books-sublist" class="vector-toc-list"> <li id="toc-Compliancy" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Compliancy"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>Compliancy</span> </div> </a> <ul id="toc-Compliancy-sublist" class="vector-toc-list"> <li id="toc-EABI_and_Linux_Compliancy_discrepancy" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#EABI_and_Linux_Compliancy_discrepancy"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.1</span> <span>EABI and Linux Compliancy discrepancy</span> </div> </a> <ul id="toc-EABI_and_Linux_Compliancy_discrepancy-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Specifications" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Specifications"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Specifications</span> </div> </a> <button aria-controls="toc-Specifications-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Specifications subsection</span> </button> <ul id="toc-Specifications-sublist" class="vector-toc-list"> <li id="toc-Power_ISA_v.2.03" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Power_ISA_v.2.03"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1</span> <span>Power ISA v.2.03</span> </div> </a> <ul id="toc-Power_ISA_v.2.03-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Power_ISA_v.2.04" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Power_ISA_v.2.04"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2</span> <span>Power ISA v.2.04</span> </div> </a> <ul id="toc-Power_ISA_v.2.04-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Power_ISA_v.2.05" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Power_ISA_v.2.05"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3</span> <span>Power ISA v.2.05</span> </div> </a> <ul id="toc-Power_ISA_v.2.05-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Power_ISA_v.2.06" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Power_ISA_v.2.06"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.4</span> <span>Power ISA v.2.06</span> </div> </a> <ul id="toc-Power_ISA_v.2.06-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Power_ISA_v.2.07" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Power_ISA_v.2.07"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.5</span> <span>Power ISA v.2.07</span> </div> </a> <ul id="toc-Power_ISA_v.2.07-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Power_ISA_v.3.0" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Power_ISA_v.3.0"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.6</span> <span>Power ISA v.3.0</span> </div> </a> <ul id="toc-Power_ISA_v.3.0-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Power_ISA_v.3.1" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Power_ISA_v.3.1"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.7</span> <span>Power ISA v.3.1</span> </div> </a> <ul id="toc-Power_ISA_v.3.1-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a 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class="vector-body" aria-labelledby="firstHeading" data-mw-ve-target-container> <div class="vector-body-before-content"> <div class="mw-indicators"> </div> <div id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Computer instruction set architecture</div> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title">Power ISA</caption><tbody><tr><th scope="row" class="infobox-label">Designer</th><td class="infobox-data"><style data-mw-deduplicate="TemplateStyles:r1126788409">.mw-parser-output .plainlist ol,.mw-parser-output .plainlist ul{line-height:inherit;list-style:none;margin:0;padding:0}.mw-parser-output .plainlist ol li,.mw-parser-output .plainlist ul li{margin-bottom:0}</style><div class="plainlist"><ul><li><a href="/wiki/Power.org" title="Power.org">Power.org</a></li><li><a href="/wiki/OpenPOWER_Foundation" title="OpenPOWER Foundation">OpenPOWER Foundation</a></li></ul></div></td></tr><tr><th scope="row" class="infobox-label">Bits</th><td class="infobox-data"><a href="/wiki/32-bit" class="mw-redirect" title="32-bit">32-bit</a>/<a href="/wiki/64-bit" class="mw-redirect" title="64-bit">64-bit</a> (32 → 64)</td></tr><tr><th scope="row" class="infobox-label">Introduced</th><td class="infobox-data">2006<span class="noprint">; 18 years ago</span><span style="display:none"> (<span class="bday dtstart published updated">2006</span>)</span></td></tr><tr><th scope="row" class="infobox-label">Version</th><td class="infobox-data"><a href="#Power_ISA_v.3.1">3.1</a></td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Computer_architecture" title="Computer architecture">Design</a></th><td class="infobox-data"><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></td></tr><tr><th scope="row" class="infobox-label">Type</th><td class="infobox-data"><a href="/wiki/Load%E2%80%93store" class="mw-redirect" title="Load–store">Load–store</a></td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Instruction_set" class="mw-redirect" title="Instruction set">Encoding</a></th><td class="infobox-data">Fixed/Variable</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Branch_(computer_science)" title="Branch (computer science)">Branching</a></th><td class="infobox-data"><a href="/wiki/Status_register" title="Status register">Condition code</a></td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Endianness" title="Endianness">Endianness</a></th><td class="infobox-data"><a href="/wiki/Endianness#Bi-endian_hardware" title="Endianness">Big/Bi</a></td></tr><tr><th scope="row" class="infobox-label">Extensions</th><td class="infobox-data"><a href="/wiki/AltiVec" title="AltiVec">AltiVec</a>, <a href="/wiki/PowerPC_AS" class="mw-redirect" title="PowerPC AS">PowerPC AS</a>, APU, <a href="/wiki/Digital_signal_processor" title="Digital signal processor">DSP</a>, <a href="/wiki/Cell_(microprocessor)" class="mw-redirect" title="Cell (microprocessor)">CBEA</a></td></tr><tr><th scope="row" class="infobox-label">Open</th><td class="infobox-data">Yes, and royalty free</td></tr><tr><th colspan="2" class="infobox-header"><a href="/wiki/Processor_register" title="Processor register">Registers</a></th></tr><tr><td colspan="2" class="infobox-full-data"> <ul><li>32× 64/32-bit general-purpose registers</li> <li>32× 64-bit floating-point registers</li> <li>64× 128-bit vector registers</li> <li>32-bit condition code register</li> <li>32-bit link register</li> <li>32-bit count register</li></ul> + more</td></tr></tbody></table> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:PowerISA-processor.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/bf/PowerISA-processor.png/220px-PowerISA-processor.png" decoding="async" width="220" height="224" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/bf/PowerISA-processor.png/330px-PowerISA-processor.png 1.5x, //upload.wikimedia.org/wikipedia/commons/b/bf/PowerISA-processor.png 2x" data-file-width="380" data-file-height="387" /></a><figcaption>A very high level schematic diagram of a generic Power ISA processor</figcaption></figure> <p><b>Power ISA</b> is a <a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">reduced instruction set computer</a> (RISC) <a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">instruction set architecture</a> (ISA) currently developed by the <a href="/wiki/OpenPOWER_Foundation" title="OpenPOWER Foundation">OpenPOWER Foundation</a>, led by <a href="/wiki/IBM" title="IBM">IBM</a>. It was originally developed by IBM and the now-defunct <a href="/wiki/Power.org" title="Power.org">Power.org</a> industry group. Power ISA is an evolution of the <a href="/wiki/PowerPC" title="PowerPC">PowerPC</a> ISA, created by the mergers of the core PowerPC ISA and the optional Book E for embedded applications. The merger of these two components in 2006 was led by Power.org founders IBM and <a href="/wiki/Freescale_Semiconductor" title="Freescale Semiconductor">Freescale Semiconductor</a>. </p><p>Prior to version 3.0, the ISA is divided into several categories. Processors implement a set of these categories as required for their task. Different classes of processors are required to implement certain categories, for example a server-class processor includes the categories: <i>Base</i>, <i>Server</i>, <i>Floating-Point</i>, <i>64-Bit</i>, etc. All processors implement the Base category. </p><p>Power ISA is a RISC <a href="/wiki/Load/store_architecture" class="mw-redirect" title="Load/store architecture">load/store architecture</a>. It has multiple sets of <a href="/wiki/Processor_register" title="Processor register">registers</a>: </p> <ul><li><i>32</i> × 32-bit or 64-bit general-purpose registers (GPRs) for <a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">integer operations</a>.</li> <li><i>64</i> × 128-bit vector scalar registers (VSRs) for <a href="/wiki/Vector_processor" title="Vector processor">vector operations</a> and <a href="/wiki/Floating-point_unit" title="Floating-point unit">floating-point operations</a>. <ul><li><i>32</i> × 64-bit floating-point registers (FPRs) as part of the VSRs for floating-point operations.</li> <li><i>32</i> × 128-bit vector registers (VRs) as part of the VSRs for vector operations.</li></ul></li> <li><i>8</i> × 4-bit condition register fields (CRs) for comparison and <a href="/wiki/Control_flow" title="Control flow">control flow</a>.</li> <li><i>11</i> special registers of various sizes: Counter Register (CTR), link register (LR), time base (TBU, TBL), alternate time base (ATBU, ATBL), accumulator (ACC), <a href="/wiki/Status_register" title="Status register">status registers</a> (XER, FPSCR, VSCR, SPEFSCR).</li></ul> <p>Instructions up to version 3.0 have a length of 32 bits, with the exception of the VLE (variable-length encoding) subset that provides for higher <a href="/wiki/Code_density" class="mw-redirect" title="Code density">code density</a> for low-end embedded applications, and version 3.1 which introduced prefixing to create 64-bit instructions. Most instructions are <a href="/wiki/Triadic_relation" class="mw-redirect" title="Triadic relation">triadic</a>, i.e. have two source operands and one destination. Single- and <a href="/wiki/Double-precision_floating-point_format" title="Double-precision floating-point format">double-precision</a> <a href="/wiki/IEEE_754-2008" class="mw-redirect" title="IEEE 754-2008">IEEE-754</a> compliant floating-point operations are supported, including additional <a href="/wiki/Fused_multiply%E2%80%93add" class="mw-redirect" title="Fused multiply–add">fused multiply–add</a> (FMA) and decimal floating-point instructions. There are provisions for <a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">single instruction, multiple data</a> (SIMD) operations on integer and floating-point data on up to 16 elements in one instruction. </p><p>Power ISA has support for <a href="/wiki/Modified_Harvard_architecture" title="Modified Harvard architecture">Harvard</a> <a href="/wiki/CPU_cache" title="CPU cache">cache</a>, i.e. <a href="/wiki/Modified_Harvard_architecture#Split-cache_(or_almost-von-Neumann)_architecture" title="Modified Harvard architecture">split data and instruction caches</a>, and support for unified caches. Memory operations are strictly load/store, but allow for <a href="/wiki/Out-of-order_execution" title="Out-of-order execution">out-of-order execution</a>. There is also support for both <a href="/wiki/Endianness" title="Endianness">big and little-endian</a> addressing with separate categories for moded and per-page endianness, and support for both <a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> and <a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a> addressing. </p><p>Different modes of operation include user, supervisor and hypervisor. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Categories">Categories</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=1" title="Edit section: Categories"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><i>Base</i> – Most of Book I and Book II</li> <li><i>Server</i> – Book III-S</li> <li><i>Embedded</i> – Book III-E</li> <li><i>Misc</i> – floating point, vector, signal processing, cache locking, decimal floating point, etc.</li></ul> <div class="mw-heading mw-heading2"><h2 id="Books">Books</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=2" title="Edit section: Books"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The Power ISA specification is divided into five parts, called "books": </p> <ul><li><i>Book I</i> – <i>User Instruction Set Architecture</i> covers the base instruction set available to the application programmer. Memory reference, flow control, Integer, floating point, numeric acceleration, application-level programming. It includes chapters regarding auxiliary processing units like <a href="/wiki/Digital_signal_processor" title="Digital signal processor">digital signal processors</a> (DSPs) and the <a href="/wiki/AltiVec" title="AltiVec">AltiVec</a> extension.</li> <li><i>Book II</i> – <i>Virtual Environment Architecture</i> defines the storage model available to the application programmer, including timing, synchronization, cache management, storage features, byte ordering.</li> <li><i>Book III</i> – <i>Operating Environment Architecture</i> includes exceptions, interrupts, memory management, debug facilities and special control functions. It is divided into two parts. <ul><li><i>Book III-S</i> – Defines the supervisor instructions used for general-purpose/server implementations. It is mainly the contents of the Book III of the former PowerPC ISA.</li> <li><i>Book III-E</i> – Defines the supervisor instructions used for embedded applications. It is derived from the former PowerPC Book E.</li></ul></li> <li><i>Book VLE</i> – <i>Variable Length Encoded Instruction Architecture</i> defines alternative instructions and definitions from Books I–III, intended for higher instruction density and very-low-end applications. They use 16-bit instructions and big-endian byte ordering.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Compliancy">Compliancy</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=3" title="Edit section: Compliancy"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>New in version 3 of the Power ISA is that you don't have to implement the entire specification to be compliant. The sprawl of instructions and technologies has made the complete specification unwieldy, so the OpenPOWER Foundation have decided to enabled tiered compliancy. </p><p>These levels include optional and mandatory requirements, however one common misunderstanding is that there is nothing stopping an implementation from being compliant at a lower level but having additional selected functions from higher levels and custom extensions. It is however recommended that an option be provided to disable any added functions beyond the design's declared subset level. </p><p>A design must be compliant at its declared subset level to make use of the Foundation's protection regarding use of <a href="/wiki/Intellectual_property" title="Intellectual property">intellectual property</a>, be it <a href="/wiki/Patent" title="Patent">patents</a> or <a href="/wiki/Trademark" title="Trademark">trademarks</a>. This is explained in the OpenPOWER EULA.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p><p>A compliant design must:<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> </p> <ul><li>Support the <i>Base</i> architecture</li> <li>And support at least one of the subsets <ul><li><i>SFS</i> – Scalar Fixed-point Subset. 129 instructions. Basic fixed point and load/store instructions, which is really the <i>Base</i> architecture.</li> <li><i>SFFS</i> – Scalar Fixed-point + Floating-point Subset. 214 instructions. Adding floating-point operations to the Base.</li> <li><i>LCS</i> – Linux Compliancy Subset. 962 instructions. Intended for server grade Linux, adding features like 64-bit, optional SIMD/VSX, Radix MMU, little-endian mode and hypervisor support.</li> <li><i>ACS</i> – <a href="/wiki/IBM_AIX" title="IBM AIX">AIX</a> Compliancy Subset. 1099 instructions. Intended to run AIX, adding features like decimal and quad-precision floating point, big-endian mode and symmetric multiprocessing.</li></ul></li> <li>May include any of the features of the LCS and ACS as Optional or pick from the Always Optional features like matrix math and power management.</li> <li>Optional features, if chosen, must be implemented in their entirety (partial implementation of an Optional feature is not permitted)</li> <li>May include Custom extensions, specific to the implementation, implemented in the <i>Architecture Sandbox</i>.</li></ul> <p>If the extension is general-purpose enough, the OpenPOWER Foundation asks that implementors submit it as a Request for Comments (RFC) to the <a rel="nofollow" class="external text" href="https://openpower.foundation/groups/isa/">OpenPOWER ISA Workgroup</a>. Note that it is not strictly necessary to join the OpenPOWER Foundation to submit RFCs.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </p> <ul><li>Much may be implemented in either hardware or firmware.</li></ul> <div class="mw-heading mw-heading4"><h4 id="EABI_and_Linux_Compliancy_discrepancy">EABI and Linux Compliancy discrepancy</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=4" title="Edit section: EABI and Linux Compliancy discrepancy"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-Original_research plainlinks metadata ambox ambox-content ambox-Original_research" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><span><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/40px-Ambox_important.svg.png" decoding="async" width="40" height="40" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/60px-Ambox_important.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/80px-Ambox_important.svg.png 2x" data-file-width="40" data-file-height="40" /></span></span></div></td><td class="mbox-text"><div class="mbox-text-span">This section <b>possibly contains <a href="/wiki/Wikipedia:No_original_research" title="Wikipedia:No original research">original research</a></b>.<span class="hide-when-compact"> Please <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Power_ISA&action=edit">improve it</a> by <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">verifying</a> the claims made and adding <a href="/wiki/Wikipedia:Citing_sources#Inline_citations" title="Wikipedia:Citing sources">inline citations</a>. Statements consisting only of original research should be removed.</span> <span class="date-container"><i>(<span class="date">January 2024</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p>The EABI specifications predate the announcement and creation of the Compliancy subsets. </p><p>Regarding the Linux Compliancy subset having VSX (SIMD) optional: in 2003–4, 64-bit EABI v1.9 made SIMD optional,<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> but in July 2015, to improve performance for IBM POWER9 systems, SIMD was made mandatory in EABI v2.0.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> This discrepancy between SIMD being optional in the Linux Compliancy level but mandatory in EABI v2.0 cannot be rectified without considerable effort: backwards incompatibility for Linux distributions is not a viable option. At present this leaves new OpenPOWER implementors wishing to run standard Linux distributions having to implement a massive 962 instructions. By contrast, RISC-V RV64GC, the minimum to run Linux, requires only 165.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Specifications">Specifications</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=5" title="Edit section: Specifications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><span class="anchor" id="Power_ISA_v.2.03"></span> </p> <div class="mw-heading mw-heading3"><h3 id="Power_ISA_v.2.03">Power ISA v.2.03</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=6" title="Edit section: Power ISA v.2.03"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The specification for Power ISA v.2.03<sup id="cite_ref-isa203_7-0" class="reference"><a href="#cite_note-isa203-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> is based on the former PowerPC ISA v.2.02<sup id="cite_ref-isa202_8-0" class="reference"><a href="#cite_note-isa202-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> in <a href="/wiki/POWER5" title="POWER5">POWER5</a>+ and the Book E<sup id="cite_ref-booke_9-0" class="reference"><a href="#cite_note-booke-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> extension of the <a href="/wiki/PowerPC" title="PowerPC">PowerPC</a> specification. The Book I included five new chapters regarding auxiliary processing units like <a href="/wiki/Digital_signal_processor" title="Digital signal processor">DSPs</a> and the <a href="/wiki/AltiVec" title="AltiVec">AltiVec</a> extension. </p> <dl><dt>Compliant cores</dt></dl> <ul><li>Freescale PowerPC <a href="/wiki/PowerPC_e200" title="PowerPC e200">e200</a>, <a href="/wiki/PowerPC_e500" title="PowerPC e500">e500</a></li> <li>IBM PowerPC <a href="/wiki/PowerPC_400#PowerPC_405" title="PowerPC 400">405</a>, <a href="/wiki/PowerPC_400#PowerPC_440" title="PowerPC 400">440</a>, <a href="/wiki/PowerPC_400#PowerPC_460" title="PowerPC 400">460</a>, <a href="/wiki/PowerPC_970" title="PowerPC 970">970</a>, <a href="/wiki/POWER5" title="POWER5">POWER5</a> and <a href="/wiki/POWER6" title="POWER6">POWER6</a></li></ul> <div class="mw-heading mw-heading3"><h3 id="Power_ISA_v.2.04">Power ISA v.2.04</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=7" title="Edit section: Power ISA v.2.04"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The specification for Power ISA v.2.04<sup id="cite_ref-isa204_10-0" class="reference"><a href="#cite_note-isa204-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> was finalized in June 2007. It is based on Power ISA v.2.03 and includes changes primarily to the <i>Book III-S</i> part regarding <a href="/wiki/Hardware-assisted_virtualization" class="mw-redirect" title="Hardware-assisted virtualization">virtualization</a>, <a href="/wiki/Hypervisor" title="Hypervisor">hypervisor</a> functions, <a href="/wiki/LPAR" class="mw-redirect" title="LPAR">logical partitioning</a> and <a href="/wiki/Virtual_page" class="mw-redirect" title="Virtual page">virtual page</a> handling. </p> <dl><dt>Compliant cores</dt></dl> <ul><li>All cores that comply with prior versions of the Power ISA</li> <li>The <a href="/wiki/PWRficient" title="PWRficient">PA6T</a> core from P.A. Semi</li> <li><a href="/wiki/Titan_(microprocessor)" class="mw-redirect" title="Titan (microprocessor)">Titan</a> from AMCC</li></ul> <div class="mw-heading mw-heading3"><h3 id="Power_ISA_v.2.05">Power ISA v.2.05</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=8" title="Edit section: Power ISA v.2.05"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The specification for Power ISA v.2.05<sup id="cite_ref-isa205_11-0" class="reference"><a href="#cite_note-isa205-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> was released in December 2007. It is based on Power ISA v.2.04 and includes changes primarily to <i>Book I</i> and <i>Book III-S</i>, including significant enhancements such as decimal arithmetic (Category: Decimal Floating-Point in <i>Book I</i>) and server hypervisor improvements. </p> <dl><dt>Compliant cores</dt></dl> <ul><li>All cores that comply with prior versions of the Power ISA</li> <li><a href="/wiki/POWER6" title="POWER6">POWER6</a></li> <li><a href="/wiki/PowerPC_400#PowerPC_470" title="PowerPC 400">PowerPC 476</a></li></ul> <div class="mw-heading mw-heading3"><h3 id="Power_ISA_v.2.06">Power ISA v.2.06</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=9" title="Edit section: Power ISA v.2.06"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The specification for Power ISA v.2.06<sup id="cite_ref-conf2007_12-0" class="reference"><a href="#cite_note-conf2007-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> was released in February 2009, and revised in July 2010.<sup id="cite_ref-isa206b_13-0" class="reference"><a href="#cite_note-isa206b-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> It is based on Power ISA v.2.05 and includes extensions for the POWER7 processor and <a href="/wiki/PowerPC_e500#e500mc" title="PowerPC e500">e500-mc core</a>. One significant new feature is vector-scalar floating-point instructions (<a href="/wiki/AltiVec#VSX_(Vector_Scalar_Extension)" title="AltiVec">VSX</a>).<sup id="cite_ref-vsx_14-0" class="reference"><a href="#cite_note-vsx-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> <i>Book III-E</i> also includes significant enhancement for the embedded specification regarding hypervisor and virtualisation on single and multi core implementations. </p><p>The spec was revised in November 2010 to the Power ISA v.2.06 revision B spec, enhancing virtualization features.<sup id="cite_ref-isa206b_13-1" class="reference"><a href="#cite_note-isa206b-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> </p> <dl><dt>Compliant cores</dt></dl> <ul><li>All cores that comply with prior versions of the Power ISA</li> <li><a href="/wiki/POWER7" title="POWER7">POWER7</a></li> <li><a href="/wiki/IBM_A2#A2I" title="IBM A2">A2I</a></li> <li><a href="/wiki/PowerPC_e500#e500mc" title="PowerPC e500">e500-mc</a></li> <li><a href="/wiki/PowerPC_e5500" title="PowerPC e5500">e5500</a></li> <li><a href="/wiki/PowerPC_e6500" title="PowerPC e6500">e6500</a></li></ul> <div class="mw-heading mw-heading3"><h3 id="Power_ISA_v.2.07">Power ISA v.2.07</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=10" title="Edit section: Power ISA v.2.07"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The specification for Power ISA v.2.07<sup id="cite_ref-isa207_16-0" class="reference"><a href="#cite_note-isa207-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> was released in May 2013. It is based on Power ISA v.2.06 and includes major enhancements to <a href="/wiki/Logical_partition_(virtual_computing_platform)" class="mw-redirect" title="Logical partition (virtual computing platform)">logical partition functions</a>, <a href="/wiki/Transactional_memory" title="Transactional memory">transactional memory</a>, expanded performance monitoring, new storage control features, additions to the VMX and VSX vector facilities (VSX-2), along with <a href="/wiki/Advanced_Encryption_Standard" title="Advanced Encryption Standard">AES</a><sup id="cite_ref-isa207_16-1" class="reference"><a href="#cite_note-isa207-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page / location: 257">: 257 </span></sup><sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> and <a href="/wiki/Galois_Counter_Mode" class="mw-redirect" title="Galois Counter Mode">Galois Counter Mode</a> (GCM), SHA-224, SHA-256,<sup id="cite_ref-isa207_16-2" class="reference"><a href="#cite_note-isa207-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page / location: 258">: 258 </span></sup> SHA-384 and SHA-512<sup id="cite_ref-isa207_16-3" class="reference"><a href="#cite_note-isa207-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page / location: 258">: 258 </span></sup> (<a href="/wiki/SHA-2" title="SHA-2">SHA-2</a>) cryptographic extensions and <a href="/wiki/Cyclic_redundancy_check" title="Cyclic redundancy check">cyclic redundancy check</a> (CRC) <a href="/wiki/Algorithm" title="Algorithm">algorithms</a>.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> </p><p>The spec was revised in April 2015 to the Power ISA v.2.07 B spec.<sup id="cite_ref-openpower-isa-specs-page_19-0" class="reference"><a href="#cite_note-openpower-isa-specs-page-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-isa207b_20-0" class="reference"><a href="#cite_note-isa207b-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> </p> <dl><dt>Compliant cores</dt></dl> <ul><li>All cores that comply with prior versions of the Power ISA</li> <li><a href="/wiki/POWER8" title="POWER8">POWER8</a></li> <li><a href="/wiki/IBM_A2#A2O" title="IBM A2">A2O</a></li></ul> <div class="mw-heading mw-heading3"><h3 id="Power_ISA_v.3.0">Power ISA v.3.0</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=11" title="Edit section: Power ISA v.3.0"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The specification for Power ISA v.3.0<sup id="cite_ref-powerisa3-announced_21-0" class="reference"><a href="#cite_note-powerisa3-announced-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-isa30_22-0" class="reference"><a href="#cite_note-isa30-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> was released in November 2015. It is the first to come out after the founding of the OpenPOWER Foundation and includes enhancements for a broad spectrum of workloads and removes the server and embedded categories while retaining backwards compatibility and adds support for VSX-3 instructions. New functions include 128-bit quad-precision floating-point operations, a <a href="/wiki/Random_number_generator" class="mw-redirect" title="Random number generator">random number generator</a>, hardware-assisted <a href="/wiki/Garbage_collection_(computer_science)" title="Garbage collection (computer science)">garbage collection</a> and hardware-enforced trusted computing. </p><p>The spec was revised in March 2017 to the Power ISA v.3.0 B spec,<sup id="cite_ref-openpower-isa-specs-page_19-1" class="reference"><a href="#cite_note-openpower-isa-specs-page-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-isa30b_23-0" class="reference"><a href="#cite_note-isa30b-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup> and revised again to v3.0C in May 2020.<sup id="cite_ref-openpower-isa-specs-page_19-2" class="reference"><a href="#cite_note-openpower-isa-specs-page-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-isa30c_24-0" class="reference"><a href="#cite_note-isa30c-24"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> One major change from v3.0 to v3.0B is the removal of support for hardware assisted garbage collection. The key difference between v3.0B and v3.0C is that the Compliancy Levels listed in v3.1 were also added to v3.0C. </p> <dl><dt>Compliant cores</dt></dl> <ul><li>All cores that comply with prior versions of the Power ISA</li> <li><a href="/wiki/POWER9" title="POWER9">POWER9</a><sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup></li> <li><a href="/wiki/OpenPOWER_Microwatt" title="OpenPOWER Microwatt">OpenPOWER Microwatt</a></li> <li><a href="/wiki/Libre-SOC" title="Libre-SOC">Libre-SOC</a> is aiming for Embedded FP compliancy with Power ISA 3.0 only</li></ul> <div class="mw-heading mw-heading3"><h3 id="Power_ISA_v.3.1">Power ISA v.3.1</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=12" title="Edit section: Power ISA v.3.1"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The specification for Power ISA v.3.1<sup id="cite_ref-openpower-isa-specs-page_19-3" class="reference"><a href="#cite_note-openpower-isa-specs-page-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-isa31_27-0" class="reference"><a href="#cite_note-isa31-27"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup> was released in May 2020. Mainly giving support for new functions introduced in Power10, but also includes the notion of optionality to the PowerISA specification. Instructions can now be eight <a href="/wiki/Byte" title="Byte">bytes</a> long, "prefixed instructions", compared to the usual four byte "word instructions". A lot of new functions to SIMD and VSX instructions are also added. VSX and the SVP64 extension provide hardware support for 16-bit half precision floats.<sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup> </p><p>One key benefit of the new 64-bit prefixed instructions is the extension of immediates in branches to 34-bit. </p><p>The spec was revised in September 2021 to the Power ISA v.3.1B spec.<sup id="cite_ref-openpower-isa-specs-page_19-4" class="reference"><a href="#cite_note-openpower-isa-specs-page-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-isa31b_30-0" class="reference"><a href="#cite_note-isa31b-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>The spec was revised in May 2024 to the Power ISA v.3.1C spec.<sup id="cite_ref-openpower-isa-specs-page_19-5" class="reference"><a href="#cite_note-openpower-isa-specs-page-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-isa31c_31-0" class="reference"><a href="#cite_note-isa31c-31"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup> </p> <dl><dt>Compliant cores</dt></dl> <ul><li>All cores that comply with prior versions of the Power ISA</li> <li><a href="/wiki/Power10" title="Power10">Power10</a><sup id="cite_ref-POWER10-isa31_32-0" class="reference"><a href="#cite_note-POWER10-isa31-32"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup></li></ul> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=13" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Open-source_computing_hardware" class="mw-redirect" title="Open-source computing hardware">Open-source computing hardware</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Power_ISA&action=edit&section=14" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://openpowerfoundation.org/final-draft-of-the-power-isa-eula-released/">Final draft of Power ISA EULA</a></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.youtube.com/watch?v=ZGvEpd4vNK0">The Open Power ISA: Architecture Compliancy and Future Foundations</a></span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://openpowerfoundation.org/final-draft-of-the-power-isa-eula-released/">Section 2.2 of OPF Power ISA EULA</a></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html">ELF PP64 ABI</a></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://openpowerfoundation.org/wp-content/uploads/2016/03/ABI64BitOpenPOWERv1.1_16July2015_pub4.pdf">OpenPOWER EABI v2</a></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://carrv.github.io/2017/slides/asanovic-riscv-research.pdf">Page 18 RISC-V "green card"</a></span> </li> <li id="cite_note-isa203-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa203_7-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20110727183430/http://www.power.org/resources/downloads/PowerISA_203_Final_Public.pdf">"Power ISA v.2.03"</a> <span class="cs1-format">(PDF)</span>. Power.org. 2006-09-29. Archived from <a rel="nofollow" class="external text" href="http://www.power.org/resources/downloads/PowerISA_203_Final_Public.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2011-07-27.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+v.2.03&rft.pub=Power.org&rft.date=2006-09-29&rft_id=http%3A%2F%2Fwww.power.org%2Fresources%2Fdownloads%2FPowerISA_203_Final_Public.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-isa202-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa202_8-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20071018025654/http://www.ibm.com/developerworks/eserver/library/es-archguide-v2.html">"PowerPC Architecture Book, Version 2.02"</a>. IBM. 2005-02-24. Archived from <a rel="nofollow" class="external text" href="http://www.ibm.com/developerworks/eserver/library/es-archguide-v2.html">the original</a> on 2007-10-18<span class="reference-accessdate">. Retrieved <span class="nowrap">2007-03-16</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=PowerPC+Architecture+Book%2C+Version+2.02&rft.pub=IBM&rft.date=2005-02-24&rft_id=http%3A%2F%2Fwww.ibm.com%2Fdeveloperworks%2Feserver%2Flibrary%2Fes-archguide-v2.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-booke-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-booke_9-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.nxp.com/docs/en/user-guide/BOOK_EUM.pdf?&fsrch=1">"PowerPC Book E v.1.0"</a> <span class="cs1-format">(PDF)</span>. IBM. 2002-05-07. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20180310135820/https://www.nxp.com/docs/en/user-guide/BOOK_EUM.pdf?&fsrch=1">Archived</a> <span class="cs1-format">(PDF)</span> from the original on 2018-03-10<span class="reference-accessdate">. Retrieved <span class="nowrap">2007-03-16</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=PowerPC+Book+E+v.1.0&rft.pub=IBM&rft.date=2002-05-07&rft_id=https%3A%2F%2Fwww.nxp.com%2Fdocs%2Fen%2Fuser-guide%2FBOOK_EUM.pdf%3F%26fsrch%3D1&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-isa204-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa204_10-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070927235845/http://www.power.org/resources/downloads/PowerISA_Public.pdf">"Power ISA Version 2.04"</a> <span class="cs1-format">(PDF)</span>. Power.org. 2007-06-12. Archived from <a rel="nofollow" class="external text" href="http://www.power.org/resources/downloads/PowerISA_Public.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2007-09-27<span class="reference-accessdate">. Retrieved <span class="nowrap">2007-06-14</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+Version+2.04&rft.pub=Power.org&rft.date=2007-06-12&rft_id=http%3A%2F%2Fwww.power.org%2Fresources%2Fdownloads%2FPowerISA_Public.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-isa205-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa205_11-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20121124005736/https://www.power.org/technology-introduction/standards-specifications/">"Power ISA Version 2.05"</a>. Power.org. 2007-10-23. Archived from <a rel="nofollow" class="external text" href="https://www.power.org/technology-introduction/standards-specifications/">the original</a> on 2012-11-24<span class="reference-accessdate">. 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Power.org. 2010-07-23. Archived from <a rel="nofollow" class="external text" href="https://www.power.org/technology-introduction/standards-specifications/">the original</a> on 2012-11-24<span class="reference-accessdate">. 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Power.org. 2013-05-15<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-11-02</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+Version+2.07&rft.pub=Power.org&rft.date=2013-05-15&rft_id=https%3A%2F%2Ffileadmin.cs.lth.se%2Fcs%2Feducation%2FEDAN25%2FPowerISA_V2.07_PUBLIC.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-17">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBarbosa2014" class="citation web cs1">Barbosa, Leonidas (2014-09-21). <a rel="nofollow" class="external text" href="http://www.ibm.com/developerworks/library/se-power8-in-core-cryptography/">"POWER8 in-core cryptography"</a>. IBM.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=POWER8+in-core+cryptography&rft.pub=IBM&rft.date=2014-09-21&rft.aulast=Barbosa&rft.aufirst=Leonidas&rft_id=http%3A%2F%2Fwww.ibm.com%2Fdeveloperworks%2Flibrary%2Fse-power8-in-core-cryptography%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-18"><span class="mw-cite-backlink"><b><a href="#cite_ref-18">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://books.google.com/books?id=7ph0CgAAQBAJ&q=Power+ISA+v.2.07+aes+gcm+sha&pg=PA48"><i>Performance Optimization and Tuning Techniques for IBM Power Systems Processors Including IBM POWER8</i></a>. IBM. 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IBM. 2017-03-29<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-02-23</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+Version+3.0+B&rft.pub=IBM&rft.date=2017-03-29&rft_id=https%3A%2F%2Fibm.ent.box.com%2Fs%2F1hzcwkwf8rbju5h9iyf44wm94amnlcrv&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-isa30c-24"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa30c_24-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://files.openpower.foundation/s/XXFoRATEzSFtdG8">"Power ISA Version 3.0 C"</a>. OpenPOWER Foundation. 2020-05-01<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-02-23</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+Version+3.0+C&rft.pub=OpenPOWER+Foundation&rft.date=2020-05-01&rft_id=https%3A%2F%2Ffiles.openpower.foundation%2Fs%2FXXFoRATEzSFtdG8&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-25"><span class="mw-cite-backlink"><b><a href="#cite_ref-25">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://wiki.raptorcs.com/wiki/Power_ISA">list of Power ISA specifications</a></span> </li> <li id="cite_note-26"><span class="mw-cite-backlink"><b><a href="#cite_ref-26">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://sourceware.org/ml/binutils/2015-11/msg00071.html">[PATCH, COMMITTED] Add full Power ISA 3.0 / POWER9 binutils support</a></span> </li> <li id="cite_note-isa31-27"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa31_27-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://files.openpower.foundation/s/bo728kgiWfgMHAr">"Power ISA Version 3.1"</a>. OpenPOWER Foundation. 2020-05-01<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-02-23</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+Version+3.1&rft.pub=OpenPOWER+Foundation&rft.date=2020-05-01&rft_id=https%3A%2F%2Ffiles.openpower.foundation%2Fs%2Fbo728kgiWfgMHAr&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-28"><span class="mw-cite-backlink"><b><a href="#cite_ref-28">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://files.openpower.foundation/s/dAYSdGzTfW4j2r2">"OPF_PowerISA_v3.1B.pdf"</a>. <i>OpenPOWER Files</i>. OpenPOWER Foundation<span class="reference-accessdate">. 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Retrieved <span class="nowrap">2023-07-02</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=libre-soc.org+Git&rft.atitle=ls005.xlen.mdwn&rft_id=https%3A%2F%2Fgit.libre-soc.org%2F%3Fp%3Dlibreriscv.git%3Ba%3Dblob%3Bf%3Dopenpower%2Fsv%2Frfc%2Fls005.xlen.mdwn%3Bhb%3D5e573680771f7a041d93d394003d6f9f08177a98%23l131&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-isa31b-30"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa31b_30-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://files.openpower.foundation/s/dAYSdGzTfW4j2r2">"Power ISA Version 3.1B"</a>. OpenPOWER Foundation. 2021-09-14<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-02-23</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+Version+3.1B&rft.pub=OpenPOWER+Foundation&rft.date=2021-09-14&rft_id=https%3A%2F%2Ffiles.openpower.foundation%2Fs%2FdAYSdGzTfW4j2r2&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-isa31c-31"><span class="mw-cite-backlink"><b><a href="#cite_ref-isa31c_31-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://files.openpower.foundation/s/9izgC5Rogi5Ywmm">"Power ISA Version 3.1C"</a>. OpenPOWER Foundation. 2024-05-26<span class="reference-accessdate">. Retrieved <span class="nowrap">2024-07-04</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Power+ISA+Version+3.1C&rft.pub=OpenPOWER+Foundation&rft.date=2024-05-26&rft_id=https%3A%2F%2Ffiles.openpower.foundation%2Fs%2F9izgC5Rogi5Ywmm&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> <li id="cite_note-POWER10-isa31-32"><span class="mw-cite-backlink"><b><a href="#cite_ref-POWER10-isa31_32-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSeo2020" class="citation web cs1">Seo, Carlos Eduardo (2020-05-12). <a rel="nofollow" class="external text" href="https://twitter.com/carlos_seo/status/1259976682158555139?s=20">"We released the Instruction Set Architecture for POWER10. Power ISA v3.1 is available at the IBM Portal for OpenPOWER"</a>. twitter.com<span class="reference-accessdate">. Retrieved <span class="nowrap">2020-05-23</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=We+released+the+Instruction+Set+Architecture+for+POWER10.+Power+ISA+v3.1+is+available+at+the+IBM+Portal+for+OpenPOWER.&rft.pub=twitter.com&rft.date=2020-05-12&rft.aulast=Seo&rft.aufirst=Carlos+Eduardo&rft_id=https%3A%2F%2Ftwitter.com%2Fcarlos_seo%2Fstatus%2F1259976682158555139%3Fs%3D20&rfr_id=info%3Asid%2Fen.wikipedia.org%3APower+ISA" class="Z3988"></span></span> </li> </ol></div></div> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output .hlist.inline ol,.mw-parser-output .hlist.inline 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.navbar-brackets::before{margin-right:-0.125em;content:"[ "}.mw-parser-output .navbar-brackets::after{margin-left:-0.125em;content:" ]"}.mw-parser-output .navbar li{word-spacing:-0.125em}.mw-parser-output .navbar a>span,.mw-parser-output .navbar a>abbr{text-decoration:inherit}.mw-parser-output .navbar-mini abbr{font-variant:small-caps;border-bottom:none;text-decoration:none;cursor:inherit}.mw-parser-output .navbar-ct-full{font-size:114%;margin:0 7em}.mw-parser-output .navbar-ct-mini{font-size:114%;margin:0 4em}html.skin-theme-clientpref-night .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}@media(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:RISC_architectures" title="Template:RISC architectures"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:RISC_architectures" title="Template talk:RISC architectures"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:RISC_architectures" title="Special:EditPage/Template:RISC architectures"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Reduced_instruction_set_computer_(RISC)_architectures" style="font-size:114%;margin:0 4em"><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">Reduced instruction set computer</a> (RISC) architectures</div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Origins</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/IBM_801" title="IBM 801">IBM 801</a></li> <li><a href="/wiki/Berkeley_RISC" title="Berkeley RISC">Berkeley RISC</a></li> <li><a href="/wiki/Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">In active development</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Analog_Devices" title="Analog Devices">Analog Devices</a> <a href="/wiki/Blackfin" title="Blackfin">Blackfin</a></li> <li><a href="/wiki/ARC_(processor)" title="ARC (processor)">ARC</a></li> <li><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a></li> <li><a href="/wiki/AVR_microcontrollers" title="AVR microcontrollers">AVR</a></li> <li><a href="/wiki/ESi-RISC" title="ESi-RISC">eSi-RISC</a></li> <li><a href="/wiki/LatticeMico8" title="LatticeMico8">LatticeMico8</a>, <a href="/wiki/LatticeMico32" title="LatticeMico32">LatticeMico32</a></li> <li><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a></li> <li><a class="mw-selflink selflink">Power ISA</a></li> <li><a href="/wiki/Renesas_Electronics" title="Renesas Electronics">Renesas</a> <a href="/wiki/M32R" title="M32R">M32R</a>, <a href="/wiki/SuperH" title="SuperH">SuperH</a>, <a href="/wiki/V850" title="V850">V850</a></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a></li> <li><a href="/wiki/Sunway_(processor)" title="Sunway (processor)">Sunway</a></li> <li><a href="/wiki/Unicore" title="Unicore">Unicore</a></li> <li><a href="/wiki/Xilinx" title="Xilinx">Xilinx</a> <a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a>, <a href="/wiki/PicoBlaze" title="PicoBlaze">PicoBlaze</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Development discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/DEC_Alpha" title="DEC Alpha">Alpha</a></li> <li><a href="/wiki/AMD_Am29000" title="AMD Am29000">AMD Am29000</a></li> <li><a href="/wiki/Apollo_PRISM" title="Apollo PRISM">Apollo PRISM</a></li> <li><a href="/wiki/Atmel" title="Atmel">Atmel</a> <a href="/wiki/AVR32" title="AVR32">AVR32</a></li> <li><a href="/wiki/Clipper_architecture" title="Clipper architecture">Clipper</a></li> <li><a href="/wiki/CompactRISC" title="CompactRISC">CR16</a></li> <li><a href="/wiki/AT%26T_Hobbit" title="AT&T Hobbit">CRISP</a></li> <li><a href="/wiki/DEC_PRISM" title="DEC PRISM">DEC PRISM</a></li> <li><a href="/wiki/Intel_i860" title="Intel i860">Intel i860</a>, <a href="/wiki/Intel_i960" title="Intel i960">i960</a></li> <li><a href="/wiki/Imagination_META" title="Imagination META">META</a></li> <li><a href="/wiki/MIPS-X" title="MIPS-X">MIPS-X</a></li> <li><a href="/wiki/Motorola_88000" title="Motorola 88000">Motorola 88000</a>, <a href="/wiki/M%C2%B7CORE" title="M·CORE">M·CORE</a></li> <li><a href="/wiki/PA-RISC" title="PA-RISC">PA-RISC</a></li> <li><a href="/wiki/IBM_POWER_architecture" title="IBM POWER architecture">POWER</a>, <a href="/wiki/PowerPC" title="PowerPC">PowerPC</a> <i>(active use in space exploration as <a href="/wiki/RAD750" title="RAD750">RAD750</a>)</i>, <a href="/wiki/IBM_ROMP" title="IBM ROMP">ROMP</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="Processor_technologies" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Processor_technologies" title="Template:Processor technologies"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Processor_technologies" title="Template talk:Processor technologies"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Processor_technologies" title="Special:EditPage/Template:Processor technologies"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Processor_technologies" style="font-size:114%;margin:0 4em"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Processor technologies</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Model_of_computation" title="Model of computation">Models</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Abstract_machine" title="Abstract machine">Abstract machine</a></li> <li><a href="/wiki/Stored-program_computer" title="Stored-program computer">Stored-program computer</a></li> <li><a href="/wiki/Finite-state_machine" title="Finite-state machine">Finite-state machine</a> <ul><li><a href="/wiki/Finite-state_machine_with_datapath" class="mw-redirect" title="Finite-state machine with datapath">with datapath</a></li> <li><a href="/wiki/Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical</a></li> <li><a href="/wiki/Deterministic_finite_automaton" title="Deterministic finite automaton">Deterministic finite automaton</a></li> <li><a href="/wiki/Queue_automaton" title="Queue automaton">Queue automaton</a></li> <li><a href="/wiki/Cellular_automaton" title="Cellular automaton">Cellular automaton</a></li> <li><a href="/wiki/Quantum_cellular_automaton" title="Quantum cellular automaton">Quantum cellular automaton</a></li></ul></li> <li><a href="/wiki/Turing_machine" title="Turing machine">Turing machine</a> <ul><li><a href="/wiki/Alternating_Turing_machine" title="Alternating Turing machine">Alternating Turing machine</a></li> <li><a href="/wiki/Universal_Turing_machine" title="Universal Turing machine">Universal</a></li> <li><a href="/wiki/Post%E2%80%93Turing_machine" title="Post–Turing machine">Post–Turing</a></li> <li><a href="/wiki/Quantum_Turing_machine" title="Quantum Turing machine">Quantum</a></li> <li><a href="/wiki/Nondeterministic_Turing_machine" title="Nondeterministic Turing machine">Nondeterministic Turing machine</a></li> <li><a href="/wiki/Probabilistic_Turing_machine" title="Probabilistic Turing machine">Probabilistic Turing machine</a></li> <li><a href="/wiki/Hypercomputation" title="Hypercomputation">Hypercomputation</a></li> <li><a href="/wiki/Zeno_machine" title="Zeno machine">Zeno machine</a></li></ul></li> <li><a href="/wiki/History_of_general-purpose_CPUs#Belt_machine_architecture" title="History of general-purpose CPUs">Belt machine</a></li> <li><a href="/wiki/Stack_machine" title="Stack machine">Stack machine</a></li> <li><a href="/wiki/Register_machine" title="Register machine">Register machines</a> <ul><li><a href="/wiki/Counter_machine" title="Counter machine">Counter</a></li> <li><a href="/wiki/Pointer_machine" title="Pointer machine">Pointer</a></li> <li><a href="/wiki/Random-access_machine" title="Random-access machine">Random-access</a></li> <li><a href="/wiki/Random-access_stored-program_machine" title="Random-access stored-program machine">Random-access stored program</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_architecture" title="Computer architecture">Architecture</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></li> <li><a href="/wiki/Von_Neumann_architecture" title="Von Neumann architecture">Von Neumann</a></li> <li><a href="/wiki/Harvard_architecture" title="Harvard architecture">Harvard</a> <ul><li><a href="/wiki/Modified_Harvard_architecture" title="Modified Harvard architecture">modified</a></li></ul></li> <li><a href="/wiki/Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li> <li><a href="/wiki/Transport_triggered_architecture" title="Transport triggered architecture">Transport-triggered</a></li> <li><a href="/wiki/Cellular_architecture" title="Cellular architecture">Cellular</a></li> <li><a href="/wiki/Endianness" title="Endianness">Endianness</a></li> <li><a href="/wiki/Computer_data_storage" title="Computer data storage">Memory access</a> <ul><li><a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></li> <li><a href="/wiki/Uniform_memory_access" title="Uniform memory access">HUMA</a></li> <li><a href="/wiki/Load%E2%80%93store_architecture" title="Load–store architecture">Load–store</a></li> <li><a href="/wiki/Register%E2%80%93memory_architecture" title="Register–memory architecture">Register/memory</a></li></ul></li> <li><a href="/wiki/Cache_hierarchy" title="Cache hierarchy">Cache hierarchy</a></li> <li><a href="/wiki/Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a> <ul><li><a href="/wiki/Virtual_memory" title="Virtual memory">Virtual memory</a></li> <li><a href="/wiki/Secondary_storage" class="mw-redirect" title="Secondary storage">Secondary storage</a></li></ul></li> <li><a href="/wiki/Heterogeneous_System_Architecture" title="Heterogeneous System Architecture">Heterogeneous</a></li> <li><a href="/wiki/Fabric_computing" title="Fabric computing">Fabric</a></li> <li><a href="/wiki/Multiprocessing" title="Multiprocessing">Multiprocessing</a></li> <li><a href="/wiki/Cognitive_computing" title="Cognitive computing">Cognitive</a></li> <li><a href="/wiki/Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set<br />architectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Orthogonal_instruction_set" title="Orthogonal instruction set">Orthogonal instruction set</a></li> <li><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></li> <li><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific</a></li> <li><a href="/wiki/Explicit_data_graph_execution" title="Explicit data graph execution">EDGE</a> <ul><li><a href="/wiki/TRIPS_architecture" title="TRIPS architecture">TRIPS</a></li></ul></li> <li><a href="/wiki/Very_long_instruction_word" title="Very long instruction word">VLIW</a> <ul><li><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></li></ul></li> <li><a href="/wiki/Minimal_instruction_set_computer" title="Minimal instruction set computer">MISC</a></li> <li><a href="/wiki/One-instruction_set_computer" title="One-instruction set computer">OISC</a></li> <li><a href="/wiki/No_instruction_set_computing" title="No instruction set computing">NISC</a></li> <li><a href="/wiki/Zero_instruction_set_computer" class="mw-redirect" title="Zero instruction set computer">ZISC</a></li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Quantum_computing" title="Quantum computing">Quantum computing</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Comparison</a> <ul><li><a href="/wiki/Addressing_mode" title="Addressing mode">Addressing modes</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instruction<br />sets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Motorola_68000_series" title="Motorola 68000 series">Motorola 68000 series</a></li> <li><a href="/wiki/VAX" title="VAX">VAX</a></li> <li><a href="/wiki/PDP-11_architecture" title="PDP-11 architecture">PDP-11</a></li> <li><a href="/wiki/X86" title="X86">x86</a></li> <li><a href="/wiki/ARM_architecture_family" title="ARM architecture family">ARM</a></li> <li><a href="/wiki/Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li> <li><a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a></li> <li><a href="/wiki/MIPS-X" title="MIPS-X">MIPS-X</a></li> <li>Power <ul><li><a href="/wiki/IBM_POWER_architecture" title="IBM POWER architecture">POWER</a></li> <li><a href="/wiki/PowerPC" title="PowerPC">PowerPC</a></li> <li><a class="mw-selflink selflink">Power ISA</a></li></ul></li> <li><a href="/wiki/Clipper_architecture" title="Clipper architecture">Clipper architecture</a></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a></li> <li><a href="/wiki/SuperH" title="SuperH">SuperH</a></li> <li><a href="/wiki/DEC_Alpha" title="DEC Alpha">DEC Alpha</a></li> <li><a href="/wiki/ETRAX_CRIS" title="ETRAX CRIS">ETRAX CRIS</a></li> <li><a href="/wiki/M32R" title="M32R">M32R</a></li> <li><a href="/wiki/Unicore" title="Unicore">Unicore</a></li> <li><a href="/wiki/IA-64" title="IA-64">Itanium</a></li> <li><a href="/wiki/OpenRISC" title="OpenRISC">OpenRISC</a></li> <li><a href="/wiki/RISC-V" title="RISC-V">RISC-V</a></li> <li><a href="/wiki/MicroBlaze" title="MicroBlaze">MicroBlaze</a></li> <li><a href="/wiki/Little_man_computer" title="Little man computer">LMC</a></li> <li>System/3x0 <ul><li><a href="/wiki/IBM_System/360_architecture" title="IBM System/360 architecture">S/360</a></li> <li><a href="/wiki/IBM_System/370" title="IBM System/370">S/370</a></li> <li><a href="/wiki/IBM_System/390" title="IBM System/390">S/390</a></li> <li><a href="/wiki/Z/Architecture" title="Z/Architecture">z/Architecture</a></li></ul></li> <li>Tilera ISA</li> <li><a href="/wiki/VISC_architecture" title="VISC architecture">VISC architecture</a></li> <li><a href="/wiki/Adapteva#Products" class="mw-redirect" title="Adapteva">Epiphany architecture</a></li> <li><a href="/wiki/Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Others</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_cycle" title="Instruction cycle">Execution</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Instruction pipelining</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Pipeline_stall" title="Pipeline stall">Pipeline stall</a></li> <li><a href="/wiki/Operand_forwarding" title="Operand forwarding">Operand forwarding</a></li> <li><a href="/wiki/Classic_RISC_pipeline" title="Classic RISC pipeline">Classic RISC pipeline</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hazard_(computer_architecture)" title="Hazard (computer architecture)">Hazards</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Data_dependency" title="Data dependency">Data dependency</a></li> <li><a href="/wiki/Structural_hazard" class="mw-redirect" title="Structural hazard">Structural</a></li> <li><a href="/wiki/Control_hazard" class="mw-redirect" title="Control hazard">Control</a></li> <li><a href="/wiki/False_sharing" title="False sharing">False sharing</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Out-of-order_execution" title="Out-of-order execution">Out-of-order</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Scoreboarding" title="Scoreboarding">Scoreboarding</a></li> <li><a href="/wiki/Tomasulo%27s_algorithm" title="Tomasulo's algorithm">Tomasulo's algorithm</a> <ul><li><a href="/wiki/Reservation_station" title="Reservation station">Reservation station</a></li> <li><a href="/wiki/Re-order_buffer" title="Re-order buffer">Re-order buffer</a></li></ul></li> <li><a href="/wiki/Register_renaming" title="Register renaming">Register renaming</a></li> <li><a href="/wiki/Wide-issue" title="Wide-issue">Wide-issue</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Speculative_execution" title="Speculative execution">Speculative</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch prediction</a></li> <li><a href="/wiki/Memory_dependence_prediction" title="Memory dependence prediction">Memory dependence prediction</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Parallel_computing" title="Parallel computing">Parallelism</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Level</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bit-level_parallelism" title="Bit-level parallelism">Bit</a> <ul><li><a href="/wiki/Bit-serial_architecture" title="Bit-serial architecture">Bit-serial</a></li> <li><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word</a></li></ul></li> <li><a href="/wiki/Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li> <li><a href="/wiki/Instruction_pipelining" title="Instruction pipelining">Pipelining</a> <ul><li><a href="/wiki/Scalar_processor" title="Scalar processor">Scalar</a></li> <li><a href="/wiki/Superscalar_processor" title="Superscalar processor">Superscalar</a></li></ul></li> <li><a href="/wiki/Task_parallelism" title="Task parallelism">Task</a> <ul><li><a href="/wiki/Thread_(computing)" title="Thread (computing)">Thread</a></li> <li><a href="/wiki/Process_(computing)" title="Process (computing)">Process</a></li></ul></li> <li><a href="/wiki/Data_parallelism" title="Data parallelism">Data</a> <ul><li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li></ul></li> <li><a href="/wiki/Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li> <li><a href="/wiki/Distributed_architecture" class="mw-redirect" title="Distributed architecture">Distributed</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Temporal_multithreading" title="Temporal multithreading">Temporal</a></li> <li><a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a> <ul><li><a href="/wiki/Hyper-threading" title="Hyper-threading">Hyperthreading</a></li> <li><a href="/wiki/Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li></ul></li> <li><a href="/wiki/Speculative_multithreading" title="Speculative multithreading">Speculative</a></li> <li><a href="/wiki/Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li> <li><a href="/wiki/Cooperative_multitasking" title="Cooperative multitasking">Cooperative</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Flynn%27s_taxonomy" title="Flynn's taxonomy">Flynn's taxonomy</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single_instruction,_single_data" title="Single instruction, single data">SISD</a></li> <li><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> <ul><li><a href="/wiki/Single_instruction,_multiple_threads" title="Single instruction, multiple threads">Array processing (SIMT)</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Pipelined_processor" title="Flynn's taxonomy">Pipelined processing</a></li> <li><a href="/wiki/Flynn%27s_taxonomy#Associative_processor" title="Flynn's taxonomy">Associative processing</a></li> <li><a href="/wiki/SWAR" title="SWAR">SWAR</a></li></ul></li> <li><a href="/wiki/Multiple_instruction,_single_data" title="Multiple instruction, single data">MISD</a></li> <li><a href="/wiki/Multiple_instruction,_multiple_data" title="Multiple instruction, multiple data">MIMD</a> <ul><li><a href="/wiki/Single_program,_multiple_data" title="Single program, multiple data">SPMD</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Computer_performance" title="Computer performance">Processor<br />performance</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transistor_count" title="Transistor count">Transistor count</a></li> <li><a href="/wiki/Instructions_per_cycle" title="Instructions per cycle">Instructions per cycle</a> (IPC) <ul><li><a href="/wiki/Cycles_per_instruction" title="Cycles per instruction">Cycles per instruction</a> (CPI)</li></ul></li> <li><a href="/wiki/Instructions_per_second" title="Instructions per second">Instructions per second</a> (IPS)</li> <li><a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">Floating-point operations per second</a> (FLOPS)</li> <li><a href="/wiki/Transactions_per_second" title="Transactions per second">Transactions per second</a> (TPS)</li> <li><a href="/wiki/SUPS" title="SUPS">Synaptic updates per second</a> (SUPS)</li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li> <li><a href="/wiki/Cache_performance_measurement_and_metric" title="Cache performance measurement and metric">Cache performance metrics</a></li> <li><a href="/wiki/Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Processor_(computing)" title="Processor (computing)">Types</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Central processing unit</a> (CPU)</li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU) <ul><li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li></ul></li> <li><a href="/wiki/Vector_processor" title="Vector processor">Vector</a></li> <li><a href="/wiki/Barrel_processor" title="Barrel processor">Barrel</a></li> <li><a href="/wiki/Stream_processing" title="Stream processing">Stream</a></li> <li><a href="/wiki/Tile_processor" title="Tile processor">Tile processor</a></li> <li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li> <li><a href="/wiki/Field-programmable_object_array" title="Field-programmable object array">FPOA</a></li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li> <li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li> <li><a href="/wiki/System_in_a_package" title="System in a package">System in a package</a> (SiP)</li> <li><a href="/wiki/Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">By application</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Embedded_system" title="Embedded system">Embedded system</a></li> <li><a href="/wiki/Microprocessor" title="Microprocessor">Microprocessor</a></li> <li><a href="/wiki/Microcontroller" title="Microcontroller">Microcontroller</a></li> <li><a href="/wiki/Mobile_processor" title="Mobile processor">Mobile</a></li> <li><a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">Ultra-low-voltage</a></li> <li><a href="/wiki/Application-specific_instruction_set_processor" title="Application-specific instruction set processor">ASIP</a></li> <li><a href="/wiki/Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Systems<br />on chip</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a> (SoC)</li> <li><a href="/wiki/Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor</a> (MPSoC)</li> <li><a href="/wiki/Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a> (NoC)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware<br />accelerators</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Coprocessor" title="Coprocessor">Coprocessor</a></li> <li><a href="/wiki/AI_accelerator" title="AI accelerator">AI accelerator</a></li> <li><a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li> <li><a href="/wiki/Image_processor" title="Image processor">Image processor</a></li> <li><a href="/wiki/Vision_processing_unit" title="Vision processing unit">Vision processing unit</a> (VPU)</li> <li><a href="/wiki/Physics_processing_unit" title="Physics processing unit">Physics processing unit</a> (PPU)</li> <li><a href="/wiki/Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li> <li><a href="/wiki/Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li> <li><a href="/wiki/Secure_cryptoprocessor" title="Secure cryptoprocessor">Secure cryptoprocessor</a></li> <li><a href="/wiki/Network_processor" title="Network processor">Network processor</a></li> <li><a href="/wiki/Baseband_processor" title="Baseband processor">Baseband processor</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Word_(computer_architecture)" title="Word (computer architecture)">Word size</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/1-bit_computing" title="1-bit computing">1-bit</a></li> <li><a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a></li> <li><a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a></li> <li><a href="/wiki/12-bit_computing" title="12-bit computing">12-bit</a></li> <li><a href="/wiki/Apollo_Guidance_Computer" title="Apollo Guidance Computer">15-bit</a></li> <li><a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a></li> <li><a href="/wiki/24-bit_computing" title="24-bit computing">24-bit</a></li> <li><a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a></li> <li><a href="/wiki/48-bit_computing" title="48-bit computing">48-bit</a></li> <li><a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a></li> <li><a href="/wiki/128-bit_computing" title="128-bit computing">128-bit</a></li> <li><a href="/wiki/256-bit_computing" title="256-bit computing">256-bit</a></li> <li><a href="/wiki/512-bit_computing" title="512-bit computing">512-bit</a></li> <li><a href="/wiki/Bit_slicing" title="Bit slicing">bit slicing</a></li> <li><a href="/wiki/Word_(computer_architecture)#Table_of_word_sizes" title="Word (computer architecture)">others</a> <ul><li><a href="/wiki/Word_(computer_architecture)#Variable-word_architectures" title="Word (computer architecture)">variable</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Core count</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single-core" title="Single-core">Single-core</a></li> <li><a href="/wiki/Multi-core_processor" title="Multi-core processor">Multi-core</a></li> <li><a href="/wiki/Manycore_processor" title="Manycore processor">Manycore</a></li> <li><a href="/wiki/Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous architecture</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Central_processing_unit" title="Central processing unit">Core</a></li> <li><a href="/wiki/Cache_(computing)" title="Cache (computing)">Cache</a> <ul><li><a href="/wiki/CPU_cache" title="CPU cache">CPU cache</a></li> <li><a href="/wiki/Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li> <li><a href="/wiki/Data_cache" class="mw-redirect" title="Data cache">Data cache</a></li> <li><a href="/wiki/Instruction_cache" class="mw-redirect" title="Instruction cache">Instruction cache</a></li> <li><a href="/wiki/Cache_replacement_policies" title="Cache replacement policies">replacement policies</a></li> <li><a href="/wiki/Cache_coherence" title="Cache coherence">coherence</a></li></ul></li> <li><a href="/wiki/Bus_(computing)" title="Bus (computing)">Bus</a></li> <li><a href="/wiki/Clock_rate" title="Clock rate">Clock rate</a></li> <li><a href="/wiki/Clock_signal" title="Clock signal">Clock signal</a></li> <li><a href="/wiki/FIFO_(computing_and_electronics)" title="FIFO (computing and electronics)">FIFO</a></li></ul> </div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Execution_unit" title="Execution unit">Functional<br />units</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">Arithmetic logic unit</a> (ALU)</li> <li><a href="/wiki/Address_generation_unit" title="Address generation unit">Address generation unit</a> (AGU)</li> <li><a href="/wiki/Floating-point_unit" title="Floating-point unit">Floating-point unit</a> (FPU)</li> <li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a> (MMU) <ul><li><a href="/wiki/Load%E2%80%93store_unit" title="Load–store unit">Load–store unit</a></li> <li><a href="/wiki/Translation_lookaside_buffer" title="Translation lookaside buffer">Translation lookaside buffer</a> (TLB)</li></ul></li> <li><a href="/wiki/Branch_predictor" title="Branch predictor">Branch predictor</a></li> <li><a href="/wiki/Branch_target_predictor" title="Branch target predictor">Branch target predictor</a></li> <li><a href="/wiki/Memory_controller" title="Memory controller">Integrated memory controller</a> (IMC) <ul><li><a href="/wiki/Memory_management_unit" title="Memory management unit">Memory management unit</a></li></ul></li> <li><a href="/wiki/Instruction_decoder" class="mw-redirect" title="Instruction decoder">Instruction decoder</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Logic_gate" title="Logic gate">Logic</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Combinational_logic" title="Combinational logic">Combinational</a></li> <li><a href="/wiki/Sequential_logic" title="Sequential logic">Sequential</a></li> <li><a href="/wiki/Glue_logic" title="Glue logic">Glue</a></li> <li><a href="/wiki/Logic_gate" title="Logic gate">Logic gate</a> <ul><li><a href="/wiki/Quantum_logic_gate" title="Quantum logic gate">Quantum</a></li> <li><a href="/wiki/Gate_array" title="Gate array">Array</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware_register" title="Hardware register">Registers</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Processor_register" title="Processor register">Processor register</a></li> <li><a href="/wiki/Status_register" title="Status register">Status register</a></li> <li><a href="/wiki/Stack_register" title="Stack register">Stack register</a></li> <li><a href="/wiki/Register_file" title="Register file">Register file</a></li> <li><a href="/wiki/Memory_buffer_register" title="Memory buffer register">Memory buffer</a></li> <li><a href="/wiki/Memory_address_register" title="Memory address register">Memory address register</a></li> <li><a href="/wiki/Program_counter" title="Program counter">Program counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Control_unit" title="Control unit">Control unit</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Hardwired_control_unit" class="mw-redirect" title="Hardwired control unit">Hardwired control unit</a></li> <li><a href="/wiki/Instruction_unit" title="Instruction unit">Instruction unit</a></li> <li><a href="/wiki/Data_buffer" title="Data buffer">Data buffer</a></li> <li><a href="/wiki/Write_buffer" title="Write buffer">Write buffer</a></li> <li><a href="/wiki/Microcode" title="Microcode">Microcode</a> <a href="/wiki/ROM_image" title="ROM image">ROM</a></li> <li><a href="/wiki/Counter_(digital)" title="Counter (digital)">Counter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Datapath" title="Datapath">Datapath</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multiplexer" title="Multiplexer">Multiplexer</a></li> <li><a href="/wiki/Demultiplexer" class="mw-redirect" title="Demultiplexer">Demultiplexer</a></li> <li><a href="/wiki/Adder_(electronics)" title="Adder (electronics)">Adder</a></li> <li><a href="/wiki/Binary_multiplier" title="Binary multiplier">Multiplier</a> <ul><li><a href="/wiki/CPU_multiplier" title="CPU multiplier">CPU</a></li></ul></li> <li><a href="/wiki/Binary_decoder" title="Binary decoder">Binary decoder</a> <ul><li><a href="/wiki/Address_decoder" title="Address decoder">Address decoder</a></li> <li><a href="/wiki/Sum-addressed_decoder" title="Sum-addressed decoder">Sum-addressed decoder</a></li></ul></li> <li><a href="/wiki/Barrel_shifter" title="Barrel shifter">Barrel shifter</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Electronic_circuit" title="Electronic circuit">Circuitry</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> <ul><li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D</a></li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal</a></li> <li><a href="/wiki/Power_management_integrated_circuit" title="Power management integrated circuit">Power management</a></li></ul></li> <li><a href="/wiki/Boolean_circuit" title="Boolean circuit">Boolean</a></li> <li><a href="/wiki/Circuit_(computer_science)" title="Circuit (computer science)">Digital</a></li> <li><a href="/wiki/Analogue_electronics" title="Analogue electronics">Analog</a></li> <li><a href="/wiki/Quantum_circuit" title="Quantum circuit">Quantum</a></li> <li><a href="/wiki/Switch#Electronic_switches" title="Switch">Switch</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Power_management" title="Power management">Power<br />management</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Power_Management_Unit" title="Power Management Unit">PMU</a></li> <li><a href="/wiki/Advanced_Power_Management" title="Advanced Power Management">APM</a></li> <li><a href="/wiki/ACPI" title="ACPI">ACPI</a></li> <li><a href="/wiki/Dynamic_frequency_scaling" title="Dynamic frequency scaling">Dynamic frequency scaling</a></li> <li><a href="/wiki/Dynamic_voltage_scaling" title="Dynamic voltage scaling">Dynamic voltage scaling</a></li> <li><a href="/wiki/Clock_gating" title="Clock gating">Clock gating</a></li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/History_of_general-purpose_CPUs" title="History of general-purpose CPUs">History of general-purpose CPUs</a></li> <li><a href="/wiki/Microprocessor_chronology" title="Microprocessor chronology">Microprocessor chronology</a></li> <li><a href="/wiki/Processor_design" title="Processor design">Processor design</a></li> <li><a href="/wiki/Digital_electronics" title="Digital electronics">Digital electronics</a></li> <li><a href="/wiki/Hardware_security_module" title="Hardware security module">Hardware security module</a></li> <li><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li> <li><a href="/wiki/Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li> <li><a href="/wiki/Pin_grid_array" title="Pin grid array">Pin grid array</a></li> <li><a href="/wiki/Chip_carrier" title="Chip carrier">Chip carrier</a></li></ul> </div></td></tr></tbody></table></div>    </div><noscript><img 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