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Volta (microarchitecture) - Wikipedia
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data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title" style="padding-bottom:0.2em;">Nvidia Volta</caption><tbody><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Release date</th><td class="infobox-data">December 7, 2017</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Codename</th><td class="infobox-data">Volta</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Fabrication process</th><td class="infobox-data"><a href="/wiki/TSMC" title="TSMC">TSMC</a> <a href="/wiki/14_nm_process" title="14 nm process">12 nm</a> (<a href="/wiki/FinFET" class="mw-redirect" title="FinFET">FinFET</a>)</td></tr><tr><th colspan="2" class="infobox-header" style="font-size:105%;"><a href="/wiki/Graphics_card" title="Graphics card">Cards</a></th></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Enthusiast</th><td class="infobox-data"><style data-mw-deduplicate="TemplateStyles:r1126788409">.mw-parser-output .plainlist ol,.mw-parser-output .plainlist ul{line-height:inherit;list-style:none;margin:0;padding:0}.mw-parser-output .plainlist ol li,.mw-parser-output .plainlist ul li{margin-bottom:0}</style><div class="plainlist"><ul><li>Tesla V100</li><li>Tesla V100S PCIe</li><li>Titan V</li><li>Titan V CEO Edition</li><li>Quadro GV100</li></ul></div></td></tr><tr><th colspan="2" class="infobox-header" style="font-size:105%;">History</th></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Predecessor</th><td class="infobox-data"><a href="/wiki/Pascal_(microarchitecture)" title="Pascal (microarchitecture)">Pascal</a></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Variant</th><td class="infobox-data"><a href="/wiki/Turing_(microarchitecture)" title="Turing (microarchitecture)">Turing</a> (consumer, professional)</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Successor</th><td class="infobox-data"><a href="/wiki/Ampere_(microarchitecture)" title="Ampere (microarchitecture)">Ampere</a> (consumer, professional)</td></tr><tr><th colspan="2" class="infobox-header" style="font-size:105%;">Support status</th></tr><tr><td colspan="2" class="infobox-full-data">Supported</td></tr></tbody></table> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Alessandro_Volta.jpeg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/5/52/Alessandro_Volta.jpeg/220px-Alessandro_Volta.jpeg" decoding="async" width="220" height="271" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/5/52/Alessandro_Volta.jpeg/330px-Alessandro_Volta.jpeg 1.5x, //upload.wikimedia.org/wikipedia/commons/5/52/Alessandro_Volta.jpeg 2x" data-file-width="390" data-file-height="480" /></a><figcaption>Painting of Alessandro Volta, eponym of architecture</figcaption></figure> <p><b>Volta</b> is the codename, but not the trademark,<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> for a <a href="/wiki/Graphics_processing_unit" title="Graphics processing unit">GPU</a> <a href="/wiki/Microarchitecture" title="Microarchitecture">microarchitecture</a> developed by <a href="/wiki/Nvidia" title="Nvidia">Nvidia</a>, succeeding <a href="/wiki/Pascal_(microarchitecture)" title="Pascal (microarchitecture)">Pascal</a>. It was first announced on a roadmap in March 2013,<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> although the first product was not announced until May 2017.<sup id="cite_ref-:2_3-0" class="reference"><a href="#cite_note-:2-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> The architecture is named after 18th–19th century Italian chemist and physicist <a href="/wiki/Alessandro_Volta" title="Alessandro Volta">Alessandro Volta</a>. It was Nvidia's first chip to feature <a href="/wiki/Tensor_Core" class="mw-redirect" title="Tensor Core">Tensor Cores</a>, specially designed cores that have superior deep learning performance over regular CUDA cores.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> The architecture is produced with <a href="/wiki/TSMC" title="TSMC">TSMC</a>'s <a href="/wiki/14_nm_process" title="14 nm process">12 nm</a> <a href="/wiki/FinFET" class="mw-redirect" title="FinFET">FinFET</a> process. The <a href="/wiki/Ampere_(microarchitecture)" title="Ampere (microarchitecture)">Ampere</a> microarchitecture is the successor to Volta. </p><p>The first graphics card to use it was the datacenter <a href="/wiki/Nvidia_Tesla" title="Nvidia Tesla">Tesla</a> V100, e.g. as part of the <a href="/wiki/Nvidia_DGX-1" class="mw-redirect" title="Nvidia DGX-1">Nvidia DGX-1</a> system.<sup id="cite_ref-:2_3-1" class="reference"><a href="#cite_note-:2-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> It has also been used in the Quadro GV100 and Titan V. There were no mainstream GeForce graphics cards based on Volta. </p><p>After two USPTO proceedings,<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> on Jul. 03, 2023 Nvidia lost the Volta trademark application in the field of artificial intelligence. The Volta trademark<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> owner remains Volta Robots, a company specialized in AI and vision algorithms for robots and unmanned vehicles. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Details">Details</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Volta_(microarchitecture)&action=edit&section=1" title="Edit section: Details"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Architectural improvements of the Volta architecture include the following: </p> <ul><li><a href="/wiki/CUDA" title="CUDA">CUDA</a> Compute Capability 7.0 <ul><li>concurrent execution of integer and floating point operations</li></ul></li> <li><a href="/wiki/TSMC" title="TSMC">TSMC</a>'s <a href="/w/index.php?title=12_nm&action=edit&redlink=1" class="new" title="12 nm (page does not exist)">12 nm</a> <a href="/wiki/FinFET" class="mw-redirect" title="FinFET">FinFET</a> process,<sup id="cite_ref-TR_12_8-0" class="reference"><a href="#cite_note-TR_12-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> allowing 21.1<span class="nowrap"> </span>billion <a href="/wiki/Transistor_count" title="Transistor count">transistors</a>.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup></li> <li><a href="/wiki/HBM2" class="mw-redirect" title="HBM2">High Bandwidth Memory 2</a> (HBM2),<sup id="cite_ref-TR_12_8-1" class="reference"><a href="#cite_note-TR_12-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup></li> <li><a href="/wiki/NVLink" title="NVLink">NVLink 2.0</a>: a high-bandwidth bus between the CPU and GPU, and between multiple GPUs. Allows much higher transfer speeds than those achievable by using <a href="/wiki/PCI_Express" title="PCI Express">PCI Express</a>; estimated to provide 25 Gbit/s per lane.<sup id="cite_ref-pcworld_11-0" class="reference"><a href="#cite_note-pcworld-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> (Disabled for Titan V)</li> <li>Tensor cores: A tensor core is a unit that multiplies two 4×4 <a href="/wiki/FP16" class="mw-redirect" title="FP16">FP16</a> matrices, and then adds a third FP16 or FP32 matrix to the result by using <a href="/wiki/Fused_multiply%E2%80%93add" class="mw-redirect" title="Fused multiply–add">fused multiply–add</a> operations, and obtains an FP32 result that could be optionally demoted to an FP16 result.<sup id="cite_ref-CUDA9_12-0" class="reference"><a href="#cite_note-CUDA9-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> Tensor cores are intended to speed up the training of neural networks.<sup id="cite_ref-CUDA9_12-1" class="reference"><a href="#cite_note-CUDA9-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> Volta's Tensor cores are first generation while Ampere has third generation Tensor cores.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup></li> <li><a href="/wiki/Nvidia_PureVideo" title="Nvidia PureVideo">PureVideo</a> Feature Set I hardware video decoding</li></ul> <p>Comparison of Compute Capability: GP100 vs GV100 vs GA100<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> </p> <table class="wikitable" style="text-align:left;"> <tbody><tr> <th>GPU features </th> <th>Nvidia Tesla P100 </th> <th>Nvidia Tesla V100 </th> <th>Nvidia A100 </th></tr> <tr> <td>GPU codename </td> <td>GP100 </td> <td>GV100 </td> <td>GA100 </td></tr> <tr> <td>GPU architecture </td> <td>Nvidia Pascal </td> <td>Nvidia Volta </td> <td>Nvidia Ampere </td></tr> <tr> <td>Compute capability </td> <td>6.0 </td> <td>7.0 </td> <td>8.0 </td></tr> <tr> <td>Threads / warp </td> <td>32 </td> <td>32 </td> <td>32 </td></tr> <tr> <td>Max warps / SM </td> <td>64 </td> <td>64 </td> <td>64 </td></tr> <tr> <td>Max threads / SM </td> <td>2048 </td> <td>2048 </td> <td>2048 </td></tr> <tr> <td>Max thread blocks / SM </td> <td>32 </td> <td>32 </td> <td>32 </td></tr> <tr> <td>Max 32-bit registers / SM </td> <td>65536 </td> <td>65536 </td> <td>65536 </td></tr> <tr> <td>Max registers / block </td> <td>65536 </td> <td>65536 </td> <td>65536 </td></tr> <tr> <td>Max registers / thread </td> <td>255 </td> <td>255 </td> <td>255 </td></tr> <tr> <td>Max thread block size </td> <td>1024 </td> <td>1024 </td> <td>1024 </td></tr> <tr> <td>FP32 cores / SM </td> <td>64 </td> <td>64 </td> <td>64 </td></tr> <tr> <td>Ratio of SM registers to FP32 cores </td> <td>1024 </td> <td>1024 </td> <td>1024 </td></tr> <tr> <td>Shared Memory Size / SM </td> <td>64 KB </td> <td>Configurable up to 96 KB </td> <td>Configurable up to 164 KB </td></tr></tbody></table> <p>Comparison of Precision Support Matrix<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> </p> <table class="wikitable" style="text-align:center;"> <tbody><tr> <th rowspan="2"> </th> <th colspan="8">Supported CUDA Core Precisions </th> <th colspan="8">Supported Tensor Core Precisions </th></tr> <tr> <th>FP16 </th> <th>FP32 </th> <th>FP64 </th> <th>INT1 </th> <th>INT4 </th> <th>INT8 </th> <th>TF32 </th> <th>BF16 </th> <th>FP16 </th> <th>FP32 </th> <th>FP64 </th> <th>INT1 </th> <th>INT4 </th> <th>INT8 </th> <th>TF32 </th> <th>BF16 </th></tr> <tr> <th>Nvidia Tesla P4 </th> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No </td></tr> <tr> <th>Nvidia P100 </th> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No </td></tr> <tr> <th>Nvidia Volta </th> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No </td></tr> <tr> <th>Nvidia Turing </th> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No </td></tr> <tr> <th>Nvidia A100 </th> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes</td> <td style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes </td></tr></tbody></table> <p>Legend: </p> <ul><li>FPnn: floating point with nn bits</li> <li>INTn: integer with n bits</li> <li>INT1: binary</li> <li>TF32: TensorFloat32</li> <li>BF16: bfloat16</li></ul> <p>Comparison of Decode Performance </p> <table class="wikitable" style="text-align:left;"> <tbody><tr> <th>Concurrent streams </th> <th>H.264 decode (1080p30) </th> <th>H.265 (HEVC) decode (1080p30) </th> <th>VP9 decode (1080p30) </th></tr> <tr> <th>V100 </th> <td>16 </td> <td>22 </td> <td>22 </td></tr> <tr> <th>A100 </th> <td>75 </td> <td>157 </td> <td>108 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Products">Products</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Volta_(microarchitecture)&action=edit&section=2" title="Edit section: Products"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Volta has been announced as the GPU microarchitecture within the <a href="/wiki/Tegra#Xavier" title="Tegra">Xavier</a> generation of <a href="/wiki/Tegra" title="Tegra">Tegra</a> <a href="/wiki/System_on_a_chip" title="System on a chip">SoC</a> focusing on <a href="/wiki/Autonomous_car" class="mw-redirect" title="Autonomous car">self-driving cars</a>.<sup id="cite_ref-anand_keynote_18-0" class="reference"><a href="#cite_note-anand_keynote-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> </p><p>At Nvidia's annual GPU Technology Conference keynote on May 10, 2017, Nvidia officially announced the Volta microarchitecture along with the <a href="/wiki/Nvidia_Tesla" title="Nvidia Tesla">Tesla</a> V100.<sup id="cite_ref-:2_3-2" class="reference"><a href="#cite_note-:2-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> The Volta GV100 GPU is built on a 12 nm process size using HBM2 memory with 900 GB/s of bandwidth.<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> </p><p>Nvidia officially announced the Nvidia TITAN V on December 7, 2017.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> </p><p>Nvidia officially announced the Quadro GV100 on March 27, 2018.<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup> </p> <table class="wikitable" style="font-size: 83%; text-align: center;"> <tbody><tr> <th rowspan="3">Model </th> <th rowspan="3">Launch </th> <th rowspan="3"><a href="/wiki/Code_name" title="Code name">Code Name</a> (s) </th> <th rowspan="3">Fab<br />(<a href="/wiki/Nanometre" title="Nanometre">nm</a>) </th> <th rowspan="3">Transistors<br />(billion) </th> <th rowspan="3">Die size<br />(mm<sup>2</sup>) </th> <th rowspan="3"><a href="/wiki/Computer_bus" class="mw-redirect" title="Computer bus">Bus</a> <a href="/wiki/I/O_interface" class="mw-redirect" title="I/O interface">Interface</a> </th> <th colspan="2">Core config </th> <th rowspan="3">SM<br />Count<sup id="cite_ref-c_24-0" class="reference"><a href="#cite_note-c-24"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="3">Graphics<br />Processing<br />Clusters<sup id="cite_ref-d_25-0" class="reference"><a href="#cite_note-d-25"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="3"><a href="/wiki/GPU_cache" class="mw-redirect" title="GPU cache">L2 Cache</a><br />Size (<a href="/wiki/Mebibyte" class="mw-redirect" title="Mebibyte">MiB</a>) </th> <th colspan="3">Clock speeds </th> <th colspan="2"><a href="/wiki/Fillrate" title="Fillrate">Fillrate</a> </th> <th colspan="4">Memory </th> <th colspan="3">Processing power (<a href="/wiki/GFLOPS" class="mw-redirect" title="GFLOPS">GFLOPS</a>) </th> <th rowspan="3"><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a><br />(Watts) </th> <th rowspan="3"><a href="/wiki/NVLink" title="NVLink">NVLink</a> Support </th> <th rowspan="2">Launch Price<br />(<a href="/wiki/United_States_dollar" title="United States dollar">USD</a>) </th></tr> <tr> <th rowspan="2">CUDA<br />core<sup id="cite_ref-a_26-0" class="reference"><a href="#cite_note-a-26"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2">Tensor<br />core<sup id="cite_ref-b_27-0" class="reference"><a href="#cite_note-b-27"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2">Base core<br />clock (<a href="/wiki/Hertz" title="Hertz">MHz</a>) </th> <th rowspan="2">Boost clock<br />(<a href="/wiki/Hertz" title="Hertz">MHz</a>) </th> <th rowspan="2">Memory<br />(<a href="/wiki/MT/s" class="mw-redirect" title="MT/s">MT/s</a>) </th> <th rowspan="2">Pixel<br />(<a href="/wiki/Pixel" title="Pixel">GP</a>/s) </th> <th rowspan="2">Texture<br />(<a href="/wiki/Texel_(graphics)" title="Texel (graphics)">GT</a>/s) </th> <th rowspan="2">Size<br />(<a href="/wiki/Gibibyte" class="mw-redirect" title="Gibibyte">GiB</a>) </th> <th rowspan="2">Bandwidth<br />(<a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s) </th> <th rowspan="2">Bus<br />Type </th> <th rowspan="2">Bus width<br />(<a href="/wiki/Bit" title="Bit">bit</a>) </th> <th rowspan="2"><a href="/wiki/Single-precision_floating-point_format" title="Single-precision floating-point format">Single<br />precision</a> (boost)<br /> </th> <th rowspan="2"><a href="/wiki/Double-precision_floating-point_format" title="Double-precision floating-point format">Double<br />precision</a> (boost)<br /> </th> <th rowspan="2"><a href="/wiki/Half-precision_floating-point_format" title="Half-precision floating-point format">Half<br />precision</a> (boost)<br /> </th></tr> <tr> <th rowspan="1">MSRP </th></tr> <tr> <th>Nvidia Titan V<sup id="cite_ref-:0_28-0" class="reference"><a href="#cite_note-:0-28"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </th> <td>December 7, 2017 </td> <td>GV100-400-A1 </td> <td rowspan="3"><a href="/wiki/TSMC" title="TSMC">TSMC</a> <a href="/w/index.php?title=12_nm&action=edit&redlink=1" class="new" title="12 nm (page does not exist)">12 nm</a> </td> <td rowspan="3">21.1 </td> <td rowspan="3">815 </td> <td rowspan="3">PCIe 3.0 ×16 </td> <td>5120:320:96 </td> <td rowspan="3">640 </td> <td rowspan="3">80 </td> <td rowspan="3">6 </td> <td>4.5 </td> <td>1200 </td> <td>1455 </td> <td>1700 </td> <td>139.7 </td> <td>465.6 </td> <td>12 </td> <td>652.8 </td> <td rowspan="3">HBM2 </td> <td>3072 </td> <td>12288 (14899) </td> <td>6144 (7450) </td> <td>24576 (29798) </td> <td rowspan="3">250 </td> <td style="background:#FFC7C7;color:black;vertical-align:middle;text-align:center;" class="table-no">No </td> <td>$2,999 </td></tr> <tr> <th>Nvidia Quadro GV100<sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> </th> <td>March 27, 2018 </td> <td rowspan="2">GV100 </td> <td rowspan="2">5120:320:128 </td> <td rowspan="2">6 </td> <td>1132 </td> <td>1628 </td> <td>1696 </td> <td>208.4 </td> <td>521 </td> <td rowspan="2">32 </td> <td>868.4 </td> <td rowspan="2">4096 </td> <td>11592 (16671) </td> <td>5796 (8335) </td> <td>23183 (33341) </td> <td rowspan="2" style="background:#9EFF9E;color:black;vertical-align:middle;text-align:center;" class="table-yes">Yes </td> <td>$8,999 </td></tr> <tr> <th>Nvidia Titan V CEO Edition<sup id="cite_ref-30" class="reference"><a href="#cite_note-30"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup> </th> <td>June 21, 2018 </td> <td>1200 </td> <td>1455 </td> <td>1700 </td> <td>186.2 </td> <td>465.6 </td> <td>870.4 </td> <td>12288 (14899) </td> <td>6144 (7450) </td> <td>24576 (29798) </td> <td>N/A </td></tr></tbody></table> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-c-24"><span class="mw-cite-backlink"><b><a href="#cite_ref-c_24-0">^</a></b></span> <span class="reference-text">One Streaming Multiprocessor encompasses 64 CUDA cores and 4 TMUs.</span> </li> <li id="cite_note-d-25"><span class="mw-cite-backlink"><b><a href="#cite_ref-d_25-0">^</a></b></span> <span class="reference-text">One Graphics Processing Cluster encompasses fourteen Streaming Multiprocessors.</span> </li> <li id="cite_note-a-26"><span class="mw-cite-backlink"><b><a href="#cite_ref-a_26-0">^</a></b></span> <span class="reference-text"><a href="/wiki/Unified_shader_model" title="Unified shader model">CUDA cores</a> : <a href="/wiki/Texture_mapping_unit" title="Texture mapping unit">Texture mapping units</a> : <a href="/wiki/Render_output_unit" title="Render output unit">Render output units</a></span> </li> <li id="cite_note-b-27"><span class="mw-cite-backlink"><b><a href="#cite_ref-b_27-0">^</a></b></span> <span class="reference-text">A Tensor core is a mixed-precision <a href="/wiki/Floating-point_unit" title="Floating-point unit">FPU</a> specifically designed for <a href="/wiki/Matrix_(mathematics)" title="Matrix (mathematics)">matrix</a> arithmetic.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="Application">Application</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Volta_(microarchitecture)&action=edit&section=3" title="Edit section: Application"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Volta is also reported to be included in the <a href="/wiki/Summit_(supercomputer)" title="Summit (supercomputer)">Summit</a> and <a href="/wiki/Sierra_(supercomputer)" title="Sierra (supercomputer)">Sierra</a> supercomputers, used for GPGPU compute.<sup id="cite_ref-32" class="reference"><a href="#cite_note-32"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup> The Volta GPUs will connect to the <a href="/wiki/POWER9" title="POWER9">POWER9</a> CPUs via <a href="/wiki/NVLink" title="NVLink">NVLink 2.0</a>, which is expected to support <a href="/wiki/Cache_coherency" class="mw-redirect" title="Cache coherency">cache coherency</a> and therefore improve GPGPU performance.<sup id="cite_ref-34" class="reference"><a href="#cite_note-34"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-pcworld_11-1" class="reference"><a href="#cite_note-pcworld-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:1_35-0" class="reference"><a href="#cite_note-:1-35"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="V100_accelerator_and_DGX_V100">V100 accelerator and DGX V100</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Volta_(microarchitecture)&action=edit&section=4" title="Edit section: V100 accelerator and DGX V100"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Comparison of accelerators used in DGX:<sup id="cite_ref-36" class="reference"><a href="#cite_note-36"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-37" class="reference"><a href="#cite_note-37"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-38" class="reference"><a href="#cite_note-38"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> </p> <table> <tbody><tr><td></td></tr></tbody></table> <div style="overflow-x:auto; white-space:nowrap;"> <table class="wikitable" style="margin:0;"> <tbody><tr> <th>Model</th> <th>Architecture</th> <th>Socket</th> <th>FP32<br />CUDA<br />cores</th> <th>FP64 cores<br />(excl. tensor)</th> <th>Mixed<br />INT32/FP32<br />cores</th> <th>INT32<br />cores</th> <th>Boost<br />clock</th> <th>Memory<br />clock</th> <th>Memory<br />bus width</th> <th>Memory<br />bandwidth</th> <th>VRAM</th> <th>Single<br />precision<br />(FP32)</th> <th>Double<br />precision<br />(FP64)</th> <th>INT8<br />(non-tensor)</th> <th>INT8<br />dense tensor</th> <th>INT32</th> <th>FP4<br /> dense tensor</th> <th>FP16</th> <th>FP16<br />dense tensor</th> <th>bfloat16<br />dense tensor</th> <th>TensorFloat-32<br />(TF32)<br />dense tensor</th> <th>FP64<br />dense tensor</th> <th>Interconnect<br />(NVLink)</th> <th>GPU</th> <th>L1 Cache</th> <th>L2 Cache</th> <th>TDP</th> <th>Die size</th> <th>Transistor<br />count</th> <th>Process</th> <th>Launched </th></tr> <tr> <th>B200 </th> <td><a href="/wiki/Blackwell_(microarchitecture)" title="Blackwell (microarchitecture)">Blackwell</a></td> <td>SXM6</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>8 Gbit/s HBM3e</td> <td>8192-bit</td> <td>8 TB/sec</td> <td>192 GB HBM3e</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>4.5 POPS</td> <td>N/A</td> <td>9 PFLOPS</td> <td>N/A</td> <td>2.25 PFLOPS</td> <td>2.25 PFLOPS</td> <td>1.2 PFLOPS</td> <td>40 TFLOPS</td> <td>1.8 TB/sec</td> <td>GB100</td> <td>N/A</td> <td>N/A</td> <td>1000 W</td> <td>N/A</td> <td>208 B</td> <td>TSMC 4NP</td> <td rowspan="2">Q4 2024 (expected) </td></tr> <tr> <th>B100 </th> <td><a href="/wiki/Blackwell_(microarchitecture)" title="Blackwell (microarchitecture)">Blackwell</a></td> <td>SXM6</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>8 Gbit/s HBM3e</td> <td>8192-bit</td> <td>8 TB/sec</td> <td>192 GB HBM3e</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>3.5 POPS</td> <td>N/A</td> <td>7 PFLOPS</td> <td>N/A</td> <td>1.98 PFLOPS</td> <td>1.98 PFLOPS</td> <td>989 TFLOPS</td> <td>30 TFLOPS</td> <td>1.8 TB/sec</td> <td>GB100</td> <td>N/A</td> <td>N/A</td> <td>700 W</td> <td>N/A</td> <td>208 B</td> <td>TSMC 4NP </td></tr> <tr> <th>H200 </th> <td><a href="/wiki/Hopper_(microarchitecture)" title="Hopper (microarchitecture)">Hopper</a></td> <td>SXM5</td> <td>16896</td> <td>4608</td> <td>16896</td> <td>N/A</td> <td>1980 MHz</td> <td>6.3 Gbit/s HBM3e</td> <td>6144-bit</td> <td>4.8 TB/sec</td> <td>141 GB HBM3e</td> <td>67 TFLOPS</td> <td>34 TFLOPS</td> <td>N/A</td> <td>1.98 POPS</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>990 TFLOPS</td> <td>990 TFLOPS</td> <td>495 TFLOPS</td> <td>67 TFLOPS</td> <td>900 GB/sec</td> <td>GH100</td> <td>25344 KB (192 KB × 132)</td> <td>51200 KB</td> <td>1000 W</td> <td>814 mm<sup>2</sup></td> <td>80 B</td> <td>TSMC 4N</td> <td>Q3 2023 </td></tr> <tr> <th>H100 </th> <td><a href="/wiki/Hopper_(microarchitecture)" title="Hopper (microarchitecture)">Hopper</a></td> <td>SXM5</td> <td>16896</td> <td>4608</td> <td>16896</td> <td>N/A</td> <td>1980 MHz</td> <td>5.2 Gbit/s HBM3</td> <td>5120-bit</td> <td>3.35 TB/sec</td> <td>80 GB HBM3</td> <td>67 TFLOPS</td> <td>34 TFLOPS</td> <td>N/A</td> <td>1.98 POPS</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>990 TFLOPS</td> <td>990 TFLOPS</td> <td>495 TFLOPS</td> <td>67 TFLOPS</td> <td>900 GB/sec</td> <td>GH100</td> <td>25344 KB (192 KB × 132)</td> <td>51200 KB</td> <td>700 W</td> <td>814 mm<sup>2</sup></td> <td>80 B</td> <td>TSMC 4N</td> <td>Q3 2022 </td></tr> <tr> <th>A100 80GB </th> <td><a href="/wiki/Ampere_(microarchitecture)" title="Ampere (microarchitecture)">Ampere</a></td> <td>SXM4</td> <td>6912</td> <td>3456</td> <td>6912</td> <td>N/A</td> <td>1410 MHz</td> <td>3.2 Gbit/s HBM2e</td> <td>5120-bit</td> <td>1.52 TB/sec</td> <td>80 GB HBM2e</td> <td>19.5 TFLOPS</td> <td>9.7 TFLOPS</td> <td>N/A</td> <td>624 TOPS</td> <td>19.5 TOPS</td> <td>N/A</td> <td>78 TFLOPS</td> <td>312 TFLOPS</td> <td>312 TFLOPS</td> <td>156 TFLOPS</td> <td>19.5 TFLOPS</td> <td>600 GB/sec</td> <td>GA100</td> <td>20736 KB (192 KB × 108)</td> <td>40960 KB</td> <td>400 W</td> <td>826 mm<sup>2</sup></td> <td>54.2 B</td> <td>TSMC N7</td> <td rowspan="2">Q1 2020 </td></tr> <tr> <th>A100 40GB </th> <td><a href="/wiki/Ampere_(microarchitecture)" title="Ampere (microarchitecture)">Ampere</a></td> <td>SXM4</td> <td>6912</td> <td>3456</td> <td>6912</td> <td>N/A</td> <td>1410 MHz</td> <td>2.4 Gbit/s HBM2</td> <td>5120-bit</td> <td>1.52 TB/sec</td> <td>40 GB HBM2</td> <td>19.5 TFLOPS</td> <td>9.7 TFLOPS</td> <td>N/A</td> <td>624 TOPS</td> <td>19.5 TOPS</td> <td>N/A</td> <td>78 TFLOPS</td> <td>312 TFLOPS</td> <td>312 TFLOPS</td> <td>156 TFLOPS</td> <td>19.5 TFLOPS</td> <td>600 GB/sec</td> <td>GA100</td> <td>20736 KB (192 KB × 108)</td> <td>40960 KB</td> <td>400 W</td> <td>826 mm<sup>2</sup></td> <td>54.2 B</td> <td>TSMC N7 </td></tr> <tr> <th>V100 32GB </th> <td><a class="mw-selflink selflink">Volta</a></td> <td>SXM3</td> <td>5120</td> <td>2560</td> <td>N/A</td> <td>5120</td> <td>1530 MHz</td> <td>1.75 Gbit/s HBM2</td> <td>4096-bit</td> <td>900 GB/sec</td> <td>32 GB HBM2</td> <td>15.7 TFLOPS</td> <td>7.8 TFLOPS</td> <td>62 TOPS</td> <td>N/A</td> <td>15.7 TOPS</td> <td>N/A</td> <td>31.4 TFLOPS</td> <td>125 TFLOPS</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>300 GB/sec</td> <td>GV100</td> <td>10240 KB (128 KB × 80)</td> <td>6144 KB</td> <td>350 W</td> <td>815 mm<sup>2</sup></td> <td>21.1 B</td> <td>TSMC 12FFN</td> <td rowspan="2">Q3 2017 </td></tr> <tr> <th>V100 16GB </th> <td><a class="mw-selflink selflink">Volta</a></td> <td>SXM2</td> <td>5120</td> <td>2560</td> <td>N/A</td> <td>5120</td> <td>1530 MHz</td> <td>1.75 Gbit/s HBM2</td> <td>4096-bit</td> <td>900 GB/sec</td> <td>16 GB HBM2</td> <td>15.7 TFLOPS</td> <td>7.8 TFLOPS</td> <td>62 TOPS</td> <td>N/A</td> <td>15.7 TOPS</td> <td>N/A</td> <td>31.4 TFLOPS</td> <td>125 TFLOPS</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>300 GB/sec</td> <td>GV100</td> <td>10240 KB (128 KB × 80)</td> <td>6144 KB</td> <td>300 W</td> <td>815 mm<sup>2</sup></td> <td>21.1 B</td> <td>TSMC 12FFN </td></tr> <tr> <th>P100 </th> <td><a href="/wiki/Pascal_(microarchitecture)" title="Pascal (microarchitecture)">Pascal</a></td> <td>SXM/SXM2</td> <td>N/A</td> <td>1792</td> <td>3584</td> <td>N/A</td> <td>1480 MHz</td> <td>1.4 Gbit/s HBM2</td> <td>4096-bit</td> <td>720 GB/sec</td> <td>16 GB HBM2</td> <td>10.6 TFLOPS</td> <td>5.3 TFLOPS</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>21.2 TFLOPS</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>N/A</td> <td>160 GB/sec</td> <td>GP100</td> <td>1344 KB (24 KB × 56)</td> <td>4096 KB</td> <td>300 W</td> <td>610 mm<sup>2</sup></td> <td>15.3 B</td> <td>TSMC 16FF+</td> <td>Q2 2016 </td></tr></tbody></table></div><div style="clear:both"></div> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Volta_(microarchitecture)&action=edit&section=5" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/List_of_eponyms_of_Nvidia_GPU_microarchitectures" title="List of eponyms of Nvidia GPU microarchitectures">List of eponyms of Nvidia GPU microarchitectures</a></li> <li><a href="/wiki/List_of_Nvidia_graphics_processing_units" title="List of Nvidia graphics processing units">List of Nvidia graphics processing units</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Volta_(microarchitecture)&action=edit&section=6" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist reflist-columns references-column-width" style="column-width: 30em;"> <ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation news cs1"><a rel="nofollow" class="external text" href="https://tsdr.uspto.gov/#caseNumber=88145204&caseType=SERIAL_NO&searchType=statusSearch">"Nvidia Volta Trademark Status"</a>. <a href="/wiki/United_States_Patent_and_Trademark_Office" title="United States Patent and Trademark Office">United_States_Patent_and_Trademark_Office</a>. 14 August 2023<span class="reference-accessdate">. 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navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Nvidia" title="Template:Nvidia"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Nvidia" title="Template talk:Nvidia"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Nvidia" title="Special:EditPage/Template:Nvidia"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Nvidia" style="font-size:114%;margin:0 4em"><a href="/wiki/Nvidia" title="Nvidia">Nvidia</a></div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks mw-collapsible mw-collapsed navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="GeForce_(List_of_GPUs)" style="font-size:114%;margin:0 4em"><a href="/wiki/GeForce" title="GeForce">GeForce</a> <small>(<a href="/wiki/List_of_Nvidia_graphics_processing_units" title="List of Nvidia graphics processing units">List of GPUs</a>)</small></div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Fixed pixel pipeline</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="Pre-GeForce" scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_Nvidia_graphics_processing_units#Pre-GeForce" title="List of Nvidia graphics processing units">Pre-GeForce</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"><div class="hlist"> <ul><li><a href="/wiki/NV1" title="NV1">NV1</a></li> <li><a href="/wiki/NV2" class="mw-redirect" title="NV2">NV2</a></li></ul> </div> <div class="hlist"> <ul><li><a href="/wiki/RIVA_128" title="RIVA 128">RIVA 128</a></li> <li><a href="/wiki/RIVA_TNT" title="RIVA TNT">RIVA TNT</a></li> <li><a href="/wiki/RIVA_TNT2" title="RIVA TNT2">TNT2</a></li></ul> </div></div></td></tr></tbody></table><div> <ul><li> <a href="/wiki/GeForce_256" title="GeForce 256">GeForce 256</a></li> <li><a href="/wiki/GeForce_2_series" title="GeForce 2 series">2</a></li> <li><a href="/wiki/GeForce_4_series" title="GeForce 4 series">4 MX</a></li></ul></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Vertex_shader" class="mw-redirect" title="Vertex shader">Vertex</a> and <a href="/wiki/Pixel_shader" class="mw-redirect" title="Pixel shader">pixel</a> shaders</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <li><a href="/wiki/GeForce_3_series" title="GeForce 3 series">GeForce 3</a></li> <li><a href="/wiki/GeForce_4_series" title="GeForce 4 series">4 Ti</a></li> <li><a href="/wiki/GeForce_FX_series" title="GeForce FX series">FX</a></li> <li><a href="/wiki/GeForce_6_series" title="GeForce 6 series">6</a></li> <li><a href="/wiki/GeForce_7_series" title="GeForce 7 series">7</a></li> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Unified_Shader_Model" class="mw-redirect" title="Unified Shader Model">Unified shaders</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/GeForce_8_series" title="GeForce 8 series">GeForce 8</a></li> <li><a href="/wiki/GeForce_9_series" title="GeForce 9 series">9</a></li> <li><a href="/wiki/GeForce_100_series" title="GeForce 100 series">100</a></li> <li><a href="/wiki/GeForce_200_series" title="GeForce 200 series">200</a></li> <li><a href="/wiki/GeForce_300_series" title="GeForce 300 series">300</a></li> <li><a href="/wiki/GeForce_400_series" title="GeForce 400 series">400</a></li> <li><a href="/wiki/GeForce_500_series" title="GeForce 500 series">500</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Unified shaders & <a href="/wiki/Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/GeForce_600_series" title="GeForce 600 series">GeForce 600</a></li> <li><a href="/wiki/GeForce_700_series" title="GeForce 700 series">700</a></li> <li><a href="/wiki/GeForce_800M_series" title="GeForce 800M series">800M</a></li> <li><a href="/wiki/GeForce_900_series" title="GeForce 900 series">900</a></li> <li><a href="/wiki/GeForce_10_series" title="GeForce 10 series">10</a></li> <li><a href="/wiki/GeForce_16_series" title="GeForce 16 series">16</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Ray_tracing_(graphics)" title="Ray tracing (graphics)">Ray tracing</a> & tensor cores</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/GeForce_20_series" title="GeForce 20 series">GeForce 20</a></li> <li><a href="/wiki/GeForce_30_series" title="GeForce 30 series">30</a></li> <li><a href="/wiki/GeForce_40_series" title="GeForce 40 series">40</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr><tr><td colspan="2" class="navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks mw-collapsible mw-collapsed navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Software_and_technologies" style="font-size:114%;margin:0 4em">Software and technologies</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Multimedia acceleration</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Nvidia_NVENC" title="Nvidia NVENC">NVENC</a> (video encoding)</li> <li><a href="/wiki/Nvidia_NVDEC" title="Nvidia NVDEC">NVDEC</a> (video decoding)</li> <li><a href="/wiki/Nvidia_PureVideo" title="Nvidia PureVideo">PureVideo</a> (video decoding)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Software</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Cg_(programming_language)" title="Cg (programming language)">Cg</a> (shading language)</li> <li><a href="/wiki/CUDA" title="CUDA">CUDA</a></li> <li><a href="/wiki/Nvidia_GameWorks" title="Nvidia GameWorks">Nvidia GameWorks</a> <ul><li><a href="/wiki/OptiX" title="OptiX">OptiX</a> (ray tracing API)</li> <li><a href="/wiki/PhysX" title="PhysX">PhysX</a> (physics SDK)</li></ul></li> <li><a href="/wiki/Nvidia_Omniverse" title="Nvidia Omniverse">Nvidia Omniverse</a> (3D graphics)</li> <li><a href="/wiki/Nvidia_RTX" title="Nvidia RTX">Nvidia RTX</a> (ray tracing platform)</li> <li><a href="/wiki/Nvidia_System_Tools" title="Nvidia System Tools">Nvidia System Tools</a></li> <li><a href="/wiki/VDPAU" title="VDPAU">VDPAU</a> (video decode API)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Technologies</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Nvidia_3D_Vision" title="Nvidia 3D Vision">Nvidia 3D Vision</a> (stereo 3D)</li> <li><a href="/wiki/Nvidia_G-Sync" title="Nvidia G-Sync">Nvidia G-Sync</a> (variable refresh rate)</li> <li><a href="/wiki/Nvidia_Optimus" title="Nvidia Optimus">Nvidia Optimus</a> (GPU switching)</li> <li><a href="/wiki/Nvidia_Surround" class="mw-redirect" title="Nvidia Surround">Nvidia Surround</a> (multi-monitor)</li> <li><a href="/wiki/Mobile_PCI_Express_Module" title="Mobile PCI Express Module">MXM</a> (module/socket)</li> <li><a href="/wiki/SXM_(socket)" title="SXM (socket)">SXM</a> (module/socket)</li> <li><a href="/wiki/NVLink" title="NVLink">NVLink</a> (protocol)</li> <li><a href="/wiki/Scalable_Link_Interface" title="Scalable Link Interface">Scalable Link Interface</a> (multi-GPU)</li> <li><a href="/wiki/TurboCache" title="TurboCache">TurboCache</a> (framebuffer in system memory)</li> <li><a href="/wiki/Video_Super_Resolution" title="Video Super Resolution">Video Super Resolution</a> (live video upscaling)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">GPU microarchitectures</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Celsius_(microarchitecture)" title="Celsius (microarchitecture)">Celsius</a></li> <li><a href="/wiki/Kelvin_(microarchitecture)" title="Kelvin (microarchitecture)">Kelvin</a></li> <li><a href="/wiki/Rankine_(microarchitecture)" title="Rankine (microarchitecture)">Rankine</a></li> <li><a href="/wiki/Curie_(microarchitecture)" title="Curie (microarchitecture)">Curie</a></li> <li><a href="/wiki/Tesla_(microarchitecture)" title="Tesla (microarchitecture)">Tesla</a></li> <li><a href="/wiki/Fermi_(microarchitecture)" title="Fermi (microarchitecture)">Fermi</a></li> <li><a href="/wiki/Kepler_(microarchitecture)" title="Kepler (microarchitecture)">Kepler</a></li> <li><a href="/wiki/Maxwell_(microarchitecture)" title="Maxwell (microarchitecture)">Maxwell</a></li> <li><a href="/wiki/Pascal_(microarchitecture)" title="Pascal (microarchitecture)">Pascal</a></li> <li><a class="mw-selflink selflink">Volta</a></li> <li><a href="/wiki/Turing_(microarchitecture)" title="Turing (microarchitecture)">Turing</a></li> <li><a href="/wiki/Ampere_(microarchitecture)" title="Ampere (microarchitecture)">Ampere</a></li> <li><a href="/wiki/Hopper_(microarchitecture)" title="Hopper (microarchitecture)">Hopper</a></li> <li><a href="/wiki/Ada_Lovelace_(microarchitecture)" title="Ada Lovelace (microarchitecture)">Ada Lovelace</a></li> <li><a href="/wiki/Blackwell_(microarchitecture)" title="Blackwell (microarchitecture)">Blackwell</a></li> <li><a href="/wiki/Rubin_(microarchitecture)" title="Rubin (microarchitecture)">Rubin</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr><tr><td colspan="2" class="navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks mw-collapsible mw-collapsed navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Other_products" style="font-size:114%;margin:0 4em">Other products</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Graphics <a href="/wiki/Workstation" title="Workstation">Workstation</a> cards</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Quadro" title="Quadro">Nvidia Quadro</a> <ul><li><a href="/wiki/Nvidia_Quadro_Plex" title="Nvidia Quadro Plex">Quadro Plex</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Nvidia_Tesla" title="Nvidia Tesla">Nvidia Tesla</a></li> <li><a href="/wiki/Nvidia_DGX" title="Nvidia DGX">DGX</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Video_game_console" title="Video game console">Console</a> components</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Xbox_(console)#Technical_specifications" title="Xbox (console)">NV2A</a> <span style="font-size:85%;">(<a href="/wiki/Xbox_(console)" title="Xbox (console)">Xbox</a>)</span></li> <li><a href="/wiki/RSX_Reality_Synthesizer" title="RSX Reality Synthesizer">RSX 'Reality Synthesizer'</a> <span style="font-size:85%;">(<a href="/wiki/PlayStation_3" title="PlayStation 3">PlayStation 3</a>)</span></li> <li><a href="/wiki/Tegra#Tegra_X1" title="Tegra">Tegra NX-SoC</a> <span style="font-size:85%;">(<a href="/wiki/Nintendo_Switch" title="Nintendo Switch">Nintendo Switch</a>)</span></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Nvidia Shield</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Shield_Portable" class="mw-redirect" title="Shield Portable">Shield Portable</a></li> <li><a href="/wiki/Shield_Tablet" class="mw-redirect" title="Shield Tablet">Shield Tablet</a></li> <li><a href="/wiki/Shield_Android_TV" class="mw-redirect" title="Shield Android TV">Shield Android TV</a></li> <li><a href="/wiki/GeForce_Now" title="GeForce Now">GeForce Now</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/System_on_a_chip" title="System on a chip">SoCs</a> and embedded</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/GoForce" title="GoForce">GoForce</a></li> <li><a href="/wiki/Nvidia_Drive" title="Nvidia Drive">Drive</a></li> <li><a href="/wiki/Nvidia_Jetson" title="Nvidia Jetson">Jetson</a></li> <li><a href="/wiki/Tegra" title="Tegra">Tegra</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Central_processing_unit" title="Central processing unit">CPUs</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Project_Denver" title="Project Denver">Project Denver</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Computer <a href="/wiki/Chipset" title="Chipset">chipsets</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Comparison_of_Nvidia_chipsets" class="mw-redirect" title="Comparison of Nvidia chipsets">nForce</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr><tr><td colspan="2" class="navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks mw-collapsible mw-collapsed navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Company" style="font-size:114%;margin:0 4em">Company</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Key people</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Jensen_Huang" title="Jensen Huang">Jen-Hsun Huang</a></li> <li><a href="/wiki/Chris_Malachowsky" title="Chris Malachowsky">Chris Malachowsky</a></li> <li><a href="/wiki/Curtis_Priem" title="Curtis Priem">Curtis Priem</a></li> <li><a href="/wiki/David_Kirk_(scientist)" title="David Kirk (scientist)">David Kirk</a></li> <li><a href="/wiki/Bill_Dally" title="Bill Dally">Bill Dally</a></li> <li>Debora Shoquist</li> <li>Ranga Jayaraman</li> <li>Jonah M. Alben</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Acquisitions</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/3dfx" title="3dfx">3dfx Interactive</a></li> <li><a href="/wiki/Ageia" title="Ageia">Ageia</a></li> <li><a href="/wiki/Acer_Laboratories_Incorporated" class="mw-redirect" title="Acer Laboratories Incorporated">ULi</a></li> <li><a href="/wiki/Bright_Computing" title="Bright Computing">Bright Computing</a></li> <li><a href="/wiki/Cumulus_Networks" title="Cumulus Networks">Cumulus Networks</a></li> <li><a href="/wiki/DeepMap" title="DeepMap">DeepMap</a></li> <li><a href="/wiki/Icera" title="Icera">Icera</a></li> <li><a href="/wiki/Mellanox_Technologies" title="Mellanox Technologies">Mellanox Technologies</a></li> <li><a href="/wiki/Mental_Images" title="Mental Images">Mental Images</a></li> <li><a href="/wiki/PortalPlayer" title="PortalPlayer">PortalPlayer</a></li> <li>Exluna</li> <li>MediaQ</li> <li>Stexar</li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr></tbody></table></div> <!-- NewPP limit report Parsed by mw‐web.codfw.main‐f69cdc8f6‐4fxvw Cached time: 20241122151742 Cache expiry: 2592000 Reduced expiry: false Complications: [vary‐revision‐sha1, show‐toc] CPU time usage: 0.645 seconds Real time usage: 0.755 seconds Preprocessor visited node count: 2967/1000000 Post‐expand include size: 123069/2097152 bytes Template argument size: 2451/2097152 bytes Highest expansion depth: 11/100 Expensive parser function count: 1/500 Unstrip recursion depth: 1/20 Unstrip post‐expand size: 126115/5000000 bytes Lua time usage: 0.346/10.000 seconds Lua memory usage: 5678206/52428800 bytes Number of Wikibase entities loaded: 0/400 --> <!-- Transclusion expansion time report (%,ms,calls,template) 100.00% 637.929 1 -total 48.20% 307.493 2 Template:Reflist 26.88% 171.498 16 Template:Cite_news 18.22% 116.206 1 Template:Nvidia 17.84% 113.780 1 Template:Navbox_with_collapsible_groups 13.33% 85.058 18 Template:Cite_web 13.01% 83.011 1 Template:Short_description 12.89% 82.218 5 Template:Navbox 9.64% 61.509 1 Template:Infobox_GPU 8.79% 56.051 1 Template:Infobox --> <!-- Saved in parser cache with key enwiki:pcache:idhash:42312620-0!canonical and timestamp 20241122151742 and revision id 1253162382. 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