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<!DOCTYPE html> <html lang="en"> <head> <meta content="text/html; charset=utf-8" http-equiv="content-type"/> <title>Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs</title>  <meta content="width=device-width, initial-scale=1, shrink-to-fit=no" name="viewport"/> <link href="https://cdn.jsdelivr.net/npm/bootstrap@5.3.0/dist/css/bootstrap.min.css" rel="stylesheet" type="text/css"/> <link href="/static/browse/0.3.4/css/ar5iv.0.7.9.min.css" rel="stylesheet" type="text/css"/> <link href="/static/browse/0.3.4/css/ar5iv-fonts.0.7.9.min.css" rel="stylesheet" type="text/css"/> <link href="/static/browse/0.3.4/css/latexml_styles.css" rel="stylesheet" type="text/css"/> <script src="https://cdn.jsdelivr.net/npm/bootstrap@5.3.0/dist/js/bootstrap.bundle.min.js"></script> <script src="https://cdnjs.cloudflare.com/ajax/libs/html2canvas/1.3.3/html2canvas.min.js"></script> <script src="/static/browse/0.3.4/js/addons_new.js"></script> <script src="/static/browse/0.3.4/js/feedbackOverlay.js"></script> <meta content=" 3DIC, Design Space Exploration (DSE), Pre-RTL Design, Thermal Simulation, Microfluidic Cooling " lang="en" name="keywords"/> <base href="/html/2503.07297v1/"/></head> <body> <nav class="ltx_page_navbar"> <nav class="ltx_TOC"> <ol class="ltx_toclist"> <li class="ltx_tocentry ltx_tocentry_section"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S1" title="In Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref">I </span><span class="ltx_text ltx_font_smallcaps">Introduction</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_section"> <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2" title="In Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref">II </span><span class="ltx_text ltx_font_smallcaps">Background & Related Works</span></span></a> <ol class="ltx_toclist ltx_toclist_section"> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2.SS1" title="In II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">II-A</span> </span><span class="ltx_text ltx_font_italic">Selection of Performance Model</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2.SS2" title="In II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">II-B</span> </span><span class="ltx_text ltx_font_italic">Selection of Power Model</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2.SS3" title="In II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">II-C</span> </span><span class="ltx_text ltx_font_italic">Selection of Thermal Model</span></span></a></li> </ol> </li> <li class="ltx_tocentry ltx_tocentry_section"> <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3" title="In Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref">III </span><span class="ltx_text ltx_font_smallcaps">The Proposed End-to-End Thermal-Aware Framework Cool-3D</span></span></a> <ol class="ltx_toclist ltx_toclist_section"> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS1" title="In III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">III-A</span> </span><span class="ltx_text ltx_font_italic">Framework Overview</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS2" title="In III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">III-B</span> </span><span class="ltx_text ltx_font_italic">Tool Fusion for Rapid DSE</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS3" title="In III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">III-C</span> </span><span class="ltx_text ltx_font_italic">Microfluidic Cooling Support with Configuration</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS4" title="In III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">III-D</span> </span><span class="ltx_text ltx_font_italic">Hyper-Dimensional Configurable Design Space</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS5" title="In III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">III-E</span> </span><span class="ltx_text ltx_font_italic">Extension Interface for Non-Parameterizable Customization</span></span></a></li> </ol> </li> <li class="ltx_tocentry ltx_tocentry_section"> <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4" title="In Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref">IV </span><span class="ltx_text ltx_font_smallcaps">Experiments and Results</span></span></a> <ol class="ltx_toclist ltx_toclist_section"> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.SS1" title="In IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">IV-A</span> </span><span class="ltx_text ltx_font_italic">Experimental Setup</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.SS2" title="In IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">IV-B</span> </span><span class="ltx_text ltx_font_italic">Baseline Analysis</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.SS3" title="In IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">IV-C</span> </span><span class="ltx_text ltx_font_italic">Case Study I - Altering Stacking Orders</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.SS4" title="In IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">IV-D</span> </span><span class="ltx_text ltx_font_italic">Case Study II - Applying Microfluidic Cooling</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.SS5" title="In IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">IV-E</span> </span><span class="ltx_text ltx_font_italic">Case Study III - Applying Microarchitectural Changes</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_subsection"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.SS6" title="In IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref"><span class="ltx_text">IV-F</span> </span><span class="ltx_text ltx_font_italic">Discussions</span></span></a></li> </ol> </li> <li class="ltx_tocentry ltx_tocentry_section"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S5" title="In Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref">V </span><span class="ltx_text ltx_font_smallcaps">Conclusions and Future Work</span></span></a></li> <li class="ltx_tocentry ltx_tocentry_section"><a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S6" title="In Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_title"><span class="ltx_tag ltx_tag_ref">VI </span><span class="ltx_text ltx_font_smallcaps">Acknowledgment</span></span></a></li> </ol></nav> </nav> <div class="ltx_page_main"> <div class="ltx_page_content"> <article class="ltx_document ltx_authors_1line"> <h1 class="ltx_title ltx_title_document">Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs</h1> <div class="ltx_authors"> <span class="ltx_creator ltx_role_author"> <span class="ltx_personname">Runxi Wang, Ziheng Wang, Ting Lin, Jacob M. Raby, Mircea R. Stan, and Xinfei Guo </span><span class="ltx_author_notes">This work was supported in part by the National Science Foundation of China under Grant No. 62201340 and by the Semiconductor Research Corporation (SRC) JUMP Center for Research on Intelligent Storage and Procesing-in-memory (CRISP).Runxi Wang, Ziheng Wang, Ting Lin, Jacob M. Raby and Xinfei Guo are with the University of Michigan – Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University, Shanghai 200240, China (E-mails: {wangrunxi, wangziheng1, ting_lin, jraby8160, xinfei.guo}@sjtu.edu.cn).Mircea R. Stan is with the Department of Electrical and Computer Engineering, University of Virginia, Charlottesville, VA 22903, USA (E-mail: mircea@virginia.edu).Corresponding author: Xinfei Guo.</span></span> </div> <div class="ltx_abstract"> <h6 class="ltx_title ltx_title_abstract">Abstract</h6> <p class="ltx_p" id="id7.id1">The rapid advancement of three-dimensional integrated circuits (3DICs) has heightened the need for early-phase design space exploration (DSE) to minimize design iterations and unexpected challenges. Emphasizing the pre-register-transfer level (Pre-RTL) design phase is crucial for reducing trial-and-error costs. However, 3DIC design introduces additional complexities due to thermal constraints and an expanded design space resulting from vertical stacking and various cooling strategies. Despite this need, existing Pre-RTL DSE tools for 3DICs remain scarce, with available solutions often lacking comprehensive design options and full customization support. To bridge this gap, we present Cool-3D, an end-to-end, thermal-aware framework for 3DIC design that integrates mainstream architectural-level simulators, including gem5, McPAT, and HotSpot 7.0, with advanced cooling models. Cool-3D enables broad and fine-grained design space exploration, built-in microfluidic cooling support for thermal analysis, and an extension interface for non-parameterizable customization, allowing designers to model and optimize 3DIC architectures with greater flexibility and accuracy. To validate the Cool-3D framework, we conduct three case studies demonstrating its ability to model various hardware design options and accurately capture thermal behaviors. Cool-3D serves as a foundational framework that not only facilitates comprehensive 3DIC design space exploration but also enables future innovations in 3DIC architecture, cooling strategies, and optimization techniques. The entire framework, along with the experimental data, is in the process of being released on GitHub<span class="ltx_note ltx_role_footnote" id="footnote1"><sup class="ltx_note_mark">1</sup><span class="ltx_note_outer"><span class="ltx_note_content"><sup class="ltx_note_mark">1</sup><span class="ltx_tag ltx_tag_note">1</span>The GitHub link is available on <a class="ltx_ref ltx_url ltx_font_typewriter" href="https://github.com/iCAS-SJTU/Cool-3D." title="">https://github.com/iCAS-SJTU/Cool-3D.</a></span></span></span>.</p> </div> <div class="ltx_keywords"> <h6 class="ltx_title ltx_title_keywords">Index Terms: </h6> 3DIC, Design Space Exploration (DSE), Pre-RTL Design, Thermal Simulation, Microfluidic Cooling </div> <section class="ltx_section" id="S1"> <h2 class="ltx_title ltx_title_section"> <span class="ltx_tag ltx_tag_section">I </span><span class="ltx_text ltx_font_smallcaps" id="S1.1.1">Introduction</span> </h2> <div class="ltx_para" id="S1.p1"> <p class="ltx_p" id="S1.p1.1">T he slowing down of Moore’s Law has brought two-dimensional (2D) chip evolution to a plateau in energy efficiency and performance. This has led to an increased interest in three-dimensional integrated circuits (3DICs), where transistor density is enhanced by stacking dies vertically. However, heat dissipation and the associated thermal effects <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib1" title="">1</a>]</cite> become a major challenge in 3DIC development. In 3DICs, vertical stacking leads to heat accumulation within the dies, primarily due to the limited heat dissipation area and thermal coupling between layers. To address this challenge, various 3DIC-specific cooling techniques have been proposed. Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S1.T1" title="TABLE I ‣ I Introduction ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">I</span></a> lists and compares some of these techniques. Air cooling and static heatsink solutions, which are widely used for 2D chips, are not efficient enough to deal with the internally accumulated heat in a stack. Tailored for 3DICs, through-silicon-via (TSV) based cooling enhances the heat transfer across dies but its efficiency depends on dedicated placement of TSVs and still relies on other cooling medium to dissipate the heat <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib2" title="">2</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib3" title="">3</a>]</cite>. A promising cooling method for 3DICs is microchannel or microfluidic cooling <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib3" title="">3</a>]</cite>. It demonstrates strong compatibility with 3D structures and has proven effective in lowering overall chip temperatures <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib4" title="">4</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib5" title="">5</a>]</cite>. This is achieved by integrating microchannels between dies, allowing liquid coolant to circulate from an external pump as shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S1.F1" title="Figure 1 ‣ I Introduction ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">1</span></a>. The challenge of this cooling method is to have well-designed microchannel patterns specific to each 3DIC to effectively carry the heat, which is a significant design step in the 3DIC design space. In addition to novel cooling strategies, optimizing the stacking configuration is another key approach to enhancing heat dissipation. For instance, in 3DICs handling compute-intensive workloads, placing processor core dies on the top layer, close to the heatsink, can help improve thermal management, this being another design option that needs dedicated tuning during the 3DIC designing process. </p> </div> <figure class="ltx_table" id="S1.T1"> <figcaption class="ltx_caption"><span class="ltx_tag ltx_tag_table">TABLE I: </span>Comparisons of 3DIC cooling methods</figcaption> <div class="ltx_inline-block ltx_align_center ltx_transformed_outer" id="S1.T1.1" style="width:433.6pt;height:127.8pt;vertical-align:-0.0pt;"><span class="ltx_transformed_inner" style="transform:translate(33.5pt,-9.9pt) scale(1.18295643448805,1.18295643448805) ;"> <table class="ltx_tabular ltx_guessed_headers ltx_align_middle" id="S1.T1.1.1"> <tbody class="ltx_tbody"> <tr class="ltx_tr" id="S1.T1.1.1.1.1"> <td class="ltx_td ltx_border_tt" id="S1.T1.1.1.1.1.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S1.T1.1.1.1.1.2">Heat Dissipation</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S1.T1.1.1.1.1.3" rowspan="2"><span class="ltx_text" id="S1.T1.1.1.1.1.3.1">Limits</span></th> </tr> <tr class="ltx_tr" id="S1.T1.1.1.2.2"> <td class="ltx_td" id="S1.T1.1.1.2.2.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S1.T1.1.1.2.2.2">Efficiency</th> </tr> <tr class="ltx_tr" id="S1.T1.1.1.3.3"> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T1.1.1.3.3.1">Air Cooling</td> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T1.1.1.3.3.2">-</td> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T1.1.1.3.3.3">large area needed</td> </tr> <tr class="ltx_tr" id="S1.T1.1.1.4.4"> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T1.1.1.4.4.1">Static Heat Sink</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T1.1.1.4.4.2">+</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T1.1.1.4.4.3">limited by heat transfer inside stacks</td> </tr> <tr class="ltx_tr" id="S1.T1.1.1.5.5"> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T1.1.1.5.5.1">TSV Cooling</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T1.1.1.5.5.2">+</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T1.1.1.5.5.3">special TSV arrangement needed</td> </tr> <tr class="ltx_tr" id="S1.T1.1.1.6.6"> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T1.1.1.6.6.1">Microfluidic Cooling</td> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T1.1.1.6.6.2">++</td> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T1.1.1.6.6.3">special cooling pattern needed</td> </tr> </tbody> </table> </span></div> </figure> <figure class="ltx_figure" id="S1.F1"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="271" id="S1.F1.g1" src="x1.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 1: </span>An illustration of working mechanism of microfluidic cooling applied in 3DICs.</figcaption> </figure> <div class="ltx_para" id="S1.p2"> <p class="ltx_p" id="S1.p2.1">While such diverse solutions to combat heat dissipation in 3DICs span multiple disciplines, from materials science, physics, thermodynamics, mathematics, to electronics, circuits and architecture, the advancement in each field has been separate from each other, partly due to the already complex and lengthy chip design cycle and missing simulation frameworks that connect the dots. As a result, thermal management, such as the cooling strategies and stacking policies mentioned above, has emerged as an additional and separate dimension in the 3DIC design space, introducing more design variables into an already intricate workflow. The extended design timeline and expanded design space inherent to 3D stacking further increase the cost of trial-and-error during the design and testing phases. One way to mitigate this challenge is through early-stage design space exploration (DSE) using pre-register-transfer-level (Pre-RTL) modeling and simulation, a step that becomes increasingly important and has already proven effective in 2D-based design <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib6" title="">6</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib7" title="">7</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib8" title="">8</a>]</cite>. Hardware modeling in Pre-RTL modeling and simulation is relatively coarse-grained, as it omits RTL-level details of the design. Unlike most formal design and verification flows using industry-standard Electronic Design Automation (EDA) tools, which require the transistor-level or gate-level details of a finalized design, Pre-RTL simulation operates with only a design concept model—such as major functional blocks and basic interconnections. Despite being somewhat abstract, such a high-level model can generate useful predictions of system behavior, power consumption, temperature, and other relevant metrics. This kind of early-phase DSE step has also been introduced in some commercial 3DIC EDA tools such as Synopsys 3DIC Compiler which supports early architecture exploration without RTL availability. This further highlights the significance of integrating the Pre-RTL DSE step into the 3DIC design flow. However, architecture design in 3DICs involve scattered design options spanning microarchitectural details, architectural hierarchy, 3D stacking configurations, and even cooling strategies. To accommodate these complexities, a Pre-RTL DSE tool framework must support a broad, hierarchical, and granularity-reconfigurable design space, ensuring comprehensive modeling of these various design options. In 3DICs, factors such as microarchitectural details (e.g., memory hierarchy), architectural choices (e.g., instruction set architecture (ISA)), floorplanning policies, die stacking strategies, and cooling methods all influence heat generation and dissipation. Therefore, given a “design outline”, it is essential to provide sufficient design options for exploring potential optimizations. Additionally, designers may need to integrate fully customized modules into large-scale designs and assess their feasibility in an agile manner. To support this, the design framework should offer an extension interface that allows seamless integration of custom modules. </p> </div> <div class="ltx_para" id="S1.p3"> <p class="ltx_p" id="S1.p3.1">Existing thermal-aware Pre-RTL DSE tools or toolchains, however, pay little focus on 3DICs or miss key elements that enable true DSE. For example, HotSniper <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib9" title="">9</a>]</cite> and the work in <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib10" title="">10</a>]</cite> only apply to 2DICs, however, they do open a way to chain mainstream specialized simulators into an end-to-end toolchain. Emerging 3DIC-oriented toolchains such as <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib11" title="">11</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib12" title="">12</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib13" title="">13</a>]</cite>, have adopted a similar approach by integrating existing simulators. Nevertheless, they either lack configurability in microarchitectural details or do not account for cooling mechanisms—both of which are critical design considerations as discussed earlier. Additionally, these toolchains fail to support flexible customization through a uniform configuration framework, showing a lack of full tool-integration and limiting their adaptability to diverse 3DIC design needs.</p> </div> <div class="ltx_para" id="S1.p4"> <p class="ltx_p" id="S1.p4.1">When it comes to the simulators that serve as building blocks for each toolchain, they are typically designed to estimate a specific set of metrics. For example, performance simulators primarily model system behavior and generate switching activities, while power simulators generate power-related data. While this specialization ensures efficiency and accuracy within their respective domains, it often frustrates designers who require a metric from one tool that depends on the output of another. The primary challenges in integrating multiple simulators into a cohesive toolchain stem from mismatched input-output (I/O) interfaces and diverse runtime environments. In 3DICs, this complexity is further exacerbated by the need for thermal modeling. While existing toolchains enable 3DIC-oriented Pre-RTL DSE to some extent, there remains significant room for improvement in simulator selection and I/O compatibility. Enhancing these aspects can improve prediction accuracy and enable more fine-grained design space exploration. </p> </div> <div class="ltx_para" id="S1.p5"> <p class="ltx_p" id="S1.p5.1">To address the critical heat dissipation challenges in 3DICs, the high cost of the design process, and the growing demand for agile early-phase design exploration, this work introduces Cool-3D, an end-to-end thermal-aware framework. Cool-3D enables early-phase DSE with broad and fine-grained design options, advanced cooling support such as microfluidic cooling, and a user-friendly extension interface for seamless customization. Unlike toolchains that solely link existing tools like “LEGO pieces”, Cool-3D, echoing our earlier proposal <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib14" title="">14</a>]</cite>, enhances each integrated tool with new features, tailored interfaces, and demonstrated effectiveness in assisting early-stage decision-making. Its open-source nature further increases accessibility for the research community, fostering broader adoption and innovation.</p> </div> <figure class="ltx_table" id="S1.T2"> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_table">TABLE II: </span>Comparisons between existing DSE tools for 3DICs and this Cool-3D framework</figcaption> <table class="ltx_tabular ltx_centering ltx_guessed_headers ltx_align_middle" id="S1.T2.17"> <tbody class="ltx_tbody"> <tr class="ltx_tr" id="S1.T2.17.18.1"> <td class="ltx_td ltx_border_tt" id="S1.T2.17.18.1.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S1.T2.17.18.1.2">MOOS <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib11" title="">11</a>]</cite> </th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S1.T2.17.18.1.3">HotGauge <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib12" title="">12</a>]</cite> </th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S1.T2.17.18.1.4">CoMeT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib13" title="">13</a>]</cite> </th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S1.T2.17.18.1.5"><span class="ltx_text ltx_font_bold" id="S1.T2.17.18.1.5.1">This Work</span></th> </tr> <tr class="ltx_tr" id="S1.T2.4.4"> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T2.4.4.5">Tool Integration as a Flow</td> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T2.1.1.1"><svg class="ltx_picture" height="10.02" id="S1.T2.1.1.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T2.2.2.2"><svg class="ltx_picture" height="10.09" id="S1.T2.2.2.2.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T2.3.3.3"><svg class="ltx_picture" height="10.09" id="S1.T2.3.3.3.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_tt" id="S1.T2.4.4.4"><svg class="ltx_picture" height="11.06" id="S1.T2.4.4.4.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S1.T2.17.19.2"> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.19.2.1">Integrated Tools</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.19.2.2">-</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.19.2.3">Sniper+McPAT+3D-ICE</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.19.2.4">Sniper+McPAT+HotSpot</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.19.2.5"><span class="ltx_text ltx_font_bold" id="S1.T2.17.19.2.5.1">gem5+McPAT+HotSpot7.0</span></td> </tr> <tr class="ltx_tr" id="S1.T2.7.7"> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.7.7.4">Unified Input</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.7.7.5">-</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.5.5.1"><svg class="ltx_picture" height="10.02" id="S1.T2.5.5.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.6.6.2"><svg class="ltx_picture" height="10.02" id="S1.T2.6.6.2.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.7.7.3"><svg class="ltx_picture" height="11.06" id="S1.T2.7.7.3.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S1.T2.11.11"> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.11.11.5">3DIC Cooling</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.8.8.1"><svg class="ltx_picture" height="10.02" id="S1.T2.8.8.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.9.9.2"><svg class="ltx_picture" height="10.09" id="S1.T2.9.9.2.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.10.10.3"><svg class="ltx_picture" height="10.02" id="S1.T2.10.10.3.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.11.11.4"><svg class="ltx_picture" height="11.06" id="S1.T2.11.11.4.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S1.T2.14.14"> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.14.14.4">Parameterizable Customization</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.14.14.5">-</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.12.12.1"><svg class="ltx_picture" height="10.09" id="S1.T2.12.12.1.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.13.13.2"><svg class="ltx_picture" height="10.09" id="S1.T2.13.13.2.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.14.14.3"><svg class="ltx_picture" height="11.06" id="S1.T2.14.14.3.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S1.T2.17.17"> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.17.4">Nonparameterizable Customization</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.17.5">-</td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.15.15.1"><svg class="ltx_picture" height="10.02" id="S1.T2.15.15.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.16.16.2"><svg class="ltx_picture" height="10.02" id="S1.T2.16.16.2.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S1.T2.17.17.3"><svg class="ltx_picture" height="11.06" id="S1.T2.17.17.3.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S1.T2.17.20.3"> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T2.17.20.3.1">Target Architecture</td> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T2.17.20.3.2">NoC-based system</td> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T2.17.20.3.3">processors</td> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T2.17.20.3.4">processors+memory</td> <td class="ltx_td ltx_align_center ltx_border_bb ltx_border_t" id="S1.T2.17.20.3.5"><span class="ltx_text ltx_font_bold" id="S1.T2.17.20.3.5.1">processors+memory</span></td> </tr> </tbody> </table> </figure> </section> <section class="ltx_section" id="S2"> <h2 class="ltx_title ltx_title_section"> <span class="ltx_tag ltx_tag_section">II </span><span class="ltx_text ltx_font_smallcaps" id="S2.1.1">Background & Related Works</span> </h2> <div class="ltx_para" id="S2.p1"> <p class="ltx_p" id="S2.p1.1">For rapid and flexible design space exploration in the early design phases, most architects rely on pre-RTL simulators to identify potential design issues and explore better design choices. For example, design works <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib15" title="">15</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib16" title="">16</a>]</cite> employ gem5 <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib17" title="">17</a>]</cite>, ZSim <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib18" title="">18</a>]</cite> and CACTI <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib19" title="">19</a>]</cite> to model and evaluate their designs. These widely-used tools are designed as pre-RTL models and simulators. There also exist many other pre-RTL simulators that offer unique simulation scope and targets <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib20" title="">20</a>]</cite>. The rich ecosystem built around these 2D-based pre-RTL tools, including compiler support, significantly reduces the effort required for architects to customize and extend their simulation frameworks.</p> </div> <div class="ltx_para" id="S2.p2"> <p class="ltx_p" id="S2.p2.1">However, when shifting the focus to 3DICs, a significant gap remains between the need for early-phase design space exploration and the availability of a unified end-to-end flow. The importance of early-phase DSE stems from the increased design complexity and high costs associated with 3DICs. Unlike traditional 2D architectures, 3DICs introduce an expanding design space due to die stacking, making early exploration even more critical. While industry-standard EDA tools provide highly accurate and detailed analyses for completed 3DIC designs, they suffer from long runtimes and require extensive design details upfront. This raises the barrier for early-phase DSE, prolongs the design trial-and-error loop, and ultimately increases development costs. Fortunately, research has emerged on 3DIC-supported pre-RTL thermal simulators and DSE tools. MOOS <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib11" title="">11</a>]</cite> is a DSE framework for network-on-chip (NoC)-based 3D manycore design. It is able to perform thermal-aware optimization, but its applicability is limited and lacks an integrated end-to-end flow. When considering well-integrated flows, HotGauge <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib12" title="">12</a>]</cite> and CoMeT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib13" title="">13</a>]</cite> are recently proposed notable toolchains. HotGauge <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib12" title="">12</a>]</cite>, making use of Sniper <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib21" title="">21</a>]</cite>, McPAT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib22" title="">22</a>]</cite>, and 3D-ICE <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib23" title="">23</a>]</cite>, presents an end-to-end flow to simulate 3DICs but mainly for processor designs. CoMeT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib13" title="">13</a>]</cite>, built on Sniper <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib21" title="">21</a>]</cite>, McPAT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib22" title="">22</a>]</cite>, and HotSpot 6.0 <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib24" title="">24</a>]</cite>, supports 3DICs with both processors and memory stacking. While it offers an integrated flow, it lacks reconfigurability for self-customized designs and does not take consideration of the advanced cooling aspects in 3DICs. Consequently, its design space exploration remains coarse-grained and incomplete, particularly in the thermal dimension. Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S1.T2" title="TABLE II ‣ I Introduction ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">II</span></a> provides a clearer comparison of the key features in these existing 3DIC-oriented toolchains alongside the proposed framework Cool-3D, highlighting its superior reconfigurability and broader design space support.</p> </div> <div class="ltx_para" id="S2.p3"> <p class="ltx_p" id="S2.p3.1">Based on Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S1.T2" title="TABLE II ‣ I Introduction ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">II</span></a>, the integrated tools within each toolchain vary significantly. These tools serve as foundational models and play a crucial role in shaping final design choices. Thus, selecting the appropriate tools requires a well-defined and constructive strategy. The framework requires at least three core abstract models to capture performance, power, and thermal characteristics. Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2.F2" title="Figure 2 ‣ II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">2</span></a> illustrates the interaction between these three models: given a workload and an architecture specification, the flow sequentially generates unit-level interaction data, static/dynamic power consumption, and corresponding temperature variations. This sequential modeling approach has been widely adopted and validated in 2D-based architectural simulations. For instance, HotSniper <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib9" title="">9</a>]</cite>, which targets 2D systems, employs Sniper, McPAT, and HotSpot 6.0 as its performance, power, and thermal models, respectively. Similarly, the 2D-based framework in <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib10" title="">10</a>]</cite> integrates gem5, McPAT, and HotSpot 6.0 as its key modeling components. The success and widespread adoption of such flows in the architecture community suggest that this methodology can be extended beyond 2D chips. However, selecting the appropriate tools for each model involves navigating a diverse landscape of available simulators. For example, gem5 can be used as an alternative to Sniper as a performance model due to its unique features. The choice ultimately depends on the targeted architecture and the specific capabilities required for simulation and DSE. The following sections will analyze the differences among mainstream computer architecture simulators used for performance, power, and thermal modeling and justify the selection criteria for the proposed Cool-3D framework. This selection process constitutes a key component of our proposed design flow.</p> </div> <figure class="ltx_figure" id="S2.F2"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="272" id="S2.F2.g1" src="x2.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 2: </span>Overview of an end-to-end thermal simulation toolchain, comprising a performance model that generates switching activities, a power model that estimates dynamic (dyn. pow.) and static power (stat. pow.), and a thermal model that predicts heat generation.</figcaption> </figure> <section class="ltx_subsection" id="S2.SS1"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S2.SS1.5.1.1">II-A</span> </span><span class="ltx_text ltx_font_italic" id="S2.SS1.6.2">Selection of Performance Model</span> </h3> <div class="ltx_para" id="S2.SS1.p1"> <p class="ltx_p" id="S2.SS1.p1.1">Gem5 <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib17" title="">17</a>]</cite> and Sniper <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib21" title="">21</a>]</cite> are two widely used performance simulators in computer architecture research. As shown in Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2.T3" title="TABLE III ‣ II-A Selection of Performance Model ‣ II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">III</span></a>, their primary distinction lies in their modeling methodologies. Sniper employs an interval simulation approach, which reduces modeling time, whereas gem5, as an event-driven simulator, tracks events cycle by cycle <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib20" title="">20</a>]</cite>. This makes gem5 more accurate than Sniper but at the expense of longer simulation times. As the starting point of the 3DIC simulation toolchain, the performance model must provide detailed output statistics to enable subsequent stages to capture richer information, leading to more accurate thermal predictions. Thus, finer simulation granularity is a key criterion for selecting the performance model. Compared to Sniper, gem5 offers more detailed statistics for individual units. Furthermore, for architects requiring the integration of customized modules, gem5 provides a more flexible and fine-grained extension interface. Considering both accuracy and extensibility, gem5 has been selected as the most suitable choice for our framework.</p> </div> <figure class="ltx_table" id="S2.T3"> <figcaption class="ltx_caption"><span class="ltx_tag ltx_tag_table">TABLE III: </span>Feature Comparisons between gem5 and Sniper</figcaption> <div class="ltx_inline-block ltx_align_center ltx_transformed_outer" id="S2.T3.14" style="width:433.6pt;height:101.3pt;vertical-align:-0.0pt;"><span class="ltx_transformed_inner" style="transform:translate(24.2pt,-5.6pt) scale(1.12551220458875,1.12551220458875) ;"> <table class="ltx_tabular ltx_guessed_headers ltx_align_middle" id="S2.T3.14.14"> <tbody class="ltx_tbody"> <tr class="ltx_tr" id="S2.T3.14.14.15.1"> <td class="ltx_td ltx_border_tt" id="S2.T3.14.14.15.1.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T3.14.14.15.1.2">Accuracy</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T3.14.14.15.1.3">Running</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T3.14.14.15.1.4">Simulation</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T3.14.14.15.1.5">Customization</th> </tr> <tr class="ltx_tr" id="S2.T3.14.14.16.2"> <td class="ltx_td" id="S2.T3.14.14.16.2.1"></td> <th class="ltx_td ltx_th ltx_th_column" id="S2.T3.14.14.16.2.2"></th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T3.14.14.16.2.3">Time</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T3.14.14.16.2.4">Granularity</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T3.14.14.16.2.5">Support</th> </tr> <tr class="ltx_tr" id="S2.T3.5.5.5"> <td class="ltx_td ltx_align_left ltx_border_t" id="S2.T3.5.5.5.6">gem5 <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib17" title="">17</a>]</cite> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T3.1.1.1.1"><svg class="ltx_picture" height="10.72" id="S2.T3.1.1.1.1.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T3.2.2.2.2"><svg class="ltx_picture" height="10.02" id="S2.T3.2.2.2.2.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,5.01)"><g stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g stroke-width="0.7pt"><path d="M 0 -4.53 L 0 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T3.3.3.3.3"><svg class="ltx_picture" height="10.72" id="S2.T3.3.3.3.3.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T3.5.5.5.5"><svg class="ltx_picture" height="10.72" id="S2.T3.4.4.4.4.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> <svg class="ltx_picture" height="10.72" id="S2.T3.5.5.5.5.pic2" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T3.9.9.9"> <td class="ltx_td ltx_align_left" id="S2.T3.9.9.9.5">Sniper <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib21" title="">21</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T3.6.6.6.1"><svg class="ltx_picture" height="5.5" id="S2.T3.6.6.6.1.pic1" overflow="visible" version="1.1" width="10.02"><g transform="translate(0,5.5) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,0.48)"><g color="#FFFFFF" fill="#FFFFFF" stroke="#FFFFFF" stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g fill="#000000" stroke="#000000" stroke-width="0.7pt"><path d="M -4.53 4.53 L 4.53 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T3.7.7.7.2"><svg class="ltx_picture" height="5.5" id="S2.T3.7.7.7.2.pic1" overflow="visible" version="1.1" width="10.02"><g transform="translate(0,5.5) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,0.48)"><g color="#FFFFFF" fill="#FFFFFF" stroke="#FFFFFF" stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g fill="#000000" stroke="#000000" stroke-width="0.7pt"><path d="M -4.53 4.53 L 4.53 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T3.8.8.8.3"><svg class="ltx_picture" height="5.5" id="S2.T3.8.8.8.3.pic1" overflow="visible" version="1.1" width="10.02"><g transform="translate(0,5.5) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,0.48)"><g color="#FFFFFF" fill="#FFFFFF" stroke="#FFFFFF" stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g fill="#000000" stroke="#000000" stroke-width="0.7pt"><path d="M -4.53 4.53 L 4.53 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T3.9.9.9.4"><svg class="ltx_picture" height="10.02" id="S2.T3.9.9.9.4.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,5.01)"><g stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g stroke-width="0.7pt"><path d="M 0 -4.53 L 0 4.53" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T3.14.14.14"> <td class="ltx_td ltx_align_left ltx_border_bb" id="S2.T3.14.14.14.6">Needs of This Work</td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T3.10.10.10.1"><svg class="ltx_picture" height="10.72" id="S2.T3.10.10.10.1.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T3.11.11.11.2"><svg class="ltx_picture" height="5.84" id="S2.T3.11.11.11.2.pic1" overflow="visible" version="1.1" width="10.72"><g transform="translate(0,5.84) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,0.48)"><g color="#FFFFFF" fill="#FFFFFF" stroke="#FFFFFF" stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g fill="#000000" stroke="#000000" stroke-width="1.2pt"><path d="M -4.53 4.53 L 4.53 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T3.12.12.12.3"><svg class="ltx_picture" height="10.72" id="S2.T3.12.12.12.3.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T3.14.14.14.5"><svg class="ltx_picture" height="10.72" id="S2.T3.13.13.13.4.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> <svg class="ltx_picture" height="10.72" id="S2.T3.14.14.14.5.pic2" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> </tr> </tbody> </table> </span></div> </figure> </section> <section class="ltx_subsection" id="S2.SS2"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S2.SS2.5.1.1">II-B</span> </span><span class="ltx_text ltx_font_italic" id="S2.SS2.6.2">Selection of Power Model</span> </h3> <div class="ltx_para" id="S2.SS2.p1"> <p class="ltx_p" id="S2.SS2.p1.1">For power modeling, McPAT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib22" title="">22</a>]</cite> has been widely used in computer architecture research for its power prediction capabilities and configurable support for multicore and manycore processors. It takes microarchitectural details and performance statistics from a performance model and outputs estimates for dynamic, static, and short-circuit power. CACTI <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib19" title="">19</a>]</cite>, another popular power model, specializes in memory and cache modeling. A later version CACTI-3DD <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib25" title="">25</a>]</cite> extends support to 3D-stacked memory, making it particularly relevant for 3DICs. Like McPAT, CACTI derives power and energy estimates from performance model data. Typically, McPAT models processor cores, while CACTI handles memory subsystems, allowing for a comprehensive power analysis of both compute and memory components. Several McPAT variants extend upon the original, as summarized in Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2.T4" title="TABLE IV ‣ II-B Selection of Power Model ‣ II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">IV</span></a>. McPAT-Calib <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib26" title="">26</a>]</cite> integrates microarchitecture simulation, power modeling, and machine learning (ML)-based calibration to refine McPAT’s power estimates. However, its reliance on architecture-specific training data limits its generality for broader design exploration. New features introduced by McPAT-Monolithic <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib27" title="">27</a>]</cite> require FinFET process node libraries and gate-level simulation, diverging from the objectives of Pre-RTL modeling. Given these considerations, McPAT combined with CACTI-3DD offers the most suitable power modeling solution for our work. </p> </div> <figure class="ltx_table" id="S2.T4"> <figcaption class="ltx_caption"><span class="ltx_tag ltx_tag_table">TABLE IV: </span>Feature Comparisons of McPAT, McPAT-calib, and McPAT-Monolithic</figcaption> <div class="ltx_inline-block ltx_align_center ltx_transformed_outer" id="S2.T4.12" style="width:433.6pt;height:110pt;vertical-align:-0.0pt;"><span class="ltx_transformed_inner" style="transform:translate(3.9pt,-1.0pt) scale(1.01821752347481,1.01821752347481) ;"> <table class="ltx_tabular ltx_guessed_headers ltx_align_middle" id="S2.T4.12.12"> <tbody class="ltx_tbody"> <tr class="ltx_tr" id="S2.T4.12.12.13.1"> <td class="ltx_td ltx_border_tt" id="S2.T4.12.12.13.1.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T4.12.12.13.1.2">ML</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T4.12.12.13.1.3">General</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T4.12.12.13.1.4">Pre-RTL</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T4.12.12.13.1.5">Simulation</th> </tr> <tr class="ltx_tr" id="S2.T4.12.12.14.2"> <td class="ltx_td" id="S2.T4.12.12.14.2.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T4.12.12.14.2.2">Assisted</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T4.12.12.14.2.3">Purpose</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T4.12.12.14.2.4">Compatibility</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T4.12.12.14.2.5">Level</th> </tr> <tr class="ltx_tr" id="S2.T4.3.3.3"> <td class="ltx_td ltx_align_left ltx_border_t" id="S2.T4.3.3.3.4">McPAT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib22" title="">22</a>]</cite> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T4.1.1.1.1"><svg class="ltx_picture" height="10.99" id="S2.T4.1.1.1.1.pic1" overflow="visible" version="1.1" width="10.99"><g fill="#000000" stroke="#000000" transform="translate(0,10.99) matrix(1 0 0 -1 0 0) translate(0.97,0) translate(0,0.97)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T4.2.2.2.2"><svg class="ltx_picture" height="11.06" id="S2.T4.2.2.2.2.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T4.3.3.3.3"><svg class="ltx_picture" height="11.06" id="S2.T4.3.3.3.3.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T4.3.3.3.5"><span class="ltx_text ltx_font_bold" id="S2.T4.3.3.3.5.1">Arch-level</span></td> </tr> <tr class="ltx_tr" id="S2.T4.6.6.6"> <td class="ltx_td ltx_align_left" id="S2.T4.6.6.6.4">McPAT-Calib <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib26" title="">26</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T4.4.4.4.1"><svg class="ltx_picture" height="10.09" id="S2.T4.4.4.4.1.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T4.5.5.5.2"><svg class="ltx_picture" height="10.02" id="S2.T4.5.5.5.2.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T4.6.6.6.3"><svg class="ltx_picture" height="10.09" id="S2.T4.6.6.6.3.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T4.6.6.6.5">Arch-level</td> </tr> <tr class="ltx_tr" id="S2.T4.9.9.9"> <td class="ltx_td ltx_align_left" id="S2.T4.9.9.9.4">McPAT-Monolithic <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib27" title="">27</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T4.7.7.7.1"><svg class="ltx_picture" height="10.02" id="S2.T4.7.7.7.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T4.8.8.8.2"><svg class="ltx_picture" height="10.09" id="S2.T4.8.8.8.2.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T4.9.9.9.3"><svg class="ltx_picture" height="10.02" id="S2.T4.9.9.9.3.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T4.9.9.9.5">Circuit-level</td> </tr> <tr class="ltx_tr" id="S2.T4.12.12.12"> <td class="ltx_td ltx_align_left ltx_border_bb" id="S2.T4.12.12.12.4">Needs of This work</td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T4.10.10.10.1"><svg class="ltx_picture" height="10.99" id="S2.T4.10.10.10.1.pic1" overflow="visible" version="1.1" width="10.99"><g fill="#000000" stroke="#000000" transform="translate(0,10.99) matrix(1 0 0 -1 0 0) translate(0.97,0) translate(0,0.97)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T4.11.11.11.2"><svg class="ltx_picture" height="11.06" id="S2.T4.11.11.11.2.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T4.12.12.12.3"><svg class="ltx_picture" height="11.06" id="S2.T4.12.12.12.3.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T4.12.12.12.5"><span class="ltx_text ltx_font_bold" id="S2.T4.12.12.12.5.1">Arch-level</span></td> </tr> </tbody> </table> </span></div> </figure> </section> <section class="ltx_subsection" id="S2.SS3"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S2.SS3.5.1.1">II-C</span> </span><span class="ltx_text ltx_font_italic" id="S2.SS3.6.2">Selection of Thermal Model</span> </h3> <div class="ltx_para" id="S2.SS3.p1"> <p class="ltx_p" id="S2.SS3.p1.1">There exists a wide range of thermal simulations <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib28" title="">28</a>]</cite>, Hotspot 6.0 <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib24" title="">24</a>]</cite> has been a widely used tool for modeling temperature distributions based on power traces. It leverages the analogy between electrical circuits and heat conduction to efficiently solve one-dimensional steady-state heat conduction problems. Its accuracy has been validated against real chips <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib29" title="">29</a>]</cite>. The latest version, HotSpot 7.0, introduces support for microfluidic cooling <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib30" title="">30</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib31" title="">31</a>]</cite>, which is essential and unique for introducing advanced cooling features to the designer. Among alternative thermal models, 3D-ICE <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib23" title="">23</a>]</cite> also supports microfluidic cooling and has been experimentally validated <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib32" title="">32</a>]</cite>. However, HotSpot 7.0 is preferred for its broader applicability in full-stack thermal-aware architecture design and its well-established compatibility with McPAT. There exist several toolchains that integrate 3D-ICE, such as <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib33" title="">33</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib12" title="">12</a>]</cite>, but the full tool integration is still under development. Other recent thermal simulators, such as the Manchester Thermal Analyzer (MTA) <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib34" title="">34</a>]</cite> and ARTSim <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib35" title="">35</a>]</cite>, also model thermal effects in 3DICs. However, MTA lacks microfluidic cooling support, and neither has been integrated into a stable 3DIC-oriented toolchain. There are also ML-based thermal predictors introduced in recent works such as FaStTherm <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib36" title="">36</a>]</cite> and the work in <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib37" title="">37</a>]</cite>. They feature quick thermal prediction, but their reliance on the dataset and training process is out of scope for this work because we focus on the generality of our approach. Novel thermal models such as <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib38" title="">38</a>]</cite> targeting wafer-scale heterogeneous integration (WSHI) are also out of our scope for its different applicable integration technology. Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2.T5" title="TABLE V ‣ II-C Selection of Thermal Model ‣ II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">V</span></a> summarizes the key differences among these thermal models and highlights our selection. This work selects HotSpot for its proven compatibility with McPAT, a pairing extensively validated in existing toolchains, and specifically adopts version 7.0 to leverage its microfluidic cooling capabilities.</p> </div> <figure class="ltx_table" id="S2.T5"> <figcaption class="ltx_caption"><span class="ltx_tag ltx_tag_table">TABLE V: </span>Features Comparisons of 3D-ICE, ARTSim, MTA, and HotSpot 7.0</figcaption> <div class="ltx_inline-block ltx_align_center ltx_transformed_outer" id="S2.T5.37" style="width:433.6pt;height:107.1pt;vertical-align:-0.0pt;"><span class="ltx_transformed_inner" style="transform:translate(-111.3pt,27.5pt) scale(0.660836744577943,0.660836744577943) ;"> <table class="ltx_tabular ltx_guessed_headers ltx_align_middle" id="S2.T5.37.37"> <tbody class="ltx_tbody"> <tr class="ltx_tr" id="S2.T5.37.37.38.1"> <td class="ltx_td ltx_border_tt" id="S2.T5.37.37.38.1.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T5.37.37.38.1.2">Microfluidic</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T5.37.37.38.1.3">3DIC</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T5.37.37.38.1.4">Verified on</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T5.37.37.38.1.5">Compatibility</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_tt" id="S2.T5.37.37.38.1.6">ML</th> </tr> <tr class="ltx_tr" id="S2.T5.37.37.39.2"> <td class="ltx_td" id="S2.T5.37.37.39.2.1"></td> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T5.37.37.39.2.2">Cooling Support</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T5.37.37.39.2.3">Compatible</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T5.37.37.39.2.4">Real Chips</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T5.37.37.39.2.5">with McPAT</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column" id="S2.T5.37.37.39.2.6">Assisted</th> </tr> <tr class="ltx_tr" id="S2.T5.5.5.5"> <td class="ltx_td ltx_align_left ltx_border_t" id="S2.T5.5.5.5.6">3D-ICE<cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib23" title="">23</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib39" title="">39</a>]</cite> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T5.1.1.1.1"><svg class="ltx_picture" height="10.09" id="S2.T5.1.1.1.1.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T5.2.2.2.2"><svg class="ltx_picture" height="10.09" id="S2.T5.2.2.2.2.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T5.3.3.3.3"><svg class="ltx_picture" height="10.09" id="S2.T5.3.3.3.3.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T5.4.4.4.4"><svg class="ltx_picture" height="10.02" id="S2.T5.4.4.4.4.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,5.01)"><g stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g stroke-width="0.7pt"><path d="M 0 -4.53 L 0 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_t" id="S2.T5.5.5.5.5"><svg class="ltx_picture" height="10.02" id="S2.T5.5.5.5.5.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T5.10.10.10"> <td class="ltx_td ltx_align_left" id="S2.T5.10.10.10.6">ARTSim<cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib35" title="">35</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T5.6.6.6.1"><svg class="ltx_picture" height="10.09" id="S2.T5.6.6.6.1.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.7.7.7.2"><svg class="ltx_picture" height="10.09" id="S2.T5.7.7.7.2.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.8.8.8.3"><svg class="ltx_picture" height="10.02" id="S2.T5.8.8.8.3.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.9.9.9.4"><math alttext="\mathbf{-}" class="ltx_Math" display="inline" id="S2.T5.9.9.9.4.m1.1"><semantics id="S2.T5.9.9.9.4.m1.1a"><mo id="S2.T5.9.9.9.4.m1.1.1" xref="S2.T5.9.9.9.4.m1.1.1.cmml">−</mo><annotation-xml encoding="MathML-Content" id="S2.T5.9.9.9.4.m1.1b"><minus id="S2.T5.9.9.9.4.m1.1.1.cmml" xref="S2.T5.9.9.9.4.m1.1.1"></minus></annotation-xml><annotation encoding="application/x-tex" id="S2.T5.9.9.9.4.m1.1c">\mathbf{-}</annotation><annotation encoding="application/x-llamapun" id="S2.T5.9.9.9.4.m1.1d">-</annotation></semantics></math></td> <td class="ltx_td ltx_align_center" id="S2.T5.10.10.10.5"><svg class="ltx_picture" height="10.02" id="S2.T5.10.10.10.5.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T5.15.15.15"> <td class="ltx_td ltx_align_left" id="S2.T5.15.15.15.6">MTA<cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib34" title="">34</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T5.11.11.11.1"><svg class="ltx_picture" height="10.02" id="S2.T5.11.11.11.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.12.12.12.2"><svg class="ltx_picture" height="10.09" id="S2.T5.12.12.12.2.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.13.13.13.3"><svg class="ltx_picture" height="10.02" id="S2.T5.13.13.13.3.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.14.14.14.4"><math alttext="\mathbf{-}" class="ltx_Math" display="inline" id="S2.T5.14.14.14.4.m1.1"><semantics id="S2.T5.14.14.14.4.m1.1a"><mo id="S2.T5.14.14.14.4.m1.1.1" xref="S2.T5.14.14.14.4.m1.1.1.cmml">−</mo><annotation-xml encoding="MathML-Content" id="S2.T5.14.14.14.4.m1.1b"><minus id="S2.T5.14.14.14.4.m1.1.1.cmml" xref="S2.T5.14.14.14.4.m1.1.1"></minus></annotation-xml><annotation encoding="application/x-tex" id="S2.T5.14.14.14.4.m1.1c">\mathbf{-}</annotation><annotation encoding="application/x-llamapun" id="S2.T5.14.14.14.4.m1.1d">-</annotation></semantics></math></td> <td class="ltx_td ltx_align_center" id="S2.T5.15.15.15.5"><svg class="ltx_picture" height="10.02" id="S2.T5.15.15.15.5.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T5.21.21.21"> <td class="ltx_td ltx_align_left" id="S2.T5.21.21.21.7">HotSpot 7.0<cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib24" title="">24</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib29" title="">29</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib30" title="">30</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T5.16.16.16.1"><svg class="ltx_picture" height="11.06" id="S2.T5.16.16.16.1.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.17.17.17.2"><svg class="ltx_picture" height="11.06" id="S2.T5.17.17.17.2.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.18.18.18.3"><svg class="ltx_picture" height="11.06" id="S2.T5.18.18.18.3.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.20.20.20.5"><svg class="ltx_picture" height="10.72" id="S2.T5.19.19.19.4.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> <svg class="ltx_picture" height="10.72" id="S2.T5.20.20.20.5.pic2" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.21.21.21.6"><svg class="ltx_picture" height="10.99" id="S2.T5.21.21.21.6.pic1" overflow="visible" version="1.1" width="10.99"><g fill="#000000" stroke="#000000" transform="translate(0,10.99) matrix(1 0 0 -1 0 0) translate(0.97,0) translate(0,0.97)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T5.26.26.26"> <td class="ltx_td ltx_align_left" id="S2.T5.26.26.26.6">FaStTherm <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib36" title="">36</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T5.22.22.22.1"><svg class="ltx_picture" height="10.02" id="S2.T5.22.22.22.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.23.23.23.2"><svg class="ltx_picture" height="10.02" id="S2.T5.23.23.23.2.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.24.24.24.3"><svg class="ltx_picture" height="10.02" id="S2.T5.24.24.24.3.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.25.25.25.4"><svg class="ltx_picture" height="10.02" id="S2.T5.25.25.25.4.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,5.01)"><g stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g stroke-width="0.7pt"><path d="M 0 -4.53 L 0 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.26.26.26.5"><svg class="ltx_picture" height="10.09" id="S2.T5.26.26.26.5.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T5.31.31.31"> <td class="ltx_td ltx_align_left" id="S2.T5.31.31.31.6">Work in <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib37" title="">37</a>]</cite> </td> <td class="ltx_td ltx_align_center" id="S2.T5.27.27.27.1"><svg class="ltx_picture" height="10.02" id="S2.T5.27.27.27.1.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.28.28.28.2"><svg class="ltx_picture" height="10.02" id="S2.T5.28.28.28.2.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.29.29.29.3"><svg class="ltx_picture" height="10.02" id="S2.T5.29.29.29.3.pic1" overflow="visible" version="1.1" width="10.02"><g fill="#000000" stroke="#000000" transform="translate(0,10.02) matrix(1 0 0 -1 0 0) translate(0.48,0) translate(0,0.48)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.30.30.30.4"><svg class="ltx_picture" height="5.5" id="S2.T5.30.30.30.4.pic1" overflow="visible" version="1.1" width="10.02"><g transform="translate(0,5.5) matrix(1 0 0 -1 0 0) translate(5.01,0) translate(0,0.48)"><g color="#FFFFFF" fill="#FFFFFF" stroke="#FFFFFF" stroke-width="0.7pt"><path d="M -4.53 0 L 4.53 0" style="fill:none"></path></g><g fill="#000000" stroke="#000000" stroke-width="0.7pt"><path d="M -4.53 4.53 L 4.53 4.53" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center" id="S2.T5.31.31.31.5"><svg class="ltx_picture" height="10.09" id="S2.T5.31.31.31.5.pic1" overflow="visible" version="1.1" width="10.09"><g fill="#000000" stroke="#000000" transform="translate(0,10.09) matrix(1 0 0 -1 0 0) translate(0.55,0) translate(0,0.55)"><g stroke-linecap="round" stroke-width="0.7pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="0.8pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> </tr> <tr class="ltx_tr" id="S2.T5.37.37.37"> <td class="ltx_td ltx_align_left ltx_border_bb" id="S2.T5.37.37.37.7">Needs of This Work</td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T5.32.32.32.1"><svg class="ltx_picture" height="11.06" id="S2.T5.32.32.32.1.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T5.33.33.33.2"><svg class="ltx_picture" height="11.06" id="S2.T5.33.33.33.2.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T5.34.34.34.3"><svg class="ltx_picture" height="11.06" id="S2.T5.34.34.34.3.pic1" overflow="visible" version="1.1" width="11.06"><g fill="#000000" stroke="#000000" transform="translate(0,11.06) matrix(1 0 0 -1 0 0) translate(1.04,0) translate(0,1.04)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 2.26 0 C 4.26 3.95 5.82 6.03 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.5pt"><path d="M 0 3.17 C 0.79 1.91 1.25 1.23 2.08 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T5.36.36.36.5"><svg class="ltx_picture" height="10.72" id="S2.T5.35.35.35.4.pic1" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> <svg class="ltx_picture" height="10.72" id="S2.T5.36.36.36.5.pic2" overflow="visible" version="1.1" width="10.72"><g fill="#000000" stroke="#000000" transform="translate(0,10.72) matrix(1 0 0 -1 0 0) translate(5.36,0) translate(0,9.89)"><g stroke-width="1.2pt"><path d="M -4.53 -4.53 L 4.53 -4.53" style="fill:none"></path></g><g stroke-width="1.2pt"><path d="M 0 -9.05 L 0 0" style="fill:none"></path></g></g></svg> </td> <td class="ltx_td ltx_align_center ltx_border_bb" id="S2.T5.37.37.37.6"><svg class="ltx_picture" height="10.99" id="S2.T5.37.37.37.6.pic1" overflow="visible" version="1.1" width="10.99"><g fill="#000000" stroke="#000000" transform="translate(0,10.99) matrix(1 0 0 -1 0 0) translate(0.97,0) translate(0,0.97)"><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 0 0 C 3.16 3.9 5.16 5.9 9.05 9.05" style="fill:none"></path></g><g stroke-linecap="round" stroke-width="1.4pt"><path d="M 1.81 8.6 C 3.77 5.3 4.95 3.53 7.24 0.45" style="fill:none"></path></g></g></svg> </td> </tr> </tbody> </table> </span></div> </figure> <div class="ltx_para" id="S2.SS3.p2"> <p class="ltx_p" id="S2.SS3.p2.1">Given the limitations of existing 3DIC-oriented toolchains and our careful selection of models for performance, power, and thermal analysis, we propose Cool-3D, an end-to-end framework for thermal-aware DSE in the early design phase. Our main contributions are as follows:</p> <ol class="ltx_enumerate" id="S2.I1"> <li class="ltx_item" id="S2.I1.i1" style="list-style-type:none;"> <span class="ltx_tag ltx_tag_item">1.</span> <div class="ltx_para" id="S2.I1.i1.p1"> <p class="ltx_p" id="S2.I1.i1.p1.1">Cool-3D is a thermal-aware 3DIC simulation framework with full tool integration as the back-end and a unified input format as the front-end for rapid Pre-RTL simulation and efficient design space exploration.</p> </div> </li> <li class="ltx_item" id="S2.I1.i2" style="list-style-type:none;"> <span class="ltx_tag ltx_tag_item">2.</span> <div class="ltx_para" id="S2.I1.i2.p1"> <p class="ltx_p" id="S2.I1.i2.p1.1">The Cool-3D framework supports extensive configurability, covering microarchitectural details and 3D stacking configurations to accommodate diverse design needs.</p> </div> </li> <li class="ltx_item" id="S2.I1.i3" style="list-style-type:none;"> <span class="ltx_tag ltx_tag_item">3.</span> <div class="ltx_para" id="S2.I1.i3.p1"> <p class="ltx_p" id="S2.I1.i3.p1.1">Cool-3D features microfluidic cooling support with a floorplan generator and a microfluidic cooling strategy generator, allowing designers to fully customize cooling configurations.</p> </div> </li> <li class="ltx_item" id="S2.I1.i4" style="list-style-type:none;"> <span class="ltx_tag ltx_tag_item">4.</span> <div class="ltx_para" id="S2.I1.i4.p1"> <p class="ltx_p" id="S2.I1.i4.p1.1">This framework offers an extension interface for integrating fully customized modules into the simulated architecture.</p> </div> </li> <li class="ltx_item" id="S2.I1.i5" style="list-style-type:none;"> <span class="ltx_tag ltx_tag_item">5.</span> <div class="ltx_para" id="S2.I1.i5.p1"> <p class="ltx_p" id="S2.I1.i5.p1.1">The framework will be fully open-sourced and continuously improved to support future research and development.</p> </div> </li> </ol> </div> </section> </section> <section class="ltx_section" id="S3"> <h2 class="ltx_title ltx_title_section"> <span class="ltx_tag ltx_tag_section">III </span><span class="ltx_text ltx_font_smallcaps" id="S3.1.1">The Proposed End-to-End Thermal-Aware Framework Cool-3D</span> </h2> <div class="ltx_para" id="S3.p1"> <p class="ltx_p" id="S3.p1.1">This section presents the details of the proposed Cool-3D framework, starting with a high-level overview of its integration and functionality, followed by a detailed breakdown of each key feature. </p> </div> <section class="ltx_subsection" id="S3.SS1"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S3.SS1.5.1.1">III-A</span> </span><span class="ltx_text ltx_font_italic" id="S3.SS1.6.2">Framework Overview</span> </h3> <figure class="ltx_figure" id="S3.F3"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="284" id="S3.F3.g1" src="x3.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 3: </span>An overview of the proposed Cool-3D flow, composing a front-end interface and a back-end toolchain.</figcaption> </figure> <figure class="ltx_figure" id="S3.F4"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="467" id="S3.F4.g1" src="x4.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 4: </span>Illustration of the role Cool-3D plays in a typical design flow for 3DICs.</figcaption> </figure> <div class="ltx_para" id="S3.SS1.p1"> <p class="ltx_p" id="S3.SS1.p1.1">As shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F3" title="Figure 3 ‣ III-A Framework Overview ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">3</span></a>, the Cool-3D framework consists of a user-friendly front end and a back-end toolchain, forming an agile flow that translates high-level design abstractions into concrete thermal traces and visualized results such as the heat map. The interaction and connection logic are also illustrated, with the key contributions of this work highlighted in green boxes. The front end mainly handles user inputs and toolchain outputs, abstracting the underlying workflow to reduce the learning curve for using Cool-3D and facilitating the generation of expected results. The back-end toolchain integrates three carefully selected simulators as discussed earlier in <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2" title="II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">II</span></a>. Gem5 <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib17" title="">17</a>]</cite>, as the performance model, consumes workloads, which are the program executables, and architecture/microarchitectural configurations as inputs, and outputs the statistics representing interactions between units. McPAT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib22" title="">22</a>]</cite>, used in the subsequent step for power modeling, utilizes processed gem5 outputs to calculate core and cache power values. Following a similar manner, the memory power calculator generates the power prediction for 3D-stacked memory. As the final step, HotSpot 7.0 <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib30" title="">30</a>]</cite>, for thermal modeling, takes power data as well as the floorplaning, stacking, and cooling information to generate thermal prediction. The fusion of these tools to achieve the targeted functionality of Cool-3D is elaborated in <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS2" title="III-B Tool Fusion for Rapid DSE ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag"><span class="ltx_text">III-B</span></span></a>.</p> </div> <div class="ltx_para" id="S3.SS1.p2"> <p class="ltx_p" id="S3.SS1.p2.1">Furthermore, Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F4" title="Figure 4 ‣ III-A Framework Overview ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">4</span></a> illustrates the essential role Cool-3D plays within a 3DIC design cycle. Given a rough 3DIC design incorporating thermal-aware optimization, designers can use Cool-3D to evaluate their effectiveness and obtain quick feedback. The design outline is abstracted as input to the Cool-3D front end, enabling an iterative design space exploration (DSE) process. Designers can define their own optimization rules and interact with the flow, iterating through multiple refinements until a satisfactory thermal profile is achieved. Once optimized, the finalized design proceeds to formal design and verification in a “post-RTL” EDA toolchain.</p> </div> </section> <section class="ltx_subsection" id="S3.SS2"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S3.SS2.5.1.1">III-B</span> </span><span class="ltx_text ltx_font_italic" id="S3.SS2.6.2">Tool Fusion for Rapid DSE</span> </h3> <div class="ltx_para" id="S3.SS2.p1"> <p class="ltx_p" id="S3.SS2.p1.1">Tool fusion is a critical step in constructing Cool-3D, as each simulator in the toolchain contributes to only a portion of the overall result prediction. One of the most challenging obstacles in using existing Pre-RTL simulators is the inconsistency in working environments, diverse input formats, and the lack of a seamless transition interface between tools. These issues result in a steep learning curve and a high likelihood of errors during experimentation. To address this, Cool-3D provides a fully integrated workflow, eliminating the need for designers to manually customize their own flow for thermal-aware 3DIC development.</p> </div> <div class="ltx_para" id="S3.SS2.p2"> <p class="ltx_p" id="S3.SS2.p2.1">The first step in this integration is unifying input configurations across the three simulators. Instead of requiring designers to handle individual setups, Cool-3D introduces an input redirection process that translates simplified user inputs from the front end into structured configurations for each simulator, as shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F3" title="Figure 3 ‣ III-A Framework Overview ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">3</span></a>. Through this process, gem5 receives workload and architectural/microarchitectural details, while HotSpot 7.0 receives floorplan and stacking information for thermal analysis. By automating these translations, Cool-3D reduces complexity, minimizes errors, and accelerates the design process for thermal-aware 3DIC development.</p> </div> <div class="ltx_para" id="S3.SS2.p3"> <p class="ltx_p" id="S3.SS2.p3.1">The next step in the tool fusion process is I/O matching between gem5 and McPAT, achieved through the parameter pre-calculation process shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F3" title="Figure 3 ‣ III-A Framework Overview ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">3</span></a>. While existing translation scripts <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib40" title="">40</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib41" title="">41</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib42" title="">42</a>]</cite> provide some level of compatibility between these tools, they suffer from critical limitations in handling complex architectural configurations. Issues such as version incompatibility, incomplete and inaccurate parameter mapping, and poor error resilience often force architects to rely on outdated simulation tools and manually reconcile discrepancies between performance and power estimation. To overcome these challenges, Cool-3D introduces an adaptive parameter translation framework that modernizes compatibility, enhances parameter mapping, and improves error handling, ensuring a seamless and automated transition from gem5’s performance outputs to McPAT’s power estimation. This adaptive parameter translation framework extends the existing translation-based approach to map gem5 outputs into McPAT-compatible parameters.</p> </div> <div class="ltx_para" id="S3.SS2.p4"> <p class="ltx_p" id="S3.SS2.p4.1">For power estimation of cores and caches, Cool-3D utilized an enhanced version of McPAT, which we have modified specifically for our framework, as highlighted in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F3" title="Figure 3 ‣ III-A Framework Overview ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">3</span></a>. In our modifications, we focused on two key areas: efficiency in simulation and a cleaner output interface. In the original version of McPAT, the initialization phase and power simulation phase are coupled together. This coupling can be time-consuming, particularly for certain configurations, leading to inefficiency in the consecutive simulation timestamps as a significant portion of the time is spent on redundant re-initialization. This inefficiency remains a common issue in many existing toolchains that use McPAT. To address this, we refactored McPAT to decouple the initialization and power simulation phases, thereby allowing for more efficient trace simulation. This change significantly reduces the time spent in initialization and speeds up the overall transient simulation process. Furthermore, we enhanced the output interface by adding a power trace feature that aligns with the needs of common thermal simulators. Instead of the complex format conversion typically required by external scripts, the modified output interface directly provides the summation of power per component. This streamlined interface reduces communication complexity within the toolchain and enhances the overall efficiency of the power estimation process.</p> </div> <div class="ltx_para" id="S3.SS2.p5"> <p class="ltx_p" id="S3.SS2.p5.1">While McPAT provides detailed power predictions, it does not specifically support 3D-stacked memory. To address this gap and improve modeling accuracy, we integrate CACTI-3DD <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib25" title="">25</a>]</cite> as an additional step in the power estimation process, particularly for generating power consumption references for the 3D-stacked memory. Compared to previous works, such as CoMeT <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib13" title="">13</a>]</cite>, which also use CACTI-3DD for memory power generation, Cool-3D offers a more complete integration. By incorporating CACTI-3DD directly into the toolchain, Cool-3D allows users to dynamically adjust the configuration of CACTI-3DD at the front end. This dynamic configuration enables the tool to generate memory power data on the fly, providing real-time power estimations for the 3D memory stack during simulation.</p> </div> <div class="ltx_para" id="S3.SS2.p6"> <p class="ltx_p" id="S3.SS2.p6.1">The final step in the back-end toolchain involves running thermal simulations using HotSpot 7.0, which takes power traces generated by McPAT and the memory power calculator as inputs. It is important to note that HotSpot 7.0 also requires several additional configurations, such as floorplaning, stacking configuration, cooling, and material parameters. These configurations are provided by the input redirection process, as shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F3" title="Figure 3 ‣ III-A Framework Overview ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">3</span></a>. However, Cool-3D offers greater flexibility by allowing designers to customize their floorplan and microfluidic cooling strategies. The tool enables users to create and implement their own floorplan designs and cooling strategies, which can replace the default ones provided by the toolchain. These customized configurations help optimize the thermal performance of the design. The details of the floorplan designer and the microfluidic cooling strategy generator will be discussed further in <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS3" title="III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag"><span class="ltx_text">III-C</span></span></a>, highlighting how these tools assist in fine-tuning thermal management for 3D IC designs.</p> </div> </section> <section class="ltx_subsection" id="S3.SS3"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S3.SS3.5.1.1">III-C</span> </span><span class="ltx_text ltx_font_italic" id="S3.SS3.6.2">Microfluidic Cooling Support with Configuration</span> </h3> <figure class="ltx_figure" id="S3.F5"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="565" id="S3.F5.g1" src="x5.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 5: </span>An illustration of mainstream microfluidic cooling patterns, (a) vertically aligned pattern, (b) 90-degree bent pattern with two pairs of inlets and outlets.</figcaption> </figure> <figure class="ltx_figure" id="S3.F6"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="222" id="S3.F6.g1" src="x6.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 6: </span>A demonstration of supported design space options for an overheated baseline 3DIC design in Cool-3D. (a) application of configurable microfluidic cooling methods; (b) alternation of die stacking; (c) architectural or microarchitectural design changes.</figcaption> </figure> <div class="ltx_para" id="S3.SS3.p1"> <p class="ltx_p" id="S3.SS3.p1.1">Cooling effects play a crucial role in shaping the thermal behavior of the input 3DIC design within the thermal model. As discussed in <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S2" title="II Background & Related Works ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">II</span></a>, HotSpot 7.0 was selected as the thermal model for Cool-3D due to its built-in support for 3D-stacked chips, its integrated microfluidic cooling mechanism, and its strong compatibility with McPAT. Additionally, HotSpot 7.0 provides an intuitive user input interface for setting microfluidic cooling channel layers, allowing for a compact yet effective abstraction of complex microfluidic cooling configurations. This feature simplifies the integration of advanced cooling strategies, enhancing the accuracy and usability of the thermal simulations within Cool-3D.</p> </div> <div class="ltx_para" id="S3.SS3.p2"> <p class="ltx_p" id="S3.SS3.p2.1">However, most existing simulators or toolchains rely on users’ full mastery of each design option in a large 3DIC system and require users to provide complex input configurations. This raises the bar to entry, particularly for designers focusing on only a subset of design options. For example, ArchFP <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib43" title="">43</a>]</cite> is a floorplan designer intended to work with HotSpot, generating the required input floorplan files. However, Cool-3D does not integrate this tool due to its lack of an input interface and the requirement for users to modify source code and recompile for each customization. To enhance usability and facilitate DSE by allowing users to define a range of design options quickly, Cool-3D introduces a built-in floorplan designer and a microfluidic cooling strategy generator. These tools enable the autonomous generation of customized floorplans and cooling configurations, leveraging HotSpot 7.0’s features while ensuring ease of use and flexibility.</p> </div> <div class="ltx_para" id="S3.SS3.p3"> <p class="ltx_p" id="S3.SS3.p3.1">The floorplan designer in Cool-3D has three modes corresponding to three different customization levels. First, for users who do not specify a standard floorplan and only require a coarse-grained thermal result, the floorplan designer will generate a default version of the floorplan using the templates already integrated in this framework. The generation process in this mode will take the user input, such as the die area, the number of cores, and the number of memory banks into account to ensure the basic matching of hardware configurations. Second, to have more details in the thermal outputs and be more accurate in locating the hotspot in the chip, users have the option to automatically generate the floorplan from the McPAT output. Making use of the reference area data from McPAT output, the program can generate an initial version of the floorplan with which the user can run directly with Cool-3D. Users can adjust and iteratively update the floorplan later according to design needs. Finally, to include more customization freedom for the floorplan, along with the option to manually input a well-formatted floorplan file, Cool-3D integrates a floorplan designer graphical user interface (GUI). This allows users to easily experiment with different unit placement options without manually calculating the dimensions and coordinates of each unit as the program automatically generates the correctly formatted floorplan from what was designed with the GUI. The three modes of the floorplan designer offer three different levels of configuration granularity so that users exploring different design options can quickly get started with Cool-3D without the efforts of fully preparing all the needed input files. </p> </div> <div class="ltx_para" id="S3.SS3.p4"> <p class="ltx_p" id="S3.SS3.p4.1">Besides the floorplan, configuring microfluidic cooling patterns can also be challenging for designers, yet it is critical for consideration as it impacts the maximum thermal design power (TDP) a chip layer is able to consume. While manually defining microchannel configurations within the HotSpot 7.0 tool is feasible, an automated process enhances the adaptability of simulations. The microchannel geometries must align with the simulation resolution set in Cool-3D to ensure effective cooling coverage across the entire die. And the actual microchannel placement, as a critical design option in 3DIC designing, should be designed such that the coolant can enhance the heat dissipation. Some microfluidic cooling patterns are shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a>. Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a> (a) depicts one of the most commonly used cases, vertically aligning microchannels between two dies. A similar pattern to this vertical one is the horizontal version. These two patterns only have one inlet and one outlet on opposite sides. A more complex case can have two or more for both. Shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a> (b), the microchannels are 90-degree bent with two inlets attached on opposite sides and two outlets attached on the other pair of opposite sides. This pattern is used in <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib44" title="">44</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib32" title="">32</a>]</cite> showing great effectiveness compared with the previously mentioned ones. All the discussed patterns are supported by the proposed microfluidic cooling strategy generator, which can provide verified cooling patterns. This generator allows users to specify a desired cooling pattern, automatically generating a HotSpot-compatible configuration with a simulation resolution derived from the front-end input, streamlining the evaluation of microfluidic cooling strategies.</p> </div> </section> <section class="ltx_subsection" id="S3.SS4"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S3.SS4.5.1.1">III-D</span> </span><span class="ltx_text ltx_font_italic" id="S3.SS4.6.2">Hyper-Dimensional Configurable Design Space</span> </h3> <div class="ltx_para" id="S3.SS4.p1"> <p class="ltx_p" id="S3.SS4.p1.1">3DIC design introduces a “hyper-dimensional” design space compared to the traditional 2D designs. Even after finalizing the microarchitectural and architectural aspects, additional design space dimensions emerge, including floorplanning, die stacking strategies, and cooling configurations. Each of these dimensions present unique optimization opportunities and expand the design space significantly. </p> </div> <div class="ltx_para" id="S3.SS4.p2"> <p class="ltx_p" id="S3.SS4.p2.1">Existing toolchains either lack the fine-granularity of design modeling, such as microarchitectural details, or fail to capture the 3DIC-specific cooling methods. Cool-3D on the other hand, designed to bridge this gap, supports configurations across all design space dimensions while preserving detailed outputs at the microarchitectural level. Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F6" title="Figure 6 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">6</span></a> illustrates examples using the design options supported by Cool-3D across three distinct design space dimensions, showcasing its flexibility in exploring various 3DIC configurations. For a 3DIC design that can be potentially overheated in specific layers, one straightforward approach is to apply “stronger” cooling techniques directly to the affected layer. As indicated in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F6" title="Figure 6 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">6</span></a> (a), applying a microfluidic cooling layer near the overheated layer will help to reduce the overall temperature. Designers with Cool-3D can also customize the microchannel geometries to find the best way to dissipate the heat. A more effective approach involves optimizing stacking policies. Customized stacking rules can be seamlessly integrated into the feedback loop shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F4" title="Figure 4 ‣ III-A Framework Overview ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">4</span></a> to determine the optimal organization of the entire stack. Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F6" title="Figure 6 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">6</span></a> (b) presents a simplified example of this implementation, demonstrating how strategic stacking can enhance thermal management and overall performance. For more fine-grained optimization, Cool-3D allows direct configuration of architectural and microarchitectural details through its input interface. Designers can easily modify a CPU core template or adjust internal parameters for specific modules, as demonstrated in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F6" title="Figure 6 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">6</span></a> (c). Overall, the built-in design options in Cool-3D provide designers with extensive flexibility to effectively optimize their designs with multiple design knobs.</p> </div> </section> <section class="ltx_subsection" id="S3.SS5"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S3.SS5.5.1.1">III-E</span> </span><span class="ltx_text ltx_font_italic" id="S3.SS5.6.2">Extension Interface for Non-Parameterizable Customization</span> </h3> <figure class="ltx_figure" id="S3.F7"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="547" id="S3.F7.g1" src="x7.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 7: </span>Demonstration of working mechanism for the nonparameterizable customization support in Cool-3D.</figcaption> </figure> <div class="ltx_para" id="S3.SS5.p1"> <p class="ltx_p" id="S3.SS5.p1.1">While the design space described in <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS4" title="III-D Hyper-Dimensional Configurable Design Space ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag"><span class="ltx_text">III-D</span></span></a> offers a wide range of design options for designers, unconventional design ideas may arise and are needed to be modeled during the design and simulation process. Such design ideas typically can be categorized into two types: parameterizable customization, which can be configured using the front-end input interface, and non-parameterizable customization, where designers define entirely new modules and behaviors. Existing 3DIC-oriented toolchains do not support non-parameterizable customization, but Cool-3D introduces this feature to help designers seamlessly integrate self-defined modules and observe their thermal behaviors. As shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F7" title="Figure 7 ‣ III-E Extension Interface for Non-Parameterizable Customization ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">7</span></a>, the implementation of non-parameterizable customization consists of two key elements, the design parameter pre-calculation process before the power model and an extended version of McPAT with an extension interface.</p> </div> <div class="ltx_para" id="S3.SS5.p2"> <p class="ltx_p" id="S3.SS5.p2.1">The design parameter pre-calculation process involves two parallel tasks, fetching memory access traces and memory configurations for the memory power calculator, and pre-calculating in-core activity and configurations for McPAT inputs. Since non-parameterizable customization of memory can be achieved through modifications in the front-end input, our primary focus is on customizing cores or caches, which firstly relies on detailed information transferred from gem5. While existing gem5-to-McPAT connections rely on static mapping mechanisms and lack flexibility for integrating customized modules, our enhanced framework overcomes this limitation by providing a streamlined, user-configurable approach based on the features mentioned in <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.SS2" title="III-B Tool Fusion for Rapid DSE ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag"><span class="ltx_text">III-B</span></span></a>. Architects can define translation rules for customized modules using a simple YAML configuration file. A parser script then automatically extracts and translates parameters from gem5 outputs based on the user-defined rules. This approach seamlessly integrates the customized modules into the McPAT power estimation flow without any modification to the parser code.</p> </div> <div class="ltx_para" id="S3.SS5.p3"> <p class="ltx_p" id="S3.SS5.p3.1">However, while fully customized module information is successfully passed from gem5 to McPAT’s input, McPAT itself is unable to process unknown modules that are not pre-programmed into its source code. Thus, an extension interface is added in McPAT to enable power simulation for customized modules. Customized modules are modeled at the block level, where power consumption could be calculated from static power, switching energy cost, activity factor, and switching pattern. In addition, the interface remains open for models with more details, as all computation-related functions are weak-attributed and can be freely overwritten. The extension interface composes of an XML input template and a power calculation template in the computation process. Consistent with McPAT’s original design, both physical parameters for model initialization and dynamic statistics for access patterns calculations are included in a unified XML file. For customized power simulation, all calculations occur inside McPAT alongside other system components, ensuring that system-level statistics are shared and interactions between customized modules and conventional units are accurately modeled. This integrated approach yields more reliable power estimation results compared to merging isolated power traces generated from different flows. </p> </div> </section> </section> <section class="ltx_section" id="S4"> <h2 class="ltx_title ltx_title_section"> <span class="ltx_tag ltx_tag_section">IV </span><span class="ltx_text ltx_font_smallcaps" id="S4.1.1">Experiments and Results</span> </h2> <figure class="ltx_figure" id="S4.F8"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="320" id="S4.F8.g1" src="x8.png" width="747"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 8: </span>Elapsed time (black solid lines) and its breakdown (colored bars) for performance, power, and thermal models across the Splash2 benchmark suite with default problem size. Total simulated instruction counts (grey dashed lines) mark the correlation between sizes of workloads and total elapsed time</figcaption> </figure> <div class="ltx_para" id="S4.p1"> <p class="ltx_p" id="S4.p1.1">To validate the effectiveness of the proposed Cool-3D framework and its key features, we conduct three case studies and present the corresponding validation results in this section. A detailed analysis will be performed to show how the thermal behaviors change along with changes in the design options.</p> </div> <section class="ltx_subsection" id="S4.SS1"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S4.SS1.5.1.1">IV-A</span> </span><span class="ltx_text ltx_font_italic" id="S4.SS1.6.2">Experimental Setup</span> </h3> <div class="ltx_para" id="S4.SS1.p1"> <p class="ltx_p" id="S4.SS1.p1.1">To better illustrate the features of Cool-3D and ensure fair comparisons among different cases, we construct a baseline 3D chip design that serves as the reference for improvements throughout the case studies. The baseline chip configuration is listed in Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.T6" title="TABLE VI ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">VI</span></a>. The configuration of the baseline chip architecture is close to the setup of modern consumer processors. Additionally, the 3D-related configuration is set based on the existence of the combination of core and memory layers, and also the fact that those existing core-memory-stacked products have only a few layers. But Cool-3D does support modeling more layers and interleaving core and memory layers for next-gen processor or system-on-chip (SoC) development. The core model, along with the cache and memory settings, is configured through the Cool-3D front end and subsequently passed to the gem5 configuration interface. Following our tool integration workflow, McPAT and CACTI-3DD configurations are dynamically retrieved and incorporated during runtime after gem5 completes the architectural modeling. For 3D-specific parameters, in addition to those set in CACTI-3DD, stacking and cooling parameters are provided to HotSpot 7.0 via the Cool-3D front end at the start of the simulation flow. To evaluate the workloads run on the constructed hardware, we use the Splash2 benchmark suite <cite class="ltx_cite ltx_citemacro_cite">[<a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib45" title="">45</a>, <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#bib.bib46" title="">46</a>]</cite>, which is a commonly used testing program suite for computer architecture design performance evaluation, and run all benchmarks with their default problem size.</p> </div> <figure class="ltx_table" id="S4.T6"> <figcaption class="ltx_caption"><span class="ltx_tag ltx_tag_table">TABLE VI: </span>Configurations of the baseline chip</figcaption><div class="ltx_flex_figure"> <div class="ltx_flex_cell ltx_flex_size_1"> <table class="ltx_tabular ltx_centering ltx_figure_panel ltx_guessed_headers ltx_align_middle" id="S4.T6.4"> <thead class="ltx_thead"> <tr class="ltx_tr" id="S4.T6.4.1.1"> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.4.1.1.1" style="padding-top:2.5pt;padding-bottom:2.5pt;">Model Parameters</th> <th class="ltx_td ltx_align_center ltx_th ltx_th_column ltx_border_r ltx_border_t" id="S4.T6.4.1.1.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">Values</th> </tr> </thead> <tbody class="ltx_tbody"> <tr class="ltx_tr" id="S4.T6.4.2.1"> <td class="ltx_td ltx_align_center ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.4.2.1.1" style="padding-top:2.5pt;padding-bottom:2.5pt;">Core Model</td> <td class="ltx_td ltx_align_center ltx_border_r ltx_border_t" id="S4.T6.4.2.1.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">4 cores, 2GHz, out-of-order, 8-issue</td> </tr> <tr class="ltx_tr" id="S4.T6.4.3.2"> <td class="ltx_td ltx_align_center ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.4.3.2.1" style="padding-top:2.5pt;padding-bottom:2.5pt;">L1 I/D Cache</td> <td class="ltx_td ltx_align_center ltx_border_r ltx_border_t" id="S4.T6.4.3.2.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">2-way set associative, 4KB/8KB</td> </tr> <tr class="ltx_tr" id="S4.T6.4.4.3"> <td class="ltx_td ltx_align_center ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.4.4.3.1" style="padding-top:2.5pt;padding-bottom:2.5pt;">L2 Cache</td> <td class="ltx_td ltx_align_center ltx_border_r ltx_border_t" id="S4.T6.4.4.3.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">shared L2 cache, 2MB</td> </tr> <tr class="ltx_tr" id="S4.T6.4.5.4"> <td class="ltx_td ltx_align_center ltx_border_b ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.4.5.4.1" style="padding-top:2.5pt;padding-bottom:2.5pt;">Memory</td> <td class="ltx_td ltx_align_center ltx_border_b ltx_border_r ltx_border_t" id="S4.T6.4.5.4.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">8GB, 32 banks, 8 banks per rank</td> </tr> </tbody> </table> </div> <div class="ltx_flex_break"></div> <div class="ltx_flex_cell ltx_flex_size_1"> <table class="ltx_tabular ltx_centering ltx_figure_panel ltx_guessed_headers ltx_align_middle" id="S4.T6.3"> <tbody class="ltx_tbody"> <tr class="ltx_tr" id="S4.T6.3.4.1"> <th class="ltx_td ltx_align_center ltx_th ltx_th_row ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.3.4.1.1" style="padding-top:2.5pt;padding-bottom:2.5pt;">3D Related Parameters</th> <td class="ltx_td ltx_align_center ltx_border_r ltx_border_t" id="S4.T6.3.4.1.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">Values</td> </tr> <tr class="ltx_tr" id="S4.T6.3.5.2"> <th class="ltx_td ltx_align_center ltx_th ltx_th_row ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.3.5.2.1" rowspan="4" style="padding-top:2.5pt;padding-bottom:2.5pt;"><span class="ltx_text" id="S4.T6.3.5.2.1.1">Stacking</span></th> <td class="ltx_td ltx_align_center ltx_border_r ltx_border_t" id="S4.T6.3.5.2.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">3 layers</td> </tr> <tr class="ltx_tr" id="S4.T6.1.1"> <td class="ltx_td ltx_align_center ltx_border_r ltx_border_t" id="S4.T6.1.1.1" style="padding-top:2.5pt;padding-bottom:2.5pt;"> <span class="ltx_text ltx_font_italic" id="S4.T6.1.1.1.1">top layer</span> memory banks 16-31 (<math alttext="4\times 4" class="ltx_Math" display="inline" id="S4.T6.1.1.1.m1.1"><semantics id="S4.T6.1.1.1.m1.1a"><mrow id="S4.T6.1.1.1.m1.1.1" xref="S4.T6.1.1.1.m1.1.1.cmml"><mn id="S4.T6.1.1.1.m1.1.1.2" xref="S4.T6.1.1.1.m1.1.1.2.cmml">4</mn><mo id="S4.T6.1.1.1.m1.1.1.1" lspace="0.222em" rspace="0.222em" xref="S4.T6.1.1.1.m1.1.1.1.cmml">×</mo><mn id="S4.T6.1.1.1.m1.1.1.3" xref="S4.T6.1.1.1.m1.1.1.3.cmml">4</mn></mrow><annotation-xml encoding="MathML-Content" id="S4.T6.1.1.1.m1.1b"><apply id="S4.T6.1.1.1.m1.1.1.cmml" xref="S4.T6.1.1.1.m1.1.1"><times id="S4.T6.1.1.1.m1.1.1.1.cmml" xref="S4.T6.1.1.1.m1.1.1.1"></times><cn id="S4.T6.1.1.1.m1.1.1.2.cmml" type="integer" xref="S4.T6.1.1.1.m1.1.1.2">4</cn><cn id="S4.T6.1.1.1.m1.1.1.3.cmml" type="integer" xref="S4.T6.1.1.1.m1.1.1.3">4</cn></apply></annotation-xml><annotation encoding="application/x-tex" id="S4.T6.1.1.1.m1.1c">4\times 4</annotation><annotation encoding="application/x-llamapun" id="S4.T6.1.1.1.m1.1d">4 × 4</annotation></semantics></math>)</td> </tr> <tr class="ltx_tr" id="S4.T6.2.2"> <td class="ltx_td ltx_align_center ltx_border_r" id="S4.T6.2.2.1" style="padding-top:2.5pt;padding-bottom:2.5pt;"> <span class="ltx_text ltx_font_italic" id="S4.T6.2.2.1.1">middle layer</span> memory banks 0-15 (<math alttext="4\times 4" class="ltx_Math" display="inline" id="S4.T6.2.2.1.m1.1"><semantics id="S4.T6.2.2.1.m1.1a"><mrow id="S4.T6.2.2.1.m1.1.1" xref="S4.T6.2.2.1.m1.1.1.cmml"><mn id="S4.T6.2.2.1.m1.1.1.2" xref="S4.T6.2.2.1.m1.1.1.2.cmml">4</mn><mo id="S4.T6.2.2.1.m1.1.1.1" lspace="0.222em" rspace="0.222em" xref="S4.T6.2.2.1.m1.1.1.1.cmml">×</mo><mn id="S4.T6.2.2.1.m1.1.1.3" xref="S4.T6.2.2.1.m1.1.1.3.cmml">4</mn></mrow><annotation-xml encoding="MathML-Content" id="S4.T6.2.2.1.m1.1b"><apply id="S4.T6.2.2.1.m1.1.1.cmml" xref="S4.T6.2.2.1.m1.1.1"><times id="S4.T6.2.2.1.m1.1.1.1.cmml" xref="S4.T6.2.2.1.m1.1.1.1"></times><cn id="S4.T6.2.2.1.m1.1.1.2.cmml" type="integer" xref="S4.T6.2.2.1.m1.1.1.2">4</cn><cn id="S4.T6.2.2.1.m1.1.1.3.cmml" type="integer" xref="S4.T6.2.2.1.m1.1.1.3">4</cn></apply></annotation-xml><annotation encoding="application/x-tex" id="S4.T6.2.2.1.m1.1c">4\times 4</annotation><annotation encoding="application/x-llamapun" id="S4.T6.2.2.1.m1.1d">4 × 4</annotation></semantics></math>)</td> </tr> <tr class="ltx_tr" id="S4.T6.3.3"> <td class="ltx_td ltx_align_center ltx_border_r" id="S4.T6.3.3.1" style="padding-top:2.5pt;padding-bottom:2.5pt;"> <span class="ltx_text ltx_font_italic" id="S4.T6.3.3.1.1">bottom layer</span> cores 0-3 (<math alttext="2\times 2" class="ltx_Math" display="inline" id="S4.T6.3.3.1.m1.1"><semantics id="S4.T6.3.3.1.m1.1a"><mrow id="S4.T6.3.3.1.m1.1.1" xref="S4.T6.3.3.1.m1.1.1.cmml"><mn id="S4.T6.3.3.1.m1.1.1.2" xref="S4.T6.3.3.1.m1.1.1.2.cmml">2</mn><mo id="S4.T6.3.3.1.m1.1.1.1" lspace="0.222em" rspace="0.222em" xref="S4.T6.3.3.1.m1.1.1.1.cmml">×</mo><mn id="S4.T6.3.3.1.m1.1.1.3" xref="S4.T6.3.3.1.m1.1.1.3.cmml">2</mn></mrow><annotation-xml encoding="MathML-Content" id="S4.T6.3.3.1.m1.1b"><apply id="S4.T6.3.3.1.m1.1.1.cmml" xref="S4.T6.3.3.1.m1.1.1"><times id="S4.T6.3.3.1.m1.1.1.1.cmml" xref="S4.T6.3.3.1.m1.1.1.1"></times><cn id="S4.T6.3.3.1.m1.1.1.2.cmml" type="integer" xref="S4.T6.3.3.1.m1.1.1.2">2</cn><cn id="S4.T6.3.3.1.m1.1.1.3.cmml" type="integer" xref="S4.T6.3.3.1.m1.1.1.3">2</cn></apply></annotation-xml><annotation encoding="application/x-tex" id="S4.T6.3.3.1.m1.1c">2\times 2</annotation><annotation encoding="application/x-llamapun" id="S4.T6.3.3.1.m1.1d">2 × 2</annotation></semantics></math>)</td> </tr> <tr class="ltx_tr" id="S4.T6.3.6.3"> <th class="ltx_td ltx_align_center ltx_th ltx_th_row ltx_border_b ltx_border_l ltx_border_r ltx_border_t" id="S4.T6.3.6.3.1" style="padding-top:2.5pt;padding-bottom:2.5pt;">Cooling</th> <td class="ltx_td ltx_align_center ltx_border_b ltx_border_r ltx_border_t" id="S4.T6.3.6.3.2" style="padding-top:2.5pt;padding-bottom:2.5pt;">passive heat sink, no microfluidic cooling</td> </tr> </tbody> </table> </div> </div> </figure> <figure class="ltx_figure" id="S4.F9"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="289" id="S4.F9.g1" src="x9.png" width="747"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 9: </span>Heat maps (Temperature: K) of Splash2-fft benchmark running on the baseline chip. <span class="ltx_text ltx_font_italic" id="S4.F9.4.1">left</span>: core layer, <span class="ltx_text ltx_font_italic" id="S4.F9.5.2">middle</span>: memory layer 1, <span class="ltx_text ltx_font_italic" id="S4.F9.6.3">right</span>: memory layer 2.</figcaption> </figure> <figure class="ltx_figure" id="S4.F10"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="237" id="S4.F10.g1" src="x10.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 10: </span>Temperature distribution for three cases: <span class="ltx_text ltx_font_italic" id="S4.F10.4.1">baseline</span>: core layer - memory layer - memory layer, <span class="ltx_text ltx_font_italic" id="S4.F10.5.2">case1a</span>: memory layer - core layer - memory layer, <span class="ltx_text ltx_font_italic" id="S4.F10.6.3">case1b</span>: memory layer - memory layer - core layer, across the Splash2 benchmark suite.</figcaption> </figure> <figure class="ltx_figure" id="S4.F11"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="237" id="S4.F11.g1" src="x11.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 11: </span>Temperature distribution for three cases: <span class="ltx_text ltx_font_italic" id="S4.F11.4.1">case1b</span>: core layer in the top, <span class="ltx_text ltx_font_italic" id="S4.F11.5.2">case2a</span>: microfluidic cooling with vertically aligned pattern applied, <span class="ltx_text ltx_font_italic" id="S4.F11.6.3">case2b</span>: microfluidic cooling with 90-degree bent microchannels applied.</figcaption> </figure> <figure class="ltx_figure" id="S4.F12"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_square" height="759" id="S4.F12.g1" src="x12.png" width="747"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 12: </span>Heat map (Temperature: K) comparisons for <span class="ltx_text ltx_font_italic" id="S4.F12.4.1">case1b</span> (core layer in the top), <span class="ltx_text ltx_font_italic" id="S4.F12.5.2">case2a</span> (core layer in the top with microfluidic cooling with vertically aligned pattern), and <span class="ltx_text ltx_font_italic" id="S4.F12.6.3">case2b</span> (core layer in the top with microfluidic cooling with 90-degree bent microchannel pattern). </figcaption> </figure> <figure class="ltx_figure" id="S4.F13"><img alt="Refer to caption" class="ltx_graphics ltx_centering ltx_img_landscape" height="237" id="S4.F13.g1" src="x13.png" width="830"/> <figcaption class="ltx_caption ltx_centering"><span class="ltx_tag ltx_tag_figure">Figure 13: </span>Temperature distribution for three cases: <span class="ltx_text ltx_font_italic" id="S4.F13.6.1">case2b</span>: core layer in the top with 90-degree bent microchannel styled microfluidic cooling applied, <span class="ltx_text ltx_font_italic" id="S4.F13.7.2">case3a</span>: shared L2 cache capacity scaled to 4MB based on <span class="ltx_text ltx_font_italic" id="S4.F13.8.3">case2b</span>, <span class="ltx_text ltx_font_italic" id="S4.F13.9.4">case3b</span>: shared L2 cache capacity scaled to 1MB based on <span class="ltx_text ltx_font_italic" id="S4.F13.10.5">case2b</span>.</figcaption> </figure> </section> <section class="ltx_subsection" id="S4.SS2"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S4.SS2.5.1.1">IV-B</span> </span><span class="ltx_text ltx_font_italic" id="S4.SS2.6.2">Baseline Analysis</span> </h3> <div class="ltx_para" id="S4.SS2.p1"> <p class="ltx_p" id="S4.SS2.p1.1">The first experiment evaluates the baseline chip without any active cooling techniques. The entire process runs fully automatically without requiring additional user input. Upon completion, the experiment generates performance, power, and thermal results, along with a clear heatmap visualization to show the thermal distribution.</p> </div> <div class="ltx_para" id="S4.SS2.p2"> <p class="ltx_p" id="S4.SS2.p2.1">Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F8" title="Figure 8 ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">8</span></a> presents the elapsed time for running each benchmark, with a detailed breakdown of the time spent in each modeling phase. Due to the nature of performance modeling, the total runtime is highly workload-dependent. Additionally, Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F8" title="Figure 8 ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">8</span></a> also shows the total number of simulated instructions in gem5 for each benchmark, where a clear correlation between instruction count and total elapsed time can be observed. On average, the end-to-end runtime for the entire flow across all benchmarks in default problem size is approximately 28 minutes, with the longest runtime reaching 2.4 hours. This efficiency allows designers to traverse the complete DSE flow with a complete benchmark suite within a few hours, enabling a rapid evaluation of potential design choices and their impact.</p> </div> <div class="ltx_para" id="S4.SS2.p3"> <p class="ltx_p" id="S4.SS2.p3.1">To further analyze thermal behaviors, we present the heat maps generated by running the benchmark <span class="ltx_text ltx_font_italic" id="S4.SS2.p3.1.1">fft</span> on the baseline chip. In Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F9" title="Figure 9 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">9</span></a>, three heat maps corresponding to the core layer and two memory bank layers are shown. These are obtained after running a steady-state simulation in the thermal model as the final step in Cool-3D. As shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F9" title="Figure 9 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">9</span></a>, the core layer exhibits the highest temperature due to its greater power consumption and its position at the bottom of the stack. A closer examination of the core layer heat map reveals that core0 (indicated as “C_0” in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F9" title="Figure 9 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">9</span></a>) accumulates the most heat compared with others. This phenomenon aligns with the fact that in the performance trace, instructions executed on core0, on average, are <math alttext="5.87\times" class="ltx_math_unparsed" display="inline" id="S4.SS2.p3.1.m1.1"><semantics id="S4.SS2.p3.1.m1.1a"><mrow id="S4.SS2.p3.1.m1.1b"><mn id="S4.SS2.p3.1.m1.1.1">5.87</mn><mo id="S4.SS2.p3.1.m1.1.2" lspace="0.222em">×</mo></mrow><annotation encoding="application/x-tex" id="S4.SS2.p3.1.m1.1c">5.87\times</annotation><annotation encoding="application/x-llamapun" id="S4.SS2.p3.1.m1.1d">5.87 ×</annotation></semantics></math> more than the rest of the cores. From a microarchitectural perspective, the heat map helps pinpoint specific hotspots, such as floating-point computing units and result broadcast buses, which typically consume more power according to the power modeling results. Additionally, we observe coupling effects between adjacent layers, as indicated by the similar heat map patterns in the core layer and the adjacent memory layer 1.</p> </div> </section> <section class="ltx_subsection" id="S4.SS3"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S4.SS3.5.1.1">IV-C</span> </span><span class="ltx_text ltx_font_italic" id="S4.SS3.6.2">Case Study I - Altering Stacking Orders</span> </h3> <div class="ltx_para" id="S4.SS3.p1"> <p class="ltx_p" id="S4.SS3.p1.1">The baseline analysis has demonstrated that the position of the core layer within the stack significantly impacts heat dissipation, as accumulated heat is difficult to release from the backside. Consequently, stacking strategy plays a crucial role in thermal management. The most immediate solution to potential overheating issues in 3DIC design is to alter the stacking order. While this is straightforward for a two-layer stack, it becomes increasingly complex when multiple layers coexist, especially in the early design phase where the design is not even ready.</p> </div> <div class="ltx_para" id="S4.SS3.p2"> <p class="ltx_p" id="S4.SS3.p2.1">In <span class="ltx_text ltx_font_italic" id="S4.SS3.p2.1.1">case1a</span>, we reposition the core layer between the two memory bank layers, whereas in <span class="ltx_text ltx_font_italic" id="S4.SS3.p2.1.2">case1b</span>, the core layer is placed at the top of the stack. Apart from the stacking order adjustments, all other parameters from Table <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.T6" title="TABLE VI ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">VI</span></a> remain unchanged. To comprehensively evaluate the impact of stack ordering on overall temperature, we run Cool-3D with all benchmarks in both configurations. We use the maximum temperature of the entire 3D stack as the key comparison metric and optimization target, as it directly influences the final thermal design power (TDP)—a critical concern for architects and designers. The temperature variations across all benchmarks are illustrated in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F10" title="Figure 10 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">10</span></a>, where it is evident that <span class="ltx_text ltx_font_italic" id="S4.SS3.p2.1.3">case1b</span>, with the core layer positioned at the top of the stack, achieves the most significant temperature reduction across all workloads. This case study focuses on a three-layer stack, but Cool-3D is capable of configuring any number of layers, providing a flexible and accurate framework for 3DIC designers to conduct “what-if” analyses. By enabling rapid exploration of various stacking strategies, Cool-3D helps designers assess thermal implications and optimize layer placement for improved heat dissipation.</p> </div> </section> <section class="ltx_subsection" id="S4.SS4"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S4.SS4.5.1.1">IV-D</span> </span><span class="ltx_text ltx_font_italic" id="S4.SS4.6.2">Case Study II - Applying Microfluidic Cooling</span> </h3> <div class="ltx_para" id="S4.SS4.p1"> <p class="ltx_p" id="S4.SS4.p1.1">With Cool-3D, designers can now comprehensively evaluate the entire system while considering advanced cooling strategies, such as microfluidic cooling. This capability enables more accurate design budget estimations and facilitates potential cooling-architecture co-design. To demonstrate this, we update the baseline design to <span class="ltx_text ltx_font_italic" id="S4.SS4.p1.1.1">case1b</span> and use it as the new reference point for this round of optimization. In this case study, we compare two distinct microfluidic cooling patterns to determine the most effective heat dissipation strategy. In <span class="ltx_text ltx_font_italic" id="S4.SS4.p1.1.2">case2a</span>, the microchannels are arranged in a vertical configuration, as the previously discussed pattern in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a> (a), whereas in <span class="ltx_text ltx_font_italic" id="S4.SS4.p1.1.3">case2b</span>, the cooling pattern features two coolant inlets on the north and south sides and two outlets on the left and right, following the design outlined in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a> (b). It is important to note that the microfluidic cooling layer is placed between the top core layer and the middle memory bank layer, as the core layer continues to exhibit the highest temperature among all layers.</p> </div> <div class="ltx_para" id="S4.SS4.p2"> <p class="ltx_p" id="S4.SS4.p2.1">The temperature variations after applying the two different microfluidic cooling patterns are illustrated in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F11" title="Figure 11 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">11</span></a>. A significant temperature reduction is observed across all benchmarks, demonstrating the effectiveness of microfluidic cooling. However, a noticeable difference exists between <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.1">case2a</span> and <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.2">case2b</span>, with <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.3">case2b</span> featuring two coolant inlets and two outlets—achieving superior cooling performance compared to the vertically aligned pattern. To further analyze the impact of different cooling strategies, Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F12" title="Figure 12 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">12</span></a> presents a heat map comparison for <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.4">case1b</span>, <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.5">case2a</span>, and <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.6">case2b</span> using the <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.7">fft</span> benchmark. The first row of Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F12" title="Figure 12 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">12</span></a> displays the heat maps for <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.8">case1b</span>, where the core layer is positioned at the top. The second row corresponds to <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.9">case2a</span>, where the vertical microfluidic cooling pattern shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a> (a) is applied beneath the top core layer, maintaining the stacking order of <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.10">case1b</span>. The last row represents <span class="ltx_text ltx_font_italic" id="S4.SS4.p2.1.11">case2b</span>, which applies the cooling pattern depicted in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a> (b). From this comparison, it is evident that, given the same stacking order, the cooling pattern illustrated in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S3.F5" title="Figure 5 ‣ III-C Microfluidic Cooling Support with Configuration ‣ III The Proposed End-to-End Thermal-Aware Framework Cool-3D ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">5</span></a>(b) offers more effective heat dissipation, further validating the importance of optimizing microfluidic cooling strategies in 3DIC design.</p> </div> </section> <section class="ltx_subsection" id="S4.SS5"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S4.SS5.5.1.1">IV-E</span> </span><span class="ltx_text ltx_font_italic" id="S4.SS5.6.2">Case Study III - Applying Microarchitectural Changes</span> </h3> <div class="ltx_para" id="S4.SS5.p1"> <p class="ltx_p" id="S4.SS5.p1.1">To further demonstrate Cool-3D’s ability to capture subtle thermal variations induced by microarchitectural modifications in 3DICs, we introduce an adjustment to the shared L2 cache. Following the approach of the previous case study, we update the baseline design to <span class="ltx_text ltx_font_italic" id="S4.SS5.p1.1.1">case2b</span>, as it provides the best heat dissipation performance. Building on this new baseline, we modify the shared L2 cache capacity from its original 2MB to 4MB in <span class="ltx_text ltx_font_italic" id="S4.SS5.p1.1.2">case3a</span> and reduce it to 1MB in <span class="ltx_text ltx_font_italic" id="S4.SS5.p1.1.3">case3b</span>. The resulting temperature distributions are shown in Fig. <a class="ltx_ref" href="https://arxiv.org/html/2503.07297v1#S4.F13" title="Figure 13 ‣ IV-A Experimental Setup ‣ IV Experiments and Results ‣ Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs"><span class="ltx_text ltx_ref_tag">13</span></a>. The impact on temperature varies across benchmarks due to differences in data access patterns. However, in general, <span class="ltx_text ltx_font_italic" id="S4.SS5.p1.1.4">case3a</span> leads to a slight temperature increase across all benchmarks, whereas <span class="ltx_text ltx_font_italic" id="S4.SS5.p1.1.5">case3b</span> tends to reduce the temperature. This case study highlights the value of Cool-3D in identifying potential thermal issues arising from specific microarchitectural modifications, enabling designers to make informed decisions in optimizing 3DIC systems.</p> </div> </section> <section class="ltx_subsection" id="S4.SS6"> <h3 class="ltx_title ltx_title_subsection"> <span class="ltx_tag ltx_tag_subsection"><span class="ltx_text" id="S4.SS6.5.1.1">IV-F</span> </span><span class="ltx_text ltx_font_italic" id="S4.SS6.6.2">Discussions</span> </h3> <div class="ltx_para" id="S4.SS6.p1"> <p class="ltx_p" id="S4.SS6.p1.1">Through Case Studies I–III, we emulate the design thinking process that a 3DIC designer might follow during the early design phase. While the actual design process is far more complex, involving a vast design space with numerous design parameters, especially when only conceptual designs are available. With Cool-3D, these design knobs can be easily configured to address high-level design questions, enabling key metric improvements such as better thermal profiles or, alternatively, more aggressive power budgets if sufficient cooling is guaranteed. While Cool-3D is not a one-size-fits-all signoff-calibre solution, its extension interface and flexible configurations offer a comprehensive set of design choices that are often scattered or overlooked in the early stages of 3DIC design.</p> </div> </section> </section> <section class="ltx_section" id="S5"> <h2 class="ltx_title ltx_title_section"> <span class="ltx_tag ltx_tag_section">V </span><span class="ltx_text ltx_font_smallcaps" id="S5.1.1">Conclusions and Future Work</span> </h2> <div class="ltx_para" id="S5.p1"> <p class="ltx_p" id="S5.p1.1">In this work, we introduce Cool-3D, an end-to-end thermal-aware DSE framework designed for fine-grained early-phase design space exploration of 3DICs. Cool-3D integrates a highly cohesive simulation flow with fine-grained configurability, enabling designers to explore a wide range of design options efficiently. The inclusion of microfluidic cooling modeling expands the design space, allowing for advanced thermal management strategies. Additionally, the built-in floorplan designer and microfluidic cooling strategy generator streamline configuration efforts. For non-parameterizable customizations, we provide an interface for integrating user-defined modules. Through extensive experiments, we demonstrate how Cool-3D effectively captures thermal-aware design variations across microarchitectural, stacking, and cooling dimensions, guiding designers toward more informed and optimized design decisions.</p> </div> <div class="ltx_para" id="S5.p2"> <p class="ltx_p" id="S5.p2.1">For future work, the first step would be to close the iterative DSE loop with novel optimization algorithms, such as reinforcement learning (RL) based methods, so that automatic tuning of the design configurations can be performed based on the thermal profile. This enhancement will allow the framework to directly generate optimal designs according to designer-defined criteria. In addition, to broaden applicability and accommodate diverse simulator preferences, we plan to develop a “super” framework based on Cool-3D by incorporating alternative models. The ultimate goal is to establish a cross-validation thermal-aware framework that ensures both efficiency and accuracy in early-phase predictions. In the architectural design scope, future work will enhance support for emerging architectures, such as processing-in-memory (PIM) and processing-near-memory (PNM), leveraging the existing extension interface. This will enable more flexible and comprehensive thermal-aware design space exploration for emerging computing paradigms in 3DIC. The source code of this work is in the process of being released through <a class="ltx_ref ltx_url ltx_font_typewriter" href="https://github.com/iCAS-SJTU/Cool-3D" title="">https://github.com/iCAS-SJTU/Cool-3D</a>.</p> </div> </section> <section class="ltx_section" id="S6"> <h2 class="ltx_title ltx_title_section"> <span class="ltx_tag ltx_tag_section">VI </span><span class="ltx_text ltx_font_smallcaps" id="S6.1.1">Acknowledgment</span> </h2> <div class="ltx_para" id="S6.p1"> <p class="ltx_p" id="S6.p1.1">The authors would like to thank the developers and active contributors of Gem5, Sniper, CACTI, McPAT, HotSpot, SPLASH-2, and COMET for providing the foundational infrastructures that enabled this research. We also extend our gratitude to Dr. Jun-Han Han from the University of Virginia (now at Meta) for his valuable insights and constructive feedback during the early stages of this project.</p> </div> </section> <section class="ltx_bibliography" id="bib"> <h2 class="ltx_title ltx_title_bibliography">References</h2> <ul class="ltx_biblist"> <li class="ltx_bibitem" id="bib.bib1"> <span class="ltx_tag ltx_tag_bibitem">[1]</span> <span class="ltx_bibblock"> V. K. Sanipini, B. Rakesh, A. J. Chamanthula, N. Santoshi, A. A. Gudivada, and A. K. Panigrahy, “Thermal management in TSV based 3D IC Integration: A survey,” <span class="ltx_text ltx_font_italic" id="bib.bib1.1.1">Materials Today: Proceedings</span>, vol. 45, pp. 1742–1746, 2021. </span> </li> <li class="ltx_bibitem" id="bib.bib2"> <span class="ltx_tag ltx_tag_bibitem">[2]</span> <span class="ltx_bibblock"> S. G. Kandlikar, D. Kudithipudi, and C. A. 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Gupta, “The SPLASH-2 programs: characterization and methodological considerations,” in <span class="ltx_text ltx_font_italic" id="bib.bib45.1.1">Proceedings of the 22nd Annual International Symposium on Computer Architecture</span>, ISCA ’95, (New York, NY, USA), p. 24–36, Association for Computing Machinery, 1995. </span> </li> <li class="ltx_bibitem" id="bib.bib46"> <span class="ltx_tag ltx_tag_bibitem">[46]</span> <span class="ltx_bibblock"> “Splash2 Benchmark Suite.” </span> <span class="ltx_bibblock"><a class="ltx_ref ltx_url ltx_font_typewriter" href="https://github.com/liuyix/splash2_benchmark" title="">https://github.com/liuyix/splash2_benchmark</a>. </span> </li> </ul> </section> <figure class="ltx_float biography" id="id1"> <table class="ltx_tabular" id="id1.1"> <tr class="ltx_tr" id="id1.1.1"> <td class="ltx_td" id="id1.1.1.1"><img alt="[Uncaptioned image]" class="ltx_graphics ltx_img_portrait" height="125" id="id1.1.1.1.g1" src="extracted/6267023/images/runxi_bio.jpeg" width="82"/></td> <td class="ltx_td" id="id1.1.1.2"> <span class="ltx_inline-block" id="id1.1.1.2.1"> <span class="ltx_p" id="id1.1.1.2.1.1"><span class="ltx_text ltx_font_bold" id="id1.1.1.2.1.1.1">Runxi Wang (Graduate Student Member, IEEE)</span> is currently pursuing the Ph.D. degree at UM-SJTU Joint Institute at Shanghai Jiao Tong University, Shanghai, China. She received the B.E. degree in Electrical and Computer Engineering from Shanghai Jiao Tong University in 2023. Her current research interests include compute-in-memory and reconfigurable computing. She is currently the vice chair of the IEEE CASS SJTU Student Branch Chapter.</span> </span> </td> </tr> </table> </figure> <figure class="ltx_float biography" id="id2"> <table class="ltx_tabular" id="id2.1"> <tr class="ltx_tr" id="id2.1.1"> <td class="ltx_td" id="id2.1.1.1"><img alt="[Uncaptioned image]" class="ltx_graphics ltx_img_square" height="100" id="id2.1.1.1.g1" src="extracted/6267023/images/ziheng_w_bio.jpeg.jpg" width="100"/></td> <td class="ltx_td" id="id2.1.1.2"> <span class="ltx_inline-block" id="id2.1.1.2.1"> <span class="ltx_p" id="id2.1.1.2.1.1"><span class="ltx_text ltx_font_bold" id="id2.1.1.2.1.1.1">Ziheng Wang</span> is currently pursuing the B.E. degree at UM-SJTU Joint Institute at Shanghai Jiao Tong University, Shanghai, China. His current research interests include 3D ICs, computer architecture and computer system for AI.</span> </span> </td> </tr> </table> </figure> <figure class="ltx_float biography" id="id3"> <table class="ltx_tabular" id="id3.1"> <tr class="ltx_tr" id="id3.1.1"> <td class="ltx_td" id="id3.1.1.1"><img alt="[Uncaptioned image]" class="ltx_graphics ltx_img_portrait" height="125" id="id3.1.1.1.g1" src="extracted/6267023/images/ting_bio.jpg" width="89"/></td> <td class="ltx_td" id="id3.1.1.2"> <span class="ltx_inline-block" id="id3.1.1.2.1"> <span class="ltx_p" id="id3.1.1.2.1.1"><span class="ltx_text ltx_font_bold" id="id3.1.1.2.1.1.1">Ting Lin (Student Member, IEEE)</span> is currently pursuing the B.E. degree at UM-SJTU Joint Institute at Shanghai Jiao Tong University, Shanghai, China. Her current research interests include 3DICs and computer architecture for AI memory systems.</span> </span> </td> </tr> </table> </figure> <figure class="ltx_float biography" id="id4"> <table class="ltx_tabular" id="id4.1"> <tr class="ltx_tr" id="id4.1.1"> <td class="ltx_td" id="id4.1.1.1"><img alt="[Uncaptioned image]" class="ltx_graphics ltx_img_square" height="100" id="id4.1.1.1.g1" src="extracted/6267023/images/jacob_bio.jpg" width="100"/></td> <td class="ltx_td" id="id4.1.1.2"> <span class="ltx_inline-block" id="id4.1.1.2.1"> <span class="ltx_p" id="id4.1.1.2.1.1"><span class="ltx_text ltx_font_bold" id="id4.1.1.2.1.1.1">Jacob Michael Raby (Graduate Student Member, IEEE)</span> is currently pursuing an M.S. degree in Electronic Science and Technology at the UM-SJTU Joint Institute, Shanghai Jiao Tong University, Shanghai, China. He received a B.S. degree in Computer Engineering from the University of Mississippi, Oxford, MS, USA, in 2024. His research interests include electronic design automation (EDA) tools, 3D ICs, and artificial intelligence.</span> </span> </td> </tr> </table> </figure> <figure class="ltx_float biography" id="id5"> <table class="ltx_tabular" id="id5.1"> <tr class="ltx_tr" id="id5.1.1"> <td class="ltx_td" id="id5.1.1.1"><img alt="[Uncaptioned image]" class="ltx_graphics ltx_img_square" height="100" id="id5.1.1.1.g1" src="extracted/6267023/images/mircea_bio.jpeg" width="100"/></td> <td class="ltx_td" id="id5.1.1.2"> <span class="ltx_inline-block" id="id5.1.1.2.1"> <span class="ltx_p" id="id5.1.1.2.1.1"><span class="ltx_text ltx_font_bold" id="id5.1.1.2.1.1.1">Mircea R. Stan (Fellow, IEEE)</span> is currently the Virginia Microelectronics Consortium Professor and Director of Computer Engineering at the University of Virginia, Charlottesville, VA, USA. Prof. Stan is teaching and doing research in the areas of AI hardware, Processing in Memory, Cyber-Physical Systems, Computational RFID, spintronics, and nanoelectronics. He is Editor-in-Chief for the IEEE TVLSI, and was a Distinguished Lecturer for the IEEE Circuits and Systems (CAS) Society in 2020-2021, 2012-2013 and 2004-2005, and for the Solid-State Circuits Society (SSCS) in 2007-2008.</span> </span> </td> </tr> </table> </figure> <figure class="ltx_float biography" id="id6"> <table class="ltx_tabular" id="id6.1"> <tr class="ltx_tr" id="id6.1.1"> <td class="ltx_td" id="id6.1.1.1"><img alt="[Uncaptioned image]" class="ltx_graphics ltx_img_portrait" height="125" id="id6.1.1.1.g1" src="extracted/6267023/images/Xinfei_bio.jpg" width="99"/></td> <td class="ltx_td" id="id6.1.1.2"> <span class="ltx_inline-block" id="id6.1.1.2.1"> <span class="ltx_p" id="id6.1.1.2.1.1"><span class="ltx_text ltx_font_bold" id="id6.1.1.2.1.1.1">Xinfei Guo (Senior Member, IEEE)</span> is an Associate Professor with UM-SJTU Joint Institute at Shanghai Jiao Tong University (SJTU) in China. He received his Ph.D. in Computer Engineering from the University of Virginia. He serves as Associate Editor-in-Chief for IEEE TVLSI, Associate Editor for Integration, the VLSI Journal, and PC member or chair positions for over 30 international conferences. His research interests include software/hardware co-design for edge intelligence, machine learning-assisted EDA techniques and reconfigurable computing architectures. He is a senior member of ACM and IEEE.</span> </span> </td> </tr> </table> </figure> <div class="ltx_pagination ltx_role_newpage"></div> </article> </div> <footer class="ltx_page_footer"> <div class="ltx_page_logo">Generated on Mon Mar 10 13:42:30 2025 by <a class="ltx_LaTeXML_logo" href="http://dlmf.nist.gov/LaTeXML/"><span style="letter-spacing:-0.2em; margin-right:0.1em;">L<span class="ltx_font_smallcaps" style="position:relative; bottom:2.2pt;">a</span>T<span class="ltx_font_smallcaps" style="font-size:120%;position:relative; bottom:-0.2ex;">e</span></span><span style="font-size:90%; position:relative; bottom:-0.2ex;">XML</span><img alt="Mascot Sammy" src="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAAsAAAAOCAYAAAD5YeaVAAAAAXNSR0IArs4c6QAAAAZiS0dEAP8A/wD/oL2nkwAAAAlwSFlzAAALEwAACxMBAJqcGAAAAAd0SU1FB9wKExQZLWTEaOUAAAAddEVYdENvbW1lbnQAQ3JlYXRlZCB3aXRoIFRoZSBHSU1Q72QlbgAAAdpJREFUKM9tkL+L2nAARz9fPZNCKFapUn8kyI0e4iRHSR1Kb8ng0lJw6FYHFwv2LwhOpcWxTjeUunYqOmqd6hEoRDhtDWdA8ApRYsSUCDHNt5ul13vz4w0vWCgUnnEc975arX6ORqN3VqtVZbfbTQC4uEHANM3jSqXymFI6yWazP2KxWAXAL9zCUa1Wy2tXVxheKA9YNoR8Pt+aTqe4FVVVvz05O6MBhqUIBGk8Hn8HAOVy+T+XLJfLS4ZhTiRJgqIoVBRFIoric47jPnmeB1mW/9rr9ZpSSn3Lsmir1fJZlqWlUonKsvwWwD8ymc/nXwVBeLjf7xEKhdBut9Hr9WgmkyGEkJwsy5eHG5vN5g0AKIoCAEgkEkin0wQAfN9/cXPdheu6P33fBwB4ngcAcByHJpPJl+fn54mD3Gg0NrquXxeLRQAAwzAYj8cwTZPwPH9/sVg8PXweDAauqqr2cDjEer1GJBLBZDJBs9mE4zjwfZ85lAGg2+06hmGgXq+j3+/DsixYlgVN03a9Xu8jgCNCyIegIAgx13Vfd7vdu+FweG8YRkjXdWy329+dTgeSJD3ieZ7RNO0VAXAPwDEAO5VKndi2fWrb9jWl9Esul6PZbDY9Go1OZ7PZ9z/lyuD3OozU2wAAAABJRU5ErkJggg=="/></a> </div></footer> </div> </body> </html>