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id="toc-Valid_communications" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Valid_communications"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.4</span> <span>Valid communications</span> </div> </a> <ul id="toc-Valid_communications-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Interrupts" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Interrupts"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.5</span> <span>Interrupts</span> </div> </a> <ul id="toc-Interrupts-sublist" class="vector-toc-list"> <li id="toc-From_main_to_sub" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#From_main_to_sub"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.5.1</span> <span>From main to sub</span> </div> </a> <ul id="toc-From_main_to_sub-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-From_sub_to_main" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#From_sub_to_main"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.5.2</span> <span>From sub to main</span> </div> </a> <ul id="toc-From_sub_to_main-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Software_design" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Software_design"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.6</span> <span>Software design</span> </div> </a> <ul id="toc-Software_design-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Bit-banging_the_protocol" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Bit-banging_the_protocol"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.7</span> <span>Bit-banging the protocol</span> </div> </a> <ul id="toc-Bit-banging_the_protocol-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Bus_topologies" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Bus_topologies"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Bus topologies</span> </div> </a> <button aria-controls="toc-Bus_topologies-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Bus topologies subsection</span> </button> <ul id="toc-Bus_topologies-sublist" class="vector-toc-list"> <li id="toc-Multidrop_configuration" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Multidrop_configuration"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>Multidrop configuration</span> </div> </a> <ul id="toc-Multidrop_configuration-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Daisy_chain_configuration" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Daisy_chain_configuration"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2</span> <span>Daisy chain configuration</span> </div> </a> <ul id="toc-Daisy_chain_configuration-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Expander_configurations" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Expander_configurations"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3</span> <span>Expander configurations</span> </div> </a> <ul id="toc-Expander_configurations-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Pros_and_cons" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Pros_and_cons"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Pros and cons</span> </div> </a> <button aria-controls="toc-Pros_and_cons-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Pros and cons subsection</span> </button> <ul id="toc-Pros_and_cons-sublist" class="vector-toc-list"> <li id="toc-Advantages" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Advantages"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1</span> <span>Advantages</span> </div> </a> <ul id="toc-Advantages-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Disadvantages" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Disadvantages"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2</span> <span>Disadvantages</span> </div> </a> <ul id="toc-Disadvantages-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Applications" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Applications"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Applications</span> </div> </a> <ul id="toc-Applications-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Variations" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Variations"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Variations</span> </div> </a> <button aria-controls="toc-Variations-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Variations subsection</span> </button> <ul id="toc-Variations-sublist" class="vector-toc-list"> <li id="toc-Original_definition" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Original_definition"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1</span> <span>Original definition</span> </div> </a> <ul id="toc-Original_definition-sublist" class="vector-toc-list"> <li id="toc-AN991" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#AN991"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1.1</span> <span>AN991</span> </div> </a> <ul id="toc-AN991-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Timing_variations" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Timing_variations"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.2</span> <span>Timing variations</span> </div> </a> <ul id="toc-Timing_variations-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Transmission_size" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Transmission_size"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.3</span> <span>Transmission size</span> </div> </a> <ul id="toc-Transmission_size-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-No_chip_select" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#No_chip_select"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.4</span> <span>No chip select</span> </div> </a> <ul id="toc-No_chip_select-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Connectors" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Connectors"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.5</span> <span>Connectors</span> </div> </a> <ul id="toc-Connectors-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Flow_control" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Flow_control"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.6</span> <span>Flow control</span> </div> </a> <ul id="toc-Flow_control-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-SafeSPI" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#SafeSPI"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.7</span> <span>SafeSPI</span> </div> </a> <ul id="toc-SafeSPI-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-High_reliability_modifications" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#High_reliability_modifications"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.8</span> <span>High reliability modifications</span> </div> </a> <ul id="toc-High_reliability_modifications-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Intelligent_SPI_controllers" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Intelligent_SPI_controllers"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.9</span> <span>Intelligent SPI controllers</span> </div> </a> <ul id="toc-Intelligent_SPI_controllers-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Microwire" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Microwire"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.10</span> <span>Microwire</span> </div> </a> <ul id="toc-Microwire-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Microwire/Plus" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Microwire/Plus"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.11</span> <span>Microwire/Plus</span> </div> </a> <ul id="toc-Microwire/Plus-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Three-wire" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Three-wire"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.12</span> <span>Three-wire</span> </div> </a> <ul id="toc-Three-wire-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Dual_SPI" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Dual_SPI"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.13</span> <span>Dual SPI</span> </div> </a> <ul id="toc-Dual_SPI-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Quad_SPI" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Quad_SPI"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.14</span> <span>Quad SPI</span> </div> </a> <ul id="toc-Quad_SPI-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-QPI/SQI" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#QPI/SQI"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.15</span> <span>QPI/SQI</span> </div> </a> <ul id="toc-QPI/SQI-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Double_data_rate" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Double_data_rate"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.16</span> <span>Double data rate</span> </div> </a> <ul id="toc-Double_data_rate-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-JTAG" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#JTAG"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.17</span> <span>JTAG</span> </div> </a> <ul id="toc-JTAG-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-SGPIO" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#SGPIO"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.18</span> <span>SGPIO</span> </div> </a> <ul id="toc-SGPIO-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Intel's_Enhanced_Serial_Peripheral_Interface" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Intel's_Enhanced_Serial_Peripheral_Interface"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.19</span> <span>Intel's Enhanced Serial Peripheral Interface</span> </div> </a> <ul id="toc-Intel's_Enhanced_Serial_Peripheral_Interface-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Development_tools" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Development_tools"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>Development tools</span> </div> </a> <button aria-controls="toc-Development_tools-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Development tools subsection</span> </button> <ul id="toc-Development_tools-sublist" class="vector-toc-list"> <li id="toc-Single-board_computers" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Single-board_computers"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.1</span> <span>Single-board computers</span> </div> </a> <ul id="toc-Single-board_computers-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-USB_to_SPI_adapters" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#USB_to_SPI_adapters"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.2</span> <span>USB to SPI adapters</span> </div> </a> <ul id="toc-USB_to_SPI_adapters-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Protocol_analyzers" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Protocol_analyzers"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.3</span> <span>Protocol analyzers</span> </div> </a> <ul id="toc-Protocol_analyzers-sublist" class="vector-toc-list"> <li id="toc-Oscilloscopes" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Oscilloscopes"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.3.1</span> <span>Oscilloscopes</span> </div> </a> <ul id="toc-Oscilloscopes-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Alternative_terminology" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Alternative_terminology"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>Alternative terminology</span> </div> </a> <ul id="toc-Alternative_terminology-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Notes" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#Notes"> <div class="vector-toc-text"> <span class="vector-toc-numb">9</span> <span>Notes</span> </div> </a> <ul id="toc-Notes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">10</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">11</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Toggle the table of contents</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">Serial Peripheral Interface</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. Available in 29 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-29" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">29 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D9%88%D8%A7%D8%AC%D9%87%D8%A9_%D8%A7%D9%84%D8%B7%D8%B1%D9%81%D9%8A%D8%A7%D8%AA_%D8%A7%D9%84%D9%85%D8%AA%D8%B3%D9%84%D8%B3%D9%84%D8%A9" title="واجهة الطرفيات المتسلسلة – Arabic" lang="ar" hreflang="ar" data-title="واجهة الطرفيات المتسلسلة" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Catalan" lang="ca" hreflang="ca" data-title="Serial Peripheral Interface" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Czech" lang="cs" hreflang="cs" data-title="Serial Peripheral Interface" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-da mw-list-item"><a href="https://da.wikipedia.org/wiki/Serial_Peripheral_Interface-bus" title="Serial Peripheral Interface-bus – Danish" lang="da" hreflang="da" data-title="Serial Peripheral Interface-bus" data-language-autonym="Dansk" data-language-local-name="Danish" class="interlanguage-link-target"><span>Dansk</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – German" lang="de" hreflang="de" data-title="Serial Peripheral Interface" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/SPI" title="SPI – Estonian" lang="et" hreflang="et" data-title="SPI" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Spanish" lang="es" hreflang="es" data-title="Serial Peripheral Interface" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-eu mw-list-item"><a href="https://eu.wikipedia.org/wiki/SPI_(Serial_Peripherial_Interface)" title="SPI (Serial Peripherial Interface) – Basque" lang="eu" hreflang="eu" data-title="SPI (Serial Peripherial Interface)" data-language-autonym="Euskara" data-language-local-name="Basque" class="interlanguage-link-target"><span>Euskara</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%DA%AF%D8%B0%D8%B1%DA%AF%D8%A7%D9%87_%D8%A7%D8%B1%D8%AA%D8%A8%D8%A7%D8%B7_%D8%AC%D8%A7%D9%86%D8%A8%DB%8C_%D8%B3%D8%B1%DB%8C%D8%A7%D9%84" title="گذرگاه ارتباط جانبی سریال – Persian" lang="fa" hreflang="fa" data-title="گذرگاه ارتباط جانبی سریال" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – French" lang="fr" hreflang="fr" data-title="Serial Peripheral Interface" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EC%A7%81%EB%A0%AC_%EC%A3%BC%EB%B3%80%EA%B8%B0%EA%B8%B0_%EC%9D%B8%ED%84%B0%ED%8E%98%EC%9D%B4%EC%8A%A4_%EB%B2%84%EC%8A%A4" title="직렬 주변기기 인터페이스 버스 – Korean" lang="ko" hreflang="ko" data-title="직렬 주변기기 인터페이스 버스" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Italian" lang="it" hreflang="it" data-title="Serial Peripheral Interface" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/SPI" title="SPI – Hungarian" lang="hu" hreflang="hu" data-title="SPI" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Dutch" lang="nl" hreflang="nl" data-title="Serial Peripheral Interface" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/%E3%82%B7%E3%83%AA%E3%82%A2%E3%83%AB%E3%83%BB%E3%83%9A%E3%83%AA%E3%83%95%E3%82%A7%E3%83%A9%E3%83%AB%E3%83%BB%E3%82%A4%E3%83%B3%E3%82%BF%E3%83%95%E3%82%A7%E3%83%BC%E3%82%B9" title="シリアル・ペリフェラル・インタフェース – Japanese" lang="ja" hreflang="ja" data-title="シリアル・ペリフェラル・インタフェース" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/SPI" title="SPI – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="SPI" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Polish" lang="pl" hreflang="pl" data-title="Serial Peripheral Interface" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Portuguese" lang="pt" hreflang="pt" data-title="Serial Peripheral Interface" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ro mw-list-item"><a href="https://ro.wikipedia.org/wiki/Interfa%C8%9Ba_serial%C4%83_SPI" title="Interfața serială SPI – Romanian" lang="ro" hreflang="ro" data-title="Interfața serială SPI" data-language-autonym="Română" data-language-local-name="Romanian" class="interlanguage-link-target"><span>Română</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Russian" lang="ru" hreflang="ru" data-title="Serial Peripheral Interface" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-simple mw-list-item"><a href="https://simple.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Simple English" lang="en-simple" hreflang="en-simple" data-title="Serial Peripheral Interface" data-language-autonym="Simple English" data-language-local-name="Simple English" class="interlanguage-link-target"><span>Simple English</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Slovak" lang="sk" hreflang="sk" data-title="Serial Peripheral Interface" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-sl mw-list-item"><a href="https://sl.wikipedia.org/wiki/SPI" title="SPI – Slovenian" lang="sl" hreflang="sl" data-title="SPI" data-language-autonym="Slovenščina" data-language-local-name="Slovenian" class="interlanguage-link-target"><span>Slovenščina</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Finnish" lang="fi" hreflang="fi" data-title="Serial Peripheral Interface" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Swedish" lang="sv" hreflang="sv" data-title="Serial Peripheral Interface" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-tr mw-list-item"><a href="https://tr.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Turkish" lang="tr" hreflang="tr" data-title="Serial Peripheral Interface" data-language-autonym="Türkçe" data-language-local-name="Turkish" class="interlanguage-link-target"><span>Türkçe</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface – Ukrainian" lang="uk" hreflang="uk" data-title="Serial Peripheral Interface" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-vi mw-list-item"><a href="https://vi.wikipedia.org/wiki/Serial_Peripheral_Interface" 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dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Synchronous serial communication interface</div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-Cleanup_rewrite plainlinks metadata ambox ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><a href="/wiki/File:Crystal_Clear_app_kedit.svg" class="mw-file-description"><img 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The <a href="/wiki/Talk:Serial_Peripheral_Interface" title="Talk:Serial Peripheral Interface">talk page</a> may contain suggestions.</span> <span class="date-container"><i>(<span class="date">March 2021</span>)</i></span></div></td></tr></tbody></table> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-Recentism plainlinks metadata ambox ambox-style ambox-Recentism" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><span><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/0/0a/Ambox_clock_yellow.svg/40px-Ambox_clock_yellow.svg.png" decoding="async" width="40" height="40" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/0/0a/Ambox_clock_yellow.svg/60px-Ambox_clock_yellow.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/0/0a/Ambox_clock_yellow.svg/80px-Ambox_clock_yellow.svg.png 2x" data-file-width="620" data-file-height="620" /></span></span></div></td><td class="mbox-text"><div class="mbox-text-span">This article <b>appears to be <a href="/wiki/Wikipedia:Recentism" title="Wikipedia:Recentism">slanted towards recent events</a>.</b><span class="hide-when-compact"> Please try to keep recent events in historical perspective and <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Serial_Peripheral_Interface&action=edit">add more content</a> related to non-recent events.</span> <span class="date-container"><i>(<span class="date">December 2023</span>)</i></span></div></td></tr></tbody></table> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox infobox-table"><caption class="infobox-title">Serial Peripheral Interface (SPI)</caption><tbody><tr><th scope="row" class="infobox-label">Type</th><td colspan="3" class="infobox-data"> <a href="/wiki/Serial_communication" title="Serial communication">Serial communication</a> <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a></td></tr><tr><th colspan="4" class="infobox-header" style="background:#ccccff">Production history</th></tr><tr><th scope="row" class="infobox-label">Designer</th><td colspan="3" class="infobox-data"> <a href="/wiki/Motorola" title="Motorola">Motorola</a></td></tr><tr><th scope="row" class="infobox-label">Designed</th><td colspan="3" class="infobox-data"> Around early 1980s<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>note 1<span class="cite-bracket">]</span></a></sup></td></tr><tr><th scope="row" class="infobox-label">Manufacturer</th><td colspan="3" class="infobox-data"> various</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Daisy_chain_(electrical_engineering)" title="Daisy chain (electrical engineering)">Daisy chain</a></th><td colspan="3" class="infobox-data"> <a href="#Daisy_chain_configuration">Depends</a> on devices</td></tr><tr><th scope="row" class="infobox-label">Connector</th><td colspan="3" class="infobox-data"> Unspecified</td></tr><tr><th colspan="4" class="infobox-header" style="background:#ccccff">Electrical</th></tr><tr><th scope="row" class="infobox-label">Max. voltage</th><td colspan="3" class="infobox-data"> Unspecified</td></tr><tr><th scope="row" class="infobox-label">Max. current</th><td colspan="3" class="infobox-data"> Unspecified</td></tr><tr><th colspan="4" class="infobox-header" style="background:#ccccff">Data</th></tr><tr><th scope="row" class="infobox-label">Width</th><td colspan="3" class="infobox-data"> 1 bit (bidirectional)</td></tr><tr><th scope="row" class="infobox-label">Max. devices</th><td colspan="3" class="infobox-data"> <a href="#Multidrop_configuration">Multidrop</a> limited by chip selects. <a href="#Daisy_chain_configuration">Daisy chaining</a> unlimited.</td></tr><tr><th scope="row" class="infobox-label">Protocol</th><td colspan="3" class="infobox-data"> <a href="/wiki/Full-duplex" class="mw-redirect" title="Full-duplex">Full-duplex</a> <a href="/wiki/Serial_communication" title="Serial communication">serial</a></td></tr><tr><th colspan="4" class="infobox-header" style="background:#ccccff">Pinout</th></tr><tr><th scope="row" class="infobox-label">MOSI</th><td class="infobox-data infobox-data-a"> Master Out Slave In</td></tr><tr><th scope="row" class="infobox-label">MISO</th><td class="infobox-data infobox-data-a"> Master In Slave Out</td></tr><tr><th scope="row" class="infobox-label">SCLK</th><td class="infobox-data infobox-data-a"> Serial Clock</td></tr><tr><th scope="row" class="infobox-label"><span style="text-decoration:overline;">CS</span></th><td class="infobox-data infobox-data-a"> <a href="/wiki/Chip_Select" class="mw-redirect" title="Chip Select">Chip Select</a> (one or more)</td></tr><tr><td colspan="4" class="infobox-below"> (pins may have <a href="#Alternative_terminology">alternative names</a>)</td></tr></tbody></table> <p><b>Serial Peripheral Interface</b> (<b>SPI</b>) is a <a href="/wiki/De_facto_standard" title="De facto standard"><i>de facto</i> standard</a> (with many <a href="#Variations">variants</a>) for <a href="/wiki/Comparison_of_synchronous_and_asynchronous_signalling" title="Comparison of synchronous and asynchronous signalling">synchronous</a> <a href="/wiki/Serial_communication" title="Serial communication">serial communication</a>, used primarily in <a href="/wiki/Embedded_systems" class="mw-redirect" title="Embedded systems">embedded systems</a> for short-distance <a href="/wiki/Wired_communication" title="Wired communication">wired communication</a> between <a href="/wiki/Integrated_circuits" class="mw-redirect" title="Integrated circuits">integrated circuits</a>. </p><p>SPI follows a <a href="/wiki/Master%E2%80%93slave_(technology)" title="Master–slave (technology)">master–slave architecture</a>, <sup id="cite_ref-:0_2-0" class="reference"><a href="#cite_note-:0-2"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> called <i>main–sub</i> herein, <sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>note 2<span class="cite-bracket">]</span></a></sup> <sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>note 3<span class="cite-bracket">]</span></a></sup> where one<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>note 4<span class="cite-bracket">]</span></a></sup> main device <a href="/wiki/Signaling_(telecommunications)" title="Signaling (telecommunications)">orchestrates communication</a> with one or more sub (peripheral) devices by driving the <a href="/wiki/Clock_signal" title="Clock signal">clock</a> and <a href="/wiki/Chip_select" title="Chip select">chip select</a> signals. </p><p><a href="/wiki/Motorola" title="Motorola">Motorola</a>'s original specification (from the early 1980s) uses four <a href="/wiki/Logic_signal" class="mw-redirect" title="Logic signal">logic signals</a>, aka lines or wires, to support <a href="/wiki/Full_duplex" class="mw-redirect" title="Full duplex">full duplex</a> communication. It is sometimes called a <i>four-wire</i> <a href="/wiki/Serial_bus" class="mw-redirect" title="Serial bus">serial bus</a> to contrast with <a class="mw-selflink-fragment" href="#Three-wire">three-wire</a> variants which are <a href="/wiki/Half_duplex" class="mw-redirect" title="Half duplex">half duplex</a>, and with the <i>two-wire</i> <a href="/wiki/I%C2%B2C" title="I²C">I²C</a> and <a href="/wiki/1-Wire" title="1-Wire">1-Wire</a> serial buses. </p><p>Typical <a href="#Applications">applications</a> include interfacing <a href="/wiki/Microcontrollers" class="mw-redirect" title="Microcontrollers">microcontrollers</a> with peripheral chips for <a href="/wiki/Secure_Digital" class="mw-redirect" title="Secure Digital">Secure Digital</a> cards, <a href="/wiki/Liquid_crystal_display" class="mw-redirect" title="Liquid crystal display">liquid crystal displays</a>, <a href="/wiki/Analog-to-digital" class="mw-redirect" title="Analog-to-digital">analog-to-digital</a> and <a href="/wiki/Digital-to-analog_converters" class="mw-redirect" title="Digital-to-analog converters">digital-to-analog converters</a>, <a href="/wiki/Flash_memory#Serial_flash" title="Flash memory">flash</a> and <a href="/wiki/EEPROM#Serial_bus_devices" title="EEPROM">EEPROM</a> memory, and various communication chips. </p><p>Although SPI is a synchronous serial interface,<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> it is different from <a href="/wiki/Synchronous_Serial_Interface" title="Synchronous Serial Interface">Synchronous Serial Interface</a> (SSI). SSI employs <a href="/wiki/Differential_signaling" class="mw-redirect" title="Differential signaling">differential signaling</a> and provides only a single <a href="/wiki/Simplex_communication" class="mw-redirect" title="Simplex communication">simplex communication</a> channel. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Operation">Operation</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=1" title="Edit section: Operation"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:SPI_basic_operation,_single_Main_%26_Sub.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/c/c8/SPI_basic_operation%2C_single_Main_%26_Sub.svg/368px-SPI_basic_operation%2C_single_Main_%26_Sub.svg.png" decoding="async" width="368" height="75" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/c/c8/SPI_basic_operation%2C_single_Main_%26_Sub.svg/552px-SPI_basic_operation%2C_single_Main_%26_Sub.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/c/c8/SPI_basic_operation%2C_single_Main_%26_Sub.svg/736px-SPI_basic_operation%2C_single_Main_%26_Sub.svg.png 2x" data-file-width="1488" data-file-height="305" /></a><figcaption>Figure 1: Common SPI connectivity with a single sub.</figcaption></figure> <p>Commonly, SPI has four logic signals. <a href="#Variations">Variations</a> may use different <a href="#Alternative_terminology">names</a> or have different signals. Historical terms are shown in parentheses. </p> <dl><dd><table class="wikitable"> <tbody><tr> <th>Abbr.</th> <th>Name</th> <th>Description </th></tr> <tr> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;"><span style="text-decoration:overline;">CS</span></div></td> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;">chip select</div></td> <td><a href="/wiki/Logic_level#Active_state" title="Logic level">Active-low</a> <a href="/wiki/Chip_select" title="Chip select">chip select</a> signal from main to<br />enable communication with a specific sub device </td></tr> <tr> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;">SCLK</div></td> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;">serial clock</div></td> <td><a href="/wiki/Clock_signal" title="Clock signal">Clock signal</a> from main </td></tr> <tr> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;">MOSI</div></td> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;">main<span class="nowrap"> </span>out,<span class="nowrap"> </span>sub<span class="nowrap"> </span>in<br /><span style="font-size:85%;">(master<span class="nowrap"> </span>out,<span class="nowrap"> </span>slave<span class="nowrap"> </span>in)</span></div></td> <td><a href="/wiki/Serial_communication" title="Serial communication">Serial data</a> from main, <a href="/wiki/Most-significant_bit" class="mw-redirect" title="Most-significant bit">most-significant bit</a> first </td></tr> <tr> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;">MISO</div></td> <td><div class="center" style="width:auto; margin-left:auto; margin-right:auto;">main<span class="nowrap"> </span>in,<span class="nowrap"> </span>sub<span class="nowrap"> </span>out<br /><span style="font-size:85%;">(master<span class="nowrap"> </span>in,<span class="nowrap"> </span>slave<span class="nowrap"> </span>out)</span></div></td> <td><a href="/wiki/Serial_communication" title="Serial communication">Serial data</a> from sub, most-significant bit first </td></tr></tbody></table></dd></dl> <p>MOSI on a main outputs to MOSI on a sub. MISO on a sub outputs to MISO on a main. </p><p>Each device internally uses a <a href="/wiki/Shift_register" title="Shift register">shift register</a> for serial communication, which together forms an inter-chip <a href="/wiki/Circular_buffer" title="Circular buffer">circular buffer</a>. </p><p>Sub devices should use <a href="/wiki/Tri-state_output" class="mw-redirect" title="Tri-state output">tri-state outputs</a> so their MISO signal becomes <a href="/wiki/High_impedance" title="High impedance">high impedance</a> (electrically disconnected) when the device is not selected. Subs without tri-state outputs cannot share a MISO line with other subs without using an external tri-state buffer. </p> <div class="mw-heading mw-heading3"><h3 id="Data_transmission">Data transmission</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=2" title="Edit section: Data transmission"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>To begin communication, the SPI main first selects a sub device by pulling its <span style="text-decoration:overline;">CS</span> low. (Note: the bar above <span style="text-decoration:overline;">CS</span> indicates it is an <a href="/wiki/Active_low" class="mw-redirect" title="Active low">active low</a> signal, so a low voltage means "selected", while a high voltage means "not selected") </p><p>If a waiting period is required, such as for an analog-to-digital conversion, the main must wait for at least that period of time before issuing clock cycles.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>note 5<span class="cite-bracket">]</span></a></sup> </p><p>During each SPI clock cycle, full-duplex transmission of a single bit occurs. The main sends a bit on the MOSI line while the sub sends a bit on the MISO line, and then each reads their corresponding incoming bit. This sequence is maintained even when only one-directional data transfer is intended. </p><p>Transmission using a single sub (Figure 1) involves one shift register in the main and one shift register in the sub, both of some given word size (e.g. 8 bits),<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>note 6<span class="cite-bracket">]</span></a></sup> connected in a virtual <a href="/wiki/Ring_topology" class="mw-redirect" title="Ring topology">ring topology</a>. Data is usually shifted out with the <a href="/wiki/Most-significant_bit" class="mw-redirect" title="Most-significant bit">most-significant bit</a> (MSB) first.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>note 7<span class="cite-bracket">]</span></a></sup> On the clock edge, both main and sub shift out a bit to its counterpart. On the next clock edge, each receiver samples the transmitted bit and stores it in the shift register as the new least-significant bit. After all bits have been shifted out and in, the main and sub have exchanged register values. If more data needs to be exchanged, the shift registers are reloaded and the process repeats. Transmission may continue for any number of clock cycles. When complete, the main stops toggling the clock signal, and typically deselects the sub. </p><p>If a single sub device is used, its <span style="text-decoration:overline;">CS</span> pin <i>may</i> be fixed to <a href="/wiki/Logic_level" title="Logic level">logic low</a> if the sub permits it. With multiple sub devices, a <a href="#Multidrop_configuration">multidrop configuration</a> requires an independent <span style="text-decoration:overline;">CS</span> signal from the main for each sub device, while a <a href="#Daisy_chain_configuration">daisy-chain configuration</a> only requires one <span style="text-decoration:overline;">CS</span> signal. </p><p>Every sub on the bus that has not been selected should disregard the input clock and MOSI signals. And to prevent <a href="/wiki/Bus_contention" title="Bus contention">contention</a> on MISO, non-selected subs must use <a href="/wiki/Three-state_logic" title="Three-state logic">tristate</a> output. Subs that aren't already tristate will need external tristate buffers to ensure this.<sup id="cite_ref-Better_SPI_Bus_Design_in_3_Steps_10-0" class="reference"><a href="#cite_note-Better_SPI_Bus_Design_in_3_Steps-10"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Clock_polarity_and_phase">Clock polarity and phase</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=3" title="Edit section: Clock polarity and phase"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In addition to setting the clock frequency, the main must also configure the clock polarity and phase with respect to the data. Motorola<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:4_12-0" class="reference"><a href="#cite_note-:4-12"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> named these two options as CPOL and CPHA (for <b>c</b>lock <b>pol</b>arity and <b>c</b>lock <b>pha</b>se) respectively, a convention most vendors have also adopted. </p> <figure typeof="mw:File/Thumb"><a href="/wiki/File:SPI_timing_diagram_CS.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/f/f0/SPI_timing_diagram_CS.svg/338px-SPI_timing_diagram_CS.svg.png" decoding="async" width="338" height="195" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/f/f0/SPI_timing_diagram_CS.svg/507px-SPI_timing_diagram_CS.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/f/f0/SPI_timing_diagram_CS.svg/676px-SPI_timing_diagram_CS.svg.png 2x" data-file-width="330" data-file-height="190" /></a><figcaption>SPI <a href="/wiki/Digital_timing_diagram" title="Digital timing diagram">timing diagram</a> for both clock polarities and phases. Data bits output on blue lines if CPHA=0, or on red lines if CPHA=1, and sample on opposite-colored lines. Numbers identify data bits. Z indicates <a href="/wiki/High_impedance" title="High impedance">high impedance</a>.</figcaption></figure> <p>The SPI <a href="/wiki/Digital_timing_diagram" title="Digital timing diagram">timing diagram</a> shown is further described below: </p> <ul><li>CPOL represents the polarity of the clock. Polarities can be converted with a simple <a href="/wiki/Inverter_(logic_gate)" title="Inverter (logic gate)">inverter</a>. <ul><li>SCLK<sub>CPOL=0</sub> is a clock which idles at the <a href="/wiki/Logical_low" class="mw-redirect" title="Logical low">logical low</a> voltage.</li> <li>SCLK<sub>CPOL=1</sub> is a clock which idles at the logical high voltage.</li></ul></li> <li>CPHA represents the <a href="/wiki/Phase_(waves)" title="Phase (waves)">phase</a> of each data bit's transmission cycle relative to SCLK. <ul><li>For CPHA=0: <ul><li>The first data bit is output <i>immediately</i> when <span style="text-decoration:overline;">CS</span> activates.</li> <li>Subsequent bits are output when SCLK transitions <i>to</i> its idle voltage level.</li> <li>Sampling occurs when SCLK transitions <i>from</i> its idle voltage level.</li></ul></li> <li>For CPHA=1: <ul><li>The first data bit is output on SCLK's first clock edge <i>after</i> <span style="text-decoration:overline;">CS</span> activates.</li> <li>Subsequent bits are output when SCLK transitions <i>from</i> its idle voltage level.</li> <li>Sampling occurs when SCLK transitions <i>to</i> its idle voltage level.</li></ul></li> <li>Conversion between these two phases is non-trivial.</li> <li>Note: MOSI and MISO signals are usually stable (at their reception points) for the half cycle until the next bit's transmission cycle starts, so SPI main and sub devices may sample data at different points in that half cycle, for flexibility, despite the original specification.</li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Mode_numbers">Mode numbers</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=4" title="Edit section: Mode numbers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The combinations of polarity and phases are referred to by these "SPI mode" numbers with CPOL as the high order bit and CPHA as the low order bit: </p> <table class="wikitable"> <tbody><tr> <th>SPI mode </th> <th>Clock polarity<br />(CPOL) </th> <th>Clock phase<br />(CPHA) </th> <th>Data is shifted out on </th> <th>Data is sampled on </th></tr> <tr> <td>0</td> <td>0</td> <td>0 </td> <td>falling SCLK, and when <span style="text-decoration:overline;">CS</span> activates</td> <td>rising SCLK </td></tr> <tr> <td>1</td> <td>0</td> <td>1 </td> <td>rising SCLK</td> <td>falling SCLK </td></tr> <tr> <td>2</td> <td>1</td> <td>0 </td> <td>rising SCLK, and when <span style="text-decoration:overline;">CS</span> activates</td> <td>falling SCLK </td></tr> <tr> <td>3</td> <td>1</td> <td>1 </td> <td>falling SCLK</td> <td>rising SCLK </td></tr></tbody></table> <p>Notes: </p> <ul><li>Another commonly used notation represents the mode as a (CPOL, CPHA) tuple; e.g., the value '(0, 1)' would indicate CPOL=0 and CPHA=1.</li> <li>In Full Duplex operation, the main device could transmit and receive with different modes. For instance, it could transmit in Mode 0 and be receiving in Mode 1 at the same time.</li> <li>Different vendors may use different naming schemes, like CKE for clock edge or NCPHA for the inversion of CPHA.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Valid_communications">Valid communications</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=5" title="Edit section: Valid communications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Some sub devices are designed to ignore any SPI communications in which the number of clock pulses is greater than specified. Others do not care, ignoring extra inputs and continuing to shift the same output bit. It is common for different devices to use SPI communications with different lengths, as, for example, when SPI is used to access an IC's <a href="/wiki/Scan_chain" title="Scan chain">scan chain</a> by issuing a command word of one size (perhaps 32 bits) and then getting a response of a different size (perhaps 153 bits, one for each pin in that scan chain). </p> <div class="mw-heading mw-heading3"><h3 id="Interrupts">Interrupts</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=6" title="Edit section: Interrupts"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Interrupts are outside the scope of SPI; their usage is neither forbidden nor specified, and so may optionally be implemented. </p> <div class="mw-heading mw-heading4"><h4 id="From_main_to_sub">From main to sub</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=7" title="Edit section: From main to sub"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Microcontrollers configured as sub devices may have hardware support for generating interrupt signals to themselves when data words are received or overflow occurs in a receive <a href="/wiki/FIFO_(computing_and_electronics)" title="FIFO (computing and electronics)">FIFO</a> buffer,<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> and may also set up an interrupt routine when their chip select input line is pulled low or high. </p> <div class="mw-heading mw-heading4"><h4 id="From_sub_to_main">From sub to main</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=8" title="Edit section: From sub to main"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SPI subs sometimes use an <a href="/wiki/Out-of-band_signal" class="mw-redirect" title="Out-of-band signal">out-of-band signal</a> (another wire) to send an interrupt signal to a main. Examples include pen-down interrupts from <a href="/wiki/Touchscreen" title="Touchscreen">touchscreen</a> sensors, thermal limit alerts from <a href="/wiki/List_of_temperature_sensors" title="List of temperature sensors">temperature sensors</a>, alarms issued by <a href="/wiki/Real-time_clock" title="Real-time clock">real-time clock</a> chips, <a href="/wiki/Secure_Digital#SDIO" class="mw-redirect" title="Secure Digital">SDIO</a><sup id="cite_ref-3wireSDI_14-0" class="reference"><a href="#cite_note-3wireSDI-14"><span class="cite-bracket">[</span>note 8<span class="cite-bracket">]</span></a></sup> and <a href="/wiki/Audio_jack" class="mw-redirect" title="Audio jack">audio jack</a> insertions for an <a href="/wiki/Audio_codec" title="Audio codec">audio codec</a>. Interrupts to main may also be faked by using <a href="/wiki/Polling_(computer_science)" title="Polling (computer science)">polling</a> (similarly to <a href="/wiki/USB_1.1" class="mw-redirect" title="USB 1.1">USB 1.1</a> and <a href="/wiki/USB_2.0" class="mw-redirect" title="USB 2.0">2.0</a>). </p> <div class="mw-heading mw-heading3"><h3 id="Software_design">Software design</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=9" title="Edit section: Software design"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SPI lends itself to a "bus driver" software design. Software for attached devices is written to call a "bus driver" that handles the actual low-level SPI hardware. This permits the driver code for attached devices to port easily to other hardware or a <a href="/wiki/Bit-banging" class="mw-redirect" title="Bit-banging">bit-banging</a> software implementation. </p> <div class="mw-heading mw-heading3"><h3 id="Bit-banging_the_protocol">Bit-banging the protocol</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=10" title="Edit section: Bit-banging the protocol"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The <a href="/wiki/Pseudocode" title="Pseudocode">pseudocode</a> below outlines a software-implementation ("<a href="/wiki/Bit-banging" class="mw-redirect" title="Bit-banging">bit-banging</a>") of SPI's protocol as a main with simultaneous output and input. This pseudocode is for CPHA=0 and CPOL=0, thus SCLK is pulled low before <span style="text-decoration:overline;">CS</span> is activated and bits are inputted on SCLK's rising edge while bits are outputted on SCLK's falling edge. </p> <ul><li>Initialize SCLK as low and <span style="text-decoration:overline;">CS</span> as high</li> <li>Pull <span style="text-decoration:overline;">CS</span> low to select the sub</li> <li>Loop for however many number of bytes to transfer:<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>note 9<span class="cite-bracket">]</span></a></sup> <ul><li>Initialize<code class="mw-highlight mw-highlight-lang-c mw-content-ltr" style="" dir="ltr"><span class="n">byte_out</span></code>with the next output byte to transmit</li> <li>Loop 8 times: <ul><li><a href="/wiki/Left-shift_operator" class="mw-redirect" title="Left-shift operator">Left-Shift</a><sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>note 10<span class="cite-bracket">]</span></a></sup> the next output bit from<code class="mw-highlight mw-highlight-lang-c mw-content-ltr" style="" dir="ltr"><span class="n">byte_out</span></code>to MOSI</li> <li><a href="/wiki/NOP_(code)" title="NOP (code)">NOP</a> for the sub's <a href="/wiki/Setup_time" class="mw-redirect" title="Setup time">setup time</a></li> <li>Pull SCLK high</li> <li>Left-Shift the next input bit from MISO into<code class="mw-highlight mw-highlight-lang-c mw-content-ltr" style="" dir="ltr"><span class="n">byte_in</span></code></li> <li>NOP for the sub's hold time</li> <li>Pull SCLK low</li></ul></li> <li><code class="mw-highlight mw-highlight-lang-c mw-content-ltr" style="" dir="ltr"><span class="n">byte_in</span></code>now contains that recently-received byte and can be used as desired</li></ul></li> <li>Pull <span style="text-decoration:overline;">CS</span> high to unselect the sub</li></ul> <p>Bit-banging a sub's protocol is similar but different from above. An implementation might involve <a href="/wiki/Busy_waiting" title="Busy waiting">busy waiting</a> for <span style="text-decoration:overline;">CS</span> to fall or triggering an <a href="/wiki/Interrupt_handler" title="Interrupt handler">interrupt routine</a> when <span style="text-decoration:overline;">CS</span> falls, and then shifting in and out bits when the received SCLK changes appropriately for however long the transfer size is. </p> <div class="mw-heading mw-heading2"><h2 id="Bus_topologies">Bus topologies</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=11" title="Edit section: Bus topologies"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Though the previous operation section focused on a basic interface with a single sub, SPI can instead communicate with multiple subs using multidrop, daisy chain, or expander configurations. </p> <div class="mw-heading mw-heading3"><h3 id="Multidrop_configuration">Multidrop configuration</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=12" title="Edit section: Multidrop configuration"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:SPI_main_sub_multidrop.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/3a/SPI_main_sub_multidrop.svg/150px-SPI_main_sub_multidrop.svg.png" decoding="async" width="150" height="216" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/3a/SPI_main_sub_multidrop.svg/224px-SPI_main_sub_multidrop.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/3a/SPI_main_sub_multidrop.svg/299px-SPI_main_sub_multidrop.svg.png 2x" data-file-width="815" data-file-height="1176" /></a><figcaption>Multidrop SPI bus</figcaption></figure> <p>In the <a href="/wiki/Multidrop_bus" title="Multidrop bus">multidrop bus</a> configuration, each sub has its own <span style="text-decoration:overline;">CS</span>, and the main selects only one at a time. MISO, SCLK, and MOSI are each shared by all devices. This is the way SPI is normally used. </p><p> Since the MISO pins of the subs are connected together, they are required to be tri-state pins (high, low or high-impedance), where the high-impedance output must be applied when the sub is not selected. Sub devices not supporting tri-state may be used in multidrop configuration by adding a tri-state buffer chip controlled by its <span style="text-decoration:overline;">CS</span> signal.<sup id="cite_ref-Better_SPI_Bus_Design_in_3_Steps_10-1" class="reference"><a href="#cite_note-Better_SPI_Bus_Design_in_3_Steps-10"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> (Since only a single signal line needs to be tristated per sub, one typical standard logic chip that contains four tristate buffers with independent gate inputs can be used to interface up to four sub devices to an SPI bus)</p><blockquote><p>Caveat: All <span style="text-decoration:overline;">CS</span> signals should start high (to indicate no chips are selected) before sending initialization messages to any sub, so other uninitialized subs ignore messages not addressed to them. This is a concern if the main uses <a href="/wiki/General-purpose_input/output" title="General-purpose input/output">general-purpose input/output (GPIO) pins</a> (which may default to an undefined state) for <span style="text-decoration:overline;">CS</span> and if the main uses separate software libraries to initialize each device. One solution is to configure all GPIOs used for <span style="text-decoration:overline;">CS</span> to output a high voltage for <i>all</i> subs <i>before</i> running initialization code from any of those software libraries. Another solution is to add a <a href="/wiki/Pull-up_resistor" title="Pull-up resistor">pull-up resistor</a> on each <span style="text-decoration:overline;">CS</span>, to ensure that all <span style="text-decoration:overline;">CS</span> signals are initially high.<sup id="cite_ref-Better_SPI_Bus_Design_in_3_Steps_10-2" class="reference"><a href="#cite_note-Better_SPI_Bus_Design_in_3_Steps-10"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup></p></blockquote> <div class="mw-heading mw-heading3"><h3 id="Daisy_chain_configuration">Daisy chain configuration</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=13" title="Edit section: Daisy chain configuration"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:SPI_main_sub_daisychain.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/9/99/SPI_main_sub_daisychain.svg/128px-SPI_main_sub_daisychain.svg.png" decoding="async" width="128" height="229" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/9/99/SPI_main_sub_daisychain.svg/192px-SPI_main_sub_daisychain.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/9/99/SPI_main_sub_daisychain.svg/255px-SPI_main_sub_daisychain.svg.png 2x" data-file-width="656" data-file-height="1176" /></a><figcaption>Daisy-chained SPI</figcaption></figure> <p>Some products that implement SPI may be connected in a <a href="/wiki/Daisy_chain_(electrical_engineering)" title="Daisy chain (electrical engineering)">daisy chain</a> configuration, where the first sub's output is connected to the second sub's input, and so on with subsequent subs, until the final sub, whose output is connected back to the main's input. This effectively merges the individual communication shift registers of each sub to form a single larger combined <a href="/wiki/Shift_register" title="Shift register">shift register</a> that shifts data through the chain. This configuration only requires a single <span style="text-decoration:overline;">CS</span> line from the main, rather than a separate <span style="text-decoration:overline;">CS</span> line for each sub.<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p><p>In addition to using SPI-specific subs, daisy-chained SPI can include <a href="/wiki/Discrete_component" class="mw-redirect" title="Discrete component">discrete</a> shift registers for <a href="/wiki/Shift_register#More_I/O_pins" title="Shift register">more pins</a> of inputs (e.g. using the <a href="/wiki/Shift_register#Parallel-in_serial-out_(PISO)" title="Shift register">parallel-in serial-out</a> <a href="/wiki/List_of_7400-series_integrated_circuits" title="List of 7400-series integrated circuits">74</a>xx165)<sup id="cite_ref-:3_18-0" class="reference"><a href="#cite_note-:3-18"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> or outputs (e.g. using the <a href="/wiki/Shift_register#Serial-in_parallel-out_(SIPO)" title="Shift register">serial-in parallel-out</a> <a href="/wiki/List_of_7400-series_integrated_circuits" title="List of 7400-series integrated circuits">74</a>xx595)<sup id="cite_ref-:2_19-0" class="reference"><a href="#cite_note-:2-19"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> chained indefinitely. Other applications that can potentially interoperate with daisy-chained SPI include <a href="/wiki/SGPIO" title="SGPIO">SGPIO</a>, <a href="/wiki/JTAG" title="JTAG">JTAG</a>,<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> and <a href="/wiki/I2C" class="mw-redirect" title="I2C">I<sup>2</sup>C</a>. </p> <div class="mw-heading mw-heading3"><h3 id="Expander_configurations">Expander configurations</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=14" title="Edit section: Expander configurations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Expander configurations use SPI-controlled addressing units (e.g. <a href="/wiki/Binary_decoder" title="Binary decoder">binary decoders</a>, <a href="/wiki/Demultiplexer" class="mw-redirect" title="Demultiplexer">demultiplexers</a>, or shift registers) to add chip selects. </p><p>For example, one <span style="text-decoration:overline;">CS</span> can be used for transmitting to a SPI-controlled demultiplexer an index number controlling its select signals, while another <span style="text-decoration:overline;">CS</span> is routed through that demultiplexer according to that index to select the desired sub.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Pros_and_cons">Pros and cons</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=15" title="Edit section: Pros and cons"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Advantages">Advantages</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=16" title="Edit section: Advantages"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Full duplex communication in the default version of this protocol</li> <li><a href="/wiki/Push-pull_output" class="mw-redirect" title="Push-pull output">Push-pull drivers</a> (as opposed to <a href="/wiki/Open_drain" class="mw-redirect" title="Open drain">open drain</a>) provide relatively good signal integrity and high speed</li> <li>Higher <a href="/wiki/Throughput" class="mw-redirect" title="Throughput">throughput</a> than <a href="/wiki/I%C2%B2C" title="I²C">I²C</a> or <a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a> <ul><li>SPI's protocol has no maximum clock speed, however: <ul><li>Individual devices specify acceptable clock frequencies</li> <li>Wiring and electronics limit frequency</li></ul></li></ul></li> <li>Complete protocol flexibility for the bits transferred <ul><li>Not limited to 8-bit symbols</li> <li>Arbitrary choice of message size, content, and purpose</li></ul></li> <li>Simple hardware and interfacing <ul><li>Hardware implementation for subs only requires a selectable shift register <ul><li>Subs use the main's clock and hence do not need precision oscillators</li> <li>Subs do not need a unique <a href="/wiki/Address_space" title="Address space">address</a> –  unlike <a href="/wiki/I%C2%B2C" title="I²C">I²C</a> or <a href="/wiki/GPIB" title="GPIB">GPIB</a> or <a href="/wiki/SCSI" title="SCSI">SCSI</a></li> <li>Mains only additionally require generation of clock and <span style="text-decoration:overline;">CS</span> signals</li> <li>Results in simple bit-banged software implementation</li></ul></li> <li>Uses only four pins on IC packages, and wires in board layouts or connectors, much fewer than <a href="/wiki/Parallel_communication" title="Parallel communication">parallel interfaces</a> <ul><li>At most one unique signal per device (<span style="text-decoration:overline;">CS</span>); all others are shared <ul><li>Note: the daisy-chain configuration doesn't need more than one shared <span style="text-decoration:overline;">CS</span></li></ul></li></ul></li> <li>Typically lower power requirements than <a href="/wiki/I%C2%B2C" title="I²C">I²C</a> or SMBus due to less circuitry (including pull up resistors)</li> <li>Single main means no <a href="/wiki/Bus_arbitration" class="mw-redirect" title="Bus arbitration">bus arbitration</a> (and associated failure modes) - unlike <a href="/wiki/CAN-bus" class="mw-redirect" title="CAN-bus">CAN-bus</a></li> <li>Transceivers are not needed - unlike <a href="/wiki/CAN-bus" class="mw-redirect" title="CAN-bus">CAN-bus</a></li> <li>Signals are unidirectional, allowing for easy <a href="/wiki/Galvanic_isolation" title="Galvanic isolation">galvanic isolation</a></li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Disadvantages">Disadvantages</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=17" title="Edit section: Disadvantages"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Requires more pins on IC packages than <a href="/wiki/I%C2%B2C" title="I²C">I²C</a>, even in <a class="mw-selflink-fragment" href="#Three-wire">three-wire</a> variants</li> <li>Only handles short distances compared to <a href="/wiki/RS-232" title="RS-232">RS-232</a>, <a href="/wiki/RS-485" title="RS-485">RS-485</a>, or <a href="/wiki/CAN-bus" class="mw-redirect" title="CAN-bus">CAN-bus</a> (though distance can be extended with the use of transceivers like <a href="/wiki/RS-422" title="RS-422">RS-422</a>)</li> <li>Extensibility severely reduced when multiple subs using different SPI Modes are required <ul><li>Access is slowed down when main frequently needs to reinitialize in different modes</li></ul></li> <li>No formal standard <ul><li>So validating conformance is not possible</li> <li>Many existing variations complicate support</li></ul></li> <li>No built-in protocol support for some conveniences: <ul><li>No hardware <a href="/wiki/Flow_control_(data)" title="Flow control (data)">flow control</a> by the sub (but the main can delay the next clock edge to slow the transfer rate)</li> <li>No hardware sub acknowledgment (the main could be transmitting to nowhere and not know it)</li> <li>No error-checking protocol</li> <li>No <a href="/wiki/Hot_swapping" title="Hot swapping">hot swapping</a> (dynamically adding nodes)</li> <li>Interrupts are outside the scope of SPI (see <a href="#Interrupts">§ Interrupts</a>)</li></ul></li></ul> <div class="mw-heading mw-heading2"><h2 id="Applications">Applications</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=18" title="Edit section: Applications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1237032888/mw-parser-output/.tmulti">.mw-parser-output .tmulti .multiimageinner{display:flex;flex-direction:column}.mw-parser-output .tmulti .trow{display:flex;flex-direction:row;clear:left;flex-wrap:wrap;width:100%;box-sizing:border-box}.mw-parser-output .tmulti .tsingle{margin:1px;float:left}.mw-parser-output .tmulti .theader{clear:both;font-weight:bold;text-align:center;align-self:center;background-color:transparent;width:100%}.mw-parser-output .tmulti .thumbcaption{background-color:transparent}.mw-parser-output .tmulti .text-align-left{text-align:left}.mw-parser-output .tmulti .text-align-right{text-align:right}.mw-parser-output .tmulti .text-align-center{text-align:center}@media all and (max-width:720px){.mw-parser-output .tmulti .thumbinner{width:100%!important;box-sizing:border-box;max-width:none!important;align-items:center}.mw-parser-output .tmulti .trow{justify-content:center}.mw-parser-output .tmulti .tsingle{float:none!important;max-width:100%!important;box-sizing:border-box;text-align:center}.mw-parser-output .tmulti .tsingle .thumbcaption{text-align:left}.mw-parser-output .tmulti .trow>.thumbcaption{text-align:center}}@media screen{html.skin-theme-clientpref-night .mw-parser-output .tmulti .multiimageinner img{background-color:white}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .tmulti .multiimageinner img{background-color:white}}</style><div class="thumb tmulti tright"><div class="thumbinner multiimageinner" style="width:393px;max-width:393px"><div class="trow"><div class="tsingle" style="width:129px;max-width:129px"><div class="thumbimage" style="height:126px;overflow:hidden"><span typeof="mw:File"><a href="/wiki/File:ATI_Radeon_X1300_256MB_-_Atmel_25F512AN-5397.jpg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/ATI_Radeon_X1300_256MB_-_Atmel_25F512AN-5397.jpg/127px-ATI_Radeon_X1300_256MB_-_Atmel_25F512AN-5397.jpg" decoding="async" width="127" height="127" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/ATI_Radeon_X1300_256MB_-_Atmel_25F512AN-5397.jpg/191px-ATI_Radeon_X1300_256MB_-_Atmel_25F512AN-5397.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/ATI_Radeon_X1300_256MB_-_Atmel_25F512AN-5397.jpg/254px-ATI_Radeon_X1300_256MB_-_Atmel_25F512AN-5397.jpg 2x" data-file-width="2004" data-file-height="2004" /></a></span></div><div class="thumbcaption">SPI Memory by <a href="/wiki/Atmel" title="Atmel">Atmel</a></div></div><div class="tsingle" style="width:129px;max-width:129px"><div class="thumbimage" style="height:126px;overflow:hidden"><span typeof="mw:File"><a href="/wiki/File:ADSV-931_Mini_Docking_Station_-_LAN_module_-_Fairchild_93C46-93553.jpg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/3/31/ADSV-931_Mini_Docking_Station_-_LAN_module_-_Fairchild_93C46-93553.jpg/127px-ADSV-931_Mini_Docking_Station_-_LAN_module_-_Fairchild_93C46-93553.jpg" decoding="async" width="127" height="127" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/31/ADSV-931_Mini_Docking_Station_-_LAN_module_-_Fairchild_93C46-93553.jpg/191px-ADSV-931_Mini_Docking_Station_-_LAN_module_-_Fairchild_93C46-93553.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/31/ADSV-931_Mini_Docking_Station_-_LAN_module_-_Fairchild_93C46-93553.jpg/254px-ADSV-931_Mini_Docking_Station_-_LAN_module_-_Fairchild_93C46-93553.jpg 2x" data-file-width="1676" data-file-height="1676" /></a></span></div><div class="thumbcaption"><a href="/wiki/Fairchild_Semiconductor" title="Fairchild Semiconductor">Fairchild</a> EEPROM using <a href="#Microwire">Microwire</a></div></div><div class="tsingle" style="width:129px;max-width:129px"><div class="thumbimage" style="height:126px;overflow:hidden"><span typeof="mw:File"><a href="/wiki/File:Sumup_AIR1_E205_-_board_-_Microchip_26F032B-1521.jpg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d7/Sumup_AIR1_E205_-_board_-_Microchip_26F032B-1521.jpg/127px-Sumup_AIR1_E205_-_board_-_Microchip_26F032B-1521.jpg" decoding="async" width="127" height="127" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/d7/Sumup_AIR1_E205_-_board_-_Microchip_26F032B-1521.jpg/191px-Sumup_AIR1_E205_-_board_-_Microchip_26F032B-1521.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/d7/Sumup_AIR1_E205_-_board_-_Microchip_26F032B-1521.jpg/254px-Sumup_AIR1_E205_-_board_-_Microchip_26F032B-1521.jpg 2x" data-file-width="1924" data-file-height="1924" /></a></span></div><div class="thumbcaption"><a href="/wiki/Microchip_Technology" title="Microchip Technology">Microchip</a> 32-Mbit <a href="#QPI/SQI">SQI</a> Flash Memory</div></div></div></div></div> <p>SPI is used to talk to a variety of peripherals, such as </p> <ul><li>Sensors: <a href="/wiki/Temperature" title="Temperature">temperature</a>, <a href="/wiki/Pressure" title="Pressure">pressure</a>, <a href="/wiki/Analog-to-digital_converter" title="Analog-to-digital converter">ADC</a>, <a href="/wiki/Touchscreens" class="mw-redirect" title="Touchscreens">touchscreens</a>, <a href="/wiki/Video_game_controllers" class="mw-redirect" title="Video game controllers">video game controllers</a></li> <li>Control devices: <a href="/wiki/Audio_codec" title="Audio codec">audio codecs</a>, <a href="/w/index.php?title=Digital_potentiometers&action=edit&redlink=1" class="new" title="Digital potentiometers (page does not exist)">digital potentiometers</a>, <a href="/wiki/Digital-to-analog_converter" title="Digital-to-analog converter">DACs</a></li> <li>Camera lenses: <a href="/wiki/Canon_EF_lens_mount" title="Canon EF lens mount">Canon EF lens mount</a></li> <li>Communications: <a href="/wiki/Ethernet" title="Ethernet">Ethernet</a>, <a href="/wiki/USB" title="USB">USB</a>, <a href="/wiki/USART" class="mw-redirect" title="USART">USART</a>, <a href="/wiki/CAN_bus" title="CAN bus">CAN</a>, <a href="/wiki/IEEE_802.15.4" title="IEEE 802.15.4">IEEE 802.15.4</a>, <a href="/wiki/IEEE_802.11" title="IEEE 802.11">IEEE 802.11</a></li> <li>Memory: <a href="/wiki/Flash_memory#Serial_flash" title="Flash memory">flash</a> and <a href="/wiki/EEPROM#Serial_bus_devices" title="EEPROM">EEPROMs</a></li> <li><a href="/wiki/Real-time_clock" title="Real-time clock">Real-time clocks</a></li> <li><a href="/wiki/LCD" class="mw-redirect" title="LCD">LCDs</a>, sometimes even for managing image data</li> <li>Any <a href="/wiki/MultiMediaCard" title="MultiMediaCard">MMC</a> or <a href="/wiki/Secure_Digital" class="mw-redirect" title="Secure Digital">SD</a> card (including <a href="/wiki/Secure_Digital#SDIO" class="mw-redirect" title="Secure Digital">SDIO</a> variant<sup id="cite_ref-3wireSDI_14-1" class="reference"><a href="#cite_note-3wireSDI-14"><span class="cite-bracket">[</span>note 8<span class="cite-bracket">]</span></a></sup>)</li> <li><a href="/wiki/Shift_registers" class="mw-redirect" title="Shift registers">Shift registers</a> for additional I/O<sup id="cite_ref-:3_18-1" class="reference"><a href="#cite_note-:3-18"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:2_19-1" class="reference"><a href="#cite_note-:2-19"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup></li></ul> <p><a href="/wiki/Printed_circuit_board" title="Printed circuit board">Board</a> real estate and wiring savings compared to a <a href="/wiki/Parallel_communication" title="Parallel communication">parallel</a> bus are significant, and have earned SPI a solid role in embedded systems. That is true for most <a href="/wiki/System-on-a-chip" class="mw-redirect" title="System-on-a-chip">system-on-a-chip</a> processors, both with higher-end 32-bit processors such as those using <a href="/wiki/ARM_architecture" class="mw-redirect" title="ARM architecture">ARM</a>, <a href="/wiki/MIPS_architecture" title="MIPS architecture">MIPS</a>, or <a href="/wiki/PowerPC" title="PowerPC">PowerPC</a> and with lower-end microcontrollers such as the <a href="/wiki/Atmel_AVR" class="mw-redirect" title="Atmel AVR">AVR</a>, <a href="/wiki/PIC_microcontroller" class="mw-redirect" title="PIC microcontroller">PIC</a>, and <a href="/wiki/MSP430" class="mw-redirect" title="MSP430">MSP430</a>. These chips usually include SPI controllers capable of running in either main or sub mode. <a href="/wiki/In-system_programming" title="In-system programming">In-system programmable</a> AVR controllers (including blank ones) can be programmed using SPI.<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> </p><p>Chip or <a href="/wiki/FPGA" class="mw-redirect" title="FPGA">FPGA</a> based designs sometimes use SPI to communicate between internal components; on-chip real estate can be as costly as its on-board cousin. And for high-performance systems, <a href="/wiki/FPGA" class="mw-redirect" title="FPGA">FPGAs</a> sometimes use SPI to interface as a sub to a host, as a main to sensors, or for flash memory used to bootstrap if they are SRAM-based. </p><p>The full-duplex capability makes SPI very simple and efficient for single main/single sub applications. Some devices use the full-duplex mode to implement an efficient, swift data stream for applications such as <a href="/wiki/Digital_audio" title="Digital audio">digital audio</a>, <a href="/wiki/Digital_signal_processing" title="Digital signal processing">digital signal processing</a>, or <a href="/wiki/Channel_(communications)" class="mw-redirect" title="Channel (communications)">telecommunications channels</a>, but most off-the-shelf chips stick to half-duplex request/response protocols. </p> <div class="mw-heading mw-heading2"><h2 id="Variations">Variations</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=19" title="Edit section: Variations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SPI implementations have a wide variety of protocol variations. Some devices are transmit-only; others are receive-only. Chip selects are sometimes active-high rather than active-low. Some devices send the least-significant bit first. Signal levels depend entirely on the chips involved. And while the baseline SPI protocol has no command codes, every device may define its own protocol of command codes. Some variations are minor or informal, while others have an official defining document and may be considered to be separate but related protocols. </p> <div class="mw-heading mw-heading3"><h3 id="Original_definition">Original definition</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=20" title="Edit section: Original definition"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><a href="/wiki/Motorola" title="Motorola">Motorola</a> in 1983 listed<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> three <a href="/wiki/Motorola_6805" class="mw-redirect" title="Motorola 6805">6805</a> 8-bit <a href="/wiki/Microcomputer" title="Microcomputer">microcomputers</a> that have an integrated "Serial Peripheral Interface", whose functionality is described in a 1984 manual.<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="AN991">AN991</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=21" title="Edit section: AN991"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Motorola's 1987 Application Node AN991 "Using the Serial Peripheral Interface to Communicate Between Multiple Microcomputers"<sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> (now under <a href="/wiki/NXP_Semiconductors" title="NXP Semiconductors">NXP</a>, last revised 2002<sup id="cite_ref-:4_12-1" class="reference"><a href="#cite_note-:4-12"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup>) informally serves as the "official" defining document for SPI. </p> <div class="mw-heading mw-heading3"><h3 id="Timing_variations">Timing variations</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=22" title="Edit section: Timing variations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Some devices have timing variations from Motorola's CPOL/CPHA modes. Sending data from sub to main may use the opposite clock edge as main to sub. Devices often require extra clock idle time before the first clock or after the last one, or between a command and its response. </p><p>Some devices have two clocks, one to read data, and another to transmit it into the device. Many of the read clocks run from the chip select line. </p> <div class="mw-heading mw-heading3"><h3 id="Transmission_size">Transmission size</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=23" title="Edit section: Transmission size"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Different transmission word sizes are common. Many SPI chips only support messages that are multiples of 8 bits. Such chips can not interoperate with the <a href="/wiki/JTAG" title="JTAG">JTAG</a> or <a href="/wiki/SGPIO" title="SGPIO">SGPIO</a> protocols, or any other protocol that requires messages that are not multiples of 8 bits. </p> <div class="mw-heading mw-heading3"><h3 id="No_chip_select">No chip select</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=24" title="Edit section: No chip select"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Some devices don't use chip select, and instead manage protocol state machine entry/exit using other methods. </p> <div class="mw-heading mw-heading3"><h3 id="Connectors">Connectors</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=25" title="Edit section: Connectors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Anyone needing an external connector for SPI defines their own or uses another standard connection such as: <a href="/wiki/UEXT" title="UEXT">UEXT</a>, <a href="/wiki/Pmod_Interface" title="Pmod Interface">Pmod</a>, various <a href="/wiki/JTAG_connector" class="mw-redirect" title="JTAG connector">JTAG connectors</a>, <a href="/wiki/Secure_Digital" class="mw-redirect" title="Secure Digital">Secure Digital</a> card socket, etc. </p> <div class="mw-heading mw-heading3"><h3 id="Flow_control">Flow control</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=26" title="Edit section: Flow control"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Some devices require an additional <a href="/wiki/Flow_control_(data)" title="Flow control (data)">flow control</a> signal from sub to main, indicating when data is ready. This leads to a 5-wire protocol instead of the usual 4. Such a <i>ready</i> or <i>enable</i> signal is often active-low, and needs to be enabled at key points such as after commands or between words. Without such a signal, data transfer rates may need to be slowed down significantly, or protocols may need to have dummy bytes inserted, to accommodate the worst case for the sub response time. Examples include initiating an ADC conversion, addressing the right page of flash memory, and processing enough of a command that device firmware can load the first word of the response. (Many SPI mains do not support that signal directly, and instead rely on fixed delays.) </p> <div class="mw-heading mw-heading3"><h3 id="SafeSPI">SafeSPI</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=27" title="Edit section: SafeSPI"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SafeSPI<sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> is an industry standard for SPI in automotive applications. Its main focus is the transmission of sensor data between different devices. </p> <div class="mw-heading mw-heading3"><h3 id="High_reliability_modifications">High reliability modifications</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=28" title="Edit section: High reliability modifications"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In electrically noisy environments, since SPI has few signals, it can be economical to reduce the effects of <a href="/wiki/Common_mode_signal" class="mw-redirect" title="Common mode signal">common mode noise</a> by adapting SPI to use <a href="/wiki/Low-voltage_differential_signaling" title="Low-voltage differential signaling">low-voltage differential signaling</a>.<sup id="cite_ref-27" class="reference"><a href="#cite_note-27"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> Another advantage is that the controlled devices can be designed to loop-back to test signal integrity.<sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Intelligent_SPI_controllers">Intelligent SPI controllers</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=29" title="Edit section: Intelligent SPI controllers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A <b>Queued Serial Peripheral Interface</b> (<b>QSPI</b>; different to but has same abbreviation as <i>Quad SPI</i> described in <a href="#Quad_SPI">§ Quad SPI</a>) is a type of SPI controller that uses a <a href="/wiki/Queue_(data_structure)" class="mw-redirect" title="Queue (data structure)">data queue</a> to transfer data across an SPI bus.<sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> It has a <a href="/wiki/Circular_buffer" title="Circular buffer">wrap-around</a> mode allowing continuous transfers to and from the queue with only intermittent attention from the CPU. Consequently, the peripherals appear to the CPU as <a href="/wiki/Virtual_memory" title="Virtual memory">memory-mapped</a> parallel devices. This feature is useful in applications such as control of an <a href="/wiki/Analog-to-digital_converter" title="Analog-to-digital converter">A/D converter</a>. Other programmable features in Queued SPI are chip selects and transfer length/delay. </p><p>SPI controllers from different vendors support different feature sets; such <a href="/wiki/Direct_memory_access" title="Direct memory access">direct memory access</a> (DMA) queues are not uncommon, although they may be associated with separate DMA engines rather than the SPI controller itself, such as used by <b>Multichannel Buffered Serial Port</b> (<b>MCBSP</b>).<sup id="cite_ref-30" class="reference"><a href="#cite_note-30"><span class="cite-bracket">[</span>note 11<span class="cite-bracket">]</span></a></sup> Most SPI main controllers integrate support for up to four chip selects,<sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>note 12<span class="cite-bracket">]</span></a></sup> although some require chip selects to be managed separately through GPIO lines. </p><p>Note that <i>Queued SPI</i> is different from <i>Quad SPI</i>, and some processors even confusingly allow a single "QSPI" interface to operate in either quad or queued mode!<sup id="cite_ref-32" class="reference"><a href="#cite_note-32"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Microwire">Microwire</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=30" title="Edit section: Microwire"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Microwire,<sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> often spelled <b>μWire</b>, is essentially a predecessor of SPI and a trademark of <a href="/wiki/National_Semiconductor" title="National Semiconductor">National Semiconductor</a>. It's a strict subset of SPI: half-duplex, and using SPI mode 0. Microwire chips tend to need slower clock rates than newer SPI versions; perhaps 2 MHz vs. 20 MHz. Some Microwire chips also support a <a class="mw-selflink-fragment" href="#Three-wire">three-wire</a> mode. </p> <div class="mw-heading mw-heading3"><h3 id="Microwire/Plus"><span id="Microwire.2FPlus"></span>Microwire/Plus</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=31" title="Edit section: Microwire/Plus"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Microwire/Plus<sup id="cite_ref-34" class="reference"><a href="#cite_note-34"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> is an enhancement of Microwire and features full-duplex communication and support for SPI modes 0 and 1. There was no specified improvement in serial clock speed. </p> <div class="mw-heading mw-heading3"><h3 id="Three-wire">Three-wire</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=32" title="Edit section: Three-wire"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Three-wire variants of SPI restricted to a <a href="/wiki/Half-duplex" class="mw-redirect" title="Half-duplex">half-duplex</a> mode use a single bidirectional data line called SISO (sub out/sub in) or MOMI (main out/main in) instead of SPI's two unidirectional lines (MOSI and MISO). Three-wire tends to be used for lower-performance parts, such as small EEPROMs used only during system startup, certain sensors, and <a class="mw-selflink-fragment" href="#Microwire">Microwire</a>. Few SPI controllers support this mode, although it can be easily <a href="/wiki/Bit-banging" class="mw-redirect" title="Bit-banging">bit-banged</a> in software. </p> <div class="mw-heading mw-heading3"><h3 id="Dual_SPI">Dual SPI</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=33" title="Edit section: Dual SPI"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>For instances where the full-duplex nature of SPI is not used, an extension uses both data pins in a half-duplex configuration to send two bits per clock cycle. Typically a command byte is sent requesting a response in dual mode, after which the MOSI line becomes SIO0 (serial I/O 0) and carries even bits, while the MISO line becomes SIO1 and carries odd bits. Data is still transmitted most-significant bit first, but SIO1 carries bits 7, 5, 3 and 1 of each byte, while SIO0 carries bits 6, 4, 2 and 0. </p><p>This is particularly popular among SPI ROMs, which have to send a large amount of data, and comes in two variants:<sup id="cite_ref-W25Q16JV_35-0" class="reference"><a href="#cite_note-W25Q16JV-35"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-D25LQ64_36-0" class="reference"><a href="#cite_note-D25LQ64-36"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </p> <ul><li>Dual read commands the send and address from the main in single mode, and return the data in dual mode.</li> <li>Dual I/O commands send the command in single mode, then send the address and return data in dual mode.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Quad_SPI">Quad SPI</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=34" title="Edit section: Quad SPI"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><b>Quad SPI</b> (<b>QSPI</b>; different to but has same abbreviation as <i>Queued-SPI</i> described in <a href="#Intelligent_SPI_controllers">§ Intelligent SPI controllers</a>) goes beyond dual SPI, adding two more I/O lines (SIO2 and SIO3) and sends 4 data bits per clock cycle. Again, it is requested by special commands, which enable quad mode after the command itself is sent in single mode.<sup id="cite_ref-W25Q16JV_35-1" class="reference"><a href="#cite_note-W25Q16JV-35"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-D25LQ64_36-1" class="reference"><a href="#cite_note-D25LQ64-36"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </p> <dl><dt>SQI Type 1</dt> <dd>Commands sent on single line but addresses and data sent on four lines</dd> <dt>SQI Type 2</dt> <dd>Commands and addresses sent on a single line but data sent/received on four lines</dd></dl> <div class="mw-heading mw-heading3"><h3 id="QPI/SQI"><span id="QPI.2FSQI"></span>QPI/SQI</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=35" title="Edit section: QPI/SQI"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Further extending quad SPI, some devices support a "quad everything" mode where <i>all</i> communication takes place over 4 data lines, including commands.<sup id="cite_ref-37" class="reference"><a href="#cite_note-37"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> This is variously called "QPI"<sup id="cite_ref-D25LQ64_36-2" class="reference"><a href="#cite_note-D25LQ64-36"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> (not to be confused with <a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">Intel QuickPath Interconnect</a>) or "serial quad I/O" (SQI)<sup id="cite_ref-SST26VF032B_38-0" class="reference"><a href="#cite_note-SST26VF032B-38"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup> </p><p>This requires programming a configuration bit in the device and requires care after reset to establish communication. </p> <div class="mw-heading mw-heading3"><h3 id="Double_data_rate">Double data rate</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=36" title="Edit section: Double data rate"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In addition to using multiple lines for I/O, some devices increase the transfer rate by using <a href="/wiki/Double_data_rate" title="Double data rate">double data rate</a> transmission.<sup id="cite_ref-39" class="reference"><a href="#cite_note-39"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-40" class="reference"><a href="#cite_note-40"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="JTAG">JTAG</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=37" title="Edit section: JTAG"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/JTAG" title="JTAG">JTAG</a></div> <p>Although there are some similarities between SPI and the <a href="/wiki/JTAG" title="JTAG">JTAG</a> (IEEE 1149.1-2013) protocol, they are not interchangeable. JTAG is specifically intended to provide reliable <a href="/wiki/Boundary_scan" title="Boundary scan">test access to the I/O pins</a> from an off-board controller with less precise signal delay and skew parameters, while SPI has many varied applications. While not strictly a level sensitive interface, the JTAG protocol supports the recovery of both setup and hold violations between JTAG devices by reducing the clock rate or changing the clock's duty cycles. Consequently, the JTAG interface is not intended to support extremely high data rates.<sup id="cite_ref-41" class="reference"><a href="#cite_note-41"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="SGPIO">SGPIO</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=38" title="Edit section: SGPIO"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/SGPIO" title="SGPIO">SGPIO</a></div> <p><a href="/wiki/SGPIO" title="SGPIO">SGPIO</a> is essentially another (incompatible) application stack for SPI designed for particular backplane management activities.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (July 2010)">citation needed</span></a></i>]</sup> SGPIO uses 3-bit messages. </p> <div class="mw-heading mw-heading3"><h3 id="Intel's_Enhanced_Serial_Peripheral_Interface"><span id="Intel.27s_Enhanced_Serial_Peripheral_Interface"></span>Intel's Enhanced Serial Peripheral Interface</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=39" title="Edit section: Intel's Enhanced Serial Peripheral Interface"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><a href="/wiki/Intel" title="Intel">Intel</a> has developed a successor to its <a href="/wiki/Low_Pin_Count" title="Low Pin Count">Low Pin Count</a> (LPC) bus that it calls the <b>Enhanced Serial Peripheral Interface (eSPI)</b> bus. Intel aims to reduce the number of pins required on motherboards and increase throughput compared to LPC, reduce the working voltage to 1.8 volts to facilitate smaller chip manufacturing processes, allow eSPI peripherals to share SPI flash devices with the host (the LPC bus did not allow firmware hubs to be used by LPC peripherals), tunnel previous <a href="/wiki/Out-of-band_signal" class="mw-redirect" title="Out-of-band signal">out-of-band</a> pins through eSPI, and allow system designers to trade off cost and performance.<sup id="cite_ref-eSPI_42-0" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-43" class="reference"><a href="#cite_note-43"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup> </p><p>An eSPI bus can either be shared with SPI devices to save pins or be separate from an SPI bus to allow more performance, especially when eSPI devices need to use SPI flash devices.<sup id="cite_ref-eSPI_42-1" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>This standard defines an Alert# signal that is used by an eSPI sub to request service from the main. In a performance-oriented design or a design with only one eSPI sub, each eSPI sub will have its Alert# pin connected to an Alert# pin on the eSPI main that is dedicated to each sub, allowing the eSPI main to grant low-latency service, because the eSPI main will know which eSPI sub needs service and will not need to poll all of the subs to determine which device needs service. In a budget design with more than one eSPI sub, all of the Alert# pins of the subs are connected to one Alert# pin on the eSPI main in a <a href="/wiki/Wired-OR" class="mw-redirect" title="Wired-OR">wired-OR</a> connection, which requires the main to poll all the subs to determine which ones need service when the Alert# signal is pulled low by one or more peripherals that need service. Only after all of the devices are serviced will the Alert# signal be pulled high due to none of the eSPI subs needing service and therefore pulling the Alert# signal low.<sup id="cite_ref-eSPI_42-2" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>This standard allows designers to use 1-bit, 2-bit, or 4-bit communications at speeds from 20 to 66 MHz to further allow designers to trade off performance and cost.<sup id="cite_ref-eSPI_42-3" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>Communications that were out-of-band of LPC like <a href="/wiki/General-purpose_input/output" title="General-purpose input/output">general-purpose input/output</a> (GPIO) and <a href="/wiki/System_Management_Bus" title="System Management Bus">System Management Bus</a> (SMBus) should be tunneled through eSPI via virtual wire cycles and out-of-band message cycles respectively in order to remove those pins from motherboard designs using eSPI.<sup id="cite_ref-eSPI_42-4" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>This standard supports standard memory cycles with lengths of 1 byte to 4 kilobytes of data, short memory cycles with lengths of 1, 2, or 4 bytes that have much less overhead compared to standard memory cycles, and I/O cycles with lengths of 1, 2, or 4 bytes of data which are low overhead as well. This significantly reduces overhead compared to the LPC bus, where all cycles except for the 128-byte firmware hub read cycle spends more than one-half of all of the bus's throughput and time in overhead. The standard memory cycle allows a length of anywhere from 1 byte to 4 kilobytes in order to allow its larger overhead to be amortised over a large transaction. eSPI subs are allowed to initiate bus master versions of all of the memory cycles. Bus master I/O cycles, which were introduced by the LPC bus specification, and ISA-style DMA including the 32-bit variant introduced by the LPC bus specification, are not present in eSPI. Therefore, bus master memory cycles are the only allowed DMA in this standard.<sup id="cite_ref-eSPI_42-5" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>eSPI subs are allowed to use the eSPI main as a proxy to perform flash operations on a standard SPI flash memory sub on behalf of the requesting eSPI sub.<sup id="cite_ref-eSPI_42-6" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>64-bit memory addressing is also added, but is only permitted when there is no equivalent 32-bit address.<sup id="cite_ref-eSPI_42-7" class="reference"><a href="#cite_note-eSPI-42"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>The Intel <a href="/wiki/Z170" class="mw-redirect" title="Z170">Z170 chipset</a> can be configured to implement either this bus or a variant of the LPC bus that is missing its ISA-style DMA capability and is underclocked to 24 MHz instead of the standard 33 MHz.<sup id="cite_ref-44" class="reference"><a href="#cite_note-44"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup> </p><p>The eSPI bus is also adopted by <a href="/wiki/AMD_Ryzen" class="mw-redirect" title="AMD Ryzen">AMD Ryzen</a> chipsets. </p> <div class="mw-heading mw-heading2"><h2 id="Development_tools">Development tools</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=40" title="Edit section: Development tools"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Single-board_computers">Single-board computers</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=41" title="Edit section: Single-board computers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><a href="/wiki/Single-board_computers" class="mw-redirect" title="Single-board computers">Single-board computers</a> may provide <a href="/wiki/Lead_(electronics)" title="Lead (electronics)">pin</a> access to SPI hardware units. For instance, the <a href="/wiki/Raspberry_Pi#J8_header_and_general_purpose_input-output_(GPIO)" title="Raspberry Pi">Raspberry Pi's J8 header</a> exposes at least two SPI units that can be used via <a href="/wiki/Linux" title="Linux">Linux</a> <a href="/wiki/Device_driver" title="Device driver">drivers</a> or <a href="/wiki/Python_(programming_language)" title="Python (programming language)">python</a>. </p> <div class="mw-heading mw-heading3"><h3 id="USB_to_SPI_adapters">USB to SPI adapters</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=42" title="Edit section: USB to SPI adapters"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>There are a number of <a href="/wiki/USB" title="USB">USB</a> adapters that allow a desktop <a href="/wiki/Personal_computer" title="Personal computer">PC</a> or <a href="/wiki/Smartphone" title="Smartphone">smartphone</a> with <a href="/wiki/USB" title="USB">USB</a> to communicate with SPI chips (e.g. <a href="/wiki/FTDI" title="FTDI">FT</a>221xs<sup id="cite_ref-45" class="reference"><a href="#cite_note-45"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup>). They are used for embedded systems, chips (<a href="/wiki/FPGA" class="mw-redirect" title="FPGA">FPGA</a>, <a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a>, and <a href="/wiki/System_on_a_chip" title="System on a chip">SoC</a>) and peripheral testing, programming and debugging. Many of them also provide scripting or programming capabilities (e.g. <a href="/wiki/Visual_Basic" title="Visual Basic">Visual Basic</a>, <a href="/wiki/C_(programming_language)" title="C (programming language)">C</a>/<a href="/wiki/C%2B%2B" title="C++">C++</a>, <a href="/wiki/VHDL" title="VHDL">VHDL</a>). </p><p>The key SPI parameters are: the maximum supported frequency for the serial interface, command-to-command latency, and the maximum length for SPI commands. It is possible to find SPI adapters on the market today that support up to 100 MHz serial interfaces, with virtually unlimited access length. </p><p>SPI protocol being a de facto standard, some SPI host adapters also have the ability of supporting other protocols beyond the traditional 4-wire SPI (for example, support of quad-SPI protocol or other custom serial protocol that derive from SPI<sup id="cite_ref-46" class="reference"><a href="#cite_note-46"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup>). </p> <div class="mw-heading mw-heading3"><h3 id="Protocol_analyzers">Protocol analyzers</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=43" title="Edit section: Protocol analyzers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Logic_analyzer" title="Logic analyzer">Logic analyzer</a></div> <p><a href="/wiki/Logic_analyzers" class="mw-redirect" title="Logic analyzers">Logic analyzers</a> are tools which collect, <a href="/wiki/Timestamp" title="Timestamp">timestamp</a>, analyze, decode, store, and view the high-speed waveforms, to help <a href="/wiki/Debugging" title="Debugging">debug</a> and develop. Most logic analyzers have the capability to decode SPI bus signals into high-level protocol data with human-readable labels. </p> <div class="mw-heading mw-heading4"><h4 id="Oscilloscopes">Oscilloscopes</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=44" title="Edit section: Oscilloscopes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SPI <a href="/wiki/Waveforms" class="mw-redirect" title="Waveforms">waveforms</a> can be seen on <a href="/wiki/Analog_signal" title="Analog signal">analog</a> channels (and/or via <a href="/wiki/Digital_signal" title="Digital signal">digital</a> channels in <a href="/wiki/Oscilloscope#Mixed-signal_oscilloscope" title="Oscilloscope">mixed-signal oscilloscopes</a>).<sup id="cite_ref-47" class="reference"><a href="#cite_note-47"><span class="cite-bracket">[</span>35<span class="cite-bracket">]</span></a></sup> Most <a href="/wiki/Oscilloscope" title="Oscilloscope">oscilloscope</a> vendors offer optional support for SPI protocol analysis (both 2-, <a class="mw-selflink-fragment" href="#Three-wire">3-</a>, and 4-wire SPI) with triggering. </p> <div class="mw-heading mw-heading2"><h2 id="Alternative_terminology">Alternative terminology</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=45" title="Edit section: Alternative terminology"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Various alternative abbreviations for the four common SPI signals are used. (This section omits overbars indicating active-low.) </p> <ul><li>Serial clock <ul><li>SCK, SCLK, CLK, SCL</li></ul></li> <li>Main out, sub in (MOSI) <ul><li>SIMO, MTSR, SPID - correspond to MOSI on both main and sub devices, connects to each other</li> <li>SDI, DI, DIN, SI, SDA - on sub devices; various abbreviations for <i>serial data in</i>; connects to MOSI on main</li> <li>SDO, DO, DOUT, SO - on main devices; various abbreviations for <i>serial data out</i>; connects to MOSI on sub</li> <li>COPI, PICO for <i>peripheral</i> and <i>controller</i>,<sup id="cite_ref-OSHWA_48-0" class="reference"><a href="#cite_note-OSHWA-48"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:5_49-0" class="reference"><a href="#cite_note-:5-49"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup> or COTI for <i>controller</i> and <i>target</i><sup id="cite_ref-:1_50-0" class="reference"><a href="#cite_note-:1-50"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup></li></ul></li> <li>Main in, sub out (MISO) <ul><li>SOMI, MRST, SPIQ - correspond to MISO on both main and sub devices, connects to each other</li> <li>SDO, DO, DOUT, SO - on sub devices; connects to MISO on main</li> <li>SDI, DI, DIN, SI - on main devices; connects to MISO on sub</li> <li>CIPO, POCI,<sup id="cite_ref-OSHWA_48-1" class="reference"><a href="#cite_note-OSHWA-48"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:5_49-1" class="reference"><a href="#cite_note-:5-49"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup> or CITO<sup id="cite_ref-:1_50-1" class="reference"><a href="#cite_note-:1-50"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup></li></ul></li> <li>Chip select (CS) <ul><li>CE (chip enable)</li> <li>Historical: SS (slave select), SSEL, NSS, /SS, SS# (sub select)</li></ul></li></ul> <p><a href="/wiki/Microchip_Technology" title="Microchip Technology">Microchip</a> uses <i>host</i> and <i>client</i> though keeps the abbreviation MOSI and MISO.<sup id="cite_ref-51" class="reference"><a href="#cite_note-51"><span class="cite-bracket">[</span>39<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=46" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239009302">.mw-parser-output .portalbox{padding:0;margin:0.5em 0;display:table;box-sizing:border-box;max-width:175px;list-style:none}.mw-parser-output .portalborder{border:1px solid var(--border-color-base,#a2a9b1);padding:0.1em;background:var(--background-color-neutral-subtle,#f8f9fa)}.mw-parser-output .portalbox-entry{display:table-row;font-size:85%;line-height:110%;height:1.9em;font-style:italic;font-weight:bold}.mw-parser-output .portalbox-image{display:table-cell;padding:0.2em;vertical-align:middle;text-align:center}.mw-parser-output .portalbox-link{display:table-cell;padding:0.2em 0.2em 0.2em 0.3em;vertical-align:middle}@media(min-width:720px){.mw-parser-output .portalleft{clear:left;float:left;margin:0.5em 1em 0.5em 0}.mw-parser-output .portalright{clear:right;float:right;margin:0.5em 0 0.5em 1em}}</style><ul role="navigation" aria-label="Portals" class="noprint portalbox portalborder portalright"> <li class="portalbox-entry"><span class="portalbox-image"><span class="noviewer" typeof="mw:File"><a href="/wiki/File:Nuvola_apps_ksim.png" class="mw-file-description"><img alt="icon" src="//upload.wikimedia.org/wikipedia/commons/thumb/8/8d/Nuvola_apps_ksim.png/28px-Nuvola_apps_ksim.png" decoding="async" width="28" height="28" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/8d/Nuvola_apps_ksim.png/42px-Nuvola_apps_ksim.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/8d/Nuvola_apps_ksim.png/56px-Nuvola_apps_ksim.png 2x" data-file-width="128" data-file-height="128" /></a></span></span><span class="portalbox-link"><a href="/wiki/Portal:Electronics" title="Portal:Electronics">Electronics portal</a></span></li></ul> <ul><li><a href="/wiki/List_of_network_buses" title="List of network buses">List of network buses</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=47" title="Edit section: Notes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">The earliest definitive mention of a "Serial Peripheral Interface" in bitsavers archives of Motorola manuals is from 1983 (see <a href="#Original_definition">§ Original definition</a>). While some sources on the web allege that Motorola introduced SPI when 68000 was introduced in 1979, however many of those appear to be <a href="/wiki/Citogenesis" class="mw-redirect" title="Citogenesis">citogenesis</a> or speculation, and Motorola's 1983 68000 manual has no mention of "Serial Peripheral Interface", so the alleged 1979 date doesn't seem to be reliable information. Please only add a specific design_date if you have a definitive source from Motorola around then.</span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text">Using main and sub maintains the same initial letters to remain in sync with the line names. For example MISO could be expanded as "main in, sub out"</span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text">The <a href="#Alternative_terminology">§ Alternative terminology</a> section gives more details on proposed alternative terminology. See <a href="/wiki/Talk:Serial_Peripheral_Interface#Terminology" title="Talk:Serial Peripheral Interface">the talk page</a> for an ongoing discussion.</span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text">For any given transaction, only one device is the main. However, some devices support changing main and sub roles on the fly. Most microcontrollers can easily reconfigure their SPI's role, and some Atmel and Silabs devices can change roles depending on an external pin.</span> </li> <li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text">Some subs require a falling edge of the <span style="text-decoration:overline;">Chip Select</span> signal to initiate an action. An example is the Maxim MAX1242 ADC, which starts conversion on a high→low transition.</span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text">Transmissions often consist of eight-bit words. However, other word-sizes are also common, for example, sixteen-bit words for touch-screen controllers or audio codecs, such as the TSC2101 by Texas Instruments, or twelve-bit words for many digital-to-analog or analog-to-digital converters.</span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text">The original specification has a LSBFE ("LSB-First Enable") to control whether data is transferred least (LSB) or most significant bit (MSB) first.</span> </li> <li id="cite_note-3wireSDI-14"><span class="mw-cite-backlink">^ <a href="#cite_ref-3wireSDI_14-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-3wireSDI_14-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text">Not to be confused with the SDIO (Serial Data I/O) line of the half-duplex implementation of SPI sometimes also called "3-wire" SPI. Here e.g. MOSI (via a resistor) and MISO (no resistor) of a main is connected to the SDIO line of a sub.</span> </li> <li id="cite_note-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-15">^</a></b></span> <span class="reference-text">Peripherals may allow or require a particular number (or any number) of transfer bytes while selected, as specified in their datasheet.</span> </li> <li id="cite_note-16"><span class="mw-cite-backlink"><b><a href="#cite_ref-16">^</a></b></span> <span class="reference-text">Left-shifts are used because SPI normally transmits the most-significant bit first. Right-shifts could instead be used to transfer least-significant bit first.</span> </li> <li id="cite_note-30"><span class="mw-cite-backlink"><b><a href="#cite_ref-30">^</a></b></span> <span class="reference-text">Such as with the MultiChannel Serial Port Interface, or McSPI, used in Texas Instruments OMAP chips. (<a rel="nofollow" class="external free" href="https://www.ti.com/product/OMAP3530">https://www.ti.com/product/OMAP3530</a>)</span> </li> <li id="cite_note-31"><span class="mw-cite-backlink"><b><a href="#cite_ref-31">^</a></b></span> <span class="reference-text">Such as the SPI controller on Atmel AT91 chips like the at91sam9G20, which is much simpler than TI's McSPI.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=48" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist reflist-columns references-column-width" style="column-width: 30em;"> <ol class="references"> <li id="cite_note-:0-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-:0_2-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFDhaker2018" class="citation web cs1">Dhaker, Piyu (2018). <a rel="nofollow" class="external text" href="https://www.analog.com/en/analog-dialogue/articles/introduction-to-spi-interface.html">"Introduction to SPI Interface"</a>. <i><a href="/wiki/Analog_Dialogue" title="Analog Dialogue">Analog Dialogue</a></i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230525152752/https://www.analog.com/en/analog-dialogue/articles/introduction-to-spi-interface.html">Archived</a> from the original on 2023-05-25<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-07-21</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Analog+Dialogue&rft.atitle=Introduction+to+SPI+Interface&rft.date=2018&rft.aulast=Dhaker&rft.aufirst=Piyu&rft_id=https%3A%2F%2Fwww.analog.com%2Fen%2Fanalog-dialogue%2Farticles%2Fintroduction-to-spi-interface.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://digital.ni.com/public.nsf/allkb/862567530005F09C862566BE004E469D">"What is Serial Synchronous Interface (SSI)?"</a><span class="reference-accessdate">. Retrieved <span class="nowrap">2015-01-28</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=What+is+Serial+Synchronous+Interface+%28SSI%29%3F&rft_id=https%3A%2F%2Fdigital.ni.com%2Fpublic.nsf%2Fallkb%2F862567530005F09C862566BE004E469D&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-Better_SPI_Bus_Design_in_3_Steps-10"><span class="mw-cite-backlink">^ <a href="#cite_ref-Better_SPI_Bus_Design_in_3_Steps_10-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Better_SPI_Bus_Design_in_3_Steps_10-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-Better_SPI_Bus_Design_in_3_Steps_10-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.pjrc.com/better-spi-bus-design-in-3-steps/">Better SPI Bus Design in 3 Steps</a></span> </li> <li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20150413003534/http://www.ee.nmt.edu/~teare/ee308l/datasheets/S12SPIV3.pdf">SPI Block Guide v3.06; Motorola/Freescale/NXP; 2003.</a></span> </li> <li id="cite_note-:4-12"><span class="mw-cite-backlink">^ <a href="#cite_ref-:4_12-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:4_12-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.nxp.com/docs/en/application-note/AN991.pdf">"AN991/D: Using the Serial Peripheral Interface to Communicate Between Multiple Microcomputers"</a> <span class="cs1-format">(PDF)</span>. <i><a href="/wiki/NXP" class="mw-redirect" title="NXP">NXP</a></i>. 2004 [1994]. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230404200636/https://www.nxp.com/docs/en/application-note/AN991.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on 2023-04-04<span class="reference-accessdate">. Retrieved <span class="nowrap">2021-10-14</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=NXP&rft.atitle=AN991%2FD%3A+Using+the+Serial+Peripheral+Interface+to+Communicate+Between+Multiple+Microcomputers&rft.date=2004&rft_id=https%3A%2F%2Fwww.nxp.com%2Fdocs%2Fen%2Fapplication-note%2FAN991.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.ti.com/lit/pdf/spru059">"TMS320x281x Serial Peripheral Interface Reference Guide"</a>. <i><a href="/wiki/Texas_Instruments" title="Texas Instruments">Texas Instruments</a></i>. 2002. pp. 16–17.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Texas+Instruments&rft.atitle=TMS320x281x+Serial+Peripheral+Interface+Reference+Guide&rft.pages=16-17&rft.date=2002&rft_id=https%3A%2F%2Fwww.ti.com%2Flit%2Fpdf%2Fspru059&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-17">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.maximintegrated.com/en/app-notes/index.mvp/id/3947">Maxim-IC application note 3947: "Daisy-Chaining SPI Devices"</a></span> </li> <li id="cite_note-:3-18"><span class="mw-cite-backlink">^ <a href="#cite_ref-:3_18-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:3_18-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFGammon2013" class="citation web cs1">Gammon, Nick (2013-03-23). <a rel="nofollow" class="external text" href="https://www.gammon.com.au/forum/?id=11979">"Gammon Forum : Electronics : Microprocessors : Using a 74HC165 input shift register"</a>. <i>Gammon Forum</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230729042912/http://www.gammon.com.au/forum/?id=11979">Archived</a> from the original on 2023-07-29<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-08-03</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Gammon+Forum&rft.atitle=Gammon+Forum+%3A+Electronics+%3A+Microprocessors+%3A+Using+a+74HC165+input+shift+register&rft.date=2013-03-23&rft.aulast=Gammon&rft.aufirst=Nick&rft_id=https%3A%2F%2Fwww.gammon.com.au%2Fforum%2F%3Fid%3D11979&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-:2-19"><span class="mw-cite-backlink">^ <a href="#cite_ref-:2_19-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:2_19-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFGammon2012" class="citation web cs1">Gammon, Nick (2012-01-31). <a rel="nofollow" class="external text" href="https://www.gammon.com.au/forum/?id=11518">"Gammon Forum : Electronics : Microprocessors : Using a 74HC595 output shift register as a port-expander"</a>. <i>Gammon Forum</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230714101259/http://www.gammon.com.au/forum/?id=11518">Archived</a> from the original on 2023-07-14<span class="reference-accessdate">. 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Retrieved <span class="nowrap">14 February</span> 2021</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=FTDI&rft.atitle=USB+to+SPI+converter&rft.date=2020-08-02&rft_id=https%3A%2F%2Fftdichip.com%2Fproducts%2Fft221xs%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-46"><span class="mw-cite-backlink"><b><a href="#cite_ref-46">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.byteparadigm.com/product-spi-storm-39.html">SPI Storm – Serial Protocol Host Adapter</a> with support of custom serial protocols, Byte Paradigm.</span> </li> <li id="cite_note-47"><span class="mw-cite-backlink"><b><a href="#cite_ref-47">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.keysight.com/en/pd-1646694-pn-N5391B/ic-and-spi-protocol-triggering-and-decode?cc=US&lc=eng">"N5391B I²C and SPI Protocol Triggering and Decode for Infiniium scopes"</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=N5391B+I%C2%B2C+and+SPI+Protocol+Triggering+and+Decode+for+Infiniium+scopes&rft_id=https%3A%2F%2Fwww.keysight.com%2Fen%2Fpd-1646694-pn-N5391B%2Fic-and-spi-protocol-triggering-and-decode%3Fcc%3DUS%26lc%3Deng&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-OSHWA-48"><span class="mw-cite-backlink">^ <a href="#cite_ref-OSHWA_48-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-OSHWA_48-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/">SPI; OSHWA.</a></span> </li> <li id="cite_note-:5-49"><span class="mw-cite-backlink">^ <a href="#cite_ref-:5_49-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:5_49-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><a rel="nofollow" class="external free" href="https://www.ti.com/lit/an/scea091a/scea091a.pdf">https://www.ti.com/lit/an/scea091a/scea091a.pdf</a> <sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Bare_URLs" title="Wikipedia:Bare URLs"><span title="A full citation of this PDF document is required to prevent link rot. (August 2024)">bare URL PDF</span></a></i>]</sup></span> </li> <li id="cite_note-:1-50"><span class="mw-cite-backlink">^ <a href="#cite_ref-:1_50-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:1_50-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.nxp.com/products/interfaces/ic-spi-i3c-interface-devices/www.nxp.com/pages/:SPI">"Serial Peripheral Interface (SPI) Devices"</a>. <i><a href="/wiki/NXP" class="mw-redirect" title="NXP">NXP</a></i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20230601020101/https://www.nxp.com/products/interfaces/ic-spi-i3c-interface-devices/spi-interface-devices:SPI">Archived</a> from the original on 2023-06-01<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-07-22</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=NXP&rft.atitle=Serial+Peripheral+Interface+%28SPI%29+Devices&rft_id=https%3A%2F%2Fwww.nxp.com%2Fproducts%2Finterfaces%2Fic-spi-i3c-interface-devices%2Fwww.nxp.com%2Fpages%2F%3ASPI&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> <li id="cite_note-51"><span class="mw-cite-backlink"><b><a href="#cite_ref-51">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFStoicescu" class="citation web cs1">Stoicescu, Alin. <a rel="nofollow" class="external text" href="https://onlinedocs.microchip.com/pr/GUID-EF58F3A9-B49B-4C31-A7EC-B71EBB831870-en-US-5/index.html">"Getting Started with Serial Peripheral Interface (SPI)"</a>. <i><a href="/wiki/Microchip_Technology" title="Microchip Technology">Microchip Technology</a></i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20231221205244/https://onlinedocs.microchip.com/pr/GUID-EF58F3A9-B49B-4C31-A7EC-B71EBB831870-en-US-5/index.html">Archived</a> from the original on 2023-12-21<span class="reference-accessdate">. Retrieved <span class="nowrap">2023-12-21</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Microchip+Technology&rft.atitle=Getting+Started+with+Serial+Peripheral+Interface+%28SPI%29&rft.aulast=Stoicescu&rft.aufirst=Alin&rft_id=https%3A%2F%2Fonlinedocs.microchip.com%2Fpr%2FGUID-EF58F3A9-B49B-4C31-A7EC-B71EBB831870-en-US-5%2Findex.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASerial+Peripheral+Interface" class="Z3988"></span></span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Serial_Peripheral_Interface&action=edit&section=49" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1235681985">.mw-parser-output .side-box{margin:4px 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.navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Computer_bus" title="Template:Computer bus"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Computer_bus" title="Template talk:Computer bus"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Computer_bus" title="Special:EditPage/Template:Computer bus"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Technical_and_de_facto_standards_for_wired_computer_buses" style="font-size:114%;margin:0 4em"><a href="/wiki/Technical_standard" title="Technical standard">Technical</a> and <a href="/wiki/De_facto_standard" title="De facto standard"><i>de facto</i> standards</a> for <a href="/wiki/Wired_communication" title="Wired communication">wired</a> <a href="/wiki/Bus_(computing)" title="Bus (computing)">computer buses</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">General</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/System_bus" title="System bus">System bus</a></li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a></li> <li><a href="/wiki/Back-side_bus" title="Back-side bus">Back-side bus</a></li> <li><a href="/wiki/Daisy_chain_(electrical_engineering)" title="Daisy chain (electrical engineering)">Daisy chain</a></li> <li><a href="/wiki/Control_bus" title="Control bus">Control bus</a></li> <li><a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">Address bus</a></li> <li><a href="/wiki/Bus_contention" title="Bus contention">Bus contention</a></li> <li><a href="/wiki/Bus_mastering" title="Bus mastering">Bus mastering</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li> <li><a href="/wiki/Plug_and_play" title="Plug and play">Plug and play</a></li> <li><a href="/wiki/List_of_interface_bit_rates#Computer_buses" title="List of interface bit rates">List of bus bandwidths</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Standards</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/SS-50_bus" title="SS-50 bus">SS-50 bus</a></li> <li><a href="/wiki/S-100_bus" title="S-100 bus">S-100 bus</a></li> <li><a href="/wiki/Multibus" title="Multibus">Multibus</a></li> <li><a href="/wiki/Unibus" title="Unibus">Unibus</a></li> <li><a href="/wiki/VAXBI_bus" title="VAXBI bus">VAXBI</a></li> <li><a href="/wiki/MBus_(SPARC)" title="MBus (SPARC)">MBus</a></li> <li><a href="/wiki/STD_Bus" title="STD Bus">STD Bus</a></li> <li><a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a></li> <li><a href="/wiki/Q-Bus" title="Q-Bus">Q-Bus</a></li> <li><a href="/wiki/Europe_Card_Bus" title="Europe Card Bus">Europe Card Bus</a></li> <li><a href="/wiki/Industry_Standard_Architecture" title="Industry Standard Architecture">ISA</a></li> <li><a href="/wiki/STEbus" title="STEbus">STEbus</a></li> <li><a href="/wiki/Amiga_Zorro_II" title="Amiga Zorro II">Zorro II</a></li> <li><a href="/wiki/Amiga_Zorro_III" title="Amiga Zorro III">Zorro III</a></li> <li><a href="/wiki/Computer_Automated_Measurement_and_Control" title="Computer Automated Measurement and Control">CAMAC</a></li> <li><a href="/wiki/FASTBUS" title="FASTBUS">FASTBUS</a></li> <li><a href="/wiki/Low_Pin_Count" title="Low Pin Count">LPC</a></li> <li><a href="/wiki/HP_Precision_Bus" title="HP Precision Bus">HP Precision Bus</a></li> <li><a href="/wiki/Extended_Industry_Standard_Architecture" title="Extended Industry Standard Architecture">EISA</a></li> <li><a href="/wiki/VMEbus" title="VMEbus">VME</a></li> <li><a href="/wiki/VME_eXtensions_for_Instrumentation" title="VME eXtensions for Instrumentation">VXI</a></li> <li><a href="/wiki/VXS" title="VXS">VXS</a></li> <li><a href="/wiki/VPX" title="VPX">VPX</a></li> <li><a href="/wiki/NuBus" title="NuBus">NuBus</a></li> <li><a href="/wiki/TURBOchannel" title="TURBOchannel">TURBOchannel</a></li> <li><a href="/wiki/Micro_Channel_architecture" title="Micro Channel architecture">MCA</a></li> <li><a href="/wiki/SBus" title="SBus">SBus</a></li> <li><a href="/wiki/VESA_Local_Bus" title="VESA Local Bus">VLB</a></li> <li><a href="/wiki/GSC_bus" title="GSC bus">HP GSC bus</a></li> <li><a href="/wiki/InfiniBand" title="InfiniBand">InfiniBand</a></li> <li><a href="/wiki/Ethernet" title="Ethernet">Ethernet</a></li> <li><a href="/wiki/Ultra_Port_Architecture" title="Ultra Port Architecture">UPA</a></li> <li><a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a></li> <li><a href="/wiki/PCI-X" title="PCI-X">PCI Extended (PCI-X)</a></li> <li><a href="/wiki/PCI_eXtensions_for_Instrumentation" title="PCI eXtensions for Instrumentation">PXI</a></li> <li><a href="/wiki/PCI_Express" title="PCI Express">PCI Express (PCIe)</a></li> <li><a href="/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port">AGP</a></li> <li><a href="/wiki/Compute_Express_Link" title="Compute Express Link">Compute Express Link (CXL)</a></li> <li><a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface (DMI)</a></li> <li><a href="/wiki/RapidIO" title="RapidIO">RapidIO</a></li> <li><a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">Intel QuickPath Interconnect</a></li> <li><a href="/wiki/NVLink" title="NVLink">NVLink</a></li> <li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> <ul><li><a href="/wiki/Infinity_Fabric" class="mw-redirect" title="Infinity Fabric">Infinity Fabric</a></li></ul></li> <li><a href="/wiki/Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Intel Ultra Path Interconnect</a></li> <li><a href="/wiki/Coherent_Accelerator_Processor_Interface" title="Coherent Accelerator Processor Interface">Coherent Accelerator Processor Interface (CAPI)</a></li> <li><a href="/wiki/SpaceWire" title="SpaceWire">SpaceWire</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Storage</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ST-506/ST-412" title="ST-506/ST-412">ST-506</a></li> <li><a href="/wiki/Enhanced_Small_Disk_Interface" title="Enhanced Small Disk Interface">ESDI</a></li> <li><a href="/wiki/Intelligent_Peripheral_Interface" title="Intelligent Peripheral Interface">IPI</a></li> <li><a href="/wiki/Storage_Module_Device" title="Storage Module Device">SMD</a></li> <li><a href="/wiki/Parallel_ATA" title="Parallel ATA">Parallel ATA (PATA)</a></li> <li><a href="/wiki/Bus_and_Tag" title="Bus and Tag">Bus and Tag</a></li> <li><a href="/wiki/Digital_Storage_Systems_Interconnect" title="Digital Storage Systems Interconnect">DSSI</a></li> <li><a href="/wiki/HIPPI" title="HIPPI">HIPPI</a></li> <li><a href="/wiki/SATA" title="SATA">Serial ATA (SATA)</a></li> <li><a href="/wiki/SCSI" title="SCSI">SCSI</a> <ul><li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel</a></li> <li><a href="/wiki/Serial_Attached_SCSI" title="Serial Attached SCSI">SAS</a></li></ul></li> <li><a href="/wiki/ESCON" title="ESCON">ESCON</a></li> <li><a href="/wiki/Fibre_Channel" title="Fibre Channel">Fibre Channel</a></li> <li><a href="/wiki/Serial_Storage_Architecture" title="Serial Storage Architecture">SSA</a></li> <li><a href="/wiki/SATA_Express" title="SATA Express">SATAe</a></li> <li>PCI Express (via <a href="/wiki/Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">AHCI</a> or <a href="/wiki/NVM_Express" title="NVM Express">NVMe</a> logical device interface)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Peripheral</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Apple_Desktop_Bus" title="Apple Desktop Bus">Apple Desktop Bus</a></li> <li><a href="/wiki/Atari_SIO" title="Atari SIO">Atari SIO</a></li> <li><a href="/wiki/Digital_Control_Bus" title="Digital Control Bus">DCB</a></li> <li><a href="/wiki/Commodore_bus" title="Commodore bus">Commodore bus</a></li> <li><a href="/wiki/HP-IL" title="HP-IL">HP-IL</a></li> <li><a href="/wiki/HIL_bus" title="HIL bus">HIL</a></li> <li><a href="/wiki/MIDI" title="MIDI">MIDI</a></li> <li><a href="/wiki/RS-232" title="RS-232">RS-232</a></li> <li><a href="/wiki/RS-422" title="RS-422">RS-422</a></li> <li><a href="/wiki/RS-423" title="RS-423">RS-423</a></li> <li><a href="/wiki/RS-485" title="RS-485">RS-485</a></li> <li><a href="/wiki/Lightning_(connector)" title="Lightning (connector)">Lightning</a></li> <li><a href="/wiki/DMX512#DMX512-A" title="DMX512">DMX512-A</a></li> <li><a href="/wiki/IEEE-488" class="mw-redirect" title="IEEE-488">IEEE-488 (GPIB)</a></li> <li><a href="/wiki/IEEE_1284" title="IEEE 1284">IEEE-1284 (parallel port)</a></li> <li><a href="/wiki/IEEE_1394" title="IEEE 1394">IEEE-1394 (FireWire)</a></li> <li><a href="/wiki/UNI/O" title="UNI/O">UNI/O</a></li> <li><a href="/wiki/1-Wire" title="1-Wire">1-Wire</a></li> <li><a href="/wiki/I%C2%B2C" title="I²C">I²C</a> (<a href="/wiki/ACCESS.bus" title="ACCESS.bus">ACCESS.bus</a>, <a href="/wiki/Power_Management_Bus" title="Power Management Bus">PMBus</a>, <a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a>)</li> <li><a href="/wiki/I3C_(bus)" title="I3C (bus)">I3C</a></li> <li><a class="mw-selflink selflink">SPI</a></li> <li><a href="/wiki/IEC_61030" title="IEC 61030">D²B</a></li> <li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel SCSI</a></li> <li><a href="/wiki/Profibus" title="Profibus">Profibus</a></li> <li><a href="/wiki/USB" title="USB">USB</a></li> <li><a href="/wiki/Camera_Link" title="Camera Link">Camera Link</a></li> <li><a href="/wiki/PCI_Express#PCI_Express_External_Cabling" title="PCI Express">External PCIe</a></li> <li><a href="/wiki/Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Audio</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ADAT_Lightpipe" title="ADAT Lightpipe">ADAT Lightpipe</a></li> <li><a href="/wiki/AES3" title="AES3">AES3</a></li> <li><a href="/wiki/Intel_High_Definition_Audio" title="Intel High Definition Audio">Intel HD Audio</a></li> <li><a href="/wiki/I%C2%B2S" title="I²S">I²S</a></li> <li><a href="/wiki/MADI" title="MADI">MADI</a></li> <li><a href="/wiki/McASP" title="McASP">McASP</a></li> <li><a href="/wiki/S/PDIF" title="S/PDIF">S/PDIF</a></li> <li><a href="/wiki/TOSLINK" title="TOSLINK">TOSLINK</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Portable</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/PC_Card" title="PC Card">PC Card</a></li> <li><a href="/wiki/ExpressCard" title="ExpressCard">ExpressCard</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Embedded</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multidrop_bus" title="Multidrop bus">Multidrop bus</a></li> <li><a href="/wiki/CoreConnect" title="CoreConnect">CoreConnect</a></li> <li><a href="/wiki/Advanced_Microcontroller_Bus_Architecture" title="Advanced Microcontroller Bus Architecture">AMBA</a> (<a href="/wiki/Advanced_eXtensible_Interface" title="Advanced eXtensible Interface">AXI</a>)</li> <li><a href="/wiki/Wishbone_(computer_bus)" title="Wishbone (computer bus)">Wishbone</a></li> <li><a href="/wiki/SLIMbus" title="SLIMbus">SLIMbus</a></li></ul> </div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><small>Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.</small><br /><span class="noviewer" typeof="mw:File"><span title="Category"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/16px-Symbol_category_class.svg.png" decoding="async" width="16" height="16" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/23px-Symbol_category_class.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/96/Symbol_category_class.svg/31px-Symbol_category_class.svg.png 2x" data-file-width="180" data-file-height="185" /></span></span> <a href="/wiki/Category:Computer_buses" title="Category:Computer buses">Category</a></div></td></tr></tbody></table></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=Serial_Peripheral_Interface&oldid=1259201545">https://en.wikipedia.org/w/index.php?title=Serial_Peripheral_Interface&oldid=1259201545</a>"</div></div> <div id="catlinks" class="catlinks" data-mw="interface"><div id="mw-normal-catlinks" class="mw-normal-catlinks"><a href="/wiki/Help:Category" title="Help:Category">Categories</a>: <ul><li><a href="/wiki/Category:Interfaces" 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