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class="vector-toc-numb">3.2</span> <span>Richmond (90 nm SOI)</span> </div> </a> <ul id="toc-Richmond_(90_nm_SOI)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Taylor_&_Trinidad_(90_nm_SOI)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Taylor_&_Trinidad_(90_nm_SOI)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3</span> <span>Taylor & Trinidad (90 nm SOI)</span> </div> </a> <ul id="toc-Taylor_&_Trinidad_(90_nm_SOI)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Tyler_(65_nm_SOI)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Tyler_(65_nm_SOI)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.4</span> <span>Tyler (65 nm SOI)</span> </div> </a> <ul id="toc-Tyler_(65_nm_SOI)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Lion_(65_nm_SOI)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Lion_(65_nm_SOI)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.5</span> <span>Lion (65 nm SOI)</span> </div> </a> <ul id="toc-Lion_(65_nm_SOI)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Caspian_(45_nm_SOI)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Caspian_(45_nm_SOI)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.6</span> <span>Caspian (45 nm SOI)</span> </div> </a> <ul id="toc-Caspian_(45_nm_SOI)-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Champlain_(45_nm_SOI)" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Champlain_(45_nm_SOI)"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.7</span> <span>Champlain (45 nm SOI)</span> </div> </a> <ul id="toc-Champlain_(45_nm_SOI)-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" 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<h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">AMD Turion</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. Available in 19 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-19" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">19 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D8%A5%D9%8A_%D8%A5%D9%85_%D8%AF%D9%8A_%D8%AA%D9%88%D8%B1%D9%8A%D9%88%D9%86" title="إي إم دي توريون – Arabic" lang="ar" hreflang="ar" data-title="إي إم دي توريون" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/AMD_Turion_64" title="AMD Turion 64 – Czech" lang="cs" hreflang="cs" data-title="AMD Turion 64" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/AMD_Turion_64" title="AMD Turion 64 – German" lang="de" hreflang="de" data-title="AMD Turion 64" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/AMD_Turion" title="AMD Turion – Spanish" lang="es" hreflang="es" data-title="AMD Turion" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/AMD_Turion" title="AMD Turion – French" lang="fr" hreflang="fr" data-title="AMD Turion" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/AMD_%ED%8A%9C%EB%A6%AC%EC%98%A8" title="AMD 튜리온 – Korean" lang="ko" hreflang="ko" data-title="AMD 튜리온" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Turion_64" title="Turion 64 – Italian" lang="it" hreflang="it" data-title="Turion 64" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/AMD_Turion" title="AMD Turion – Hungarian" lang="hu" hreflang="hu" data-title="AMD Turion" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Turion_64" title="Turion 64 – Japanese" lang="ja" hreflang="ja" data-title="Turion 64" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/AMD_Turion_64" title="AMD Turion 64 – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="AMD Turion 64" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Turion_64" title="Turion 64 – Polish" lang="pl" hreflang="pl" data-title="Turion 64" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Turion_64" title="Turion 64 – Portuguese" lang="pt" hreflang="pt" data-title="Turion 64" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Turion_64" title="Turion 64 – Russian" lang="ru" hreflang="ru" data-title="Turion 64" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Turion_64" title="Turion 64 – Slovak" lang="sk" hreflang="sk" data-title="Turion 64" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/Turion_64" title="Turion 64 – Finnish" lang="fi" hreflang="fi" data-title="Turion 64" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/AMD_Turion_64" title="AMD Turion 64 – Swedish" lang="sv" hreflang="sv" data-title="AMD Turion 64" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-tr mw-list-item"><a href="https://tr.wikipedia.org/wiki/AMD_Turion" title="AMD Turion – Turkish" lang="tr" hreflang="tr" data-title="AMD Turion" data-language-autonym="Türkçe" data-language-local-name="Turkish" class="interlanguage-link-target"><span>Türkçe</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/AMD_Turion" title="AMD Turion – Ukrainian" lang="uk" hreflang="uk" data-title="AMD Turion" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/Turion_64" title="Turion 64 – Chinese" lang="zh" hreflang="zh" data-title="Turion 64" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a href="https://www.wikidata.org/wiki/Special:EntityPage/Q253278#sitelinks-wikipedia" title="Edit interlanguage links" class="wbc-editpage">Edit links</a></span></div> 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href="/wiki/File:AMD_Turion_2005.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1d/AMD_Turion_2005.jpg/220px-AMD_Turion_2005.jpg" decoding="async" width="220" height="142" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1d/AMD_Turion_2005.jpg/330px-AMD_Turion_2005.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1d/AMD_Turion_2005.jpg/440px-AMD_Turion_2005.jpg 2x" data-file-width="15896" data-file-height="10290" /></a><figcaption>AMD Turion processor <a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">die</a></figcaption></figure> <p><b>AMD Turion</b> is the <a href="/wiki/Brand_name" class="mw-redirect" title="Brand name">brand name</a> <a href="/wiki/AMD" title="AMD">AMD</a> applies to its <a href="/wiki/X86-64" title="X86-64">x86-64</a> low-power consumption <a href="/wiki/Mobile_processor" title="Mobile processor">mobile processors</a> codenamed <i>K8L</i>.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> The Turion 64 and Turion 64 X2/Ultra processors compete with <a href="/wiki/Intel_Corporation" class="mw-redirect" title="Intel Corporation">Intel's</a> mobile processors, initially the <i><a href="/wiki/Pentium_M" title="Pentium M">Pentium M</a></i> and the <a href="/wiki/Intel_Core" title="Intel Core">Intel Core</a> and <a href="/wiki/Intel_Core_2" title="Intel Core 2">Intel Core 2</a> processors. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Features">Features</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=1" title="Edit section: Features"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Turion_64">Turion 64</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=2" title="Edit section: Turion 64"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Earliest <b>Turion 64</b> processors are plugged into AMD's <a href="/wiki/Socket_754" title="Socket 754">Socket 754</a>. They are equipped with 512 or 1024 <a href="/wiki/KiB" class="mw-redirect" title="KiB">KiB</a> of L2 cache, a 64-bit single channel on-die DDR-400 memory controller, and an 800 MHz <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> bus. Battery saving features, like <i><a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a></i>, are central to the marketing and usefulness of these CPUs. The newer "Richmond" models are designed for AMD's <a href="/wiki/Socket_S1" title="Socket S1">Socket S1</a> and have a double-channel DDR2 controller. </p> <div class="mw-heading mw-heading3"><h3 id="Turion_64_X2">Turion 64 X2</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=3" title="Edit section: Turion 64 X2"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:KL_AMD_Turion_64_X2_ES.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/e0/KL_AMD_Turion_64_X2_ES.jpg/220px-KL_AMD_Turion_64_X2_ES.jpg" decoding="async" width="220" height="221" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/e0/KL_AMD_Turion_64_X2_ES.jpg/330px-KL_AMD_Turion_64_X2_ES.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/e0/KL_AMD_Turion_64_X2_ES.jpg/440px-KL_AMD_Turion_64_X2_ES.jpg 2x" data-file-width="1137" data-file-height="1143" /></a><figcaption>AMD Turion 64 X2 engineering sample, 1.6 GHz</figcaption></figure> <p>Turion 64 X2 is <a href="/wiki/AMD" title="AMD">AMD</a>'s <a href="/wiki/64-bit" class="mw-redirect" title="64-bit">64-bit</a> <a href="/wiki/Dual-core" class="mw-redirect" title="Dual-core">dual-core</a> <a href="/wiki/Mobile_CPU" class="mw-redirect" title="Mobile CPU">mobile CPU</a>, intended to compete with <a href="/wiki/Intel" title="Intel">Intel</a>'s <a href="/wiki/Intel_Core" title="Intel Core">Core</a> and <a href="/wiki/Core_2" class="mw-redirect" title="Core 2">Core 2</a> CPUs. The Turion 64 X2 was launched on May 17, 2006,<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> after several delays. These processors use <a href="/wiki/Socket_S1" title="Socket S1">Socket S1</a> and feature <a href="/wiki/DDR2_SDRAM" title="DDR2 SDRAM">DDR2</a> memory. They also include <a href="/wiki/X86_virtualization" title="X86 virtualization">AMD Virtualization Technology</a> and more power-saving features. </p><p>The earlier 90 nm devices were <a href="/wiki/Codename" class="mw-redirect" title="Codename">codenamed</a> Taylor and Trinidad, while the newer 65 nm cores have codename Tyler. </p> <div style="clear:both;" class=""></div> <div class="mw-heading mw-heading3"><h3 id="Turion_X2_Ultra">Turion X2 Ultra</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=4" title="Edit section: Turion X2 Ultra"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-right" typeof="mw:File"><a href="/wiki/File:Turion_Ultra_logo.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/en/thumb/c/c2/Turion_Ultra_logo.png/100px-Turion_Ultra_logo.png" decoding="async" width="100" height="118" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/c/c2/Turion_Ultra_logo.png/150px-Turion_Ultra_logo.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/c/c2/Turion_Ultra_logo.png/200px-Turion_Ultra_logo.png 2x" data-file-width="245" data-file-height="288" /></a><figcaption></figcaption></figure> <p>Turion X2 Ultra (codenamed <i>Griffin</i>) is the first processor family from <a href="/wiki/AMD" title="AMD">AMD</a> solely for the mobile platform, based on the <a href="/wiki/AMD_K8" title="AMD K8">Athlon 64</a> (K8 Revision G) architecture with some specific architectural enhancements similar to current <a href="/wiki/AMD_K10" class="mw-redirect" title="AMD K10">Phenom</a> processors aimed at lower power consumption and longer battery life. The Turion Ultra processor was released as part of the "<i><a href="/wiki/AMD_mobile_platform#Puma_platform" title="AMD mobile platform">Puma</a></i>" mobile platform in June 2008. </p><p>The Turion X2 Ultra is a dual-core processor fabricated on <a href="/wiki/65_nm" class="mw-redirect" title="65 nm">65 nm</a> technology using 300 mm SOI wafers. It supports <a href="/wiki/DDR2-800" class="mw-redirect" title="DDR2-800">DDR2-800</a> <a href="/wiki/SO-DIMM" class="mw-redirect" title="SO-DIMM">SO-DIMMs</a> and features a DRAM prefetcher to improve performance and a mobile-enhanced <a href="/wiki/Northbridge_(computing)" title="Northbridge (computing)">northbridge</a> (memory controller, HyperTransport controller, and crossbar switch). Each processor core comes with 1 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a> L2 cache for a total of 2 MiB L2 cache for the entire processor. This is double the L2 cache found on the Turion 64 X2 processor. Clock rates range from 2.0 GHz to 2.4 GHz, and thermal design power (TDP) range from 32 watts to 35 watts.<sup id="cite_ref-Engadget0_3-0" class="reference"><a href="#cite_note-Engadget0-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </p><p>The Turion X2 Ultra processor, unlike earlier Turions, implements three voltage planes: one for the northbridge and one for each core.<sup id="cite_ref-Anand0_4-0" class="reference"><a href="#cite_note-Anand0-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> This, along with multiple <a href="/wiki/Phase-locked_loop" title="Phase-locked loop">phase-locked loops</a> (PLL), allows one core to alter its voltage and operating frequency independently of the other core, and independently of the northbridge. Indeed, in a matter of microseconds, the processor can switch to one of 8 frequency levels and one of 5 voltage levels. By adjusting frequency and voltage during use, the processor can adapt to different workloads and help reduce power consumption. It can operate as low as 250 MHz to conserve power during light use. </p><p>Additionally, the processor features <a href="/wiki/Advanced_Configuration_and_Power_Interface#Processor_states" class="mw-redirect" title="Advanced Configuration and Power Interface">deep sleep state</a> C3, deeper sleep state C4 (AltVID), and <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> 3.0 up to 2.6 GHz, or up to 41.6 <a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s bandwidth per link at 16-bit link width and dynamic scaling of HT link width down to 0-bit ("disconnected") in both directions from and to the <a href="/wiki/Chipset" title="Chipset">chipset</a> for four different usage scenarios.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> It also implements multiple on-die thermal sensors through integrated SMBUS (SB-TSI) interface (replaces and eliminates the thermal monitor circuit chip through SMBUS in its predecessors) with additional MEMHOT signal sent from embedded controller to the processor, and reduces memory temperature. </p><p>The Turion X2 Ultra processor uses the same socket S1 as its predecessor, <a href="/wiki/Turion_64_X2" class="mw-redirect" title="Turion 64 X2">Turion 64 X2</a>, but the pinout is different.<sup id="cite_ref-Inquirer0_6-0" class="reference"><a href="#cite_note-Inquirer0-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> It is designed to work with the <a href="/wiki/AMD_700_chipset_series#780G/780V" title="AMD 700 chipset series">RS780M</a> chipset. </p><p>Given the above enhancements on the architecture, the cores were minimally modified and are based on the K8 instead of the <a href="/wiki/AMD_K10" class="mw-redirect" title="AMD K10">K10</a> microarchitecture.<sup id="cite_ref-Inquirer0_6-1" class="reference"><a href="#cite_note-Inquirer0-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> AMD Fellow Maurice Steinman has said the cores are almost transistor-for-transistor identical to those found in the 65 nm Turion 64 X2 processors. <sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (April 2008)">citation needed</span></a></i>]</sup> </p> <div class="mw-heading mw-heading3"><h3 id="Turion_II_Ultra">Turion II Ultra</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=5" title="Edit section: Turion II Ultra"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Turion II Ultra (codenamed <i>Caspian</i>) is the mobile version of the K10.5 architecture produced using 45 nm fabrication process, also known by its desktop variant <i>Regor</i>. It is a dual core processor, and features clock speeds of 2.5 GHz, 2 MB total L2 cache (1 MB per core), HyperTransport at 3.6 GT/s, and a 128 bit FPU. It maintains a TDP of 35W from its predecessor Turion X2 Ultra (codenamed <i>Griffin</i>). </p> <div class="mw-heading mw-heading3"><h3 id="Turion_II">Turion II</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=6" title="Edit section: Turion II"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Turion II is identical to Turion II Ultra, except that the Turion II features only 1 MB of L2 cache (512 KB per core), and lower clock speeds ranging from 2.2 GHz to 2.6 GHz. </p> <div class="mw-heading mw-heading2"><h2 id="Model_naming_methodology">Model naming methodology</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=7" title="Edit section: Model naming methodology"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The model naming scheme does not make it obvious how to compare one Turion with another, or even an <a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a>. The model name is two letters, a dash, and a two digit number (for example, ML-34). The two letters together designate a processor class, while the number represents a <a href="/wiki/Performance_rating" class="mw-redirect" title="Performance rating">performance rating</a> (PR). The first letter is M for mono (single) core processors and T for twin (dual) core <a href="/wiki/Turion_64_X2" class="mw-redirect" title="Turion 64 X2">Turion 64 X2</a> processors. The later in the alphabet that the second letter appears, the more the model has been designed for mobility (frugal power consumption). Take for instance, an MT-30 and an ML-34. Since the T in the MT-30 is later in the alphabet than the L in ML-34, the MT-30 consumes less power than the ML-34. But since 34 is greater than 30, the ML-34 is faster than the MT-30. </p><p>The release of the Turion II Ultra and Turion II lineups have simplified name methodology; all newly released Turions have the letter "M" followed by a number designating relative performance. The higher the number, the higher the clock speed. For example, the Turion II M500 has a clock speed of 2.2 GHz while the Turion II M520 has a clock speed of 2.3 GHz. </p> <div class="mw-heading mw-heading2"><h2 id="Cores">Cores</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=8" title="Edit section: Cores"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" align="center"> <caption>AMD Turion processor family </caption> <tbody><tr> <th>Code-named </th> <th>Core </th> <th>Date released </th></tr> <tr style="background:white"> <td>Lancaster<br />Richmond<br />Sable </td> <td>solo (90 nm)<br />solo (90 nm)<br />solo (65 nm) </td> <td>Mar 2005<br />Sep 2006<br />Jun 2008 </td></tr> <tr style="background:white"> <td>Taylor<br />Trinidad<br />Tyler<br />Lion </td> <td>dual (90 nm)<br />dual (90 nm)<br />dual (65 nm)<br />dual (65 nm) </td> <td>May 2006<br />May 2006<br />May 2007<br />Jun 2008 </td></tr> <tr style="background:white"> <td>Griffin </td> <td>dual (65 nm) </td> <td>Jun 2008 </td></tr> <tr style="background:white"> <td>Caspian </td> <td>dual (45 nm) </td> <td>Sep 2009 </td></tr> <tr> <td>Champlain </td> <td>dual (45 nm) </td> <td>May 2010 </td></tr></tbody></table> <div class="mw-heading mw-heading3"><h3 id="Lancaster_(90_nm_SOI)"><span id="Lancaster_.2890_nm_SOI.29"></span>Lancaster (90 nm SOI)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=9" title="Edit section: Lancaster (90 nm SOI)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:AMD_Turion_64_Lancaster_MT-34_(top).jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/32/AMD_Turion_64_Lancaster_MT-34_%28top%29.jpg/200px-AMD_Turion_64_Lancaster_MT-34_%28top%29.jpg" decoding="async" width="200" height="155" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/32/AMD_Turion_64_Lancaster_MT-34_%28top%29.jpg/300px-AMD_Turion_64_Lancaster_MT-34_%28top%29.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/32/AMD_Turion_64_Lancaster_MT-34_%28top%29.jpg/400px-AMD_Turion_64_Lancaster_MT-34_%28top%29.jpg 2x" data-file-width="3100" data-file-height="2400" /></a><figcaption>model MT-34 (top)</figcaption></figure> <figure typeof="mw:File/Thumb"><a href="/wiki/File:AMD_Turion_64_Lancaster_MT-34_(bottom).jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/2/24/AMD_Turion_64_Lancaster_MT-34_%28bottom%29.jpg/200px-AMD_Turion_64_Lancaster_MT-34_%28bottom%29.jpg" decoding="async" width="200" height="155" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/2/24/AMD_Turion_64_Lancaster_MT-34_%28bottom%29.jpg/300px-AMD_Turion_64_Lancaster_MT-34_%28bottom%29.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/2/24/AMD_Turion_64_Lancaster_MT-34_%28bottom%29.jpg/400px-AMD_Turion_64_Lancaster_MT-34_%28bottom%29.jpg 2x" data-file-width="3100" data-file-height="2400" /></a><figcaption>model MT-34 (bottom)</figcaption></figure> <ul><li>Stepping E5</li> <li>L1 cache: 64 + 64 KiB (data + instructions)</li> <li>L2 cache: 512 or 1024 KiB, full speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">Enhanced 3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/NX_Bit" class="mw-redirect" title="NX Bit">NX Bit</a></li> <li><a href="/wiki/Socket_754" title="Socket 754">Socket 754</a>, <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> (800 MHz, HT800)</li> <li>VCore: <ul><li>0.8 V - 1.2 V for ML chips</li> <li>0.8 V - 1.35 V for MT chips</li></ul></li> <li>Power consumption (<a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>): 25/35 watt max</li> <li>First release: March 2005</li> <li>Clock rate: 1600, 1800, 2000, 2200, 2400 MHz <ul><li>25W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>MT-28: 1600 <a href="/wiki/MHz" class="mw-redirect" title="MHz">MHz</a> (512 KiB L2-Cache)</li> <li>MT-30: 1600 <a href="/wiki/MHz" class="mw-redirect" title="MHz">MHz</a> (1024 KiB L2-Cache)</li> <li>MT-32: 1800 <a href="/wiki/MHz" class="mw-redirect" title="MHz">MHz</a> (512 <a href="/wiki/KiB" class="mw-redirect" title="KiB">KiB</a> L2-Cache)</li> <li>MT-34: 1800 <a href="/wiki/MHz" class="mw-redirect" title="MHz">MHz</a> (1024 KiB L2-Cache)</li> <li>MT-37: 2000 <a href="/wiki/MHz" class="mw-redirect" title="MHz">MHz</a> (1024 KiB L2-Cache)</li> <li>MT-40: 2200 <a href="/wiki/MHz" class="mw-redirect" title="MHz">MHz</a> (1024 KiB L2-Cache)</li></ul></li> <li>35W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>ML-28: 1600 MHz (512 KiB L2-Cache)</li> <li>ML-30: 1600 MHz (1024 KiB L2-Cache)</li> <li>ML-32: 1800 MHz (512 KiB L2-Cache)</li> <li>ML-34: 1800 MHz (1024 KiB L2-Cache)</li> <li>ML-37: 2000 MHz (1024 KiB L2-Cache)</li> <li>ML-40: 2200 MHz (1024 KiB L2-Cache)</li> <li>ML-42: 2400 MHz (512 KiB L2-Cache)</li> <li>ML-44: 2400 MHz (1024 KiB L2-Cache)</li></ul></li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Richmond_(90_nm_SOI)"><span id="Richmond_.2890_nm_SOI.29"></span>Richmond (90 nm SOI)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=10" title="Edit section: Richmond (90 nm SOI)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The models support the same features available in Lancaster, plus <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a>. </p> <ul><li>L1 cache: 64 + 64 KiB (data + instructions)</li> <li>L2 cache: 512 KiB, full speed</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/3DNow!" title="3DNow!">Enhanced 3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/NX_Bit" class="mw-redirect" title="NX Bit">NX Bit</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></li> <li><a href="/wiki/Socket_S1" title="Socket S1">Socket S1</a>, <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> (800 MHz, HT800)</li> <li>Power consumption (<a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>): 31 watt max</li> <li>First release: September 1, 2006</li> <li>Clock rate: 2000, 2200 MHz <ul><li>31W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>MK-36: 2000 MHz (512 KiB L2-Cache)</li> <li>MK-38: 2200 MHz (512 KiB L2-Cache)</li></ul></li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Taylor_&_Trinidad_(90_nm_SOI)"><span id="Taylor_.26_Trinidad_.2890_nm_SOI.29"></span>Taylor & Trinidad (90 nm SOI)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=11" title="Edit section: Taylor & Trinidad (90 nm SOI)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure typeof="mw:File/Thumb"><a href="/wiki/File:Turion64-X2.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/f/f9/Turion64-X2.jpg/300px-Turion64-X2.jpg" decoding="async" width="300" height="157" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/f/f9/Turion64-X2.jpg 1.5x" data-file-width="450" data-file-height="236" /></a><figcaption>Turion64-X2 for Socket S1</figcaption></figure> <ul><li>Dual <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a> core</li> <li>Stepping F2</li> <li>L1 <a href="/wiki/CPU_cache" title="CPU cache">cache</a>: 64 + 64 <a href="/wiki/KiB" class="mw-redirect" title="KiB">KiB</a> (<a href="/wiki/Data_(computing)" class="mw-redirect" title="Data (computing)">data</a> + <a href="/wiki/Instruction_(computer_science)" class="mw-redirect" title="Instruction (computer science)">instructions</a>) per core</li> <li>L2 cache: 256 KiB (<i>Taylor</i>) or 512 KiB (<i>Trinidad</i>) per core, full speed</li> <li>Memory controller: dual channel DDR2-667 MHz</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, Extended <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></li> <li><a href="/wiki/Socket_S1" title="Socket S1">Socket S1</a>, <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> (800 MHz, 1600 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT</a>/s, 10.7 <a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s CPU-RAM + 6.4 GB/s CPU-I/O transfer rate)<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup></li> <li>Power consumption (<a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>): 31, 33, 35 watt max</li> <li>First release: May 17, 2006</li> <li>Clock rate: 1600, 1800, 2000, 2200 MHz <ul><li>31W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>TL-50: 1600 MHz (256 KiB L2-Cache per core)</li> <li>TL-52: 1600 MHz (512 KiB L2-Cache per core)</li></ul></li> <li>33W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>TL-56: 1800 MHz (512 KiB L2-Cache per core)</li></ul></li> <li>35W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>TL-60: 2000 MHz (512 KiB L2-Cache per core)</li> <li>TL-64: 2200 MHz (512 KiB L2-Cache per core)</li></ul></li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Tyler_(65_nm_SOI)"><span id="Tyler_.2865_nm_SOI.29"></span>Tyler (65 nm SOI)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=12" title="Edit section: Tyler (65 nm SOI)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Dual AMD64 core</li> <li>Steppings G1, G2</li> <li>L1 cache: 64 + 64 KiB (data + instructions) per core</li> <li>L2 cache: 256 KiB per core (All Athlon & Turion TL-50) or 512 KiB per core (All Others), full speed</li> <li>Memory controller: dual channel DDR2-667 MHz (10.6 GB/s full-duplex CPU/RAM bandwidth)</li> <li>100 MHz granularity (Dynamic P-state Transitions)</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, Extended <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/NX_Bit" class="mw-redirect" title="NX Bit">NX Bit</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></li> <li><a href="/wiki/Socket_S1" title="Socket S1">Socket S1</a>, <a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> (800 MHz / 1600 MT/s)</li> <li>Power consumption (<a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>): 31, 35 watt max.</li> <li>First release: 2007</li> <li>Clock rate: 1700, 1800, 1900, 2000, 2100, 2200, 2300, 2400 MHz <ul><li>31W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>TK-53 1700 MHz (256 KiB L2-Cache per core) - ※Athlon 64 X2 Dual-Core for Notebooks</li> <li>TK-55 1800 MHz (256 KiB L2-Cache per core) - ※Athlon 64 X2 Dual-Core for Notebooks</li> <li>TL-56 1800 MHz (512 KiB L2-Cache per core)</li> <li>TK-57 1900 MHz (256 KiB L2-Cache per core) - ※Athlon 64 X2 Dual-Core for Notebooks</li> <li>TL-58 1900 MHz (512 KiB L2-Cache per core)</li> <li>TL-60 2000 MHz (512 KiB L2-Cache per core)</li></ul></li> <li>35W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>TL-62 2100 MHz (512 KiB L2-Cache per core)</li> <li>TL-64 2200 MHz (512 KiB L2-Cache per core)</li> <li>TL-66 2300 MHz (512 KiB L2-Cache per core)</li> <li>TL-68 2400 MHz (512 KiB L2-Cache per core)</li></ul></li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Lion_(65_nm_SOI)"><span id="Lion_.2865_nm_SOI.29"></span>Lion (65 nm SOI)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=13" title="Edit section: Lion (65 nm SOI)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Dual <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a> core</li> <li>B1 Stepping</li> <li>L1 <a href="/wiki/CPU_cache" title="CPU cache">cache</a>: 64 + 64 <a href="/wiki/KiB" class="mw-redirect" title="KiB">KiB</a> (<a href="/wiki/Data_(computing)" class="mw-redirect" title="Data (computing)">data</a> + <a href="/wiki/Instruction_(computer_science)" class="mw-redirect" title="Instruction (computer science)">instructions</a>) per core <ul><li>L2 cache: 512 <a href="/wiki/KiB" class="mw-redirect" title="KiB">KiB</a> per core, full speed, or</li> <li>L2 cache: 1 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a> per core, full speed</li></ul></li> <li>Memory controller: dual channel DDR2-800 MHz</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, Extended <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></li> <li><a href="/wiki/Socket_S1" title="Socket S1"> Socket S1 (S1g2)</a></li> <li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> (1800 MHz, 3600 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT</a>/s, 12.8 <a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s CPU-RAM + 14.4 GB/s CPU-I/O transfer rate)</li> <li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> (2200 MHz, 4400 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT</a>/s on ZM-85 y ZM-87 only)</li> <li>Power consumption (<a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>): 32, 35 watt max</li> <li>First release: June 4, 2008 <ul><li>Clock rate: 2000, 2100, 2200 MHz (RM-7x, L2 cache: 1 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a>)</li> <li>Clock rate: 2100, 2200, 2300, 2400, 2500 MHz (ZM-8x, L2 cache: 2 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a>)</li> <li>31W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>RM-70: 2000 MHz</li></ul></li> <li>32W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>ZM-80: 2100 MHz</li></ul></li> <li>35W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>RM-72: 2100 MHz</li> <li>RM-74: 2200 MHz</li> <li>ZM-82: 2200 MHz</li> <li>ZM-84: 2300 MHz</li> <li>ZM-85: 2300 MHz</li> <li>ZM-86: 2400 MHz</li> <li>ZM-87: 2400 MHz</li> <li>ZM-88: 2500 MHz</li></ul></li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Caspian_(45_nm_SOI)"><span id="Caspian_.2845_nm_SOI.29"></span>Caspian (45 nm SOI)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=14" title="Edit section: Caspian (45 nm SOI)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Dual <a href="/wiki/AMD_K10" class="mw-redirect" title="AMD K10">Stars</a> core <ul><li>L2 cache: 512 <a href="/wiki/KiB" class="mw-redirect" title="KiB">KiB</a> per core, full speed (For Turion II, Athlon II and Sempron II), or</li> <li>L2 cache: 1 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a> per core, full speed (For Turion II Ultra)</li></ul></li> <li>Memory controller: dual channel DDR2-800 MHz</li> <li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, Extended <a href="/wiki/3DNow!" title="3DNow!">3DNow!</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/SSE4a" class="mw-redirect" title="SSE4a">SSE4a</a>, <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a>, <a href="/wiki/PowerNow!" title="PowerNow!">PowerNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></li> <li><a href="/wiki/Socket_S1" title="Socket S1">Socket S1g</a>3</li> <li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> (1800 MHz, 3600 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT</a>/s on M6xx/M5xx models, 1600 MHz, 3200 <a href="/wiki/Megatransfer" class="mw-redirect" title="Megatransfer">MT</a>/s for M3xx models)</li> <li>Power consumption (<a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>): 35 watt max <ul><li>Clock rate: 2000 (M1xx, L2 cache 512 <a href="/wiki/KiB" class="mw-redirect" title="KiB">KiB</a>)</li> <li>Clock rate: 2000, 2100, 2200 MHz (M3xx, L2 cache: 1 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a>)</li> <li>Clock rate: 2200, 2300, 2400 MHz (M5xx, L2 cache: 1 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a>)</li> <li>Clock rate: 2400, 2500, 2600, 2700 MHz (M6xx, L2 cache: 2 <a href="/wiki/MiB" class="mw-redirect" title="MiB">MiB</a>)</li> <li>25W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>M100: 2000 MHz - Sempron II Single-Core (only 64 bit FPU)</li> <li>M120: 2100 MHz - Sempron II Single-Core (only 64 bit FPU)</li></ul></li> <li>35W <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a>: <ul><li>M300: 2000 MHz – Athlon II Dual-Core (only 64 bit FPU)</li> <li>M320: 2100 MHz – Athlon II Dual-Core (only 64 bit FPU)</li> <li>M340: 2200 MHz – Athlon II Dual-Core (only 64 bit FPU)</li> <li>M500: 2200 MHz – Turion II Dual-Core</li> <li>M520: 2300 MHz – Turion II Dual-Core</li> <li>M540: 2400 MHz – Turion II Dual-Core</li> <li>M600: 2400 MHz – Turion II Ultra Dual-Core</li> <li>M620: 2500 MHz – Turion II Ultra Dual-Core</li> <li>M640: 2600 MHz – Turion II Ultra Dual-Core</li> <li>M660: 2700 MHz – Turion II Ultra Dual-Core</li></ul></li></ul></li></ul> <div class="mw-heading mw-heading3"><h3 id="Champlain_(45_nm_SOI)"><span id="Champlain_.2845_nm_SOI.29"></span>Champlain (45 nm SOI)</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=15" title="Edit section: Champlain (45 nm SOI)"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Based on the AMD <a href="/wiki/AMD_K10" class="mw-redirect" title="AMD K10">K10 microarchitecture</a></li> <li>All models support: <i><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, <a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a>, <a href="/wiki/SSE2" title="SSE2">SSE2</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, <a href="/wiki/SSE4a" class="mw-redirect" title="SSE4a">SSE4a</a>, <a href="/wiki/3DNow!" title="3DNow!">Enhanced 3DNow!</a>, <a href="/wiki/NX_bit" title="NX bit">NX bit</a>, <a href="/wiki/X86-64#AMD64" title="X86-64">AMD64</a>, <a href="/wiki/Cool%27n%27Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></i>, <i><a href="/wiki/AMD-V" class="mw-redirect" title="AMD-V">AMD-V</a></i></li> <li>Memory support: <a href="/wiki/DDR3_SDRAM" title="DDR3 SDRAM">DDR3 SDRAM</a>, <a href="/wiki/DDR3_SDRAM#Overview" title="DDR3 SDRAM">DDR3L SDRAM</a></li></ul> <table class="wikitable"> <caption>"Champlain" (45 nm, Dual-core) </caption> <tbody><tr> <th>Model number</th> <th>Frequency</th> <th><a href="/wiki/CPU_caches#Multi-level_caches" class="mw-redirect" title="CPU caches">L2 cache</a></th> <th><a href="/wiki/Floating-point_unit" title="Floating-point unit">FPU width</a></th> <th><a href="/wiki/HyperTransport" title="HyperTransport">HT</a></th> <th>Multiplier<sup id="fn_1_back"><a href="/wiki/List_of_AMD_mobile_microprocessors#fn_1_back" class="mw-redirect" title="List of AMD mobile microprocessors">1</a></sup></th> <th>Voltage</th> <th><a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDP</a></th> <th>Socket</th> <th>Release date</th> <th>Order part number </th></tr> <tr> <td>Turion II P520</td> <td>2.3 GHz</td> <td>2 × 1 MB</td> <td>128-bit</td> <td>1.8 GHz</td> <td>11.5×</td> <td></td> <td>25 W</td> <td><a href="/wiki/Socket_S1" title="Socket S1">Socket S1g</a>4</td> <td>May 12, 2010</td> <td>TMP520SGR23GM </td></tr> <tr> <td>Turion II P540</td> <td>2.4 GHz</td> <td>2 × 1 MB</td> <td>128-bit</td> <td>1.8 GHz</td> <td>12×</td> <td></td> <td>25 W</td> <td>Socket S1g4</td> <td>October 4, 2010</td> <td>TMP540SGR23GM </td></tr> <tr> <td>Turion II P560</td> <td>2.5 GHz</td> <td>2 × 1 MB</td> <td>128-bit</td> <td>1.8 GHz</td> <td>12.5×</td> <td></td> <td>25 W</td> <td>Socket S1g4</td> <td>October 19, 2010</td> <td>TMP560SGR23GM </td></tr> <tr> <td>Turion II N530</td> <td>2.5 GHz</td> <td>2 × 1 MB</td> <td>128-bit</td> <td>1.8 GHz</td> <td>12.5×</td> <td></td> <td>35 W</td> <td>Socket S1g4</td> <td>May 12, 2010</td> <td>TMN530DCR23GM </td></tr> <tr> <td>Turion II N550</td> <td>2.6 GHz</td> <td>2 × 1 MB</td> <td>128-bit</td> <td>1.8 GHz</td> <td>13×</td> <td></td> <td>35 W</td> <td>Socket S1g4</td> <td>October 4, 2010</td> <td>TMN550DCR23GM </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=16" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/AMD_mobile_platform" title="AMD mobile platform">AMD mobile platform</a></li> <li><a href="/wiki/List_of_AMD_Turion_microprocessors" class="mw-redirect" title="List of AMD Turion microprocessors">List of AMD Turion microprocessors</a></li> <li><a href="/wiki/List_of_AMD_Sempron_microprocessors#Mobile_processors" class="mw-redirect" title="List of AMD Sempron microprocessors">List of AMD Mobile Sempron microprocessors</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=AMD_Turion&action=edit&section=17" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output 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Retrieved <span class="nowrap">2008-09-09</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AMD+Delivers+Multi-Tasking+Performance+On-The-Go+With+First+64-Bit+Dual-Core+Mobile+Processor&rft.pub=AMD&rft.date=2006-05-17&rft_id=https%3A%2F%2Fwww.amd.com%2Fus-en%2FCorporate%2FVirtualPressRoom%2F0%2C%2C51_104_543~108456%2C00.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAMD+Turion" class="Z3988"></span></span> </li> <li id="cite_note-Engadget0-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-Engadget0_3-0">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.engadget.com/2008/03/11/amd-roadmap-shocker-reveals-new-turion-athlon-sempron-mobile-c/">AMD mobile CPU roadmap at Engadget</a></span> </li> <li id="cite_note-Anand0-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-Anand0_4-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFShimpi" class="citation web cs1">Shimpi, Anand Lal. <a rel="nofollow" class="external text" href="https://www.anandtech.com/show/2235">"AMD's Next-Generation Mobile Architecture Revealed: Griffin"</a>. <i>www.anandtech.com</i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=www.anandtech.com&rft.atitle=AMD%27s+Next-Generation+Mobile+Architecture+Revealed%3A+Griffin&rft.aulast=Shimpi&rft.aufirst=Anand+Lal&rft_id=https%3A%2F%2Fwww.anandtech.com%2Fshow%2F2235&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAMD+Turion" class="Z3988"></span></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://pc.watch.impress.co.jp/docs/2007/0524/mpf02_08.jpg">"PC Watch image"</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=PC+Watch+image&rft_id=http%3A%2F%2Fpc.watch.impress.co.jp%2Fdocs%2F2007%2F0524%2Fmpf02_08.jpg&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAMD+Turion" class="Z3988"></span></span> </li> <li id="cite_note-Inquirer0-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-Inquirer0_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Inquirer0_6-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070705232301/http://theinquirer.net/default.aspx?article=39894">"The Inquirer report"</a>. <i><a href="/wiki/The_Inquirer" title="The Inquirer">The Inquirer</a></i>. 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G2) specifications</a></li> <li><a rel="nofollow" class="external text" href="https://www.theregister.co.uk/2005/12/07/amd_ibm_stressed_silicon/">The Register : AMD, IBM "stress" silicon for 65nm process, by Tony Smith</a></li> <li><a rel="nofollow" class="external text" href="http://www.silentpcreview.com/article300-page1.html">Silent PC Review: Turion 64 on the Desktop </a></li> <li><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_13909_13911,00.html">AMD Competitive Comparison</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20090628172007/http://angelfall.s39.xrea.com/area2ch/turion-e.html">List of desktop motherboards which support the Turion 64</a></li> <li><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_13909,00.html">AMD Turion 64 X2 Mobile Technology Product Page</a></li> <li><a rel="nofollow" class="external text" href="http://www.extremetech.com/article2/0,1558,1963395,00.asp">Article from ExtremeTech: AMD Adds Second Core To Turion Notebook Chip</a></li> <li><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~108456,00.html">Turion 64 X2 Press release</a></li> <li><a rel="nofollow" class="external free" href="http://support.amd.com/us/psearch/Pages/psearch.aspx?type=2.2%3b2.3&product=2.2.8&contentType=Tech+Doc+Embedded&ostype=&keywords=&items=20">http://support.amd.com/us/psearch/Pages/psearch.aspx?type=2.2%3b2.3&product=2.2.8&contentType=Tech+Doc+Embedded&ostype=&keywords=&items=20</a></li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output 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processors">K5</a></li> <li><a href="/wiki/List_of_AMD_K6_processors" title="List of AMD K6 processors">K6</a></li> <li><a href="/wiki/List_of_AMD_Athlon_processors" title="List of AMD Athlon processors">Athlon</a> <ul><li><a href="/wiki/List_of_AMD_Athlon_XP_processors" title="List of AMD Athlon XP processors">XP</a></li> <li><a href="/wiki/List_of_AMD_Athlon_64_processors" title="List of AMD Athlon 64 processors">64</a></li> <li><a href="/wiki/List_of_AMD_Athlon_X2_processors" title="List of AMD Athlon X2 processors">X2</a></li> <li><a href="/wiki/List_of_AMD_Athlon_II_processors" title="List of AMD Athlon II processors">II</a></li></ul></li> <li><a href="/wiki/List_of_AMD_Phenom_processors" title="List of AMD Phenom processors">Phenom</a></li> <li><a href="/wiki/List_of_AMD_FX_processors" title="List of AMD FX processors">FX</a></li> <li><a href="/wiki/List_of_AMD_Ryzen_processors" title="List of AMD Ryzen processors">Ryzen</a></li> <li><a href="/wiki/List_of_AMD_Duron_processors" title="List of AMD Duron processors">Duron</a></li> <li><a href="/wiki/List_of_AMD_Sempron_processors" title="List of AMD Sempron processors">Sempron</a></li> <li><a href="/wiki/List_of_AMD_Turion_processors" title="List of AMD Turion processors">Turion</a></li> <li><a href="/wiki/List_of_AMD_Opteron_processors" title="List of AMD Opteron processors">Opteron</a></li> <li><a href="/wiki/List_of_AMD_Epyc_processors" class="mw-redirect" title="List of AMD Epyc processors">Epyc</a></li></ul></li> <li><a href="/wiki/List_of_AMD_processors_with_3D_graphics" title="List of AMD processors with 3D graphics">APUs</a></li> <li><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_AMD_chipsets" title="List of AMD chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon/K7</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 desktop</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K8" title="AMD K8">K8</a></li> <li><a href="/wiki/AMD_K9" title="AMD K9">K9</a></li> <li><a href="/wiki/AMD_10h" title="AMD 10h">K10 (aka 10h)</a></li> <li>15h <ul><li><a href="/wiki/Bulldozer_(microarchitecture)" title="Bulldozer (microarchitecture)">Bulldozer</a></li> <li><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver</a></li> <li><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller</a></li> <li><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a></li></ul></li> <li><a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a> <ul><li><a href="/wiki/Zen_(first_generation_microarchitecture)" class="mw-redirect" title="Zen (first generation microarchitecture)">1st gen</a></li> <li><a href="/wiki/Zen%2B" title="Zen+">Zen+</a></li> <li><a href="/wiki/Zen_2" title="Zen 2">Zen 2</a></li> <li><a href="/wiki/Zen_3" title="Zen 3">Zen 3</a></li> <li><a href="/wiki/Zen_3%2B" class="mw-redirect" title="Zen 3+">Zen 3+</a></li> <li><a href="/wiki/Zen_4" title="Zen 4">Zen 4</a></li> <li><a href="/wiki/Zen_5" title="Zen 5">Zen 5</a></li> <li><i><a href="/wiki/Zen_6" title="Zen 6">Zen 6</a></i></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 low-power</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bobcat_(microarchitecture)" title="Bobcat (microarchitecture)">Bobcat (aka 14h)</a></li> <li>16h <ul><li><a href="/wiki/Jaguar_(microarchitecture)" title="Jaguar (microarchitecture)">Jaguar</a></li> <li><a href="/wiki/Puma_(microarchitecture)" title="Puma (microarchitecture)">Puma</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/ARM_architecture_family#ARMv8-A" title="ARM architecture family">ARM64</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K12" title="AMD K12">K12 (aka 12h)</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon" title="Athlon">Athlon</a></li> <li><a href="/wiki/Ryzen" title="Ryzen">Ryzen</a></li> <li><a href="/wiki/Threadripper" title="Threadripper">Threadripper</a></li> <li><a href="/wiki/Epyc" title="Epyc">Epyc</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;background-color: #DDDDDD">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Early x86 (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am286" class="mw-redirect" title="Am286">Am286</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am386" title="Am386">Am386</a></li> <li><a href="/wiki/Am486" title="Am486">Am486</a></li> <li><a href="/wiki/Am5x86" title="Am5x86">Am5x86</a></li> <li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/AMD_K6-2" title="AMD K6-2">K6-2</a></li> <li><a href="/wiki/AMD_K6-III" title="AMD K6-III">K6-III</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon</a> <ul><li><a href="/wiki/Athlon_XP" class="mw-redirect" title="Athlon XP">XP</a></li> <li><a href="/wiki/Athlon_MP" class="mw-redirect" title="Athlon MP">MP</a></li></ul></li> <li><a href="/wiki/Duron" title="Duron">Duron</a></li> <li><a href="/wiki/Geode_(processor)" title="Geode (processor)">Geode</a></li> <li><a href="/wiki/AMD_%C3%89lan" title="AMD Élan">AMD Élan</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> <ul><li><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">X2</a></li> <li><a href="/wiki/Athlon_II" title="Athlon II">II</a></li></ul></li> <li><a href="/wiki/Sempron" title="Sempron">Sempron</a></li> <li><a class="mw-selflink selflink">Turion</a></li> <li><a href="/wiki/AMD_Phenom" title="AMD Phenom">Phenom</a> <ul><li><a href="/wiki/Phenom_II" title="Phenom II">II</a></li></ul></li> <li><a href="/wiki/AMD_FX" title="AMD FX">FX</a></li> <li><a href="/wiki/Opteron" title="Opteron">Opteron</a></li> <li><a href="/wiki/AMD_APU" title="AMD APU">A-series APUs</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Other</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_Am9080" title="AMD Am9080">Am9080</a></li> <li><a href="/wiki/AMD_Am2900" title="AMD Am2900">Am2900</a> <ul><li><a href="/wiki/List_of_AMD_Am2900_and_Am29000_families" title="List of AMD Am2900 and Am29000 families">list</a></li></ul></li> <li><a href="/wiki/AMD_Am29000" title="AMD Am29000">Am29000</a></li> <li><a href="/wiki/Alchemy_(microarchitecture)" class="mw-redirect" title="Alchemy (microarchitecture)">Alchemy</a> <ul><li><a href="/wiki/MIPS_architecture#MIPS32" title="MIPS architecture">MIPS32</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><i>Italics</i> indicates an upcoming architecture.</div></td></tr></tbody></table></div>    </div><noscript><img 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