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<button class="vector-pinnable-header-toggle-button vector-pinnable-header-unpin-button" data-event-name="pinnable-header.vector-appearance.unpin">hide</button> </div> </div> </div> </nav> </div> </div> <div id="bodyContent" class="vector-body" aria-labelledby="firstHeading" data-mw-ve-target-container> <div class="vector-body-before-content"> <div class="mw-indicators"> </div> <div id="siteSub" class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Ability of a digital electronic system to remain in unstable equilibrium forever</div> <p class="mw-empty-elt"> </p> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Metastability_D-Flipflops.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/a/a2/Metastability_D-Flipflops.svg/220px-Metastability_D-Flipflops.svg.png" decoding="async" width="220" height="169" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/a/a2/Metastability_D-Flipflops.svg/330px-Metastability_D-Flipflops.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/a/a2/Metastability_D-Flipflops.svg/440px-Metastability_D-Flipflops.svg.png 2x" data-file-width="730" data-file-height="560" /></a><figcaption>Figure 1. An illustration of metastability in a <a href="/wiki/Clock_signal" title="Clock signal">synchronizer</a>, where data crosses between clock domains. In the worst case, depending on timing, the metastable condition at D<sub>s</sub> can propagate to D<sub>out</sub> and through the following logic into more of the system, causing undefined and inconsistent behavior.</figcaption></figure> <p>In <a href="/wiki/Electronics" title="Electronics">electronics</a>, <b>metastability</b> is the ability of a <a href="/wiki/Digital_electronics" title="Digital electronics">digital electronic</a> system to persist for an unbounded time in an <a href="/wiki/Equilibrium_point" class="mw-redirect" title="Equilibrium point">unstable equilibrium</a> or <a href="/wiki/Metastability" title="Metastability">metastable</a> state.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> In <a href="/wiki/Digital_logic" class="mw-redirect" title="Digital logic">digital logic</a> circuits, a <a href="/wiki/Digital_signal" title="Digital signal">digital signal</a> is required to be within certain <a href="/wiki/Voltage" title="Voltage">voltage</a> or <a href="/wiki/Electric_current" title="Electric current">current</a> limits to represent a '0' or '1' <a href="/wiki/Logic_level" title="Logic level">logic level</a> for correct circuit operation; if the signal is within a forbidden intermediate range it may cause faulty behavior in logic gates the signal is applied to. In metastable states, the circuit may be unable to settle into a stable '0' or '1' logic level within the time required for proper circuit operation. As a result, the circuit can act in unpredictable ways, and may lead to a system failure, sometimes referred to as a "glitch".<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> Metastability is an instance of the <a href="/wiki/Buridan%27s_ass#Application_to_digital_logic:_metastability" title="Buridan's ass">Buridan's ass</a> paradox. </p><p>Metastable states are inherent features of <a href="/wiki/Asynchronous_circuit" title="Asynchronous circuit">asynchronous digital systems</a>, and of systems with more than one independent <a href="/wiki/Clock_signal" title="Clock signal">clock</a> domain. In <a href="/wiki/Self-clocking_signal" title="Self-clocking signal">self-timed</a> asynchronous systems, arbiters are designed to allow the system to proceed only after the metastability has resolved, so the metastability is a normal condition, not an error condition.<sup id="cite_ref-bainbridge_3-0" class="reference"><a href="#cite_note-bainbridge-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> In synchronous systems with asynchronous inputs, synchronizers are designed to make the probability of a synchronization failure acceptably small.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> Metastable states are avoidable in fully synchronous systems when the input <a href="/wiki/Setup_time#Timing_parameters" class="mw-redirect" title="Setup time">setup and hold time</a> requirements on flip-flops are satisfied. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Example">Example</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Metastability_(electronics)&action=edit&section=1" title="Edit section: Example"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:SR-NOR-latch.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/a/a8/SR-NOR-latch.png/220px-SR-NOR-latch.png" decoding="async" width="220" height="179" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/a/a8/SR-NOR-latch.png/330px-SR-NOR-latch.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/a/a8/SR-NOR-latch.png/440px-SR-NOR-latch.png 2x" data-file-width="514" data-file-height="418" /></a><figcaption>Figure 2. The Set–Reset NOR latch example</figcaption></figure> <p>A simple example of metastability can be found in an <a href="/wiki/Flip-flop_(electronics)#SR_NOR_latch" title="Flip-flop (electronics)">SR NOR latch</a>, when <em>both</em> Set and Reset inputs are true (R=1 and S=1) and then both transition to false (R=0 and S=0) at about the same time. Both outputs Q and <span style="text-decoration:overline;">Q</span> are initially held at 0 by the simultaneous Set and Reset inputs. After both Set and Reset inputs change to false, the flip-flop will (eventually) end up in one of two stable states, one of Q and <span style="text-decoration:overline;">Q</span> true and the other false. The final state will depend on which of R or S returns to zero first, chronologically, but if both transition at about the same time, the resulting metastability, with intermediate or oscillatory output levels, can take arbitrarily long to resolve to a stable state. </p> <div class="mw-heading mw-heading2"><h2 id="Arbiters">Arbiters</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Metastability_(electronics)&action=edit&section=2" title="Edit section: Arbiters"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/Arbiter_(electronics)" title="Arbiter (electronics)">Arbiter (electronics)</a></div> <p>In electronics, an <i>arbiter</i> is a circuit designed to determine which of several signals arrive first. Arbiters are used in asynchronous circuits to order computational activities for shared resources to prevent concurrent incorrect operations. Arbiters are used on the inputs of fully synchronous systems, and also between clock domains, as synchronizers for input signals. Although they can minimize the occurrence of metastability to very low probabilities, all arbiters nevertheless have metastable states, <a href="/wiki/SR_latch#Timing_considerations" class="mw-redirect" title="SR latch">which are unavoidable</a> at the boundaries of regions of the input <a href="/wiki/State_space_(controls)" class="mw-redirect" title="State space (controls)">state space</a> resulting in different outputs.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Synchronous_circuits">Synchronous circuits</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Metastability_(electronics)&action=edit&section=3" title="Edit section: Synchronous circuits"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:4_Bit_Shift_Register_001.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/5/5b/4_Bit_Shift_Register_001.svg/220px-4_Bit_Shift_Register_001.svg.png" decoding="async" width="220" height="61" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/5/5b/4_Bit_Shift_Register_001.svg/330px-4_Bit_Shift_Register_001.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/5/5b/4_Bit_Shift_Register_001.svg/440px-4_Bit_Shift_Register_001.svg.png 2x" data-file-width="900" data-file-height="250" /></a><figcaption>Figure 3. This 4-bit <a href="/wiki/Shift_register" title="Shift register">shift register</a> acts as a synchronizer. As the unsynchronized input data0 travels though each flip-flop stage, its likelihood of remaining metastable decreases dramatically, since almost an entire clock cycle is available during each stage for resolving possible metastability from the prior stage.</figcaption></figure> <p><a href="/wiki/Synchronous_circuit" title="Synchronous circuit">Synchronous circuit</a> design techniques make digital circuits that are resistant to the failure modes that can be caused by metastability. A <b>clock domain</b> is defined as a group of flip-flops with a common clock. Such architectures can form a circuit guaranteed free of metastability (below a certain maximum clock frequency, above which first metastability, then outright failure occur), assuming a low-<a href="/wiki/Clock_skew" title="Clock skew">skew</a> common clock. However, even then, if the system has a dependence on any continuous inputs then these are likely to be vulnerable to metastable states.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </p><p>Synchronizer circuits are used to reduce the likelihood of metastability when receiving an asynchronous input or when transferring signals between different clock domains. Synchronizers may take the form of a cascade of <a href="/wiki/D_flip-flops" class="mw-redirect" title="D flip-flops">D flip-flops</a> (e.g. the <a href="/wiki/Shift_register" title="Shift register">shift register</a> in Figure 3).<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> Although each flip-flop stage adds an additional clock cycle of <a href="/wiki/Latency_(engineering)" title="Latency (engineering)">latency</a> to the input data stream, each stage provides an opportunity to resolve metastability. Such synchronizers can be engineered to reduce metastability to a negligible but tolerable rate. </p><p><a href="/wiki/Schmitt_trigger" title="Schmitt trigger">Schmitt triggers</a> can also be used to reduce the likelihood of metastability, but as the researcher Chaney demonstrated in 1979, even Schmitt triggers may become metastable. He further argued that it is not possible to entirely remove the possibility of metastability from unsynchronized inputs within finite time and that "there is a great deal of theoretical and experimental evidence that a region of anomalous behavior exists for every device that has two stable states." In the face of this inevitability, hardware can only reduce the probability of metastability, and systems can try to gracefully handle the occasional metastable event.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Failure_modes">Failure modes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Metastability_(electronics)&action=edit&section=4" title="Edit section: Failure modes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Although metastability is well understood and architectural techniques to control it are known, it persists as a <a href="/wiki/Failure_mode" class="mw-redirect" title="Failure mode">failure mode</a> in equipment. </p><p>Serious computer and <a href="/wiki/Digital_hardware" class="mw-redirect" title="Digital hardware">digital hardware</a> bugs caused by metastability have a fascinating social history. Many engineers have refused to believe that a <a href="/wiki/Flip-flop_(electronics)" title="Flip-flop (electronics)">bistable</a> device can enter into a state that is neither <i>true</i> nor <i>false</i> and has a positive probability that it will remain indefinite for any given period of time, albeit with exponentially decreasing probability over time.<sup id="cite_ref-Harris_9-0" class="reference"><a href="#cite_note-Harris-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Ginosar_10-0" class="reference"><a href="#cite_note-Ginosar-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Xanthopoulos_11-0" class="reference"><a href="#cite_note-Xanthopoulos-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-AN219_12-0" class="reference"><a href="#cite_note-AN219-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Arora_13-0" class="reference"><a href="#cite_note-Arora-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> However, metastability is an inevitable result of any attempt to map a continuous domain to a discrete one. At the boundaries in the continuous domain between regions which map to different discrete outputs, points arbitrarily close together in the continuous domain map to different outputs, making a decision as to which output to select a difficult and potentially lengthy process.<sup id="cite_ref-Lamport_1984_14-0" class="reference"><a href="#cite_note-Lamport_1984-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> If the inputs to an arbiter or flip-flop arrive almost simultaneously, the circuit most likely will traverse a point of metastability. Metastability remains poorly understood in some circles, and various engineers have proposed their own circuits said to solve or filter out the metastability; typically these circuits simply shift the occurrence of metastability from one place to another.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> Chips using multiple clock sources are often tested with tester clocks that have fixed phase relationships, not the independent clocks drifting past each other that will be experienced during operation. This usually explicitly prevents the metastable failure mode that will occur in the field from being seen or reported. Proper testing for metastability frequently employs clocks of slightly different frequencies and ensuring correct circuit operation. </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Metastability_(electronics)&action=edit&section=5" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Analog-to-digital_converter" title="Analog-to-digital converter">Analog-to-digital converter</a></li> <li><a href="/wiki/Buridan%27s_ass" title="Buridan's ass">Buridan's ass</a></li> <li><a href="/wiki/Clockless_CPU#Asynchronous_CPU" class="mw-redirect" title="Clockless CPU">Asynchronous CPU</a></li> <li><a href="/wiki/Ground_bounce" title="Ground bounce">Ground bounce</a></li> <li><a href="/wiki/Tri-state_logic" class="mw-redirect" title="Tri-state logic">Tri-state logic</a></li></ul> <div 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class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Electronic_component" title="Electronic component">Components</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transistor" title="Transistor">Transistor</a></li> <li><a href="/wiki/Resistor" title="Resistor">Resistor</a></li> <li><a href="/wiki/Inductor" title="Inductor">Inductor</a></li> <li><a href="/wiki/Capacitor" title="Capacitor">Capacitor</a></li> <li><a href="/wiki/Printed_electronics" title="Printed electronics">Printed electronics</a></li> <li><a href="/wiki/Printed_circuit_board" title="Printed circuit board">Printed circuit board</a></li> <li><a href="/wiki/Electronic_circuit" title="Electronic circuit">Electronic circuit</a></li> <li><a href="/wiki/Flip-flop_(electronics)" title="Flip-flop (electronics)">Flip-flop</a></li> <li><a href="/wiki/Memory_cell_(computing)" title="Memory cell (computing)">Memory cell</a></li> <li><a href="/wiki/Combinational_logic" title="Combinational logic">Combinational logic</a></li> <li><a href="/wiki/Sequential_logic" title="Sequential logic">Sequential logic</a></li> <li><a href="/wiki/Logic_gate" title="Logic gate">Logic gate</a></li> <li><a href="/wiki/Boolean_circuit" title="Boolean circuit">Boolean circuit</a></li> <li><a href="/wiki/Integrated_circuit" title="Integrated circuit">Integrated circuit</a> (IC)</li> <li><a href="/wiki/Hybrid_integrated_circuit" title="Hybrid integrated circuit">Hybrid integrated circuit</a> (HIC)</li> <li><a href="/wiki/Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal integrated circuit</a></li> <li><a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">Three-dimensional integrated circuit</a> (3D IC)</li> <li><a href="/wiki/Emitter-coupled_logic" title="Emitter-coupled logic">Emitter-coupled logic</a> (ECL)</li> <li><a href="/wiki/Erasable_programmable_logic_device" class="mw-redirect" title="Erasable programmable logic device">Erasable programmable logic device</a> (EPLD)</li> <li><a href="/wiki/Macrocell_array" title="Macrocell array">Macrocell array</a></li> <li><a href="/wiki/Programmable_logic_array" title="Programmable logic array">Programmable logic array</a> (PLA)</li> <li><a href="/wiki/Programmable_logic_device" title="Programmable logic device">Programmable logic device</a> (PLD)</li> <li><a href="/wiki/Programmable_Array_Logic" title="Programmable Array Logic">Programmable Array Logic</a> (PAL)</li> <li><a href="/wiki/Generic_Array_Logic" title="Generic Array Logic">Generic Array Logic</a> (GAL)</li> <li><a href="/wiki/Complex_programmable_logic_device" title="Complex programmable logic device">Complex programmable logic device</a> (CPLD)</li> <li><a href="/wiki/Field-programmable_gate_array" title="Field-programmable gate array">Field-programmable gate array</a> (FPGA)</li> <li><a href="/wiki/Field-programmable_object_array" title="Field-programmable object array">Field-programmable object array</a> (FPOA)</li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">Application-specific integrated circuit</a> (ASIC)</li> <li><a href="/wiki/Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Theory</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Digital_signal" title="Digital signal">Digital signal</a></li> <li><a href="/wiki/Boolean_algebra" title="Boolean algebra">Boolean algebra</a></li> <li><a href="/wiki/Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li> <li><a href="/wiki/Logic_in_computer_science" title="Logic in computer science">Logic in computer science</a></li> <li><a href="/wiki/Computer_architecture" title="Computer architecture">Computer architecture</a></li> <li><a href="/wiki/Digital_signal_(signal_processing)" title="Digital signal (signal processing)">Digital signal</a> <ul><li><a href="/wiki/Digital_signal_processing" title="Digital signal processing">Digital signal processing</a></li></ul></li> <li><a href="/wiki/Circuit_minimization_for_Boolean_functions" class="mw-redirect" title="Circuit minimization for Boolean functions">Circuit minimization</a></li> <li><a href="/wiki/Switching_circuit_theory" title="Switching circuit theory">Switching circuit theory</a></li> <li><a href="/wiki/Gate_equivalent" title="Gate equivalent">Gate equivalent</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="/wiki/Electronics_design" class="mw-redirect" title="Electronics design">Design</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Logic_synthesis" title="Logic synthesis">Logic synthesis</a></li> <li><a href="/wiki/Place_and_route" title="Place and route">Place and route</a> <ul><li><a href="/wiki/Placement_(electronic_design_automation)" title="Placement (electronic design automation)">Placement</a></li> <li><a href="/wiki/Routing_(electronic_design_automation)" title="Routing (electronic design automation)">Routing</a></li></ul></li> <li><a href="/wiki/Transaction-level_modeling" title="Transaction-level modeling">Transaction-level modeling</a></li> <li><a href="/wiki/Register-transfer_level" title="Register-transfer level">Register-transfer level</a> <ul><li><a href="/wiki/Hardware_description_language" title="Hardware description language">Hardware description language</a></li> <li><a href="/wiki/High-level_synthesis" title="High-level synthesis">High-level synthesis</a></li></ul></li> <li><a href="/wiki/Formal_equivalence_checking" title="Formal equivalence checking">Formal equivalence checking</a></li> <li><a href="/wiki/Synchronous_circuit" title="Synchronous circuit">Synchronous logic</a></li> <li><a href="/wiki/Asynchronous_circuit" title="Asynchronous circuit">Asynchronous logic</a></li> <li><a href="/wiki/Finite-state_machine" title="Finite-state machine">Finite-state machine</a> <ul><li><a href="/wiki/Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical state machine</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Applications</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Computer_hardware" title="Computer hardware">Computer hardware</a> <ul><li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li></ul></li> <li><a href="/wiki/Digital_audio" title="Digital audio">Digital audio</a> <ul><li><a href="/wiki/Digital_radio" title="Digital radio">radio</a></li></ul></li> <li><a href="/wiki/Digital_photography" title="Digital photography">Digital photography</a></li> <li><a href="/wiki/Telephony#Digital_telephony" title="Telephony">Digital telephone</a></li> <li><a href="/wiki/Digital_video" title="Digital video">Digital video</a> <ul><li><a href="/wiki/Digital_cinematography" title="Digital cinematography">cinematography</a></li> <li><a href="/wiki/Digital_television" title="Digital television">television</a></li></ul></li> <li><a href="/wiki/Electronic_literature" title="Electronic literature">Electronic literature</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Design issues</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a class="mw-selflink selflink">Metastability</a></li> <li><a href="/wiki/Runt_pulse" title="Runt pulse">Runt pulse</a></li></ul> </div></td></tr></tbody></table></div> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Metastability_(electronics)&action=edit&section=6" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"> <style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFThomas_J._Chaney_and_Charles_E._Molnar1973" class="citation journal cs1">Thomas J. Chaney and <a href="/wiki/Charles_Molnar" title="Charles Molnar">Charles E. Molnar</a> (April 1973). <a rel="nofollow" class="external text" href="http://ibm-1401.info/AnomalousSynchronizer_ChaneyMolnar_IEEE1973.pdf">"Anomalous Behavior of Synchronizer and Arbiter Circuits"</a> <span class="cs1-format">(PDF)</span>. <i>IEEE Transactions on Computers</i>. <b>C-22</b> (4): 421–422. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FT-C.1973.223730">10.1109/T-C.1973.223730</a>. <a href="/wiki/ISSN_(identifier)" class="mw-redirect" title="ISSN (identifier)">ISSN</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/issn/0018-9340">0018-9340</a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:12594672">12594672</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Transactions+on+Computers&rft.atitle=Anomalous+Behavior+of+Synchronizer+and+Arbiter+Circuits&rft.volume=C-22&rft.issue=4&rft.pages=421-422&rft.date=1973-04&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A12594672%23id-name%3DS2CID&rft.issn=0018-9340&rft_id=info%3Adoi%2F10.1109%2FT-C.1973.223730&rft.au=Thomas+J.+Chaney+and+Charles+E.+Molnar&rft_id=http%3A%2F%2Fibm-1401.info%2FAnomalousSynchronizer_ChaneyMolnar_IEEE1973.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFChaney" class="citation web cs1">Chaney, Thomas J. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20151208113120/http://blendics.com/wp-content/uploads/2014/09/My-Work-on-All-Things-Metastable-OR-Me-and-My-Glitch.pdf">"My Work on All Things Metastable OR Me and My Glitch"</a> <span class="cs1-format">(PDF)</span>. Archived from <a rel="nofollow" class="external text" href="http://blendics.com/wp-content/uploads/2014/09/My-Work-on-All-Things-Metastable-OR-Me-and-My-Glitch.pdf">the original</a> <span class="cs1-format">(PDF)</span> on 2015-12-08<span class="reference-accessdate">. Retrieved <span class="nowrap">2015-11-05</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=My+Work+on+All+Things+Metastable+OR+Me+and+My+Glitch&rft.aulast=Chaney&rft.aufirst=Thomas+J.&rft_id=http%3A%2F%2Fblendics.com%2Fwp-content%2Fuploads%2F2014%2F09%2FMy-Work-on-All-Things-Metastable-OR-Me-and-My-Glitch.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-bainbridge-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-bainbridge_3-0">^</a></b></span> <span class="reference-text"> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFJohn_Bainbridge2002" class="citation book cs1">John Bainbridge (2002). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=6cWoGRfz_k0C&dq=metastable+alternative-approach+gain%E2%80%93bandwidth-product&pg=PA18"><i>Asynchronous system-on-chip interconnect</i></a>. Springer. p. 18. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1-85233-598-4" title="Special:BookSources/978-1-85233-598-4"><bdi>978-1-85233-598-4</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Asynchronous+system-on-chip+interconnect&rft.pages=18&rft.pub=Springer&rft.date=2002&rft.isbn=978-1-85233-598-4&rft.au=John+Bainbridge&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3D6cWoGRfz_k0C%26dq%3Dmetastable%2Balternative-approach%2Bgain%25E2%2580%2593bandwidth-product%26pg%3DPA18&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFChaney" class="citation web cs1">Chaney, Thomas J. <a rel="nofollow" class="external text" href="http://digitalcommons.wustl.edu/cgi/viewcontent.cgi?article=1003&context=bcl_techreports">"<span class="cs1-kern-left"></span>"Reprint of Technical Memorandum No. 10, "The Glitch Phenomenon" (1966)"<span class="cs1-kern-right"></span>"</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=%22Reprint+of+Technical+Memorandum+No.+10%2C+%22The+Glitch+Phenomenon%22+%281966%29%22&rft.aulast=Chaney&rft.aufirst=Thomas+J.&rft_id=http%3A%2F%2Fdigitalcommons.wustl.edu%2Fcgi%2Fviewcontent.cgi%3Farticle%3D1003%26context%3Dbcl_techreports&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span><a href="/wiki/Washington_University_in_St._Louis" title="Washington University in St. Louis">Washington University in St. Louis</a></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFRichard_F._Tinder2009" class="citation book cs1">Richard F. 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Morgan & Claypool Publishers. p. 165. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1-59829-689-1" title="Special:BookSources/978-1-59829-689-1"><bdi>978-1-59829-689-1</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Asynchronous+sequential+machine+design+and+analysis%3A+a+comprehensive+development+of+the+design+and+analysis+of+clock-independent+state+machines+and+systems&rft.pages=165&rft.pub=Morgan+%26+Claypool+Publishers&rft.date=2009&rft.isbn=978-1-59829-689-1&rft.au=Richard+F.+Tinder&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DwtvKY5U2Ud4C%26pg%3DPA165&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFKleemanCantoni" class="citation journal cs1">Kleeman, L.; Cantoni, A. "Metastable Behavior in Digital Systems" December 1987". <i>IEEE Design & Test of Computers</i>. <b>4</b> (6): 4–19. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FMDT.1987.295189">10.1109/MDT.1987.295189</a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:1895434">1895434</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Design+%26+Test+of+Computers&rft.atitle=Metastable+Behavior+in+Digital+Systems%22+December+1987&rft.volume=4&rft.issue=6&rft.pages=4-19&rft_id=info%3Adoi%2F10.1109%2FMDT.1987.295189&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A1895434%23id-name%3DS2CID&rft.aulast=Kleeman&rft.aufirst=L.&rft.au=Cantoni%2C+A.&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFAPDahlen2023" class="citation web cs1">APDahlen (2023-10-19). <a rel="nofollow" class="external text" href="https://forum.digikey.com/t/implementing-a-clock-boundary-synchronizer-in-verilog/35809">"Implementing a Clock Boundary Synchronizer in Verilog"</a>. <i><a href="/wiki/DigiKey" title="DigiKey">DigiKey</a> Electronic Component and Engineering Solution Forum</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20231205031754/https://forum.digikey.com/t/implementing-a-clock-boundary-synchronizer-in-verilog/35809">Archived</a> from the original on 2023-12-05<span class="reference-accessdate">. Retrieved <span class="nowrap">2024-02-17</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=DigiKey+Electronic+Component+and+Engineering+Solution+Forum&rft.atitle=Implementing+a+Clock+Boundary+Synchronizer+in+Verilog&rft.date=2023-10-19&rft.au=APDahlen&rft_id=https%3A%2F%2Fforum.digikey.com%2Ft%2Fimplementing-a-clock-boundary-synchronizer-in-verilog%2F35809&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFChaney1979" class="citation journal cs1">Chaney, Thomas (1979). <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/document/1675252">"Comments on "A Note on Synchronizer or Interlock Maloperation"<span class="cs1-kern-right"></span>"</a>. <i>IEEE Transactions on Computers</i>. <b>C-28</b> (10): 802–804. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FTC.1979.1675252">10.1109/TC.1979.1675252</a>. <a href="/wiki/ISSN_(identifier)" class="mw-redirect" title="ISSN (identifier)">ISSN</a> <a rel="nofollow" class="external text" href="https://search.worldcat.org/issn/0018-9340">0018-9340</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=IEEE+Transactions+on+Computers&rft.atitle=Comments+on+%22A+Note+on+Synchronizer+or+Interlock+Maloperation%22&rft.volume=C-28&rft.issue=10&rft.pages=802-804&rft.date=1979&rft_id=info%3Adoi%2F10.1109%2FTC.1979.1675252&rft.issn=0018-9340&rft.aulast=Chaney&rft.aufirst=Thomas&rft_id=https%3A%2F%2Fieeexplore.ieee.org%2Fdocument%2F1675252&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-Harris-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-Harris_9-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFHarrisHarris2015" class="citation book cs1">Harris, Sarah; Harris, David (2015). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=muCcBAAAQBAJ&dq=metastable+exponential&pg=PA152"><i>Digital Design and Computer Architecture: ARM Edition</i></a>. Morgan Kaufmann. pp. 151–153. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0128009116" title="Special:BookSources/978-0128009116"><bdi>978-0128009116</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Digital+Design+and+Computer+Architecture%3A+ARM+Edition&rft.pages=151-153&rft.pub=Morgan+Kaufmann&rft.date=2015&rft.isbn=978-0128009116&rft.aulast=Harris&rft.aufirst=Sarah&rft.au=Harris%2C+David&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DmuCcBAAAQBAJ%26dq%3Dmetastable%2Bexponential%26pg%3DPA152&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-Ginosar-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-Ginosar_10-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFGinosar2011" class="citation web cs1">Ginosar, Ran (2011). <a rel="nofollow" class="external text" href="http://webee.technion.ac.il/~ran/papers/Metastability-and-Synchronizers.IEEEDToct2011.pdf">"Metastability and Synchronizers: A tutorial"</a> <span class="cs1-format">(PDF)</span>. <i>VLSI Systems Research Center</i>. Electrical Engineering and Computer Science Dept., Technion—Israel Institute of Technology, Haifa.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=VLSI+Systems+Research+Center&rft.atitle=Metastability+and+Synchronizers%3A+A+tutorial&rft.date=2011&rft.aulast=Ginosar&rft.aufirst=Ran&rft_id=http%3A%2F%2Fwebee.technion.ac.il%2F~ran%2Fpapers%2FMetastability-and-Synchronizers.IEEEDToct2011.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span>, p. 4-6</span> </li> <li id="cite_note-Xanthopoulos-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-Xanthopoulos_11-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFXanthopoulos2009" class="citation book cs1">Xanthopoulos, Thucydides (2009). <i>Clocking in Modern VLSI Systems</i>. Springer Science and Business Media. p. 196. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1441902610" title="Special:BookSources/978-1441902610"><bdi>978-1441902610</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Clocking+in+Modern+VLSI+Systems&rft.pages=196&rft.pub=Springer+Science+and+Business+Media&rft.date=2009&rft.isbn=978-1441902610&rft.aulast=Xanthopoulos&rft.aufirst=Thucydides&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span>, p. 196, 200, eq. 6-29</span> </li> <li id="cite_note-AN219-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-AN219_12-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.nxp.com/documents/application_note/AN219.pdf">"A Metastability Primer"</a> <span class="cs1-format">(PDF)</span>. <i>Application Note AN-219</i>. Phillips Semiconductor. 1989<span class="reference-accessdate">. Retrieved <span class="nowrap">2017-01-20</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Application+Note+AN-219&rft.atitle=A+Metastability+Primer&rft.date=1989&rft_id=http%3A%2F%2Fwww.nxp.com%2Fdocuments%2Fapplication_note%2FAN219.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-Arora-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-Arora_13-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFArora2011" class="citation book cs1">Arora, Mohit (2011). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=uEs8JbLifSsC&dq=metastable+exponential&pg=PA5"><i>The Art of Hardware Architecture: Design Methods and Techniques for Digital Circuits</i></a>. Springer Science and Business Media. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-1461403975" title="Special:BookSources/978-1461403975"><bdi>978-1461403975</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=The+Art+of+Hardware+Architecture%3A+Design+Methods+and+Techniques+for+Digital+Circuits&rft.pub=Springer+Science+and+Business+Media&rft.date=2011&rft.isbn=978-1461403975&rft.aulast=Arora&rft.aufirst=Mohit&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DuEs8JbLifSsC%26dq%3Dmetastable%2Bexponential%26pg%3DPA5&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span>, p. 4-5, eq. 1-1</span> </li> <li id="cite_note-Lamport_1984-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-Lamport_1984_14-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLeslie_Lamport2012" class="citation web cs1"><a href="/wiki/Leslie_Lamport" title="Leslie Lamport">Leslie Lamport</a> (February 2012) [December 1984]. <a rel="nofollow" class="external text" href="http://research.microsoft.com/users/lamport/pubs/buridan.pdf">"Buridan's Principle"</a> <span class="cs1-format">(PDF)</span><span class="reference-accessdate">. Retrieved <span class="nowrap">2010-07-09</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Buridan%27s+Principle&rft.date=2012-02&rft.au=Leslie+Lamport&rft_id=http%3A%2F%2Fresearch.microsoft.com%2Fusers%2Flamport%2Fpubs%2Fburidan.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AMetastability+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-15">^</a></b></span> <span class="reference-text">Ran Ginosar. "<a rel="nofollow" class="external text" href="http://www.ee.technion.ac.il/~ran/papers/Sync_Errors_Feb03.pdf">Fourteen Ways to Fool Your Synchronizer</a>" ASYNC 2003.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Metastability_(electronics)&action=edit&section=7" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="http://focus.ti.com/lit/an/scza004a/scza004a.pdf">Metastability Performance of Clocked FIFOs</a></li> <li><a rel="nofollow" class="external text" href="http://www.win.tue.nl/async-bib/">The 'Asynchronous' Bibliography</a></li> <li><a rel="nofollow" class="external text" href="http://apt.cs.manchester.ac.uk/async/">Asynchronous Logic</a></li> <li><a rel="nofollow" class="external text" href="http://citeseer.ist.psu.edu/681437.html">Efficient Self-Timed Interfaces for Crossing Clock Domains </a></li> <li><a rel="nofollow" class="external text" href="http://www.sigcon.com/Pubs/news/4_4.htm">Dr. Howard Johnson: Deliberately inducing the metastable state</a></li> <li><a rel="nofollow" class="external text" href="http://www.fpga-faq.org/FAQ_Pages/0017_Tell_me_about_metastables.htm">Detailed explanations and Synchronizer designs</a></li> <li><a rel="nofollow" class="external text" href="http://iangclark.net/metastability.html">Metastability Bibliography</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070125072758/http://www.cadence.com/whitepapers/cdc_wp.pdf">Clock Domain Crossing: Closing the Loop on Clock Domain Functional Implementation Problems</a>, Cadence Design Systems</li> <li>Stephenson, Jennifer. <a rel="nofollow" class="external text" href="http://www.altera.com/literature/wp/wp-01082-quartus-ii-metastability.pdf">Understanding Metastability in FPGAs</a>. Altera Corporation white paper. July 2009.</li> <li>Bahukhandi, Ashirwad. Metastability. Lecture Notes for Advanced Logic Design and Switching Theory. January 2002.</li> <li>Cummings, Clifford E. <a rel="nofollow" class="external text" href="http://www.sunburst-design.com/papers/CummingsSNUG2001SJ_AsyncClk.pdf">Synthesis and Scripting Techniques for Designing Multi-Asynchronous Clock Designs</a>. SNUG 2001.</li> <li>Haseloff, Eilhard. <a rel="nofollow" class="external text" href="http://focus.ti.com/lit/an/sdya006/sdya006.pdf">Metastable Response in 5-V Logic Circuits</a>. Texas Instruments Report. February 1997.</li> <li>Nystrom, Mika, and Alain J. Martin. <a rel="nofollow" class="external text" href="http://www.ece.rochester.edu/~albonesi/wced02/papers/nystrom.pdf">Crossing the Synchronous Asynchronous Divide</a>. WCED 2002.</li> <li>Patil, Girish, IFV Division, Cadence Design Systems. Clock Synchronization Issues and Static Verification Techniques. Cadence Technical Conference 2004.</li> <li><a rel="nofollow" class="external text" href="https://www.amazon.com/Application-Specific-Integrated-Circuits-Michael-Smith/dp/0321602757">Smith, Michael John Sebastian. Application-Specific Integrated Circuits.</a> Addison Wesley Longman, 1997, Chapter 6.4.1.</li> <li>Stein, Mike. <a rel="nofollow" class="external text" href="http://www.edn.com/design/systems-design/4333702/Crossing-the-abyss-asynchronous-signals-in-a-synchronous-world">Crossing the abyss: asynchronous signals in a synchronous world</a> EDN design feature. July 24, 2003.</li> <li>Cox, Jerome R. and Engel, George L., Blendics, Inc. White Paper <a rel="nofollow" class="external autonumber" href="https://web.archive.org/web/20160304080059/http://blendics.com/wp-content/uploads/2014/09/Metastability-and-Fatal-System-Errors-rev-16-Sept-2013.pdf">[1]</a> "Metastability and Fatal System Errors"] Nov. 2010</li> <li>Adam Taylor, <a rel="nofollow" class="external text" href="http://www.eetimes.com/author.asp?section_id=36&doc_id=1320153">"Wrapping One's Brain Around Metastability"</a>, EE Times, 2013-11-20</li></ul>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=Metastability_(electronics)&oldid=1257400384">https://en.wikipedia.org/w/index.php?title=Metastability_(electronics)&oldid=1257400384</a>"</div></div> <div id="catlinks" class="catlinks" data-mw="interface"><div id="mw-normal-catlinks" class="mw-normal-catlinks"><a href="/wiki/Help:Category" title="Help:Category">Categories</a>: <ul><li><a href="/wiki/Category:Electrical_engineering" title="Category:Electrical engineering">Electrical engineering</a></li><li><a href="/wiki/Category:Digital_electronics" title="Category:Digital electronics">Digital electronics</a></li></ul></div><div id="mw-hidden-catlinks" class="mw-hidden-catlinks mw-hidden-cats-hidden">Hidden categories: <ul><li><a href="/wiki/Category:Articles_with_short_description" title="Category:Articles with short description">Articles with short description</a></li><li><a href="/wiki/Category:Short_description_is_different_from_Wikidata" title="Category:Short description is different from Wikidata">Short description is different from Wikidata</a></li><li><a href="/wiki/Category:Use_dmy_dates_from_May_2019" title="Category:Use dmy dates from May 2019">Use dmy dates from May 2019</a></li></ul></div></div> </div> </main> </div> <div class="mw-footer-container"> <footer id="footer" class="mw-footer" > <ul id="footer-info"> <li id="footer-info-lastmod"> This page was last edited on 14 November 2024, at 18:50<span class="anonymous-show"> (UTC)</span>.</li> <li id="footer-info-copyright">Text is available under the <a href="/wiki/Wikipedia:Text_of_the_Creative_Commons_Attribution-ShareAlike_4.0_International_License" title="Wikipedia:Text of the Creative Commons Attribution-ShareAlike 4.0 International License">Creative Commons Attribution-ShareAlike 4.0 License</a>; additional terms may apply. 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