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href="/wiki/File:Question_book-new.svg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This article <b>needs additional citations for <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">verification</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/Physical_design_(electronics)" title="Special:EditPage/Physical design (electronics)">improve this article</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>. Unsourced material may be challenged and removed.<br /><small><span class="plainlinks"><i>Find sources:</i> <a rel="nofollow" class="external text" href="https://www.google.com/search?as_eq=wikipedia&q=%22Physical+design%22+electronics">"Physical design" electronics</a> – <a rel="nofollow" class="external text" href="https://www.google.com/search?tbm=nws&q=%22Physical+design%22+electronics+-wikipedia&tbs=ar:1">news</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?&q=%22Physical+design%22+electronics&tbs=bkt:s&tbm=bks">newspapers</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?tbs=bks:1&q=%22Physical+design%22+electronics+-wikipedia">books</a> <b>·</b> <a rel="nofollow" class="external text" href="https://scholar.google.com/scholar?q=%22Physical+design%22+electronics">scholar</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.jstor.org/action/doBasicSearch?Query=%22Physical+design%22+electronics&acc=on&wc=on">JSTOR</a></span></small></span> <span class="date-container"><i>(<span class="date">December 2022</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p>In <a href="/wiki/Integrated_circuit_design" title="Integrated circuit design">integrated circuit design</a>, <b>physical design</b> is a step in the standard design cycle which follows after the <a href="/wiki/Circuit_design" title="Circuit design">circuit design</a>. At this step, circuit representations of the components (devices and interconnects) of the design are converted into geometric representations of shapes which, when manufactured in the corresponding layers of materials, will ensure the required functioning of the components. This geometric representation is called <a href="/wiki/Integrated_circuit_layout" title="Integrated circuit layout">integrated circuit layout</a>. This step is usually split into several sub-steps, which include both design and verification and validation of the layout.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> </p><p>Modern day <a href="/wiki/Integrated_Circuit" class="mw-redirect" title="Integrated Circuit">Integrated Circuit</a> (IC) design is split up into <i>Front-end Design using <a href="/wiki/Hardware_description_language" title="Hardware description language">HDLs</a></i> and <i>Back-end Design</i> or <i>Physical Design</i>. The inputs to physical design are (i) a netlist, (ii) library information on the basic devices in the design, and (iii) a technology file containing the manufacturing constraints. Physical design is usually concluded by <i>Layout Post Processing</i>, in which amendments and additions to the chip layout are performed.<sup id="cite_ref-Layout_book_3-0" class="reference"><a href="#cite_note-Layout_book-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> This is followed by the <i>Fabrication</i> or <i>Manufacturing Process</i> where designs are transferred onto silicon dies which are then packaged into ICs. </p><p>Each of the phases mentioned above has design flows associated with them. These design flows lay down the process and guide-lines/framework for that phase. The physical design flow uses the technology libraries that are provided by the fabrication houses. These technology files provide information regarding the type of silicon wafer used, the standard-cells used, the layout rules (like <a href="/wiki/Design_rule_checking" title="Design rule checking">DRC</a> in VLSI), etc. </p> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:PhysicalDesign.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/0/0d/PhysicalDesign.png/330px-PhysicalDesign.png" decoding="async" width="330" height="313" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/0/0d/PhysicalDesign.png/495px-PhysicalDesign.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/0/0d/PhysicalDesign.png/660px-PhysicalDesign.png 2x" data-file-width="1878" data-file-height="1782" /></a><figcaption>Physical design steps within the IC design flow</figcaption></figure> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Divisions">Divisions</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=1" title="Edit section: Divisions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Typically, the IC physical design is categorized into <a href="/wiki/Full_custom" title="Full custom">full custom</a> and semi-custom design. </p> <ul><li>Full-Custom: Designer has full flexibility on the layout design, no predefined cells are used.</li> <li>Semi-Custom: Pre-designed library cells (preferably tested with <a href="/wiki/Design_for_manufacturability_(IC)" class="mw-redirect" title="Design for manufacturability (IC)">DFM</a>) are used, designer has flexibility in placement of the cells and routing.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup></li></ul> <p>One can use <a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a> for Full Custom design and <a href="/wiki/FPGA" class="mw-redirect" title="FPGA">FPGA</a> for Semi-Custom design flows. The reason being that one has the flexibility to design/modify design blocks from vendor provided libraries in ASIC.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> This flexibility is missing for Semi-Custom flows using FPGAs (e.g. <a href="/wiki/Altera" title="Altera">Altera</a>). </p> <div class="mw-heading mw-heading2"><h2 id="ASIC_physical_design_flow">ASIC physical design flow</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=2" title="Edit section: ASIC physical design flow"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:PD_Flow.gif" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/b9/PD_Flow.gif/330px-PD_Flow.gif" decoding="async" width="330" height="233" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/b/b9/PD_Flow.gif 1.5x" data-file-width="410" data-file-height="290" /></a><figcaption>A typical <a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a> back-end flow</figcaption></figure> <p>The main steps in the <a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a> physical design flow are: </p> <ul><li>Design Netlist (after synthesis)</li> <li>Floorplanning</li> <li>Partitioning</li> <li>Placement</li> <li>Clock-tree Synthesis (CTS)</li> <li>Routing</li> <li>Physical Verification</li> <li>Layout Post Processing with Mask Data Generation</li></ul> <p>These steps are just the basics. There are detailed PD flows that are used depending on the Tools used and the methodology/technology. Some of the tools/software used in the back-end design are: </p> <ul><li>Cadence (Cadence Encounter RTL Compiler, Encounter Digital Implementation, Cadence Voltus IC Power Integrity Solution, Cadence Tempus Timing Signoff Solution)</li> <li>Synopsys (Design Compiler, IC Compiler II, IC Validator, PrimeTime, PrimePower, PrimeRail)</li> <li>Magma (BlastFusion, etc.)</li> <li>Mentor Graphics (Olympus SoC, IC-Station, Calibre)</li></ul> <p>The ASIC physical design flow uses the technology libraries that are provided by the fabrication houses. Technologies are commonly classified according to minimal feature size. Standard sizes, in the order of miniaturization, are <i>2<a href="/wiki/Micrometre" title="Micrometre">μm</a>, 1μm , 0.5μm , 0.35μm, 0.25μm, 180<a href="/wiki/Nanometre" title="Nanometre">nm</a>, 130nm, 90nm, 65nm, 45nm, 28nm, 22nm, 18nm, 14nm, etc. </i> They may be also classified according to major manufacturing approaches: n-Well process, twin-well process, <a href="/wiki/Silicon_on_insulator" title="Silicon on insulator">SOI</a> process, etc. </p> <div class="mw-heading mw-heading2"><h2 id="Design_netlist">Design netlist</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=3" title="Edit section: Design netlist"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Physical design is based on a netlist which is the end result of the synthesis process. Synthesis converts the RTL design usually coded in VHDL or Verilog HDL to gate-level descriptions which the next set of tools can read/understand. This netlist contains information on the cells used, their interconnections, area used, and other details. Typical synthesis tools are: </p> <ul><li>Cadence RTL Compiler/Build Gates/Physically Knowledgeable Synthesis (PKS)</li> <li>Synopsys Design Compiler</li></ul> <p>During the synthesis process, constraints are applied to ensure that the design meets the required functionality and speed (specifications). Only after the netlist is verified for functionality and timing it is sent for the physical design flow. </p> <div class="mw-heading mw-heading2"><h2 id="Steps">Steps</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=4" title="Edit section: Steps"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Partitioning">Partitioning</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=5" title="Edit section: Partitioning"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Partitioning is a process of dividing the chip into small blocks. This is done mainly to separate different functional blocks and also to make placement and routing easier. Partitioning can be done in the RTL design phase when the design engineer partitions the entire design into sub-blocks and then proceeds to design each module. These modules are linked together in the main module called the TOP LEVEL module. This kind of partitioning is commonly referred to as Logical Partitioning. The goal of partitioning is to split the circuit such that the number of connections between partitions is minimized. </p><p><br /> </p> <div class="mw-heading mw-heading3"><h3 id="Floorplanning">Floorplanning</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=6" title="Edit section: Floorplanning"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The second step in the physical design flow is <i><a href="/wiki/Floorplan_(microelectronics)" title="Floorplan (microelectronics)">floorplanning</a></i>. Floorplanning is the process of identifying structures that should be placed close together, and allocating space for them in such a manner as to meet the sometimes conflicting goals of available space (cost of the chip), required performance, and the desire to have everything close to everything else. </p><p>Based on the area of the design and the hierarchy, a suitable floorplan is decided upon. Floorplanning takes into account the macros used in the design, memory, other IP cores and their placement needs, the routing possibilities, and also the area of the entire design. Floorplanning also determines the IO structure and aspect ratio of the design. A bad floorplan will lead to wastage of die area and routing congestion. </p><p>In many design methodologies, <i>area</i> and <i>speed</i> are the subjects of trade-offs. This is due to limited routing resources, as the more resources used, the slower the operation. Optimizing for minimum area allows the design both to use fewer resources, and for greater proximity of the sections of the design. This leads to shorter interconnect distances, fewer routing resources used, faster end-to-end signal paths, and even faster and more consistent place and route times. Done correctly, there are no negatives to floorplanning. </p><p>As a general rule, data-path sections benefit most from floorplanning, whereas random logic, state machines, and other non-structured logic can safely be left to the placer section of the place and route software. </p><p>Data paths are typically the areas of the design where multiple bits are processed in parallel with each bit being modified the same way with maybe some influence from adjacent bits. Example structures that make up data paths are Adders, Subtractors, Counters, Registers, and Muxes. </p><p><br /> </p> <div class="mw-heading mw-heading3"><h3 id="Placement">Placement</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=7" title="Edit section: Placement"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Before the start of placement optimization all Wire Load Models (WLM) are removed. Placement uses RC values from Virtual Route (VR) to calculate timing. VR is the shortest Manhattan distance between two pins. VR RCs are more accurate than WLM RCs. </p><p>Placement is performed in four optimization phases: </p> <ol><li>Pre-placement optimization</li> <li>In placement optimization</li> <li>Post Placement Optimization (PPO) before clock tree synthesis (CTS)</li> <li>PPO after CTS.</li></ol> <ul><li>Pre-placement Optimization optimizes the netlist before placement, HFNs (High Fanout Nets) are collapsed. It can also downsize the cells.</li> <li>In-placement optimization re-optimizes the logic based on VR. This can perform cell sizing, cell moving, cell bypassing, net splitting, gate duplication, buffer insertion, area recovery. Optimization performs iteration of setup fixing, incremental timing and congestion driven placement.</li> <li>Post placement optimization before CTS performs netlist optimization with ideal clocks. It can fix setup, hold, max trans/cap violations. It can do placement optimization based on global routing. It re does HFN synthesis.</li> <li>Post placement optimization after CTS optimizes timing with propagated clock. It tries to preserve clock skew.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Clock_tree_synthesis">Clock tree synthesis</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=8" title="Edit section: Clock tree synthesis"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Ideal_clock.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/0/0a/Ideal_clock.png/300px-Ideal_clock.png" decoding="async" width="300" height="225" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/0/0a/Ideal_clock.png 1.5x" data-file-width="400" data-file-height="300" /></a><figcaption>Ideal clock before CTS</figcaption></figure> <p>The goal of <b>clock tree synthesis</b> (<b>CTS</b>) is to minimize skew and insertion delay. Clock is not propagated before CTS as shown in the picture. After CTS hold slack should improve. Clock tree begins at .sdc defined clock source and ends at stop pins of flop. There are two types of stop pins known as ignore pins and sync pins. 'Don't touch' circuits and pins in front end (logic synthesis) are treated as 'ignore' circuits or pins at back end (physical synthesis). 'Ignore' pins are ignored for timing analysis. If clock is divided then separate skew analysis is necessary. </p> <ul><li>Global skew achieves zero skew between two synchronous pins without considering logic relationship.</li> <li>Local skew achieves zero skew between two synchronous pins while considering logic relationship.</li> <li>If clock is skewed intentionally to improve setup slack then it is known as useful skew.</li></ul> <p>Rigidity is the term coined in Astro to indicate the relaxation of constraints. Higher the rigidity tighter is the constraints. </p> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Clock_after_CTS.PNG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d6/Clock_after_CTS.PNG/300px-Clock_after_CTS.PNG" decoding="async" width="300" height="212" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/d/d6/Clock_after_CTS.PNG 1.5x" data-file-width="400" data-file-height="283" /></a><figcaption>Clock After CTS</figcaption></figure> <p>In <b>clock tree optimization</b> (CTO) clock can be shielded so that noise is not coupled to other signals. But shielding increases area by 12 to 15%. Since the clock signal is global in nature the same metal layer used for power routing is used for clock also. CTO is achieved by buffer sizing, gate sizing, buffer relocation, level adjustment and HFN synthesis. We try to improve setup slack in pre-placement, in placement and post placement optimization before CTS stages while neglecting hold slack. In post placement optimization after CTS hold slack is improved. As a result of CTS lot of buffers are added. Generally for 100k gates around 650 buffers are added. </p> <div class="mw-heading mw-heading3"><h3 id="Routing">Routing</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=9" title="Edit section: Routing"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>There are two types of <a href="/wiki/Routing_(EDA)" class="mw-redirect" title="Routing (EDA)">routing</a> in the physical design process, global routing and detailed routing. Global routing allocates routing resources that are used for connections. It also does track assignment for a particular net. </p><p>Detailed routing does the actual connections. Different constraints that are to be taken care during the routing are DRC, wire length, timing etc. </p> <div class="mw-heading mw-heading3"><h3 id="Physical_verification">Physical verification</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=10" title="Edit section: Physical verification"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Physical verification checks the correctness of the generated layout design. This includes verifying that the layout </p> <ul><li>Complies with all technology requirements – Design Rule Checking (DRC)</li> <li>Is consistent with the original netlist – Layout vs. Schematic (LVS)</li> <li>Has no antenna effects – Antenna Rule Checking</li> <li>This also includes density verification at the full chip level...Cleaning density is a very critical step in the lower technology nodes</li> <li>Complies with all electrical requirements – Electrical Rule Checking (ERC).<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup></li></ul> <div class="mw-heading mw-heading3"><h3 id="Layout_post_processing">Layout post processing</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=11" title="Edit section: Layout post processing"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Layout Post Processing, also known <a href="/wiki/Mask_data_preparation" title="Mask data preparation">mask data preparation</a>, often concludes physical design and verification. It converts the <a href="/wiki/Integrated_circuit_layout" title="Integrated circuit layout">physical layout</a> (polygons) into mask data (instructions for the <a href="/wiki/Photomask" title="Photomask">photomask</a> writer). It includes<sup id="cite_ref-Layout_book_3-1" class="reference"><a href="#cite_note-Layout_book-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </p> <ul><li>Chip finishing, such as inserting company/chip labels and final structures (e.g., seal ring, filler structures),</li> <li>Generating a reticle layout with test patterns and alignment marks,</li> <li>Layout-to-mask preparation that extends layout data with graphics operations (e.g., <a href="/wiki/Resolution_enhancement_technologies" title="Resolution enhancement technologies">resolution enhancement technologies</a>, RET) and adjusts the data to mask production devices (photomask writer).</li></ul> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=12" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Front_end_of_line" title="Front end of line">FEOL</a></li> <li><a href="/wiki/Back_end_of_line" title="Back end of line">BEOL</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Physical_design_(electronics)&action=edit&section=13" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">N. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer (1998), <style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/9780792383932" title="Special:BookSources/9780792383932">9780792383932</a></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text">A. Kahng, J. Lienig, I. Markov, J. Hu: "VLSI Physical Design: From Graph Partitioning to Timing Closure", Springer (2022), <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1007%2F978-90-481-9591-6">10.1007/978-90-481-9591-6</a>, <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-3-030-96414-6" title="Special:BookSources/978-3-030-96414-6">978-3-030-96414-6</a>, pp. 6-10.</span> </li> <li id="cite_note-Layout_book-3"><span class="mw-cite-backlink">^ <a href="#cite_ref-Layout_book_3-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Layout_book_3-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFJ._Lienig,_J._Scheible2020" class="citation book cs1">J. Lienig, J. Scheible (2020). "Chap. 3.3: Mask Data: Layout Post Processing". <a rel="nofollow" class="external text" href="https://link.springer.com/book/10.1007/978-3-030-39284-0"><i>Fundamentals of Layout Design for Electronic Circuits</i></a>. Springer. p. 102-110. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1007%2F978-3-030-39284-0">10.1007/978-3-030-39284-0</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-3-030-39284-0" title="Special:BookSources/978-3-030-39284-0"><bdi>978-3-030-39284-0</bdi></a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:215840278">215840278</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=bookitem&rft.atitle=Chap.+3.3%3A+Mask+Data%3A+Layout+Post+Processing&rft.btitle=Fundamentals+of+Layout+Design+for+Electronic+Circuits&rft.pages=102-110&rft.pub=Springer&rft.date=2020&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A215840278%23id-name%3DS2CID&rft_id=info%3Adoi%2F10.1007%2F978-3-030-39284-0&rft.isbn=978-3-030-39284-0&rft.au=J.+Lienig%2C+J.+Scheible&rft_id=https%3A%2F%2Flink.springer.com%2Fbook%2F10.1007%2F978-3-030-39284-0&rfr_id=info%3Asid%2Fen.wikipedia.org%3APhysical+design+%28electronics%29" class="Z3988"></span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="http://www2.dac.com/46th/proceedings/slides/02U_2.pdf">Semi-Custom Design Flow</a></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text">Mehrotra, Alok; Van Ginneken, Lukas P P P; Trivedi, Yatin. <a rel="nofollow" class="external text" href="https://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=785894">"Design flow and methodology for 50M gate ASIC"</a>, IEEE Conference Publications,<link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-7803-7659-5" title="Special:BookSources/0-7803-7659-5">0-7803-7659-5</a></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text">A. Kahng, J. Lienig, I. Markov, J. Hu: "VLSI Physical Design: From Graph Partitioning to Timing Closure", Springer (2022), <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1007%2F978-3-030-96415-3">10.1007/978-3-030-96415-3</a>, <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-3-030-96414-6" title="Special:BookSources/978-3-030-96414-6">978-3-030-96414-6</a>, p. 26.</span> </li> </ol></div></div> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist 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design</a></li> <li><a href="/wiki/Lighting_design" title="Lighting design">Stage/set lighting design</a></li> <li><a href="/wiki/Textile_design" title="Textile design">Textile design</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other<br />design<br />& <a href="/wiki/Engineering" title="Engineering">engineering</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Algorithm_design" class="mw-redirect" title="Algorithm design">Algorithm design</a></li> <li><a href="/wiki/Behavioural_design" title="Behavioural design">Behavioural design</a></li> <li><a href="/wiki/Boiler_design" title="Boiler design">Boiler design</a></li> <li><a href="/wiki/Database_design" title="Database design">Database design</a></li> <li><a href="/wiki/Drug_design" title="Drug design">Drug design</a></li> <li><a href="/wiki/Electrical_system_design" title="Electrical system design">Electrical system design</a></li> <li><a href="/wiki/Design_of_experiments" title="Design of experiments">Experimental design</a></li> <li><a href="/wiki/Filter_design" title="Filter design">Filter design</a></li> <li><a href="/wiki/Geometric_design" title="Geometric design">Geometric design</a></li> <li><a href="/wiki/Work_design" title="Work design">Work design</a></li> <li><a href="/wiki/Integrated_circuit_design" title="Integrated circuit design">Integrated circuit design</a> <ul><li><a href="/wiki/Circuit_design" title="Circuit design">Circuit design</a></li> <li><a class="mw-selflink selflink">Physical design</a></li> <li><a href="/wiki/Power_network_design_(IC)" title="Power network design (IC)">Power network design</a></li></ul></li> <li><a href="/wiki/Mechanism_design" title="Mechanism design">Mechanism design</a></li> <li><a href="/wiki/Nuclear_weapon_design" title="Nuclear weapon design">Nuclear weapon design</a></li> <li><a href="/wiki/Nucleic_acid_design" title="Nucleic acid design">Nucleic acid design</a></li> <li><a href="/wiki/Organizational_architecture" title="Organizational architecture">Organization design</a></li> <li><a href="/wiki/Process_design" title="Process design">Process design</a></li> <li><a href="/wiki/Processor_design" title="Processor design">Processor design</a></li> <li><a href="/wiki/Protein_design" title="Protein design">Protein design</a></li> <li><a href="/wiki/Research_design" title="Research design">Research design</a></li> <li><a href="/wiki/Social_design" title="Social design">Social design</a></li> <li><a href="/wiki/Software_design" title="Software design">Software design</a></li> <li><a href="/wiki/Spacecraft_design" title="Spacecraft design">Spacecraft design</a></li> <li><a href="/wiki/Strategic_design" title="Strategic design">Strategic design</a></li> <li><a href="/wiki/Systems_design" title="Systems design">Systems design</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks mw-collapsible mw-collapsed navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Approaches" style="font-size:114%;margin:0 4em">Approaches</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Activity-centered_design" title="Activity-centered design">Activity-centered</a></li> <li><a href="/wiki/Adaptive_web_design" title="Adaptive web design">Adaptive web</a></li> <li><a href="/wiki/Affective_design" title="Affective design">Affective</a></li> <li><a href="/wiki/Brainstorming" title="Brainstorming">Brainstorming</a></li> <li><a href="/wiki/Design_by_committee" title="Design by committee">By committee</a></li> <li><a href="/wiki/Design_by_contract" title="Design by contract">By contract</a></li> <li><a href="/wiki/C-K_theory" title="C-K theory">C-K theory</a></li> <li><a href="/wiki/Design_closure" title="Design closure">Closure</a></li> <li><a href="/wiki/Participatory_design" title="Participatory design">Co-design</a></li> <li><a href="/w/index.php?title=Concept-oriented_design&action=edit&redlink=1" class="new" title="Concept-oriented design (page does not exist)">Concept-oriented</a></li> <li><a href="/wiki/Configuration_design" title="Configuration design">Configuration</a></li> <li><a href="/wiki/Contextual_design" title="Contextual design">Contextual</a></li> <li><a href="/wiki/Continuous_design" title="Continuous design">Continuous</a></li> <li><a href="/wiki/Cradle-to-cradle_design" title="Cradle-to-cradle design">Cradle-to-cradle</a></li> <li><a href="/wiki/Creative_problem-solving" title="Creative problem-solving">Creative problem-solving</a></li> <li><a href="/wiki/Creativity_techniques" title="Creativity techniques">Creativity techniques</a></li> <li><a href="/wiki/Critical_design" title="Critical design">Critical</a> <ul><li><a href="/wiki/Design_fiction" title="Design fiction">Design fiction</a></li></ul></li> <li><a href="/wiki/Defensive_design" title="Defensive design">Defensive</a></li> <li><a href="/wiki/Design%E2%80%93bid%E2%80%93build" title="Design–bid–build">Design–bid–build</a></li> <li><a href="/wiki/Design%E2%80%93build" title="Design–build">Design–build</a> <ul><li><a href="/wiki/Architect-led_design%E2%80%93build" class="mw-redirect" title="Architect-led design–build">architect-led</a></li></ul></li> <li><a href="/wiki/Diffuse_design" title="Diffuse design">Diffuse</a></li> <li><a href="/wiki/Domain-driven_design" title="Domain-driven design">Domain-driven</a></li> <li><a href="/wiki/Ecological_design" title="Ecological design">Ecological design</a></li> <li><a href="/wiki/Energy_neutral_design" title="Energy neutral design">Energy neutral</a></li> <li><a href="/wiki/Engineering_design_process" title="Engineering design process">Engineering design process</a> <ul><li><a href="/wiki/Probabilistic_design" title="Probabilistic design">Probabilistic design</a></li></ul></li> <li><a href="/wiki/Error-tolerant_design" title="Error-tolerant design">Error-tolerant</a></li> <li><a href="/wiki/Fault-tolerant_design" class="mw-redirect" title="Fault-tolerant design">Fault-tolerant</a></li> <li><a href="/wiki/Framework-oriented_design" title="Framework-oriented design">Framework-oriented</a></li> <li><a href="/wiki/Design_for_assembly" title="Design for assembly">For assembly</a></li> <li><a href="/wiki/Behavioural_design" title="Behavioural design">For behaviour change</a></li> <li><a href="/wiki/Design_for_manufacturability" title="Design for manufacturability">For manufacturability</a></li> <li><a href="/wiki/Design_for_Six_Sigma" title="Design for Six Sigma">For Six Sigma</a></li> <li><a href="/wiki/Design_for_testing" title="Design for testing">For testing</a></li> <li><a href="/wiki/Design_for_X" title="Design for X">For X</a></li> <li><a href="/wiki/Functional_design" title="Functional design">Functional</a></li> <li><a href="/wiki/Generative_design" title="Generative design">Generative</a></li> <li><a href="/wiki/Geodesign" title="Geodesign">Geodesign</a></li> <li><a href="/wiki/Human-centered_design" title="Human-centered design">HCD</a></li> <li><a href="/wiki/High-level_design" title="High-level design">High-level</a></li> <li><a href="/wiki/Inclusive_design" title="Inclusive design">Inclusive</a></li> <li><a href="/wiki/Integrated_design" title="Integrated design">Integrated</a></li> <li><a href="/wiki/Integrated_topside_design" title="Integrated topside design">Integrated topside</a></li> <li><a href="/wiki/Intelligence-based_design" title="Intelligence-based design">Intelligence-based</a></li> <li><a href="/wiki/Iterative_design" title="Iterative design">Iterative</a></li> <li><a href="/wiki/KISS_principle" title="KISS principle">KISS principle</a></li> <li><a href="/wiki/Low-level_design" title="Low-level design">Low-level</a></li> <li><a href="/wiki/Metadesign" title="Metadesign">Metadesign</a></li> <li><a href="/wiki/Mind_map" title="Mind map">Mind mapping</a></li> <li><a href="/wiki/Modular_design" title="Modular design">Modular</a></li> <li><a href="/wiki/New_Wave_(design)" title="New Wave (design)">New Wave</a></li> <li><a href="/wiki/Object-oriented_design" class="mw-redirect" title="Object-oriented design">Object-oriented</a></li> <li><a href="/wiki/Open-design_movement" title="Open-design movement">Open</a></li> <li><a href="/wiki/Parametric_design" title="Parametric design">Parametric</a></li> <li><a href="/wiki/Participatory_design" title="Participatory design">Participatory</a></li> <li><a href="/wiki/Platform-based_design" title="Platform-based design">Platform-based</a></li> <li><a href="/wiki/Policy-based_design" class="mw-redirect" title="Policy-based design">Policy-based</a></li> <li><a href="/wiki/Process-centered_design" title="Process-centered design">Process-centered</a></li> <li><a href="/wiki/Public_interest_design" title="Public interest design">Public interest</a></li> <li><a href="/wiki/Rational_design" title="Rational design">Rational</a></li> <li><a href="/wiki/Regenerative_design" title="Regenerative design">Regenerative</a></li> <li><a href="/wiki/Reliability_engineering" title="Reliability engineering">Reliability engineering</a></li> <li><a href="/wiki/Research-based_design" title="Research-based design">Research-based</a></li> <li><a href="/wiki/Responsibility-driven_design" title="Responsibility-driven design">Responsibility-driven</a></li> <li><a href="/wiki/Responsive_web_design" title="Responsive web design">RWD</a></li> <li><a href="/wiki/Safe-life_design" title="Safe-life design">Safe-life</a></li> <li><a href="/wiki/Sustainable_design" title="Sustainable design">Sustainable</a></li> <li><a href="/wiki/Systemic_design" title="Systemic design">Systemic</a> <ul><li><a href="/wiki/Systems-oriented_design" title="Systems-oriented design">SOD</a></li></ul></li> <li><a href="/wiki/Tableless_web_design" title="Tableless web design">Tableless web</a></li> <li><a href="/wiki/Theory_of_constraints" title="Theory of constraints">Theory of constraints</a></li> <li><a href="/wiki/Top-down_and_bottom-up_design" class="mw-redirect" title="Top-down and bottom-up design">Top-down and bottom-up</a></li> <li><a href="/wiki/Transformation_design" title="Transformation design">Transformation</a></li> <li><a href="/wiki/Transgenerational_design" title="Transgenerational design">Transgenerational</a></li> <li><a href="/wiki/TRIZ" title="TRIZ">TRIZ</a></li> <li><a href="/wiki/Universal_design" title="Universal design">Universal</a> <ul><li><a href="/wiki/Design_for_All_(in_ICT)" title="Design for All (in ICT)">Design for All</a></li></ul></li> <li><a href="/wiki/Usage-centered_design" title="Usage-centered design">Usage-centered</a></li> <li><a href="/wiki/Use-centered_design" title="Use-centered design">Use-centered</a></li> <li><a href="/wiki/User-centered_design" title="User-centered design">User-centered</a> <ul><li><a href="/wiki/Empathic_design" title="Empathic design">Empathic</a></li></ul></li> <li><a href="/wiki/User_innovation" title="User innovation">User innovation</a></li> <li><a href="/wiki/Value-driven_design" title="Value-driven design">Value-driven</a></li> <li><a href="/wiki/Value_sensitive_design" title="Value sensitive design">Value sensitive</a> <ul><li><a href="/wiki/Privacy_by_design" title="Privacy by design">Privacy by</a></li></ul></li></ul> <ul><li>Design <a href="/wiki/Design_choice" title="Design choice">choice</a></li> <li><a href="/wiki/Design_computing" title="Design computing">computing</a></li> <li><a href="/wiki/Design_controls" title="Design controls">controls</a></li> <li><a href="/wiki/Design_culture" title="Design culture">culture</a></li> <li><a href="/wiki/Design_flow_(EDA)" title="Design flow (EDA)">flow</a></li> <li><a href="/wiki/Design_leadership" title="Design leadership">leadership</a></li> <li><a href="/wiki/Design_management" title="Design management">management</a></li> <li><a href="/wiki/Design_marker" title="Design marker">marker</a></li> <li><a href="/wiki/Design_methods" title="Design methods">methods</a></li> <li><a href="/wiki/Design_pattern" title="Design pattern">pattern</a></li> <li><a href="/wiki/Design_research" title="Design research">research</a></li> <li><a href="/wiki/Design_science" title="Design science">science</a></li> <li><a href="/wiki/Design_sprint" title="Design sprint">sprint</a></li> <li><a href="/wiki/Design_strategy" class="mw-redirect" title="Design strategy">strategy</a></li> <li><a href="/wiki/Design_theory" title="Design theory">theory</a></li> <li><a href="/wiki/Design_thinking" title="Design thinking">thinking</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks mw-collapsible mw-collapsed navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="ToolsIntellectual_propertyOrganizationsAwards" style="font-size:114%;margin:0 4em"><div class="hlist"><ul><li>Tools</li><li>Intellectual property</li><li>Organizations</li><li>Awards</li></ul></div></div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Design_tool" title="Design tool">Tools</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Algorithms-Aided_Design" title="Algorithms-Aided Design">AAD</a></li> <li><a href="/wiki/Architectural_model" title="Architectural model">Architectural model</a></li> <li><a href="/wiki/Blueprint" title="Blueprint">Blueprint</a></li> <li><a href="/wiki/Comprehensive_layout" title="Comprehensive layout">Comprehensive layout</a></li> <li><a href="/wiki/Computer-aided_design" title="Computer-aided design">CAD</a> <ul><li><a href="/wiki/Computer-aided_industrial_design" title="Computer-aided industrial design">CAID</a></li> <li><a href="/wiki/Virtual_home_design_software" title="Virtual home design software">Virtual home design software</a></li></ul></li> <li><a href="/wiki/Computer-automated_design" title="Computer-automated design">CAutoD</a></li> <li><a href="/wiki/Design_quality_indicator" title="Design quality indicator">Design quality indicator</a></li> <li><a href="/wiki/Electronic_design_automation" title="Electronic design automation">Electronic design automation</a></li> <li><a href="/wiki/Flowchart" title="Flowchart">Flowchart</a></li> <li><a href="/wiki/Mockup" title="Mockup">Mockup</a></li> <li><a href="/wiki/Design_specification" title="Design specification">Design specification</a></li> <li><a href="/wiki/Prototype" title="Prototype">Prototype</a></li> <li><a href="/wiki/Sketch_(drawing)" title="Sketch (drawing)">Sketch</a></li> <li><a href="/wiki/Storyboard" title="Storyboard">Storyboard</a></li> <li><a href="/wiki/Technical_drawing" title="Technical drawing">Technical drawing</a></li> <li><a href="/wiki/HTML_editor" title="HTML editor">HTML editor</a></li> <li><a href="/wiki/Website_wireframe" title="Website wireframe">Website wireframe</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Intellectual<br />property</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Community_design" title="Community design">Community design</a></li> <li><a href="/wiki/Design_around" title="Design around">Design around</a></li> <li><a href="/wiki/Design_infringement" title="Design infringement">Design infringement</a></li> <li><a href="/wiki/Design_patent" title="Design patent">Design patent</a></li> <li><a href="/wiki/Fashion_design_copyright" title="Fashion design copyright">Fashion design copyright</a></li> <li><i><a href="/wiki/Geschmacksmuster" title="Geschmacksmuster">Geschmacksmuster</a></i></li> <li><a href="/wiki/Industrial_design_right" title="Industrial design right">Industrial design rights</a> <ul><li><a href="/wiki/Industrial_design_rights_in_the_European_Union" title="Industrial design rights in the European Union">European Union</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Organizations</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/American_Institute_of_Graphic_Arts" title="American Institute of Graphic Arts">American Institute of Graphic Arts</a></li> <li><a href="/wiki/Chartered_Society_of_Designers" title="Chartered Society of Designers">Chartered Society of Designers</a></li> <li><a href="/wiki/Design_and_Industries_Association" title="Design and Industries Association">Design and Industries Association</a></li> <li><a href="/wiki/Design_Council" title="Design Council">Design Council</a></li> <li><a href="/wiki/International_Forum_Design" title="International Forum Design">International Forum Design</a></li> <li><a href="/wiki/Design_Research_Society" title="Design Research Society">Design Research Society</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Awards</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/European_Design_Award" class="mw-redirect" title="European Design Award">European Design Award</a></li> <li><a href="/wiki/German_Design_Award" title="German Design Award">German Design Award</a></li> <li><a href="/wiki/Good_Design_Award_(Museum_of_Modern_Art)" title="Good Design Award (Museum of Modern Art)">Good Design Award (Museum of Modern Art)</a></li> <li><a href="/wiki/Good_Design_Award_(Chicago_Athenaeum)" class="mw-redirect" title="Good Design Award (Chicago Athenaeum)">Good Design Award (Chicago Athenaeum)</a></li> <li><a href="/wiki/Graphex" class="mw-redirect" title="Graphex">Graphex</a></li> <li><a href="/wiki/IF_Product_Design_Award" title="IF Product Design Award">IF Product Design Award</a></li> <li><a href="/wiki/James_Dyson_Award" title="James Dyson Award">James Dyson Award</a></li> <li><a href="/wiki/Prince_Philip_Designers_Prize" title="Prince Philip Designers Prize">Prince Philip Designers Prize</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks mw-collapsible mw-collapsed navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Related_topics" style="font-size:114%;margin:0 4em">Related topics</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Agile_software_development" title="Agile software development">Agile</a></li> <li><a href="/wiki/Concept_art" title="Concept art">Concept art</a></li> <li><a href="/wiki/Conceptual_design" title="Conceptual design">Conceptual design</a></li> <li><a href="/wiki/Creative_industries" title="Creative industries">Creative industries</a></li> <li><a href="/wiki/Cultural_icon" title="Cultural icon">Cultural icon</a></li> <li><a href="/wiki/.design" title=".design">.design</a></li> <li><a href="/wiki/Enterprise_architecture" title="Enterprise architecture">Enterprise architecture</a></li> <li><a href="/wiki/Form_factor_(design)" title="Form factor (design)">Form factor</a></li> <li><a href="/wiki/Futures_studies" title="Futures studies">Futures studies</a></li> <li><a href="/wiki/Indie_design" title="Indie design">Indie design</a></li> <li><a href="/wiki/Innovation_management" title="Innovation management">Innovation management</a></li> <li><a href="/wiki/Intelligent_design" title="Intelligent design">Intelligent design</a></li> <li><a href="/wiki/Lean_startup" title="Lean startup">Lean startup</a></li> <li><a href="/wiki/New_product_development" title="New product development">New product development</a></li> <li><a href="/wiki/OODA_loop" title="OODA loop">OODA loop</a></li> <li><a href="/wiki/Philosophy_of_design" title="Philosophy of design">Philosophy of design</a></li> <li><a href="/wiki/Process_simulation" title="Process simulation">Process simulation</a></li> <li><a href="/wiki/Slow_design" class="mw-redirect" title="Slow design">Slow design</a></li> <li><a href="/wiki/STEAM_fields" class="mw-redirect" title="STEAM fields">STEAM fields</a></li> <li><a href="/wiki/Argument_from_poor_design" title="Argument from poor design">Unintelligent design</a></li> <li><a href="/wiki/Visualization_(graphics)" title="Visualization (graphics)">Visualization</a></li> <li><a href="/wiki/Wicked_problem" title="Wicked problem">Wicked problem</a></li></ul> <ul><li>Design <a href="/wiki/Design_brief" title="Design brief">brief</a></li> <li><a href="/wiki/Design_change" title="Design change">change</a></li> <li><a href="/wiki/Design_classic" title="Design classic">classic</a></li> <li><a href="/wiki/Design_competition" title="Design competition">competition</a> <ul><li><a href="/wiki/Architectural_design_competition" title="Architectural design competition">architectural</a></li> <li><a href="/wiki/Student_design_competition" title="Student design competition">student</a></li></ul></li> <li><a href="/wiki/Design_director" title="Design director">director</a></li> <li><a href="/wiki/Design_education" title="Design education">education</a></li> <li><a href="/wiki/Design_elements" title="Design elements">elements</a></li> <li><a href="/wiki/Design_engineer" title="Design engineer">engineer</a></li> <li><a href="/wiki/Design_firm" class="mw-redirect" title="Design firm">firm</a></li> <li><a href="/wiki/Design_history" title="Design history">history</a></li> <li><a href="/wiki/Design_knowledge" title="Design knowledge">knowledge</a></li> <li><a href="/wiki/Design_language" title="Design language">language</a></li> <li><a href="/wiki/Design_life" title="Design life">life</a></li> <li><a href="/wiki/Design_load" title="Design load">load</a></li> <li><a href="/wiki/Design_museum" title="Design museum">museum</a></li> <li><a href="/wiki/Design_paradigm" title="Design paradigm">paradigm</a></li> <li><a href="/wiki/Design_principles" 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