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hardware/software system</title> <meta name="description" content="Search results for: hardware/software system"> <meta name="keywords" content="hardware/software system"> <meta name="viewport" content="width=device-width, initial-scale=1, minimum-scale=1, maximum-scale=1, user-scalable=no"> <meta charset="utf-8"> <link href="https://cdn.waset.org/favicon.ico" type="image/x-icon" rel="shortcut icon"> <link href="https://cdn.waset.org/static/plugins/bootstrap-4.2.1/css/bootstrap.min.css" rel="stylesheet"> <link href="https://cdn.waset.org/static/plugins/fontawesome/css/all.min.css" rel="stylesheet"> <link href="https://cdn.waset.org/static/css/site.css?v=150220211555" rel="stylesheet"> </head> <body> <header> <div class="container"> <nav class="navbar navbar-expand-lg navbar-light"> <a class="navbar-brand" href="https://waset.org"> <img src="https://cdn.waset.org/static/images/wasetc.png" alt="Open Science Research Excellence" title="Open Science Research Excellence" /> </a> <button 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action="https://publications.waset.org/abstracts/search"> <div id="custom-search-input"> <div class="input-group"> <i class="fas fa-search"></i> <input type="text" class="search-query" name="q" placeholder="Author, Title, Abstract, Keywords" value="hardware/software system"> <input type="submit" class="btn_search" value="Search"> </div> </div> </form> </div> </div> <div class="row mt-3"> <div class="col-sm-3"> <div class="card"> <div class="card-body"><strong>Commenced</strong> in January 2007</div> </div> </div> <div class="col-sm-3"> <div class="card"> <div class="card-body"><strong>Frequency:</strong> Monthly</div> </div> </div> <div class="col-sm-3"> <div class="card"> <div class="card-body"><strong>Edition:</strong> International</div> </div> </div> <div class="col-sm-3"> <div class="card"> <div class="card-body"><strong>Paper Count:</strong> 21081</div> </div> </div> </div> <h1 class="mt-3 mb-3 text-center" style="font-size:1.6rem;">Search results for: hardware/software system</h1> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21081</span> Importance of Hardware Systems and Circuits in Secure Software Development Life Cycle</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Mir%20Shahriar%20Emami">Mir Shahriar Emami</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Although it is fully impossible to ensure that a software system is quite secure, developing an acceptable secure software system in a convenient platform is not unreachable. In this paper, we attempt to analyze software development life cycle (SDLC) models from the hardware systems and circuits point of view. To date, the SDLC models pay merely attention to the software security from the software perspectives. In this paper, we present new features for SDLC stages to emphasize the role of systems and circuits in developing secure software system through the software development stages, the point that has not been considered previously in the SDLC models. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=SDLC" title="SDLC">SDLC</a>, <a href="https://publications.waset.org/abstracts/search?q=SSDLC" title=" SSDLC"> SSDLC</a>, <a href="https://publications.waset.org/abstracts/search?q=software%20security" title=" software security"> software security</a>, <a href="https://publications.waset.org/abstracts/search?q=software%20process%20engineering" title=" software process engineering"> software process engineering</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware%20systems%20and%20circuits%20security" title=" hardware systems and circuits security"> hardware systems and circuits security</a> </p> <a href="https://publications.waset.org/abstracts/55558/importance-of-hardware-systems-and-circuits-in-secure-software-development-life-cycle" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/55558.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">261</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21080</span> Cortex-M3 Based Virtual Platform Implementation for Software Development</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Jun%20Young%20Moon">Jun Young Moon</a>, <a href="https://publications.waset.org/abstracts/search?q=Hyeonggeon%20Lee"> Hyeonggeon Lee</a>, <a href="https://publications.waset.org/abstracts/search?q=Jong%20Tae%20Kim"> Jong Tae Kim</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In this paper, we present Cortex-M3 based virtual platform which can virtualize wearable hardware platform and evaluate hardware performance. Cortex-M3 is very popular microcontroller in wearable devices, hardware sensors and display devices. This platform can be used to implement software layer for specific hardware architecture. By using the proposed platform the software development process can be parallelized with hardware development process. We present internal mechanism to implement the proposed virtual platform and describe how to use the proposed platform to develop software by using case study which is low cost wearable device that uses Cortex-M3. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=electronic%20system%20level%20design" title="electronic system level design">electronic system level design</a>, <a href="https://publications.waset.org/abstracts/search?q=software%20development" title=" software development"> software development</a>, <a href="https://publications.waset.org/abstracts/search?q=virtual%20platform" title=" virtual platform"> virtual platform</a>, <a href="https://publications.waset.org/abstracts/search?q=wearable%20device" title=" wearable device"> wearable device</a> </p> <a href="https://publications.waset.org/abstracts/45115/cortex-m3-based-virtual-platform-implementation-for-software-development" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/45115.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">375</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21079</span> Dynamic Foot Pressure Measurement System Using Optical Sensors</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Tanapon%20Keatsamarn">Tanapon Keatsamarn</a>, <a href="https://publications.waset.org/abstracts/search?q=Chuchart%20Pintavirooj"> Chuchart Pintavirooj</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Foot pressure measurement provides necessary information for diagnosis diseases, foot insole design, disorder prevention and other application. In this paper, dynamic foot pressure measurement is presented for pressure measuring with high resolution and accuracy. The dynamic foot pressure measurement system consists of hardware and software system. The hardware system uses a transparent acrylic plate and uses steel as the base. The glossy white paper is placed on the top of the transparent acrylic plate and covering with a black acrylic on the system to block external light. Lighting from LED strip entering around the transparent acrylic plate. The optical sensors, the digital cameras, are underneath the acrylic plate facing upwards. They have connected with software system to process and record foot pressure video in avi file. Visual Studio 2017 is used for software system using OpenCV library. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=foot" title="foot">foot</a>, <a href="https://publications.waset.org/abstracts/search?q=foot%20pressure" title=" foot pressure"> foot pressure</a>, <a href="https://publications.waset.org/abstracts/search?q=image%20processing" title=" image processing"> image processing</a>, <a href="https://publications.waset.org/abstracts/search?q=optical%20sensors" title=" optical sensors"> optical sensors</a> </p> <a href="https://publications.waset.org/abstracts/89148/dynamic-foot-pressure-measurement-system-using-optical-sensors" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/89148.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">247</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21078</span> RFID Laptop Monitoring and Management System</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Francis%20E.%20Idachaba">Francis E. Idachaba</a>, <a href="https://publications.waset.org/abstracts/search?q=Sarah%20Uyimeh%20Tommy"> Sarah Uyimeh Tommy</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper describes the design of an RFID laptop monitoring and management system. Laptops embedded with RFID chips are monitored and tracked to provide a monitoring system for the purpose of tracking as well as monitoring movement of the laptops in and out of a building. The proposed system is implemented with both hardware and software components. The hardware architecture consists of RFID passive tag, RFID module (reader), and a server hosting the application and database. The RFID readers are distributed at major exits of a building or premises. The tags are programmed with owner laptop details are concealed in the laptops. The software architecture consists of application software that has the APIs (Applications Programming Interface) necessary to interface the RFID system with the PC, to achieve automated laptop monitoring system. A friendly graphic user interface (GUI) and a database that saves all readings and owners details. The system is capable of reducing laptop theft especially in students’ hostels as laptops can be monitored as they are taken either in or out of the building. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=asset%20tracking" title="asset tracking">asset tracking</a>, <a href="https://publications.waset.org/abstracts/search?q=GUI" title=" GUI"> GUI</a>, <a href="https://publications.waset.org/abstracts/search?q=laptop%20monitoring" title=" laptop monitoring"> laptop monitoring</a>, <a href="https://publications.waset.org/abstracts/search?q=radio%20frequency%20identification" title=" radio frequency identification"> radio frequency identification</a>, <a href="https://publications.waset.org/abstracts/search?q=passive%20tags" title=" passive tags"> passive tags</a> </p> <a href="https://publications.waset.org/abstracts/2599/rfid-laptop-monitoring-and-management-system" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/2599.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">390</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21077</span> Scope of Virtualization</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Pavneet%20Kaur">Pavneet Kaur</a>, <a href="https://publications.waset.org/abstracts/search?q=Palak%20Sharma"> Palak Sharma</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Virtualization is a term that basically describe creation of virtual version of something like operating system, network, etc. Virtualization is a technology which is in use from 1970, but with new developments and inventions, it is now useful in education, software development etc. This paper will describe basic introduction of virtualization, along with its various categories. It will also describe use of virtualization in software engineering, its various benefits and shortcomings. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=virtualization" title="virtualization">virtualization</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware" title=" hardware"> hardware</a>, <a href="https://publications.waset.org/abstracts/search?q=software" title=" software"> software</a>, <a href="https://publications.waset.org/abstracts/search?q=os" title=" os"> os</a> </p> <a href="https://publications.waset.org/abstracts/9962/scope-of-virtualization" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/9962.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">369</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21076</span> On the Design of Electronic Control Unitsfor the Safety-Critical Vehicle Applications</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Kyung-Jung%20Lee">Kyung-Jung Lee</a>, <a href="https://publications.waset.org/abstracts/search?q=Hyun-Sik%20Ahn"> Hyun-Sik Ahn</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper suggests a design methodology for the hardware and software of the Electronic Control Unit (ECU) of safety-critical vehicle applications such as braking and steering. The architecture of the hardware is a high integrity system such that it incorporates a high performance 32-bit CPU and a separate Peripheral Control-Processor (PCP) together with an external watchdog CPU. Communication between the main CPU and the PCP is executed via a common area of RAM and events on either processor which are invoked by interrupts. Safety-related software is also implemented to provide a reliable, self-testing computing environment for safety critical and high integrity applications. The validity of the design approach is shown by using the Hardware-in-the-Loop Simulation (HILS) for Electric Power Steering (EPS) systems which consists of the EPS mechanism, the designed ECU, and monitoring tools. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=electronic%20control%20unit" title="electronic control unit">electronic control unit</a>, <a href="https://publications.waset.org/abstracts/search?q=electric%20power%20steering" title=" electric power steering"> electric power steering</a>, <a href="https://publications.waset.org/abstracts/search?q=functional%20safety" title=" functional safety"> functional safety</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware-in-the-loop%20simulation" title=" hardware-in-the-loop simulation"> hardware-in-the-loop simulation</a> </p> <a href="https://publications.waset.org/abstracts/8013/on-the-design-of-electronic-control-unitsfor-the-safety-critical-vehicle-applications" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/8013.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">295</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21075</span> Non-Contact Digital Music Instrument Using Light Sensing Technology </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Aishwarya%20Ravichandra">Aishwarya Ravichandra</a>, <a href="https://publications.waset.org/abstracts/search?q=Kirtana%20Kirtivasan"> Kirtana Kirtivasan</a>, <a href="https://publications.waset.org/abstracts/search?q=Adithi%20Mahesh"> Adithi Mahesh</a>, <a href="https://publications.waset.org/abstracts/search?q=Ashwini%20S.Savanth"> Ashwini S.Savanth</a> </p> <p class="card-text"><strong>Abstract:</strong></p> A Non-Contact Digital Music System has been conceptualized and implemented to create a new era of digital music. This system replaces the strings of a traditional stringed instrument with laser beams to avoid bruising of the user’s hand. The system consists of seven laser modules, detector modules and distance sensors that form the basic hardware blocks of this instrument. Arduino ATmega2560 microcontroller is used as the primary interface between the hardware and the software. MIDI (Musical Instrument Digital Interface) is used as the protocol to establish communication between the instrument and the virtual synthesizer software. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=Arduino" title="Arduino">Arduino</a>, <a href="https://publications.waset.org/abstracts/search?q=detector" title=" detector"> detector</a>, <a href="https://publications.waset.org/abstracts/search?q=laser" title=" laser"> laser</a>, <a href="https://publications.waset.org/abstracts/search?q=MIDI" title=" MIDI"> MIDI</a>, <a href="https://publications.waset.org/abstracts/search?q=note%20on" title=" note on"> note on</a>, <a href="https://publications.waset.org/abstracts/search?q=note%20off" title=" note off"> note off</a>, <a href="https://publications.waset.org/abstracts/search?q=pitch%20bend" title=" pitch bend"> pitch bend</a>, <a href="https://publications.waset.org/abstracts/search?q=Sharp%20IR%20distance%20sensor" title=" Sharp IR distance sensor"> Sharp IR distance sensor</a> </p> <a href="https://publications.waset.org/abstracts/76975/non-contact-digital-music-instrument-using-light-sensing-technology" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/76975.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">407</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21074</span> Hardware for Genetic Algorithm</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Fariborz%20Ahmadi">Fariborz Ahmadi</a>, <a href="https://publications.waset.org/abstracts/search?q=Reza%20Tati"> Reza Tati</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Genetic algorithm is a soft computing method that works on set of solutions. These solutions are called chromosome and the best one is the absolute solution of the problem. The main problem of this algorithm is that after passing through some generations, it may be produced some chromosomes that had been produced in some generations ago that causes reducing the convergence speed. From another respective, most of the genetic algorithms are implemented in software and less works have been done on hardware implementation. Our work implements genetic algorithm in hardware that doesn’t produce chromosome that have been produced in previous generations. In this work, most of genetic operators are implemented without producing iterative chromosomes and genetic diversity is preserved. Genetic diversity causes that not only do not this algorithm converge to local optimum but also reaching to global optimum. Without any doubts, proposed approach is so faster than software implementations. Evaluation results also show the proposed approach is faster than hardware ones. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=hardware" title="hardware">hardware</a>, <a href="https://publications.waset.org/abstracts/search?q=genetic%20algorithm" title=" genetic algorithm"> genetic algorithm</a>, <a href="https://publications.waset.org/abstracts/search?q=computer%20science" title=" computer science"> computer science</a>, <a href="https://publications.waset.org/abstracts/search?q=engineering" title=" engineering"> engineering</a> </p> <a href="https://publications.waset.org/abstracts/5598/hardware-for-genetic-algorithm" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/5598.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">506</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21073</span> Digital Preservation: A Need of Tomorrow</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Gaurav%20Kumar">Gaurav Kumar</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Digital libraries have been established all over the world to create, maintain and to preserve the digital materials. This paper exhibits the importance and objectives of digital preservation. The necessities of preservation are hardware and software technology to interpret the digital documents and discuss various aspects of digital preservation. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=preservation" title="preservation">preservation</a>, <a href="https://publications.waset.org/abstracts/search?q=digital%20preservation" title=" digital preservation"> digital preservation</a>, <a href="https://publications.waset.org/abstracts/search?q=conservation" title=" conservation"> conservation</a>, <a href="https://publications.waset.org/abstracts/search?q=archive" title=" archive"> archive</a>, <a href="https://publications.waset.org/abstracts/search?q=repository" title=" repository"> repository</a>, <a href="https://publications.waset.org/abstracts/search?q=document" title=" document"> document</a>, <a href="https://publications.waset.org/abstracts/search?q=information%20technology" title=" information technology"> information technology</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware" title=" hardware"> hardware</a>, <a href="https://publications.waset.org/abstracts/search?q=software" title=" software"> software</a>, <a href="https://publications.waset.org/abstracts/search?q=organization" title=" organization"> organization</a>, <a href="https://publications.waset.org/abstracts/search?q=machine%20readable%20format" title=" machine readable format"> machine readable format</a> </p> <a href="https://publications.waset.org/abstracts/23433/digital-preservation-a-need-of-tomorrow" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/23433.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">588</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21072</span> Software Reliability Prediction Model Analysis </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Lela%20Mirtskhulava">Lela Mirtskhulava</a>, <a href="https://publications.waset.org/abstracts/search?q=Mariam%20Khunjgurua"> Mariam Khunjgurua</a>, <a href="https://publications.waset.org/abstracts/search?q=Nino%20Lomineishvili"> Nino Lomineishvili</a>, <a href="https://publications.waset.org/abstracts/search?q=Koba%20Bakuria"> Koba Bakuria</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Software reliability prediction gives a great opportunity to measure the software failure rate at any point throughout system test. A software reliability prediction model provides with the technique for improving reliability. Software reliability is very important factor for estimating overall system reliability, which depends on the individual component reliabilities. It differs from hardware reliability in that it reflects the design perfection. Main reason of software reliability problems is high complexity of software. Various approaches can be used to improve the reliability of software. We focus on software reliability model in this article, assuming that there is a time redundancy, the value of which (the number of repeated transmission of basic blocks) can be an optimization parameter. We consider given mathematical model in the assumption that in the system may occur not only irreversible failures, but also a failure that can be taken as self-repairing failures that significantly affect the reliability and accuracy of information transfer. Main task of the given paper is to find a time distribution function (DF) of instructions sequence transmission, which consists of random number of basic blocks. We consider the system software unreliable; the time between adjacent failures has exponential distribution. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=exponential%20distribution" title="exponential distribution">exponential distribution</a>, <a href="https://publications.waset.org/abstracts/search?q=conditional%20mean%20time%20to%20failure" title=" conditional mean time to failure"> conditional mean time to failure</a>, <a href="https://publications.waset.org/abstracts/search?q=distribution%20function" title=" distribution function"> distribution function</a>, <a href="https://publications.waset.org/abstracts/search?q=mathematical%20model" title=" mathematical model"> mathematical model</a>, <a href="https://publications.waset.org/abstracts/search?q=software%20reliability" title=" software reliability"> software reliability</a> </p> <a href="https://publications.waset.org/abstracts/5219/software-reliability-prediction-model-analysis" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/5219.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">464</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21071</span> Lightweight Hardware Firewall for Embedded System Based on Bus Transactions</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Ziyuan%20Wu">Ziyuan Wu</a>, <a href="https://publications.waset.org/abstracts/search?q=Yulong%20Jia"> Yulong Jia</a>, <a href="https://publications.waset.org/abstracts/search?q=Xiang%20Zhang"> Xiang Zhang</a>, <a href="https://publications.waset.org/abstracts/search?q=Wanting%20Zhou"> Wanting Zhou</a>, <a href="https://publications.waset.org/abstracts/search?q=Lei%20Li"> Lei Li</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The Internet of Things (IoT) is a rapidly evolving field involving a large number of interconnected embedded devices. In the design of embedded System-on-Chip (SoC), the key issues are power consumption, performance, and security. However, the easy-to-implement software and untrustworthy third-party IP cores may threaten the safety of hardware assets. Considering that illegal access and malicious attacks against SoC resources pass through the bus that integrates IPs, we propose a Lightweight Hardware Firewall (LHF) to protect SoC, which monitors and disallows the offending bus transactions based on physical addresses. Furthermore, under the LHF architecture, this paper refines two types of firewalls: Destination Hardware Firewall (DHF) and Source Hardware Firewall (SHF). The former is oriented to fine-grained detection and configuration, whose core technology is based on the method of dynamic grading units. In addition, we design the SHF based on static entries to achieve lightweight. Finally, we evaluate the hardware consumption of the proposed method by both Field-Programmable Gate Array (FPGA) and IC. Compared with the exciting efforts, LHF introduces a bus latency of zero clock cycles for every read or write transaction implemented on Xilinx Kintex-7 FPGAs. Meanwhile, the DC synthesis results based on TSMC 90nm show that the area is reduced by about 25% compared with the previous method. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=IoT" title="IoT">IoT</a>, <a href="https://publications.waset.org/abstracts/search?q=security" title=" security"> security</a>, <a href="https://publications.waset.org/abstracts/search?q=SoC" title=" SoC"> SoC</a>, <a href="https://publications.waset.org/abstracts/search?q=bus%20architecture" title=" bus architecture"> bus architecture</a>, <a href="https://publications.waset.org/abstracts/search?q=lightweight%20hardware%20firewall" title=" lightweight hardware firewall"> lightweight hardware firewall</a>, <a href="https://publications.waset.org/abstracts/search?q=FPGA" title=" FPGA"> FPGA</a> </p> <a href="https://publications.waset.org/abstracts/179081/lightweight-hardware-firewall-for-embedded-system-based-on-bus-transactions" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/179081.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">61</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21070</span> New Standardized Framework for Developing Mobile Applications (Based On Real Case Studies and CMMI)</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Ammar%20Khader%20Almasri">Ammar Khader Almasri</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The software processes play a vital role for delivering a high quality software system that meets the user’s needs. There are many software development models which are used by most system developers, which can be categorized into two categories (traditional and new methodologies). Mobile applications like other desktop applications need appropriate and well-working software development process. Nevertheless, mobile applications have different features which limit their performance and efficiency like application size, mobile hardware features. Moreover, this research aims to help developers in using a standardized model for developing mobile applications. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=software%20development%20process" title="software development process">software development process</a>, <a href="https://publications.waset.org/abstracts/search?q=agile%20methods" title=" agile methods "> agile methods </a>, <a href="https://publications.waset.org/abstracts/search?q=moblile%20application%20development" title=" moblile application development"> moblile application development</a>, <a href="https://publications.waset.org/abstracts/search?q=traditional%20methods" title=" traditional methods"> traditional methods</a> </p> <a href="https://publications.waset.org/abstracts/35673/new-standardized-framework-for-developing-mobile-applications-based-on-real-case-studies-and-cmmi" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/35673.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">387</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21069</span> Presenting Internals of Networks Using Bare Machine Technology</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Joel%20Weymouth">Joel Weymouth</a>, <a href="https://publications.waset.org/abstracts/search?q=Ramesh%20K.%20Karne"> Ramesh K. Karne</a>, <a href="https://publications.waset.org/abstracts/search?q=Alexander%20L.%20Wijesinha"> Alexander L. Wijesinha</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Bare Machine Internet is part of the Bare Machine Computing (BMC) paradigm. It is used in programming application ns to run directly on a device. It is software that runs directly against the hardware using CPU, Memory, and I/O. The software application runs without an Operating System and resident mass storage. An important part of the BMC paradigm is the Bare Machine Internet. It utilizes an Application Development model software that interfaces directly with the hardware on a network server and file server. Because it is “bare,” it is a powerful teaching and research tool that can readily display the internals of the network protocols, software, and hardware of the applications running on the Bare Server. It was also demonstrated that the bare server was accessible by laptop and by smartphone/android. The purpose was to show the further practicality of Bare Internet in Computer Engineering and Computer Science Education and Research. It was also to show that an undergraduate student could take advantage of a bare server with any device and any browser at any release version connected to the internet. This paper presents the Bare Web Server as an educational tool. We will discuss possible applications of this paradigm. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=bare%20machine%20computing" title="bare machine computing">bare machine computing</a>, <a href="https://publications.waset.org/abstracts/search?q=online%20research" title=" online research"> online research</a>, <a href="https://publications.waset.org/abstracts/search?q=network%20technology" title=" network technology"> network technology</a>, <a href="https://publications.waset.org/abstracts/search?q=visualizing%20network%20internals" title=" visualizing network internals"> visualizing network internals</a> </p> <a href="https://publications.waset.org/abstracts/142622/presenting-internals-of-networks-using-bare-machine-technology" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/142622.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">172</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21068</span> Closed Loop Traffic Control System Using PLC</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Chinmay%20Shah">Chinmay Shah</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The project is all about development of a close loop traffic light control system using PLC (Programmable Logic Controller). This project is divided into two parts which are hardware and software. The hardware part for this project is a model of four way junction of a traffic light. Three indicator lamps (Red, Yellow and Green) are installed at each lane for represents as traffic light signal. This traffic control model is a replica of actuated traffic control. Actuated traffic control system is a close loop traffic control system which controls the timing of the indicator lamps depending on the fluidity of traffic for a particular lane. To make it autonomous, in each lane three IR sensors are placed which helps to sense the percentage of traffic present on any particular lane. The IR Sensors and Indicator lamps are connected to LG PLC XGB series. The PLC controls every signal which is coming from the inputs (IR Sensors) to software and display to the outputs (Indicator lamps). Default timing for the indicator lamps is 30 seconds for each lane. But depending on the percentage of traffic present, if the traffic is nearly 30-35%, green lamp will be on for 10 seconds, for 65-70% traffic it will be 20 seconds, for full 100% traffic it will be on for full 30 seconds. The software part that operates with LG PLC is “XG 5000” Programmer. Using this software, the ladder logic diagram is programmed to control the traffic light base on the flow chart. At the end of this project, the traffic light system is actuated successfully by PLC. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=close%20loop" title="close loop">close loop</a>, <a href="https://publications.waset.org/abstracts/search?q=IR%20sensor" title=" IR sensor"> IR sensor</a>, <a href="https://publications.waset.org/abstracts/search?q=PLC" title=" PLC"> PLC</a>, <a href="https://publications.waset.org/abstracts/search?q=light%20control%20system" title=" light control system "> light control system </a> </p> <a href="https://publications.waset.org/abstracts/13631/closed-loop-traffic-control-system-using-plc" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/13631.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">571</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21067</span> Individual Actuators of a Car-Like Robot with Back Trailer</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Tarek%20El-Derini">Tarek El-Derini</a>, <a href="https://publications.waset.org/abstracts/search?q=Ahmed%20El-Shenawy"> Ahmed El-Shenawy</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper presents the hardware implemented and validation for a special system to assist the unprofessional users of car with back trailers. The system consists of two platforms; the front car platform (C) and the trailer platform (T). The main objective is to control the Trailer platform using the actuators found in the front platform (c). The mobility of the platform (C) is investigated and inverse and forward kinematics model is obtained for both platforms (C) and (T). The system is simulated using Matlab M-file and the simulation examples results illustrated the system performance. The system is constructed with a hardware setup for the front and trailer platform. The hardware experimental results and the simulated examples outputs showed the validation of the hardware setup. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=kinematics" title="kinematics">kinematics</a>, <a href="https://publications.waset.org/abstracts/search?q=modeling" title=" modeling"> modeling</a>, <a href="https://publications.waset.org/abstracts/search?q=robot" title=" robot"> robot</a>, <a href="https://publications.waset.org/abstracts/search?q=MATLAB" title=" MATLAB"> MATLAB</a> </p> <a href="https://publications.waset.org/abstracts/18343/individual-actuators-of-a-car-like-robot-with-back-trailer" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/18343.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">444</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21066</span> Architecture - Performance Relationship in GPU Computing - Composite Process Flow Modeling and Simulations</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Ram%20Mohan">Ram Mohan</a>, <a href="https://publications.waset.org/abstracts/search?q=Richard%20Haney"> Richard Haney</a>, <a href="https://publications.waset.org/abstracts/search?q=Ajit%20Kelkar"> Ajit Kelkar</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Current developments in computing have shown the advantage of using one or more Graphic Processing Units (GPU) to boost the performance of many computationally intensive applications but there are still limits to these GPU-enhanced systems. The major factors that contribute to the limitations of GPU(s) for High Performance Computing (HPC) can be categorized as hardware and software oriented in nature. Understanding how these factors affect performance is essential to develop efficient and robust applications codes that employ one or more GPU devices as powerful co-processors for HPC computational modeling. This research and technical presentation will focus on the analysis and understanding of the intrinsic interrelationship of both hardware and software categories on computational performance for single and multiple GPU-enhanced systems using a computationally intensive application that is representative of a large portion of challenges confronting modern HPC. The representative application uses unstructured finite element computations for transient composite resin infusion process flow modeling as the computational core, characteristics and results of which reflect many other HPC applications via the sparse matrix system used for the solution of linear system of equations. This work describes these various software and hardware factors and how they interact to affect performance of computationally intensive applications enabling more efficient development and porting of High Performance Computing applications that includes current, legacy, and future large scale computational modeling applications in various engineering and scientific disciplines. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=graphical%20processing%20unit" title="graphical processing unit">graphical processing unit</a>, <a href="https://publications.waset.org/abstracts/search?q=software%20development%20and%20engineering" title=" software development and engineering"> software development and engineering</a>, <a href="https://publications.waset.org/abstracts/search?q=performance%20analysis" title=" performance analysis"> performance analysis</a>, <a href="https://publications.waset.org/abstracts/search?q=system%20architecture%20and%20software%20performance" title=" system architecture and software performance"> system architecture and software performance</a> </p> <a href="https://publications.waset.org/abstracts/1496/architecture-performance-relationship-in-gpu-computing-composite-process-flow-modeling-and-simulations" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/1496.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">363</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21065</span> [Keynote Talk]: Software Reliability Assessment and Fault Tolerance: Issues and Challenges</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=T.%20Gayen">T. Gayen</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Although, there are several software reliability models existing today there does not exist any versatile model even today which can be used for the reliability assessment of software. Complex software has a large number of states (unlike the hardware) so it becomes practically difficult to completely test the software. Irrespective of the amount of testing one does, sometimes it becomes extremely difficult to assure that the final software product is fault free. The Black Box Software Reliability models are found be quite uncertain for the reliability assessment of various systems. As mission critical applications need to be highly reliable and since it is not always possible to ensure the development of highly reliable system. Hence, in order to achieve fault-free operation of software one develops some mechanism to handle faults remaining in the system even after the development. Although, several such techniques are currently in use to achieve fault tolerance, yet these mechanisms may not always be very suitable for various systems. Hence, this discussion is focused on analyzing the issues and challenges faced with the existing techniques for reliability assessment and fault tolerance of various software systems. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=black%20box" title="black box">black box</a>, <a href="https://publications.waset.org/abstracts/search?q=fault%20tolerance" title=" fault tolerance"> fault tolerance</a>, <a href="https://publications.waset.org/abstracts/search?q=failure" title=" failure"> failure</a>, <a href="https://publications.waset.org/abstracts/search?q=software%20reliability" title=" software reliability"> software reliability</a> </p> <a href="https://publications.waset.org/abstracts/47523/keynote-talk-software-reliability-assessment-and-fault-tolerance-issues-and-challenges" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/47523.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">426</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21064</span> Application of Axiomatic Design in Industrial Control and Automation Software</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Aydin%20Homay">Aydin Homay</a>, <a href="https://publications.waset.org/abstracts/search?q=Mario%20de%20Sousa"> Mario de Sousa</a>, <a href="https://publications.waset.org/abstracts/search?q=Martin%20Wollschlaeger"> Martin Wollschlaeger</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Axiomatic design is a system design methodology that systematically analyses the transformation of customer needs into functional requirements, design parameters, and process variables. This approach aims to create high-quality product or system designs by adhering to specific design principles or axioms, namely, the independence and information axiom. The application of axiomatic design in the design of industrial control and automation software systems could be challenging due to the high flexibility exposed by the software system and the coupling enforced by the hardware part. This paper aims to present how to use axiomatic design for designing industrial control and automation software systems and how to satisfy the independence axiom within these tightly coupled systems. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=axiomatic%20design" title="axiomatic design">axiomatic design</a>, <a href="https://publications.waset.org/abstracts/search?q=decoupling" title=" decoupling"> decoupling</a>, <a href="https://publications.waset.org/abstracts/search?q=uncoupling" title=" uncoupling"> uncoupling</a>, <a href="https://publications.waset.org/abstracts/search?q=automation" title=" automation"> automation</a> </p> <a href="https://publications.waset.org/abstracts/186917/application-of-axiomatic-design-in-industrial-control-and-automation-software" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/186917.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">49</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21063</span> Designing a Tool for Software Maintenance</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Amir%20Ngah">Amir Ngah</a>, <a href="https://publications.waset.org/abstracts/search?q=Masita%20Abdul%20Jalil"> Masita Abdul Jalil</a>, <a href="https://publications.waset.org/abstracts/search?q=Zailani%20Abdullah"> Zailani Abdullah</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The aim of software maintenance is to maintain the software system in accordance with advancement in software and hardware technology. One of the early works on software maintenance is to extract information at higher level of abstraction. In this paper, we present the process of how to design an information extraction tool for software maintenance. The tool can extract the basic information from old program such as about variables, based classes, derived classes, objects of classes, and functions. The tool have two main part; the lexical analyzer module that can read the input file character by character, and the searching module which is user can get the basic information from existing program. We implemented this tool for a patterned sub-C++ language as an input file. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=extraction%20tool" title="extraction tool">extraction tool</a>, <a href="https://publications.waset.org/abstracts/search?q=software%20maintenance" title=" software maintenance"> software maintenance</a>, <a href="https://publications.waset.org/abstracts/search?q=reverse%20engineering" title=" reverse engineering"> reverse engineering</a>, <a href="https://publications.waset.org/abstracts/search?q=C%2B%2B" title=" C++"> C++</a> </p> <a href="https://publications.waset.org/abstracts/21880/designing-a-tool-for-software-maintenance" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/21880.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">491</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21062</span> Development of Configuration Software of Space Environment Simulator Control System Based on Linux </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Zhan%20Haiyang">Zhan Haiyang</a>, <a href="https://publications.waset.org/abstracts/search?q=Zhang%20Lei"> Zhang Lei</a>, <a href="https://publications.waset.org/abstracts/search?q=Ning%20Juan"> Ning Juan</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper presents a configuration software solution in Linux, which is used for the control of space environment simulator. After introducing the structure and basic principle, it is said that the developing of QT software frame and the dynamic data exchanging between PLC and computer. The OPC driver in Linux is also developed. This driver realizes many-to-many communication between hardware devices and SCADA software. Moreover, an algorithm named “Scan PRI” is put forward. This algorithm is much more optimizable and efficient compared with "Scan in sequence" in Windows. This software has been used in practical project. It has a good control effect and can achieve the expected goal. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=Linux%20OS" title="Linux OS">Linux OS</a>, <a href="https://publications.waset.org/abstracts/search?q=configuration%20software" title=" configuration software"> configuration software</a>, <a href="https://publications.waset.org/abstracts/search?q=OPC%20Server%20driver" title=" OPC Server driver"> OPC Server driver</a>, <a href="https://publications.waset.org/abstracts/search?q=MYSQL%20database" title=" MYSQL database"> MYSQL database</a> </p> <a href="https://publications.waset.org/abstracts/54104/development-of-configuration-software-of-space-environment-simulator-control-system-based-on-linux" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/54104.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">288</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21061</span> Virtualization and Visualization Based Driver Configuration in Operating System</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Pavan%20Shah">Pavan Shah</a> </p> <p class="card-text"><strong>Abstract:</strong></p> In an Embedded system, Virtualization and visualization technology can provide us an effective response and measurable work in a software development environment. In addition to work of virtualization and virtualization can be easily deserved to provide the best resource sharing between real-time hardware applications and a healthy environment. However, the virtualization is noticeable work to minimize the I/O work and utilize virtualization & virtualization technology for either a software development environment (SDE) or a runtime environment of real-time embedded systems (RTMES) or real-time operating system (RTOS) eras. In this Paper, we particularly focus on virtualization and visualization overheads data of network which generates the I/O and implementation of standardized I/O (i.e., Virto), which can work as front-end network driver in a real-time operating system (RTOS) hardware module. Even there have been several work studies are available based on the virtualization operating system environment, but for the Virto on a general-purpose OS, my implementation is on the open-source Virto for a real-time operating system (RTOS). In this paper, the measurement results show that implementation which can improve the bandwidth and latency of memory management of the real-time operating system environment (RTMES) for getting more accuracy of the trained model. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=virtualization" title="virtualization">virtualization</a>, <a href="https://publications.waset.org/abstracts/search?q=visualization" title=" visualization"> visualization</a>, <a href="https://publications.waset.org/abstracts/search?q=network%20driver" title=" network driver"> network driver</a>, <a href="https://publications.waset.org/abstracts/search?q=operating%20system" title=" operating system"> operating system</a> </p> <a href="https://publications.waset.org/abstracts/146477/virtualization-and-visualization-based-driver-configuration-in-operating-system" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/146477.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">133</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21060</span> A Middleware Management System with Supporting Holonic Modules for Reconfigurable Management System</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Roscoe%20McLean">Roscoe McLean</a>, <a href="https://publications.waset.org/abstracts/search?q=Jared%20Padayachee"> Jared Padayachee</a>, <a href="https://publications.waset.org/abstracts/search?q=Glen%20Bright"> Glen Bright</a> </p> <p class="card-text"><strong>Abstract:</strong></p> There is currently a gap in the technology covering the rapid establishment of control after a reconfiguration in a Reconfigurable Manufacturing System. This gap involves the detection of the factory floor state and the communication link between the factory floor and the high-level software. In this paper, a thin, hardware-supported Middleware Management System (MMS) is proposed and its design and implementation are discussed. The research found that a cost-effective localization technique can be combined with intelligent software to speed up the ramp-up of a reconfigured system. The MMS makes the process more intelligent, more efficient and less time-consuming, thus supporting the industrial implementation of the RMS paradigm. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=intelligent%20systems" title="intelligent systems">intelligent systems</a>, <a href="https://publications.waset.org/abstracts/search?q=middleware" title=" middleware"> middleware</a>, <a href="https://publications.waset.org/abstracts/search?q=reconfigurable%20manufacturing" title=" reconfigurable manufacturing"> reconfigurable manufacturing</a>, <a href="https://publications.waset.org/abstracts/search?q=management%20system" title=" management system"> management system</a> </p> <a href="https://publications.waset.org/abstracts/28410/a-middleware-management-system-with-supporting-holonic-modules-for-reconfigurable-management-system" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/28410.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">675</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21059</span> A Comprehensive Approach to Mitigate Return-Oriented Programming Attacks: Combining Operating System Protection Mechanisms and Hardware-Assisted Techniques</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Zhang%20Xingnan">Zhang Xingnan</a>, <a href="https://publications.waset.org/abstracts/search?q=Huang%20Jingjia"> Huang Jingjia</a>, <a href="https://publications.waset.org/abstracts/search?q=Feng%20Yue"> Feng Yue</a>, <a href="https://publications.waset.org/abstracts/search?q=Burra%20Venkata%20Durga%20Kumar"> Burra Venkata Durga Kumar</a> </p> <p class="card-text"><strong>Abstract:</strong></p> This paper proposes a comprehensive approach to mitigate ROP (Return-Oriented Programming) attacks by combining internal operating system protection mechanisms and hardware-assisted techniques. Through extensive literature review, we identify the effectiveness of ASLR (Address Space Layout Randomization) and LBR (Last Branch Record) in preventing ROP attacks. We present a process involving buffer overflow detection, hardware-assisted ROP attack detection, and the use of Turing detection technology to monitor control flow behavior. We envision a specialized tool that views and analyzes the last branch record, compares control flow with a baseline, and outputs differences in natural language. This tool offers a graphical interface, facilitating the prevention and detection of ROP attacks. The proposed approach and tool provide practical solutions for enhancing software security. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=operating%20system" title="operating system">operating system</a>, <a href="https://publications.waset.org/abstracts/search?q=ROP%20attacks" title=" ROP attacks"> ROP attacks</a>, <a href="https://publications.waset.org/abstracts/search?q=returning-oriented%20programming%20attacks" title=" returning-oriented programming attacks"> returning-oriented programming attacks</a>, <a href="https://publications.waset.org/abstracts/search?q=ASLR" title=" ASLR"> ASLR</a>, <a href="https://publications.waset.org/abstracts/search?q=LBR" title=" LBR"> LBR</a>, <a href="https://publications.waset.org/abstracts/search?q=CFI" title=" CFI"> CFI</a>, <a href="https://publications.waset.org/abstracts/search?q=DEP" title=" DEP"> DEP</a>, <a href="https://publications.waset.org/abstracts/search?q=code%20randomization" title=" code randomization"> code randomization</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware-assisted%20CFI" title=" hardware-assisted CFI"> hardware-assisted CFI</a> </p> <a href="https://publications.waset.org/abstracts/168825/a-comprehensive-approach-to-mitigate-return-oriented-programming-attacks-combining-operating-system-protection-mechanisms-and-hardware-assisted-techniques" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/168825.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">95</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21058</span> An Efficient Hardware/Software Workflow for Multi-Cores Simulink Applications </h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Asma%20Rebaya">Asma Rebaya</a>, <a href="https://publications.waset.org/abstracts/search?q=Kaouther%20Gasmi"> Kaouther Gasmi</a>, <a href="https://publications.waset.org/abstracts/search?q=Imen%20Amari"> Imen Amari</a>, <a href="https://publications.waset.org/abstracts/search?q=Salem%20Hasnaoui"> Salem Hasnaoui</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Over these last years, applications such as telecommunications, signal processing, digital communication with advanced features (Multi-antenna, equalization..) witness a rapid evaluation accompanied with an increase of user exigencies in terms of latency, the power of computation… To satisfy these requirements, the use of hardware/software systems is a common solution; where hardware is composed of multi-cores and software is represented by models of computation, synchronous data flow (SDF) graph for instance. Otherwise, the most of the embedded system designers utilize Simulink for modeling. The issue is how to simplify the c code generation, for a multi-cores platform, of an application modeled by Simulink. To overcome this problem, we propose a workflow allowing an automatic transformation from the Simulink model to the SDF graph and providing an efficient schedule permitting to optimize the number of cores and to minimize latency. This workflow goes from a Simulink application and a hardware architecture described by IP.XACT language. Based on the synchronous and hierarchical behavior of both models, the Simulink block diagram is automatically transformed into an SDF graph. Once this process is successfully achieved, the scheduler calculates the optimal cores’ number needful by minimizing the maximum density of the whole application. Then, a core is chosen to execute a specific graph task in a specific order and, subsequently, a compatible C code is generated. In order to perform this proposal, we extend Preesm, a rapid prototyping tool, to take the Simulink model as entry input and to support the optimal schedule. Afterward, we compared our results to this tool results, using a simple illustrative application. The comparison shows that our results strictly dominate the Preesm results in terms of number of cores and latency. In fact, if Preesm needs m processors and latency L, our workflow need processors and latency L'< L. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=hardware%2Fsoftware%20system" title="hardware/software system">hardware/software system</a>, <a href="https://publications.waset.org/abstracts/search?q=latency" title=" latency"> latency</a>, <a href="https://publications.waset.org/abstracts/search?q=modeling" title=" modeling"> modeling</a>, <a href="https://publications.waset.org/abstracts/search?q=multi-cores%20platform" title=" multi-cores platform"> multi-cores platform</a>, <a href="https://publications.waset.org/abstracts/search?q=scheduler" title=" scheduler"> scheduler</a>, <a href="https://publications.waset.org/abstracts/search?q=SDF%20graph" title=" SDF graph"> SDF graph</a>, <a href="https://publications.waset.org/abstracts/search?q=Simulink%20model" title=" Simulink model"> Simulink model</a>, <a href="https://publications.waset.org/abstracts/search?q=workflow" title=" workflow"> workflow</a> </p> <a href="https://publications.waset.org/abstracts/66459/an-efficient-hardwaresoftware-workflow-for-multi-cores-simulink-applications" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/66459.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">269</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21057</span> Improving the Performances of the nMPRA Architecture by Implementing Specific Functions in Hardware</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Ionel%20Zagan">Ionel Zagan</a>, <a href="https://publications.waset.org/abstracts/search?q=Vasile%20Gheorghita%20Gaitan"> Vasile Gheorghita Gaitan</a> </p> <p class="card-text"><strong>Abstract:</strong></p> Minimizing the response time to asynchronous events in a real-time system is an important factor in increasing the speed of response and an interesting concept in designing equipment fast enough for the most demanding applications. The present article will present the results regarding the validation of the nMPRA (Multi Pipeline Register Architecture) architecture using the FPGA Virtex-7 circuit. The nMPRA concept is a hardware processor with the scheduler implemented at the processor level; this is done without affecting a possible bus communication, as is the case with the other CPU solutions. The implementation of static or dynamic scheduling operations in hardware and the improvement of handling interrupts and events by the real-time executive described in the present article represent a key solution for eliminating the overhead of the operating system functions. The nMPRA processor is capable of executing a preemptive scheduling, using various algorithms without a software scheduler. Therefore, we have also presented various scheduling methods and algorithms used in scheduling the real-time tasks. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=nMPRA%20architecture" title="nMPRA architecture">nMPRA architecture</a>, <a href="https://publications.waset.org/abstracts/search?q=pipeline%20processor" title=" pipeline processor"> pipeline processor</a>, <a href="https://publications.waset.org/abstracts/search?q=preemptive%20scheduling" title=" preemptive scheduling"> preemptive scheduling</a>, <a href="https://publications.waset.org/abstracts/search?q=real-time%20system" title=" real-time system"> real-time system</a> </p> <a href="https://publications.waset.org/abstracts/57899/improving-the-performances-of-the-nmpra-architecture-by-implementing-specific-functions-in-hardware" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/57899.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">368</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21056</span> Real Time Detection, Prediction and Reconstitution of Rain Drops</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=R.%20Burahee">R. Burahee</a>, <a href="https://publications.waset.org/abstracts/search?q=B.%20Chassinat"> B. Chassinat</a>, <a href="https://publications.waset.org/abstracts/search?q=T.%20de%20Laclos"> T. de Laclos</a>, <a href="https://publications.waset.org/abstracts/search?q=A.%20D%C3%A9p%C3%A9e"> A. Dépée</a>, <a href="https://publications.waset.org/abstracts/search?q=A.%20Sastim"> A. Sastim</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The purpose of this paper is to propose a solution to detect, predict and reconstitute rain drops in real time – during the night – using an embedded material with an infrared camera. To prevent the system from needing too high hardware resources, simple models are considered in a powerful image treatment algorithm reducing considerably calculation time in OpenCV software. Using a smart model – drops will be matched thanks to a process running through two consecutive pictures for implementing a sophisticated tracking system. With this system drops computed trajectory gives information for predicting their future location. Thanks to this technique, treatment part can be reduced. The hardware system composed by a Raspberry Pi is optimized to host efficiently this code for real time execution. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=reconstitution" title="reconstitution">reconstitution</a>, <a href="https://publications.waset.org/abstracts/search?q=prediction" title=" prediction"> prediction</a>, <a href="https://publications.waset.org/abstracts/search?q=detection" title=" detection"> detection</a>, <a href="https://publications.waset.org/abstracts/search?q=rain%20drop" title=" rain drop"> rain drop</a>, <a href="https://publications.waset.org/abstracts/search?q=real%20time" title=" real time"> real time</a>, <a href="https://publications.waset.org/abstracts/search?q=raspberry" title=" raspberry"> raspberry</a>, <a href="https://publications.waset.org/abstracts/search?q=infrared" title=" infrared"> infrared</a> </p> <a href="https://publications.waset.org/abstracts/12821/real-time-detection-prediction-and-reconstitution-of-rain-drops" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/12821.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">419</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21055</span> Iterative Design Process for Development and Virtual Commissioning of Plant Control Software</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Thorsten%20Prante">Thorsten Prante</a>, <a href="https://publications.waset.org/abstracts/search?q=Robert%20Sch%C3%B6ch"> Robert Schöch</a>, <a href="https://publications.waset.org/abstracts/search?q=Ruth%20Fleisch"> Ruth Fleisch</a>, <a href="https://publications.waset.org/abstracts/search?q=Vaheh%20Khachatouri"> Vaheh Khachatouri</a>, <a href="https://publications.waset.org/abstracts/search?q=Alexander%20Walch"> Alexander Walch</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The development of industrial plant control software is a complex and often very expensive task. One of the core problems is that a lot of the implementation and adaptation work can only be done after the plant hardware has been installed. In this paper, we present our approach to virtually developing and validating plant-level control software of production plants. This way, plant control software can be virtually commissioned before actual ramp-up of a plant, reducing actual commissioning costs and time. Technically, this is achieved by linking the actual plant-wide process control software (often called plant server) and an elaborate virtual plant model together to form an emulation system. Method-wise, we are suggesting a four-step iterative process with well-defined increments and time frame. Our work is based on practical experiences from planning to commissioning and start-up of several cut-to-size plants. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=iterative%20system%20design" title="iterative system design">iterative system design</a>, <a href="https://publications.waset.org/abstracts/search?q=virtual%20plant%20engineering" title=" virtual plant engineering"> virtual plant engineering</a>, <a href="https://publications.waset.org/abstracts/search?q=plant%20control%20software" title=" plant control software"> plant control software</a>, <a href="https://publications.waset.org/abstracts/search?q=simulation%20and%20emulation" title=" simulation and emulation"> simulation and emulation</a>, <a href="https://publications.waset.org/abstracts/search?q=virtual%20commissioning" title=" virtual commissioning"> virtual commissioning</a> </p> <a href="https://publications.waset.org/abstracts/14534/iterative-design-process-for-development-and-virtual-commissioning-of-plant-control-software" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/14534.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">488</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21054</span> Numerical Solution Speedup of the Laplace Equation Using FPGA Hardware</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Abbas%20Ebrahimi">Abbas Ebrahimi</a>, <a href="https://publications.waset.org/abstracts/search?q=Mohammad%20Zandsalimy"> Mohammad Zandsalimy</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The main purpose of this study is to investigate the feasibility of using FPGA (Field Programmable Gate Arrays) chips as alternatives for the conventional CPUs to accelerate the numerical solution of the Laplace equation. FPGA is an integrated circuit that contains an array of logic blocks, and its architecture can be reprogrammed and reconfigured after manufacturing. Complex circuits for various applications can be designed and implemented using FPGA hardware. The reconfigurable hardware used in this paper is an SoC (System on a Chip) FPGA type that integrates both microprocessor and FPGA architectures into a single device. In the present study the Laplace equation is implemented and solved numerically on both reconfigurable hardware and CPU. The precision of results and speedups of the calculations are compared together. The computational process on FPGA, is up to 20 times faster than a conventional CPU, with the same data precision. An analytical solution is used to validate the results. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=accelerating%20numerical%20solutions" title="accelerating numerical solutions">accelerating numerical solutions</a>, <a href="https://publications.waset.org/abstracts/search?q=CFD" title=" CFD"> CFD</a>, <a href="https://publications.waset.org/abstracts/search?q=FPGA" title=" FPGA"> FPGA</a>, <a href="https://publications.waset.org/abstracts/search?q=hardware%20definition%20language" title=" hardware definition language"> hardware definition language</a>, <a href="https://publications.waset.org/abstracts/search?q=numerical%20solutions" title=" numerical solutions"> numerical solutions</a>, <a href="https://publications.waset.org/abstracts/search?q=reconfigurable%20hardware" title=" reconfigurable hardware"> reconfigurable hardware</a> </p> <a href="https://publications.waset.org/abstracts/68002/numerical-solution-speedup-of-the-laplace-equation-using-fpga-hardware" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/68002.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">382</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21053</span> Embedded Electrochemistry with Miniaturized, Drone-Based, Potentiostat System for Remote Detection Chemical Warfare Agents</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Amer%20Dawoud">Amer Dawoud</a>, <a href="https://publications.waset.org/abstracts/search?q=Jesy%20Motchaalangaram"> Jesy Motchaalangaram</a>, <a href="https://publications.waset.org/abstracts/search?q=Arati%20Biswakarma"> Arati Biswakarma</a>, <a href="https://publications.waset.org/abstracts/search?q=Wujan%20Mio"> Wujan Mio</a>, <a href="https://publications.waset.org/abstracts/search?q=Karl%20Wallace"> Karl Wallace</a> </p> <p class="card-text"><strong>Abstract:</strong></p> The development of an embedded miniaturized drone-based system for remote detection of Chemical Warfare Agents (CWA) is proposed. The paper focuses on the software/hardware system design of the electrochemical Cyclic Voltammetry (CV) and Differential Pulse Voltammetry (DPV) signal processing for future deployment on drones. The paper summarizes the progress made towards hardware and electrochemical signal processing for signature detection of CWA. Also, the miniature potentiostat signal is validated by comparing it with the high-end lab potentiostat signal. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=drone-based" title="drone-based">drone-based</a>, <a href="https://publications.waset.org/abstracts/search?q=remote%20detection%20chemical%20warfare%20agents" title=" remote detection chemical warfare agents"> remote detection chemical warfare agents</a>, <a href="https://publications.waset.org/abstracts/search?q=miniaturized" title=" miniaturized"> miniaturized</a>, <a href="https://publications.waset.org/abstracts/search?q=potentiostat" title=" potentiostat"> potentiostat</a> </p> <a href="https://publications.waset.org/abstracts/145007/embedded-electrochemistry-with-miniaturized-drone-based-potentiostat-system-for-remote-detection-chemical-warfare-agents" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/145007.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">136</span> </span> </div> </div> <div class="card paper-listing mb-3 mt-3"> <h5 class="card-header" style="font-size:.9rem"><span class="badge badge-info">21052</span> Software Quality Measurement System for Telecommunication Industry in Malaysia</h5> <div class="card-body"> <p class="card-text"><strong>Authors:</strong> <a href="https://publications.waset.org/abstracts/search?q=Nor%20Fazlina%20Iryani%20Abdul%20Hamid">Nor Fazlina Iryani Abdul Hamid</a>, <a href="https://publications.waset.org/abstracts/search?q=Mohamad%20Khatim%20Hasan"> Mohamad Khatim Hasan </a> </p> <p class="card-text"><strong>Abstract:</strong></p> Evolution of software quality measurement has been started since McCall introduced his quality model in year 1977. Starting from there, several software quality models and software quality measurement methods had emerged but none of them focused on telecommunication industry. In this paper, the implementation of software quality measurement system for telecommunication industry was compulsory to accommodate the rapid growth of telecommunication industry. The quality value of the telecommunication related software could be calculated using this system by entering the required parameters. The system would calculate the quality value of the measured system based on predefined quality metrics and aggregated by referring to the quality model. It would classify the quality level of the software based on Net Satisfaction Index (NSI). Thus, software quality measurement system was important to both developers and users in order to produce high quality software product for telecommunication industry. <p class="card-text"><strong>Keywords:</strong> <a href="https://publications.waset.org/abstracts/search?q=software%20quality" title="software quality">software quality</a>, <a href="https://publications.waset.org/abstracts/search?q=quality%20measurement" title=" quality measurement"> quality measurement</a>, <a href="https://publications.waset.org/abstracts/search?q=quality%20model" title=" quality model"> quality model</a>, <a href="https://publications.waset.org/abstracts/search?q=quality%20metric" title=" quality metric"> quality metric</a>, <a href="https://publications.waset.org/abstracts/search?q=net%20satisfaction%20index" title=" net satisfaction index"> net satisfaction index</a> </p> <a href="https://publications.waset.org/abstracts/15875/software-quality-measurement-system-for-telecommunication-industry-in-malaysia" class="btn btn-primary btn-sm">Procedia</a> <a href="https://publications.waset.org/abstracts/15875.pdf" target="_blank" class="btn btn-primary btn-sm">PDF</a> <span class="bg-info text-light px-1 py-1 float-right rounded"> Downloads <span class="badge badge-light">592</span> </span> </div> </div> <ul class="pagination"> <li class="page-item disabled"><span class="page-link">&lsaquo;</span></li> <li class="page-item active"><span class="page-link">1</span></li> <li class="page-item"><a class="page-link" href="https://publications.waset.org/abstracts/search?q=hardware%2Fsoftware%20system&page=2">2</a></li> <li class="page-item"><a class="page-link" href="https://publications.waset.org/abstracts/search?q=hardware%2Fsoftware%20system&page=3">3</a></li> <li class="page-item"><a class="page-link" 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