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<span class="vector-toc-numb">2</span> <span>Graphics processor generations</span> </div> </a> <button aria-controls="toc-Graphics_processor_generations-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Graphics processor generations subsection</span> </button> <ul id="toc-Graphics_processor_generations-sublist" class="vector-toc-list"> <li id="toc-Alchemist" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Alchemist"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>Alchemist</span> </div> </a> <ul id="toc-Alchemist-sublist" class="vector-toc-list"> <li id="toc-Desktop" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Desktop"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.1</span> <span>Desktop</span> </div> </a> <ul id="toc-Desktop-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Mobile" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Mobile"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.2</span> <span>Mobile</span> </div> </a> <ul id="toc-Mobile-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Workstation" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Workstation"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1.3</span> <span>Workstation</span> </div> </a> <ul id="toc-Workstation-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Battlemage" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Battlemage"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.2</span> <span>Battlemage</span> </div> </a> <ul id="toc-Battlemage-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Future_generations" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Future_generations"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.3</span> <span>Future generations</span> </div> </a> <ul id="toc-Future_generations-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Intel_XeSS" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Intel_XeSS"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Intel XeSS</span> </div> </a> <ul id="toc-Intel_XeSS-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Issues" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Issues"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Issues</span> </div> </a> <button aria-controls="toc-Issues-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon 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<span>Legacy BIOS compatibility</span> </div> </a> <ul id="toc-Legacy_BIOS_compatibility-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Footnotes" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Footnotes"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Footnotes</span> </div> </a> <ul id="toc-Footnotes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" title="Table of Contents" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span 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Available in 14 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-14" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">14 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-br mw-list-item"><a href="https://br.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Breton" lang="br" hreflang="br" data-title="Intel Arc" data-language-autonym="Brezhoneg" data-language-local-name="Breton" class="interlanguage-link-target"><span>Brezhoneg</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Catalan" lang="ca" hreflang="ca" data-title="Intel Arc" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – German" lang="de" hreflang="de" data-title="Intel Arc" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Spanish" lang="es" hreflang="es" data-title="Intel Arc" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%D8%A7%DB%8C%D9%86%D8%AA%D9%84_%D8%A2%D8%B1%DA%A9" title="اینتل آرک – Persian" lang="fa" hreflang="fa" data-title="اینتل آرک" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – French" lang="fr" hreflang="fr" data-title="Intel Arc" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EC%9D%B8%ED%85%94_%EC%95%84%ED%81%AC" title="인텔 아크 – Korean" lang="ko" hreflang="ko" data-title="인텔 아크" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Japanese" lang="ja" hreflang="ja" data-title="Intel Arc" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="Intel Arc" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Russian" lang="ru" hreflang="ru" data-title="Intel Arc" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-th mw-list-item"><a href="https://th.wikipedia.org/wiki/%E0%B8%AD%E0%B8%B4%E0%B8%99%E0%B9%80%E0%B8%97%E0%B8%A5_%E0%B8%AD%E0%B8%B2%E0%B8%A3%E0%B9%8C%E0%B8%84" title="อินเทล อาร์ค – Thai" lang="th" hreflang="th" data-title="อินเทล อาร์ค" data-language-autonym="ไทย" data-language-local-name="Thai" class="interlanguage-link-target"><span>ไทย</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Ukrainian" lang="uk" hreflang="uk" data-title="Intel Arc" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh-yue mw-list-item"><a href="https://zh-yue.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Cantonese" lang="yue" hreflang="yue" data-title="Intel Arc" data-language-autonym="粵語" data-language-local-name="Cantonese" class="interlanguage-link-target"><span>粵語</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/Intel_Arc" title="Intel Arc – Chinese" lang="zh" hreflang="zh" data-title="Intel Arc" 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class="noprint">From Wikipedia, the free encyclopedia</div> </div> <div id="contentSub"><div id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Graphics processing unit brand</div> <p class="mw-empty-elt"> </p> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title" style="padding-bottom:0.2em;">Intel Arc</caption><tbody><tr><td colspan="2" class="infobox-image"><span class="mw-default-size" typeof="mw:File/Frameless"><a href="/wiki/File:Intel_Arc_logo_(black).svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/7/74/Intel_Arc_logo_%28black%29.svg/220px-Intel_Arc_logo_%28black%29.svg.png" decoding="async" width="220" height="125" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/7/74/Intel_Arc_logo_%28black%29.svg/330px-Intel_Arc_logo_%28black%29.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/7/74/Intel_Arc_logo_%28black%29.svg/440px-Intel_Arc_logo_%28black%29.svg.png 2x" data-file-width="512" data-file-height="291" /></a></span></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Release date</th><td class="infobox-data">March 30, 2022<span style="display:none"> (<span class="bday dtstart published updated itvstart">2022-03-30</span>)</span><sup id="cite_ref-:0_1-0" class="reference"><a href="#cite_note-:0-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Manufactured by</th><td class="infobox-data"><a href="/wiki/TSMC" title="TSMC">TSMC</a></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Designed by</th><td class="infobox-data"><a href="/wiki/Intel" title="Intel">Intel</a></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Marketed by</th><td class="infobox-data">Intel</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Codenames</th><td class="infobox-data"><style data-mw-deduplicate="TemplateStyles:r1126788409">.mw-parser-output .plainlist ol,.mw-parser-output .plainlist ul{line-height:inherit;list-style:none;margin:0;padding:0}.mw-parser-output .plainlist ol li,.mw-parser-output .plainlist ul li{margin-bottom:0}</style><div class="plainlist"><ul><li>Alchemist</li><li>Battlemage</li><li>Celestial</li><li>Druid</li></ul></div></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Architecture</th><td class="infobox-data"><a href="/wiki/Intel_Xe" title="Intel Xe">Intel Xe</a></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;"><a href="/wiki/Multi-core_processor" title="Multi-core processor">Cores</a></th><td class="infobox-data">Up to 32 Xe cores</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Transistors</th><td class="infobox-data">Up to 21.7 billion</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Fabrication process</th><td class="infobox-data">TSMC <a href="/wiki/5_nm_process" title="5 nm process">N5</a> <br /> TSMC <a href="/wiki/7_nm_process" title="7 nm process">N6</a></td></tr><tr><th colspan="2" class="infobox-header" style="font-size:105%;"><a href="/wiki/Graphics_card" title="Graphics card">Cards</a></th></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Entry-level</th><td class="infobox-data">Arc 3</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Mid-range</th><td class="infobox-data">Arc 5</td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">High-end</th><td class="infobox-data">Arc 7</td></tr><tr><th colspan="2" class="infobox-header" style="font-size:105%;"><a href="/wiki/API" title="API">API</a> support</th></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;"><a href="/wiki/DirectX" title="DirectX">DirectX</a></th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li><a href="/wiki/Direct3D#Direct3D_12" title="Direct3D">Direct3D 12.0 Ultimate</a> (<a href="/wiki/Feature_levels_in_Direct3D#Direct3D_12" title="Feature levels in Direct3D">feature level 12_2</a>)</li><li><a href="/wiki/High-Level_Shader_Language" title="High-Level Shader Language">Shader Model 6.7</a></li></ul></div></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;"><a href="/wiki/OpenCL" title="OpenCL">OpenCL</a></th><td class="infobox-data"><a href="/wiki/OpenCL#OpenCL_3.0" title="OpenCL">OpenCL 3.0</a><sup id="cite_ref-OpenCL3.0_2-0" class="reference"><a href="#cite_note-OpenCL3.0-2"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;"><a href="/wiki/OpenGL" title="OpenGL">OpenGL</a></th><td class="infobox-data"><a href="/wiki/OpenGL#OpenGL_4.6" title="OpenGL">OpenGL 4.6</a></td></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;"><a href="/wiki/Vulkan" title="Vulkan">Vulkan</a></th><td class="infobox-data"><a href="/wiki/Vulkan#Vulkan_1.3" title="Vulkan">Vulkan 1.3</a></td></tr><tr><th colspan="2" class="infobox-header" style="font-size:105%;">History</th></tr><tr><th scope="row" class="infobox-label" style="padding-top:0.25em;line-height:1.2em; padding-right:0.65em;">Predecessor</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li><a href="/wiki/I740" class="mw-redirect" title="I740">i740</a></li><li><a href="/wiki/Intel_Iris_Xe" class="mw-redirect" title="Intel Iris Xe">Intel Iris Xe</a></li></ul></div></td></tr></tbody></table> <p><b>Intel Arc</b> is a brand of <a href="/wiki/List_of_Intel_graphics_processing_units" title="List of Intel graphics processing units">graphics processing units</a> designed by <a href="/wiki/Intel" title="Intel">Intel</a>. These are discrete GPUs mostly marketed for the high-margin <a href="/wiki/Gaming_computer" title="Gaming computer">gaming PC</a> market. The brand also covers Intel's consumer graphics software and services. </p><p>Arc competes with <a href="/wiki/Nvidia" title="Nvidia">Nvidia</a>'s <a href="/wiki/GeForce" title="GeForce">GeForce</a> and <a href="/wiki/AMD" title="AMD">AMD</a>'s <a href="/wiki/Radeon" title="Radeon">Radeon</a> lines.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> The Arc-A series for laptops was launched on March 30, 2022, with the A750 and A770 both released in Q3 2022.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-theverge_5-0" class="reference"><a href="#cite_note-theverge-5"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:2g_6-0" class="reference"><a href="#cite_note-:2g-6"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> Intel missed their initial Q2 2022 release target, with most discrete Arc GPUs not launching until October 2022.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </p><p>Intel officially launched the Arc Pro workstation GPUs on August 8, 2022.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> </p><p>Intel officially announced the 2nd-generation Battlemage GPUs on December 3rd, 2024.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> The first model, the B580, was released on December 13th, 2024. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Etymology">Etymology</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=1" title="Edit section: Etymology"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>According to Intel, the brand is named after the concept of <a href="/wiki/Story_arc" title="Story arc">story arcs</a> found in video games.<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> Each generation of Arc is named after <a href="/wiki/Character_class" title="Character class">character classes</a> sorted by each letter of the <a href="/wiki/Latin_alphabet" title="Latin alphabet">Latin alphabet</a> in ascending order. They begin with A, then B, then C, and so on. The first generation is named Alchemist, while Battlemage, Celestial and Druid are the respective names for the second, third and fourth Arc generations.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Graphics_processor_generations">Graphics processor generations</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=2" title="Edit section: Graphics processor generations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Alchemist">Alchemist<span class="anchor" id="Alchemist"></span></h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=3" title="Edit section: Alchemist"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Intel_Arc_A770_with_Rubik%27s_Cube-2.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/6a/Intel_Arc_A770_with_Rubik%27s_Cube-2.jpg/220px-Intel_Arc_A770_with_Rubik%27s_Cube-2.jpg" decoding="async" width="220" height="165" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/6a/Intel_Arc_A770_with_Rubik%27s_Cube-2.jpg/330px-Intel_Arc_A770_with_Rubik%27s_Cube-2.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/6a/Intel_Arc_A770_with_Rubik%27s_Cube-2.jpg/440px-Intel_Arc_A770_with_Rubik%27s_Cube-2.jpg 2x" data-file-width="4032" data-file-height="3024" /></a><figcaption>An Intel Arc A770 16 GB, the highest-end desktop GPU from Intel's first generation Alchemist GPUs, with a <a href="/wiki/Rubik%27s_Cube" title="Rubik's Cube">Rubik's Cube</a> for scale</figcaption></figure> <p>Developed under the previous codename "DG2", the first generation of Intel Arc GPUs (codenamed "Alchemist") released on March 30, 2022.<sup id="cite_ref-:0_1-1" class="reference"><a href="#cite_note-:0-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> It comes in both add-on desktop card and laptop form factors. <a href="/wiki/TSMC" title="TSMC">TSMC</a> manufactures the die, using their <a href="/wiki/7_nm_process" title="7 nm process">N6</a> process.<sup id="cite_ref-:2a_15-0" class="reference"><a href="#cite_note-:2a-15"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> </p><p>Alchemist uses the <a href="/wiki/Intel_Xe" title="Intel Xe">Intel Xe</a> GPU architecture, or more specifically, the <a href="/wiki/Intel_Xe#Xe-HPG_(High_Performance_Graphics)" title="Intel Xe">Xe-HPG variant</a>. Alchemist supports hardware-based <a href="/wiki/Ray_tracing_(graphics)" title="Ray tracing (graphics)">ray tracing</a>, <a class="mw-selflink-fragment" href="#Intel_XeSS">XeSS</a> or <a href="/wiki/Supersampling" title="Supersampling">supersampling</a> based on neural networks (similar to Nvidia's <a href="/wiki/Deep_learning_super_sampling" class="mw-redirect" title="Deep learning super sampling">DLSS</a> and AMD's <a href="/wiki/GPUOpen#FidelityFX_Super_Resolution" title="GPUOpen">FSR</a>), and <a href="/wiki/DirectX#DirectX_12_Ultimate" title="DirectX">DirectX 12 Ultimate</a>.<sup id="cite_ref-:0_1-2" class="reference"><a href="#cite_note-:0-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> Also supported are <a href="/wiki/DisplayPort#2.0" title="DisplayPort">DisplayPort 2.0</a> and <a href="/wiki/Overclocking" title="Overclocking">overclocking</a>. <a href="/wiki/AV1" title="AV1">AV1</a> fixed-function hardware encoder is included in Alchemist GPUs as part of the <a href="/wiki/Intel_Quick_Sync_Video" title="Intel Quick Sync Video">Intel Quick Sync Video</a> core.<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> </p><p>Intel confirmed <a href="/wiki/Adaptive_scalable_texture_compression" title="Adaptive scalable texture compression">ASTC</a> support has been removed from hardware starting with Alchemist and future Arc GPU microarchitectures will also not support it.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> </p><p>Arc Alchemist does not support SR-IOV<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> or <a href="/wiki/Direct3D" title="Direct3D">Direct3D</a> 9 natively, instead falling back on the D3D9On12 wrapper which translates Direct3D 9 calls to their Direct3D 12 equivalents.<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-d3d9_21-0" class="reference"><a href="#cite_note-d3d9-21"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> </p><p>Arc support <a href="/wiki/OpenCL#OpenCL_3.0_support" title="OpenCL">OpenCL 3.0</a><sup id="cite_ref-OpenCL3.0_22-0" class="reference"><a href="#cite_note-OpenCL3.0-22"><span class="cite-bracket">[</span>note 1<span class="cite-bracket">]</span></a></sup> for example, this GPU can work in the <a href="/wiki/Grid_computing" title="Grid computing">grid</a> <a href="/wiki/World_Community_Grid" title="World Community Grid">World Community Grid</a>.<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> </p><p>Display connections: <a href="/wiki/DisplayPort#2.0" title="DisplayPort">DisplayPort 2.0</a> (40 Gbit/s bandwidth) and <a href="/wiki/HDMI#Version_2.1" title="HDMI">HDMI 2.1</a> </p> <div class="mw-heading mw-heading4"><h4 id="Desktop">Desktop</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=4" title="Edit section: Desktop"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" style="text-align: center; font-size: 85%;"> <caption><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist 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.navbar-ct-mini{font-size:114%;margin:0 4em}html.skin-theme-clientpref-night .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}@media(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini" style="float:left;"><ul><li class="nv-view"><a href="/wiki/Template:Intel_Arc_Alchemist" title="Template:Intel Arc Alchemist"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel_Arc_Alchemist" title="Template talk:Intel Arc Alchemist"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_Arc_Alchemist" title="Special:EditPage/Template:Intel Arc Alchemist"><abbr title="Edit this template">e</abbr></a></li></ul></div> Overview of Intel Arc Alchemist GPUs </caption> <tbody><tr> <th colspan="2" rowspan="2">Branding and Model<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2">Launch </th> <th rowspan="2">MSRP<br />(USD) </th> <th rowspan="2">Code name </th> <th rowspan="2" style="-webkit-writing-mode: vertical-lr; -o-writing-mode: vertical-lr; -ms-writing-mode: tb-lr; writing-mode: tb-lr; writing-mode: vertical-lr;">Process </th> <th rowspan="2" style="-webkit-writing-mode: vertical-lr; -o-writing-mode: vertical-lr; -ms-writing-mode: tb-lr; writing-mode: tb-lr; writing-mode: vertical-lr;">Transistors (billion) </th> <th rowspan="2">Die size<br />(mm<sup>2</sup>) </th> <th rowspan="2">Core config <sup id="cite_ref-coreconfig_25-0" class="reference"><a href="#cite_note-coreconfig-25"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2"><a href="/wiki/Cache_(computing)#CPU_cache" title="Cache (computing)">L2 cache</a> </th> <th rowspan="2">Clock rate <br /> (<a href="/wiki/Hertz" title="Hertz">MHz</a>)<sup id="cite_ref-Boost_26-0" class="reference"><a href="#cite_note-Boost-26"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup> </th> <th colspan="2"><a href="/wiki/Fillrate" title="Fillrate">Fillrate</a> </th> <th colspan="5">Memory </th> <th colspan="3">Processing power (<a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">TFLOPS</a>) </th> <th rowspan="2"><abbr title="Thermal design power">TDP</abbr> </th> <th rowspan="2">Bus <br />interface </th></tr> <tr> <th>Pixel <br /> (<a href="/wiki/Pixel" title="Pixel">GP</a>/s) </th> <th>Texture <br /> (<a href="/wiki/Texel_(graphics)" title="Texel (graphics)">GT</a>/s) </th> <th>Type </th> <th>Size (<a href="/wiki/Gigabyte" title="Gigabyte">GB</a>) </th> <th>Bandwidth <br /> (<a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s) </th> <th>Bus width </th> <th>Clock <br /> (<a href="/wiki/Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">MT/s</a>) </th> <th><a href="/wiki/Half-precision_floating-point_format" title="Half-precision floating-point format">Half <br /> precision</a><br />(base) </th> <th><a href="/wiki/Single-precision_floating-point_format" title="Single-precision floating-point format">Single <br /> precision</a><br />(base) </th> <th><a href="/wiki/Double-precision_floating-point_format" title="Double-precision floating-point format">Double <br /> precision</a><br />(base) </th></tr> <tr> <th rowspan="2">Arc 3 </th> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/227958/intel-arc-a310-graphics.html">A310</a> </th> <td><span data-sort-value="000000002022-09-28-0000" style="white-space:nowrap">Sep 28, 2022</span> </td> <td>$110 </td> <td rowspan="2">ACM-G11<br />(DG2-128) </td> <td rowspan="6"><a href="/wiki/TSMC" title="TSMC">TSMC</a><br /><a href="/wiki/7_nm_process" title="7 nm process">N6</a> </td> <td rowspan="2">7.2 </td> <td rowspan="2">157 </td> <td>6 Xe cores <br /> 768:32:16:6 <br /> (192:96:2) </td> <td rowspan="2">4<span class="nowrap"> </span>MB </td> <td>2000 <br /> <i>2000</i> </td> <td>32 </td> <td>64 </td> <td rowspan="6"><a href="/wiki/GDDR6_SDRAM" title="GDDR6 SDRAM">GDDR6</a> </td> <td>4<span class="nowrap"> </span>GB </td> <td>124 </td> <td>64-bit </td> <td rowspan="2">15500 </td> <td>6.144 </td> <td>3.072 </td> <td>n/a </td> <td rowspan="2">75<span class="nowrap"> </span>W </td> <td rowspan="2"><a href="/wiki/PCI_Express#PCI_Express_4.0" title="PCI Express">PCIe 4.0</a> x8 </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/227959/intel-arc-a380-graphics.html">A380</a> </th> <td><span data-sort-value="000000002022-06-14-0000" style="white-space:nowrap">Jun 14, 2022</span> </td> <td>$139 </td> <td>8 Xe cores <br /> 1024:64:32:8 <br /> (256:128:2) </td> <td>2000 <br /> <i>2050</i> </td> <td>64<br /><i>65.6</i> </td> <td>128<br /><i>131.2</i> </td> <td>6<span class="nowrap"> </span>GB </td> <td>186 </td> <td>96-bit </td> <td>8.192<br /><i>8.3968</i> </td> <td>4.096<br /><i>4.1984</i> </td> <td>n/a<br /><i>n/a</i> </td></tr> <tr> <th>Arc 5 </th> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/227961.html">A580</a> </th> <td><span data-sort-value="000000002023-10-10-0000" style="white-space:nowrap">Oct 10, 2023</span> </td> <td>$179 </td> <td rowspan="4">ACM-G10<br />(DG2-512) </td> <td rowspan="4">21.7 </td> <td rowspan="4">406 </td> <td>24 Xe cores <br /> 3072:192:96:24 <br /> (768:384:6) </td> <td>8<span class="nowrap"> </span>MB </td> <td>1700 <br /> <i>1700</i> </td> <td>163.2 </td> <td>326.4 </td> <td rowspan="3">8<span class="nowrap"> </span>GB </td> <td rowspan="3">512 </td> <td rowspan="4">256-bit </td> <td rowspan="3">16000 </td> <td>20.890 </td> <td>10.445 </td> <td>n/a </td> <td>175<span class="nowrap"> </span>W </td> <td rowspan="4"><a href="/wiki/PCI_Express#PCI_Express_4.0" title="PCI Express">PCIe 4.0</a> x16 </td></tr> <tr> <th rowspan="3">Arc 7 </th> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/227954/intel-arc-a750-graphics.html">A750</a> </th> <td rowspan="3"><span data-sort-value="000000002022-10-14-0000" style="white-space:nowrap">Oct 14, 2022</span> </td> <td>$289 </td> <td>28 Xe cores <br /> 3584:224:112:28 <br /> (896:448:7) </td> <td rowspan="4">16<span class="nowrap"> </span>MB </td> <td>2050 <br /> <i>2400</i> </td> <td>229.6<br /><i>268.8</i> </td> <td>393.6<br /><i>460.8</i> </td> <td>29.3888<br /><i>34.4064</i> </td> <td>14.6944<br /><i>17.2032</i> </td> <td>n/a<br /><i>n/a</i> </td> <td rowspan="3">225<span class="nowrap"> </span>W </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/227955/intel-arc-a770-graphics-8gb.html">A770 8GB</a> </th> <td>$329 </td> <td rowspan="2">32 Xe cores <br /> 4096:256:128:32 <br /> (1024:512:8) </td> <td rowspan="2">2100 <br /> <i>2400</i> </td> <td rowspan="2">268.8<br /><i>307.2</i> </td> <td rowspan="2">537.6<br /><i>614.4</i> </td> <td rowspan="2">34.4064<br /><i>39.3216</i> </td> <td rowspan="2">17.2032<br /><i>19.6608</i> </td> <td rowspan="2">n/a<br /><i>n/a</i> </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/229151/intel-arc-a770-graphics-16gb.html">A770 16GB</a> </th> <td>$349 </td> <td>16<span class="nowrap"> </span>GB </td> <td>560 </td> <td>17500 </td></tr></tbody></table> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-OpenCL3.0-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-OpenCL3.0_2-0">^</a></b></span> <span class="reference-text">In OpenCL 3.0, OpenCL 1.2 functionality has become a mandatory baseline, while all OpenCL 2.x and OpenCL 3.0 features were made optional.</span> </li> <li id="cite_note-coreconfig-25"><span class="mw-cite-backlink"><b><a href="#cite_ref-coreconfig_25-0">^</a></b></span> <span class="reference-text"> Shading cores (ALU): texture mapping units (TMU): render output units (ROP): ray tracing units <br /><span class="nowrap"> </span><span class="nowrap"> </span> (tensor cores (XMX): execution units: render slices)</span> </li> <li id="cite_note-Boost-26"><span class="mw-cite-backlink"><b><a href="#cite_ref-Boost_26-0">^</a></b></span> <span class="reference-text"> Boost values (if available) are stated below the base value in <i>italic</i>.</span> </li> </ol></div></div> <div class="mw-heading mw-heading4"><h4 id="Mobile">Mobile</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=5" title="Edit section: Mobile"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" style="text-align: center; font-size: 85%;"> <caption><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini" style="float:left;"><ul><li class="nv-view"><a href="/wiki/Template:Intel_Arc_Alchemist_Mobile" title="Template:Intel Arc Alchemist Mobile"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel_Arc_Alchemist_Mobile" title="Template talk:Intel Arc Alchemist Mobile"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_Arc_Alchemist_Mobile" title="Special:EditPage/Template:Intel Arc Alchemist Mobile"><abbr title="Edit this template">e</abbr></a></li></ul></div> Overview of Intel Arc Alchemist GPUs for mobile devices </caption> <tbody><tr> <th colspan="2" rowspan="2">Branding and Model<sup id="cite_ref-27" class="reference"><a href="#cite_note-27"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2">Launch </th> <th rowspan="2">Code name </th> <th rowspan="2" style="-webkit-writing-mode: vertical-lr; -o-writing-mode: vertical-lr; -ms-writing-mode: tb-lr; writing-mode: tb-lr; writing-mode: vertical-lr;">Process </th> <th rowspan="2" style="-webkit-writing-mode: vertical-lr; -o-writing-mode: vertical-lr; -ms-writing-mode: tb-lr; writing-mode: tb-lr; writing-mode: vertical-lr;">Transistors (billion) </th> <th rowspan="2">Die size<br />(mm<sup>2</sup>) </th> <th rowspan="2">Core config<sup id="cite_ref-coreconfig_28-0" class="reference"><a href="#cite_note-coreconfig-28"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-texture_fillrate_29-0" class="reference"><a href="#cite_note-texture_fillrate-29"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2"><a href="/wiki/Cache_(computing)#GPU_cache" title="Cache (computing)">L2<br />cache</a> </th> <th rowspan="2">Core clock <br /> (<a href="/wiki/Hertz" title="Hertz">MHz</a>)<sup id="cite_ref-Boost_30-0" class="reference"><a href="#cite_note-Boost-30"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup> </th> <th colspan="2"><a href="/wiki/Fillrate" title="Fillrate">Fillrate</a><sup id="cite_ref-pixel_fillrate_31-0" class="reference"><a href="#cite_note-pixel_fillrate-31"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup> </th> <th colspan="5">Memory </th> <th colspan="3">Processing power (<a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">TFLOPS</a>) </th> <th rowspan="2"><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a> </th> <th rowspan="2">Bus <br /> interface </th></tr> <tr> <th>Pixel <br /> (<a href="/wiki/Pixel" title="Pixel">GP</a>/s) </th> <th>Texture <br /> (<a href="/wiki/Texel_(graphics)" title="Texel (graphics)">GT</a>/s) </th> <th>Type </th> <th>Size </th> <th>Bandwidth <br /> (<a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s) </th> <th>Bus width </th> <th>Clock <br /> (<a href="/wiki/Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">MT/s</a>) </th> <th><a href="/wiki/Half-precision_floating-point_format" title="Half-precision floating-point format">Half<br />precision</a> </th> <th><a href="/wiki/Single-precision_floating-point_format" title="Single-precision floating-point format">Single<br />precision</a> </th> <th><a href="/wiki/Double-precision_floating-point_format" title="Double-precision floating-point format">Double<br />precision</a> </th></tr> <tr> <th rowspan="2">Arc 3 </th> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/228338/intel-arc-a350m-graphics.html">A350M</a> </th> <td rowspan="2"><span data-sort-value="000000002022-03-30-0000" style="white-space:nowrap">Mar 30, 2022</span> </td> <td rowspan="2">ACM-G11<br />(DG2-128) </td> <td rowspan="7"><a href="/wiki/TSMC" title="TSMC">TSMC</a> <br /> <a href="/wiki/7_nm_process" title="7 nm process">N6</a> </td> <td rowspan="2">7.2 </td> <td rowspan="2">157 </td> <td>6 Xe cores<br />768:48:24:6<br />(96:96:2) </td> <td rowspan="2">4 MB </td> <td>1150<br /><i>2200</i> </td> <td>27.6<br /><i>52.8</i> </td> <td>55.2<br /><i>105.6</i> </td> <td rowspan="7"><a href="/wiki/GDDR6_SDRAM" title="GDDR6 SDRAM">GDDR6</a> </td> <td rowspan="2">4 GB </td> <td rowspan="2">112 </td> <td rowspan="2">64-bit </td> <td rowspan="6">14000 </td> <td>3.5328<br /><i>6.7584</i> </td> <td>1.7664<br /><i>3.3792</i> </td> <td>0.4416<br /><i>0.8448</i> </td> <td>25–35 W </td> <td rowspan="5"><a href="/wiki/PCI_Express#PCI_Express_4.0" title="PCI Express">PCIe 4.0</a> ×8 </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/228342/intel-arc-a370m-graphics.html">A370M</a> </th> <td>8 Xe cores<br />1024:64:32:8<br />(128:128:2) </td> <td>1550<br /><i>2050</i> </td> <td>49.6<br /><i>65.6</i> </td> <td>99.2<br /><i>131.2</i> </td> <td>6.3488<br /><i>8.3968</i> </td> <td>3.1744<br /><i>4.1984</i> </td> <td>0.7936<br /><i>1.0496</i> </td> <td>35–50 W </td></tr> <tr> <th rowspan="3">Arc 5 </th> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/232776/intel-arc-a530m-graphics.html">A530M</a> </th> <td>Q3 2023 </td> <td>ACM-G12<br />(DG2-256) </td> <td> </td> <td> </td> <td>12 Xe cores<br />1536:96:48:12<br />(192:192:3) </td> <td rowspan="3">8 MB </td> <td>1300 </td> <td> </td> <td> </td> <td>4 GB<br />8 GB </td> <td rowspan="3">224 </td> <td rowspan="3">128-bit </td> <td> </td> <td> </td> <td> </td> <td>65–95 W </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/228343/intel-arc-a550m-graphics.html">A550M</a> </th> <td>Q2 2022 </td> <td>ACM-G10<br />(DG2-512) </td> <td>21.7 </td> <td>406 </td> <td rowspan="2">16 Xe cores<br />2048:128:64:16<br />(256:256:4) </td> <td>900<br /><i>1700</i> </td> <td>57.6<br /><i>108.8</i> </td> <td>115.2<br /><i>217.6</i> </td> <td rowspan="2">8 GB </td> <td>7.3728<br /><i>13.9264</i> </td> <td>3.6864<br /><i>6.9632</i> </td> <td>0.9216<br /><i>1.7408</i> </td> <td>60–80 W </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/232777/intel-arc-a570m-graphics.html">A570M</a> </th> <td>Q3 2023 </td> <td>ACM-G12<br />(DG2-256) </td> <td> </td> <td> </td> <td>1300 </td> <td> </td> <td> </td> <td> </td> <td> </td> <td> </td> <td>75–95 W </td></tr> <tr> <th rowspan="2">Arc 7 </th> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/228340/intel-arc-a730m-graphics.html">A730M</a> </th> <td rowspan="2">Q2 2022 </td> <td rowspan="2">ACM-G10<br />(DG2-512) </td> <td rowspan="2">21.7 </td> <td rowspan="2">406 </td> <td>24 Xe cores<br />3072:192:96:24<br />(384:384:6) </td> <td>12 MB </td> <td>1100<br /><i>2050</i> </td> <td>105.6<br /><i>196.8</i> </td> <td>211.2<br /><i>393.6</i> </td> <td>12 GB </td> <td>336 </td> <td>192-bit </td> <td>13.5168<br /><i>25.1904</i> </td> <td>6.7584<br /><i>12.5952</i> </td> <td>1.6896<br /><i>3.1488</i> </td> <td>80–120 W </td> <td rowspan="2"><a href="/wiki/PCI_Express#PCI_Express_4.0" title="PCI Express">PCIe 4.0</a> ×16 </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://ark.intel.com/content/www/us/en/ark/products/228341/intel-arc-a770m-graphics.html">A770M</a> </th> <td>32 Xe cores<br />4096:256:128:32<br />(512:512:8) </td> <td>16 MB </td> <td>1650<br /><i>2050</i> </td> <td>211.2<br /><i>262.4</i> </td> <td>422.4<br /><i>524.8</i> </td> <td>16 GB </td> <td>512 </td> <td>256-bit </td> <td>16000 </td> <td>27.0336<br /><i>33.5872</i> </td> <td>13.5168<br /><i>16.7936</i> </td> <td>3.3792<br /><i>4.1984</i> </td> <td>120–150 W </td></tr></tbody></table> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-coreconfig-28"><span class="mw-cite-backlink"><b><a href="#cite_ref-coreconfig_28-0">^</a></b></span> <span class="reference-text"> Shading cores (ALU): texture mapping units (TMU): render output units (ROP): ray tracing units <br />   (tensor cores (XMX): execution units: render slices)</span> </li> <li id="cite_note-texture_fillrate-29"><span class="mw-cite-backlink"><b><a href="#cite_ref-texture_fillrate_29-0">^</a></b></span> <span class="reference-text">Texture fillrate is calculated as the number of <i>texture mapping units</i> (TMUs) multiplied by the base (or boost) <i>core clock speed</i>.</span> </li> <li id="cite_note-Boost-30"><span class="mw-cite-backlink"><b><a href="#cite_ref-Boost_30-0">^</a></b></span> <span class="reference-text"> Boost values (if available) are stated below the base value in <i>italic</i>.</span> </li> <li id="cite_note-pixel_fillrate-31"><span class="mw-cite-backlink"><b><a href="#cite_ref-pixel_fillrate_31-0">^</a></b></span> <span class="reference-text">Pixel fillrate is calculated as the lowest of three numbers: number of <i>ROPs</i> multiplied by the base <i>core clock speed</i>, number of rasterizers multiplied by the number of fragments they can generate per rasterizer multiplied by the base core clock speed, and the number of streaming multiprocessors multiplied by the number of fragments per clock that they can output multiplied by the base clock rate.</span> </li> </ol></div></div> <div class="mw-heading mw-heading4"><h4 id="Workstation">Workstation</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=6" title="Edit section: Workstation"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" style="text-align: center; font-size: 85%;"> <caption><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini" style="float:left;"><ul><li class="nv-view"><a href="/wiki/Template:Intel_Arc_Alchemist_Workstation" title="Template:Intel Arc Alchemist Workstation"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel_Arc_Alchemist_Workstation" title="Template talk:Intel Arc Alchemist Workstation"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_Arc_Alchemist_Workstation" title="Special:EditPage/Template:Intel Arc Alchemist Workstation"><abbr title="Edit this template">e</abbr></a></li></ul></div> Overview of Intel Arc Alchemist GPUs for Workstations </caption> <tbody><tr> <th colspan="2" rowspan="2">Branding and Model<sup id="cite_ref-Intel_32-0" class="reference"><a href="#cite_note-Intel-32"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2">Launch </th> <th rowspan="2">Code name </th> <th rowspan="2" style="-webkit-writing-mode: vertical-lr; -o-writing-mode: vertical-lr; -ms-writing-mode: tb-lr; writing-mode: tb-lr; writing-mode: vertical-lr;">Process </th> <th rowspan="2" style="-webkit-writing-mode: vertical-lr; -o-writing-mode: vertical-lr; -ms-writing-mode: tb-lr; writing-mode: tb-lr; writing-mode: vertical-lr;">Transistors (billion) </th> <th rowspan="2">Die size <br /> (mm<sup>2</sup>) </th> <th rowspan="2">Core config<sup id="cite_ref-coreconfig_33-0" class="reference"><a href="#cite_note-coreconfig-33"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2"><a href="/wiki/Cache_(computing)#GPU_cache" title="Cache (computing)">L2 <br /> cache</a> </th> <th rowspan="2">Core clock <br /> (<a href="/wiki/Hertz" title="Hertz">MHz</a>)<sup id="cite_ref-Boost_34-0" class="reference"><a href="#cite_note-Boost-34"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </th> <th colspan="2"><a href="/wiki/Fillrate" title="Fillrate">Fillrate</a><sup id="cite_ref-pixel_fillrate_35-0" class="reference"><a href="#cite_note-pixel_fillrate-35"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-texture_fillrate_36-0" class="reference"><a href="#cite_note-texture_fillrate-36"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup> </th> <th colspan="5">Memory </th> <th colspan="3">Processing power (<a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">TFLOPS</a>) </th> <th rowspan="2"><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a> </th> <th rowspan="2">Bus<br />interface </th></tr> <tr> <th>Pixel <br />(<a href="/wiki/Pixel" title="Pixel">GP</a>/s) </th> <th>Texture <br />(<a href="/wiki/Texel_(graphics)" title="Texel (graphics)">GT</a>/s) </th> <th>Type </th> <th>Size </th> <th>Bandwidth <br /> (<a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s) </th> <th>Bus width </th> <th>Clock <br /> (<a href="/wiki/Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">MT/s</a>) </th> <th><a href="/wiki/Half-precision_floating-point_format" title="Half-precision floating-point format">Half <br /> precision</a> </th> <th><a href="/wiki/Single-precision_floating-point_format" title="Single-precision floating-point format">Single <br /> precision</a> </th> <th><a href="/wiki/Double-precision_floating-point_format" title="Double-precision floating-point format">Double <br /> precision</a> </th></tr> <tr> <th rowspan="5">Arc Pro </th> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/216962/intel-arc-pro-a30m-graphics/specifications.html">A30M</a> </th> <td rowspan="3"><span data-sort-value="000000002022-08-08-0000" style="white-space:nowrap">Aug 8, 2022</span> </td> <td rowspan="3">ACM-G11<br />(DG2-128) </td> <td rowspan="5"><a href="/wiki/TSMC" title="TSMC">TSMC</a> <br /> <a href="/wiki/7_nm_process" title="7 nm process">N6</a> </td> <td rowspan="3">7.2 </td> <td rowspan="3">157 </td> <td rowspan="3">8 Xe cores<br />1024:64:32:8<br />(128:128:2) </td> <td rowspan="3">4 MB </td> <td rowspan="2">1550 </td> <td rowspan="3"> </td> <td rowspan="3"> </td> <td rowspan="5"><a href="/wiki/GDDR6_SDRAM" title="GDDR6 SDRAM">GDDR6</a> </td> <td>4 GB </td> <td>112 </td> <td>64-bit </td> <td>14000 </td> <td> </td> <td><br /><i>4.20</i><sup id="cite_ref-Intel_32-1" class="reference"><a href="#cite_note-Intel-32"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </td> <td> </td> <td rowspan="2">50 W </td> <td rowspan="3"><a href="/wiki/PCI_Express#PCI_Express_4.0" title="PCI Express">PCIe 4.0</a> x8 </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/230317/intel-arc-pro-a40-graphics/specifications.html">A40</a> </th> <td rowspan="2">6 GB </td> <td rowspan="2">192 </td> <td rowspan="2">96-bit </td> <td rowspan="4">16000 </td> <td> </td> <td rowspan="2"><br /><i>5.02</i><sup id="cite_ref-Intel_32-2" class="reference"><a href="#cite_note-Intel-32"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </td> <td> </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/230316/intel-arc-pro-a50-graphics/specifications.html">A50</a> </th> <td>2050 </td> <td> </td> <td> </td> <td>75 W </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/232778/intel-arc-pro-a60m-graphics/specifications.html">A60M</a> </th> <td rowspan="2">June 6, 2023 </td> <td rowspan="2">ACM-G12<br />(DG2-256) </td> <td rowspan="2"> </td> <td rowspan="2"> </td> <td rowspan="2">16 Xe cores<br />2048:128:64:16<br />(256:256:4) </td> <td rowspan="2"> </td> <td>1300 </td> <td rowspan="2"> </td> <td rowspan="2"> </td> <td>8 GB </td> <td>256 </td> <td>128-bit </td> <td> </td> <td><br /><i>9.42</i><sup id="cite_ref-Intel_32-3" class="reference"><a href="#cite_note-Intel-32"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </td> <td> </td> <td>95 W </td> <td rowspan="2"><a href="/wiki/PCI_Express#PCI_Express_4.0" title="PCI Express">PCIe 4.0</a> x16 </td></tr> <tr> <th style="text-align: left"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/235979/intel-arc-pro-a60-graphics/specifications.html">A60</a> </th> <td>2000 </td> <td>12 GB </td> <td>384 </td> <td>192-bit </td> <td> </td> <td><br /><i>10.04</i><sup id="cite_ref-Intel_32-4" class="reference"><a href="#cite_note-Intel-32"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> </td> <td> </td> <td>130 W </td></tr></tbody></table> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-coreconfig-33"><span class="mw-cite-backlink"><b><a href="#cite_ref-coreconfig_33-0">^</a></b></span> <span class="reference-text"> Shading cores (ALU): texture mapping units (TMU): render output units (ROP): ray tracing units <br />   (tensor cores (XMX): execution Units: render slices)</span> </li> <li id="cite_note-Boost-34"><span class="mw-cite-backlink"><b><a href="#cite_ref-Boost_34-0">^</a></b></span> <span class="reference-text"> Boost values (if available) are stated below the base value in <i>italic</i>.</span> </li> <li id="cite_note-pixel_fillrate-35"><span class="mw-cite-backlink"><b><a href="#cite_ref-pixel_fillrate_35-0">^</a></b></span> <span class="reference-text"> Pixel fillrate is calculated as the lowest of three numbers: number of <b>ROPs</b> multiplied by the base <b>core clock speed,</b> number of rasterizers multiplied by the number of fragments they can generate per rasterizer multiplied by the base core clock speed, and the number of streaming multiprocessors multiplied by the number of fragments per clock that they can output multiplied by the base clock rate.</span> </li> <li id="cite_note-texture_fillrate-36"><span class="mw-cite-backlink"><b><a href="#cite_ref-texture_fillrate_36-0">^</a></b></span> <span class="reference-text"> Texture fillrate is calculated as the number of <b>texture mapping units</b> (TMUs) multiplied by the base (or boost) <b>core clock speed</b>.</span> </li> </ol></div></div> <div class="mw-heading mw-heading3"><h3 id="Battlemage">Battlemage</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=7" title="Edit section: Battlemage"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Battlemage (X<sup>e</sup>2) is the second-generation X<sup>e</sup> architecture that debuted with its low power variant in <a href="/wiki/Lunar_Lake" title="Lunar Lake">Lunar Lake</a> mobile processors that released in September 2024.<sup id="cite_ref-37" class="reference"><a href="#cite_note-37"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> On December 3, 2024, Intel announced two Arc B-Series desktop graphics cards based on the X<sup>e</sup>2-HPG graphics architecture.<sup id="cite_ref-38" class="reference"><a href="#cite_note-38"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup> </p> <table class="wikitable" style="text-align: center; font-size: 85%;"> <caption><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini" style="float:left;"><ul><li class="nv-view"><a href="/wiki/Template:Intel_Arc_Battlemage" title="Template:Intel Arc Battlemage"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/w/index.php?title=Template_talk:Intel_Arc_Battlemage&action=edit&redlink=1" class="new" title="Template talk:Intel Arc Battlemage (page does not exist)"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_Arc_Battlemage" title="Special:EditPage/Template:Intel Arc Battlemage"><abbr title="Edit this template">e</abbr></a></li></ul></div> Overview of Intel Arc Battlemage GPUs </caption> <tbody><tr> <th colspan="2" rowspan="2">Branding and Model<sup id="cite_ref-39" class="reference"><a href="#cite_note-39"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup> </th> <th rowspan="2">Released </th> <th rowspan="2">MSRP<br />(USD) </th> <th rowspan="2">Code name </th> <th rowspan="2" style="-webkit-writing-mode: vertical-lr; -o-writing-mode: vertical-lr; -ms-writing-mode: tb-lr; writing-mode: tb-lr; writing-mode: vertical-lr;">Transistors (billion) </th> <th rowspan="2">Die size<br />(mm<sup>2</sup>) </th> <th colspan="2">Core </th> <th colspan="2"><a href="/wiki/Cache_(computing)#GPU_cache" title="Cache (computing)">Cache</a> </th> <th colspan="5"><a href="/wiki/Video_random_access_memory" class="mw-redirect" title="Video random access memory">Memory</a> </th> <th colspan="2"><a href="/wiki/Fillrate" title="Fillrate">Fillrate</a><sup id="cite_ref-pixel_fillrate_40-0" class="reference"><a href="#cite_note-pixel_fillrate-40"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-texture_fillrate_41-0" class="reference"><a href="#cite_note-texture_fillrate-41"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </th> <th colspan="3">Processing power (<a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">TFLOPS</a>) </th> <th rowspan="2"><abbr title="Thermal design power">TDP</abbr> </th> <th rowspan="2">Bus <br />interface </th></tr> <tr> <th>Config<sup id="cite_ref-CoreConfig_42-0" class="reference"><a href="#cite_note-CoreConfig-42"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup> </th> <th>Clock <br /> (<a href="/wiki/Hertz" title="Hertz">MHz</a>)<sup id="cite_ref-boost_43-0" class="reference"><a href="#cite_note-boost-43"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup> </th> <th style="width:4em;">L1 </th> <th style="width:4em;">L2 </th> <th>Type </th> <th>Size </th> <th>Clock rate <br /> (<a href="/wiki/Data-rate_units" title="Data-rate units">Gb</a>/s) </th> <th>Band-<br />width <br /> (<a href="/wiki/Gigabyte" title="Gigabyte">GB</a>/s) </th> <th>Bus <br /> width </th> <th style="width:3em;">Pixel <br /> (<a href="/wiki/Pixel" title="Pixel">Gpx</a>/s) </th> <th style="width:3em;">Texture <br /> (<a href="/wiki/Texel_(graphics)" title="Texel (graphics)">Gtex</a>/s) </th> <th><a href="/wiki/Half-precision_floating-point_format" title="Half-precision floating-point format">Half <br /> precision</a><br />(base) </th> <th><a href="/wiki/Single-precision_floating-point_format" title="Single-precision floating-point format">Single <br /> precision</a><br />(base) </th> <th><a href="/wiki/Double-precision_floating-point_format" title="Double-precision floating-point format">Double <br /> precision</a><br />(base) </th></tr> <tr> <th rowspan="2">Arc 5 </th> <th style="text-align:left;"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/241676/intel-arc-b570-graphics/specifications.html">B570</a> </th> <td><span data-sort-value="000000002025-01-16-0000" style="white-space:nowrap">Jan 16, 2025</span> </td> <td>$219 </td> <td rowspan="2">BMG-G21 </td> <td rowspan="2">19.6 </td> <td rowspan="2">272<span class="nowrap"> </span>mm<sup>2</sup> </td> <td>18 X<sup>e</sup> Cores (144) <br /> 2304:144:72:18:144 </td> <td>1700 <br /> <i>2500</i> </td> <td>4.5<span class="nowrap"> </span>MB </td> <td>10<span class="nowrap"> </span>MB </td> <td rowspan="2"><a href="/wiki/GDDR6_SDRAM" title="GDDR6 SDRAM">GDDR6</a> </td> <td>10<span class="nowrap"> </span>GB </td> <td rowspan="2">19.0 </td> <td>380 </td> <td>160-bit </td> <td>122.4 <br /> <i>200.0</i> </td> <td>244.8 <br /> <i>360.0</i> </td> <td><br /> <i>23.04</i> </td> <td><br /> <i>11.52</i> </td> <td><br /> <i>1.44</i> </td> <td>150<span class="nowrap"> </span>W </td> <td rowspan="2"><a href="/wiki/PCI_Express#PCI_Express_4.0" title="PCI Express">PCIe 4.0</a> <br /> x8 </td></tr> <tr> <th style="text-align:left;"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/241598/intel-arc-b580-graphics/specifications.html">B580</a> </th> <td><span data-sort-value="000000002024-12-13-0000" style="white-space:nowrap">Dec 13, 2024</span> </td> <td>$249 </td> <td>20 X<sup>e</sup> Cores (160) <br /> 2560:160:80:20:160 </td> <td>1700 <br /> <i>2670</i> </td> <td>5<span class="nowrap"> </span>MB </td> <td>12<span class="nowrap"> </span>MB </td> <td>12<span class="nowrap"> </span>GB </td> <td>456 </td> <td>192-bit </td> <td>136.0 <br /> <i>213.6</i> </td> <td>272.0 <br /> <i>427.2</i> </td> <td><br /> <i>27.34</i> </td> <td><br /> <i>13.67</i> </td> <td><br /> <i>1.709</i> </td> <td>190<span class="nowrap"> </span>W </td></tr> </tbody></table> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-pixel_fillrate-40"><span class="mw-cite-backlink"><b><a href="#cite_ref-pixel_fillrate_40-0">^</a></b></span> <span class="reference-text">Pixel fillrate is calculated as the number of render output units (ROPs) multiplied by the base (or boost) core clock speed.</span> </li> <li id="cite_note-texture_fillrate-41"><span class="mw-cite-backlink"><b><a href="#cite_ref-texture_fillrate_41-0">^</a></b></span> <span class="reference-text">Texture fillrate is calculated as the number of texture mapping units (TMUs) multiplied by the base (or boost) core clock speed.</span> </li> <li id="cite_note-CoreConfig-42"><span class="mw-cite-backlink"><b><a href="#cite_ref-CoreConfig_42-0">^</a></b></span> <span class="reference-text">X<sup>e</sup>2-HPG Cores (X<sup>e</sup> Vector Engines) <br /> <a href="/wiki/Unified_shader_model" title="Unified shader model">Unified Shaders</a> : <a href="/wiki/Texture_mapping_unit" title="Texture mapping unit">Texture Mapping Units</a> : <a href="/wiki/Render_output_unit" title="Render output unit">Render Output Units</a> : <a href="/wiki/Ray_tracing_(graphics)" title="Ray tracing (graphics)">Ray Tracing Cores</a> : <a href="/wiki/AI_accelerator" title="AI accelerator">XMX Cores</a></span> </li> <li id="cite_note-boost-43"><span class="mw-cite-backlink"><b><a href="#cite_ref-boost_43-0">^</a></b></span> <span class="reference-text">Boost values (if available) are stated below the base value in <i>italics</i>.</span> </li> </ol></div></div> <div class="mw-heading mw-heading3"><h3 id="Future_generations">Future generations</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=8" title="Edit section: Future generations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Intel also revealed future generations of Intel Arc GPUs under development: Celestial (X<sup>e</sup>3), and Druid (X<sup>e</sup>4).<sup id="cite_ref-:1_44-0" class="reference"><a href="#cite_note-:1-44"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:2g_6-1" class="reference"><a href="#cite_note-:2g-6"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p><p>Intel revealed that <a href="/wiki/Meteor_Lake" title="Meteor Lake">Meteor Lake</a> and later generations of CPU SoCs uses an Intel Arc Tile GPU.<sup id="cite_ref-anandtech.com_45-0" class="reference"><a href="#cite_note-anandtech.com-45"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-46" class="reference"><a href="#cite_note-46"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Intel_XeSS">Intel XeSS</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=9" title="Edit section: Intel XeSS"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Intel XeSS is a <a href="/wiki/Real-time_computing" title="Real-time computing">real-time</a> <a href="/wiki/Machine_learning" title="Machine learning">deep learning</a> image <a href="/wiki/Image_scaling" title="Image scaling">upsampling</a> technology developed primarily for use in video games as a competitor to Nvidia's <a href="/wiki/Deep_learning_super_sampling" class="mw-redirect" title="Deep learning super sampling">DLSS</a> and AMD's <a href="/wiki/GPUOpen#FidelityFX_Super_Resolution" title="GPUOpen">FSR</a> technologies. Additionally, XeSS is not restricted to Arc graphics cards. It utilizes XMX instructions exclusive to Arc graphics cards, but will fall back to utilizing DP4a instructions on competing GPUs that have support for DP4a instructions. XeSS is trained with 64 samples per pixel as opposed to Nvidia DLSS's 16 samples per pixel (<a href="/wiki/16K_resolution" title="16K resolution">16K</a> reference images).<sup id="cite_ref-47" class="reference"><a href="#cite_note-47"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-48" class="reference"><a href="#cite_note-48"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup> </p> <table class="wikitable sortable"> <caption>Standard XeSS quality presets<sup id="cite_ref-49" class="reference"><a href="#cite_note-49"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup> </caption> <tbody><tr> <th>Quality preset<sup id="cite_ref-preset-disclaimer_50-0" class="reference"><a href="#cite_note-preset-disclaimer-50"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> </th> <th>Scale factor<sup id="cite_ref-scale-factor_51-0" class="reference"><a href="#cite_note-scale-factor-51"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </th> <th>Render scale<sup id="cite_ref-render-scale_52-0" class="reference"><a href="#cite_note-render-scale-52"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup> </th></tr> <tr> <td>Ultra Quality </td> <td>1.30× </td> <td>77.0% </td></tr> <tr> <td>Quality </td> <td>1.50× </td> <td>66.7% </td></tr> <tr> <td>Balanced </td> <td>1.70× </td> <td>58.8% </td></tr> <tr> <td>Performance </td> <td>2.00× </td> <td>50.0% </td></tr> <tr> <td>Ultra Performance </td> <td>3.00× </td> <td>33.3% </td></tr></tbody></table> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-preset-disclaimer-50"><span class="mw-cite-backlink"><b><a href="#cite_ref-preset-disclaimer_50-0">^</a></b></span> <span class="reference-text"> The algorithm does not necessarily need to be implemented using these presets; it is possible for the implementer to define custom input and output resolutions.</span> </li> <li id="cite_note-scale-factor-51"><span class="mw-cite-backlink"><b><a href="#cite_ref-scale-factor_51-0">^</a></b></span> <span class="reference-text"> The linear scale factor used for upsampling the input resolution to the output resolution. For example, a scene rendered at 540p with a 2.00× scale factor would have an output resolution of 1080p.</span> </li> <li id="cite_note-render-scale-52"><span class="mw-cite-backlink"><b><a href="#cite_ref-render-scale_52-0">^</a></b></span> <span class="reference-text"> The linear render scale, compared to the output resolution, that the technology uses to render scenes internally before upsampling. For example, a 1080p scene with a 50% render scale would have an internal resolution of 540p.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="Issues">Issues</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=10" title="Edit section: Issues"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Drivers">Drivers</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=11" title="Edit section: Drivers"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Performance on Intel Arc GPUs has suffered from poor driver support, particularly at launch. An investigation by Gamers Nexus discovered 43 known driver issues with Arc GPUs, prompting a response and acknowledgement of the issues from Intel.<sup id="cite_ref-53" class="reference"><a href="#cite_note-53"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-54" class="reference"><a href="#cite_note-54"><span class="cite-bracket">[</span>35<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-55" class="reference"><a href="#cite_note-55"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup> Intel CEO <a href="/wiki/Pat_Gelsinger" title="Pat Gelsinger">Pat Gelsinger</a> also blamed driver problems as a reason for Arc's delayed launch.<sup id="cite_ref-56" class="reference"><a href="#cite_note-56"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup> A beta driver from October 2022 accidentally reduced the memory clock by 9% on the Arc A770 from 2187<span class="nowrap"> </span>MHz to 2000<span class="nowrap"> </span>MHz, resulting in a 17% reduction in memory bandwidth.<sup id="cite_ref-57" class="reference"><a href="#cite_note-57"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup> This particular issue was later fixed.<sup id="cite_ref-58" class="reference"><a href="#cite_note-58"><span class="cite-bracket">[</span>39<span class="cite-bracket">]</span></a></sup> Intel provides an open source driver for Linux.<sup id="cite_ref-59" class="reference"><a href="#cite_note-59"><span class="cite-bracket">[</span>40<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="DirectX_9_compatibility">DirectX 9 compatibility</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=12" title="Edit section: DirectX 9 compatibility"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>As of the Alchemist generation, Arc only includes direct hardware support for the <a href="/wiki/DirectX" title="DirectX">DirectX</a> 11 & 12 and <a href="/wiki/Vulkan" title="Vulkan">Vulkan</a> graphics APIs, with the older DirectX 9 & 10 and <a href="/wiki/OpenGL" title="OpenGL">OpenGL</a> APIs being supported via a real-time <a href="/wiki/Compatibility_layer" title="Compatibility layer">compatibility layer</a> built into Intel's <a href="/wiki/Device_driver" title="Device driver">graphics driver</a>.<sup id="cite_ref-60" class="reference"><a href="#cite_note-60"><span class="cite-bracket">[</span>41<span class="cite-bracket">]</span></a></sup> As a result, Alchemist GPUs perform noticeably worse than competing <a href="/wiki/Nvidia" title="Nvidia">Nvidia</a> and <a href="/wiki/AMD" title="AMD">AMD</a> GPUs in software that can only use these older APIs, including multiple DirectX 9-based <a href="/wiki/Esports" title="Esports">esports</a> games such as <i><a href="/wiki/Counter-Strike:_Global_Offensive" title="Counter-Strike: Global Offensive">Counter-Strike: Global Offensive</a></i>, <i><a href="/wiki/League_of_Legends" title="League of Legends">League of Legends</a></i> and <i><a href="/wiki/StarCraft_II:_Wings_of_Liberty" title="StarCraft II: Wings of Liberty">StarCraft II: Wings of Liberty</a></i>.<sup id="cite_ref-61" class="reference"><a href="#cite_note-61"><span class="cite-bracket">[</span>42<span class="cite-bracket">]</span></a></sup> There is also a performance gap between DirectX 11 and DirectX 12. </p><p>A December 2022 driver update improved Arc compatibility and performance with DirectX 9-based games.<sup id="cite_ref-62" class="reference"><a href="#cite_note-62"><span class="cite-bracket">[</span>43<span class="cite-bracket">]</span></a></sup> According to Intel, the driver update made Arc GPUs up to 1.8x faster in DirectX 9 games.<sup id="cite_ref-63" class="reference"><a href="#cite_note-63"><span class="cite-bracket">[</span>44<span class="cite-bracket">]</span></a></sup> A February 2023 driver update further improved Arc's performance on DirectX 9-based games.<sup id="cite_ref-64" class="reference"><a href="#cite_note-64"><span class="cite-bracket">[</span>45<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Legacy_BIOS_compatibility">Legacy BIOS compatibility</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=13" title="Edit section: Legacy BIOS compatibility"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Intel Arc requires a <a href="/wiki/UEFI" title="UEFI">UEFI</a> BIOS with resizable BAR support for optimal performance.<sup id="cite_ref-65" class="reference"><a href="#cite_note-65"><span class="cite-bracket">[</span>46<span class="cite-bracket">]</span></a></sup> UEFI Class 1 and Class 2 BIOS are not supported by Intel Arc. </p> <div class="mw-heading mw-heading2"><h2 id="Footnotes">Footnotes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=14" title="Edit section: Footnotes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-OpenCL3.0-22"><span class="mw-cite-backlink"><b><a href="#cite_ref-OpenCL3.0_22-0">^</a></b></span> <span class="reference-text">In OpenCL 3.0, OpenCL 1.2 functionality has become a mandatory baseline, while all OpenCL 2.x and OpenCL 3.0 features were made optional.</span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=15" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-:0-1"><span class="mw-cite-backlink">^ <a href="#cite_ref-:0_1-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:0_1-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-:0_1-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFhachman2022" class="citation web cs1">hachman, Mark (March 14, 2022). <a rel="nofollow" class="external text" href="https://www.pcworld.com/article/623068/intel-will-launch-its-arc-gpus-on-march-30.html">"Intel will launch its Arc GPUs on March 30"</a>. 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Retrieved <span class="nowrap">July 4,</span> 2024</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Intel&rft.atitle=Intel%26reg%3B+Arc%26trade%3B+A-Series+Graphics+%26ndash%3B+Desktop+Quick+Start...&rft_id=https%3A%2F%2Fwww.intel.com%2Fcontent%2Fwww%2Fus%2Fen%2Fsupport%2Farticles%2F000091128%2Fgraphics.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntel+Arc" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Intel_Arc&action=edit&section=16" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/docs/arc-discrete-graphics/overview.html">Official website</a></li> <li><a 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style="width:1%">Mobile</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Adreno" title="Adreno">Adreno</a></li> <li><a href="/wiki/Apple_silicon" title="Apple silicon">Apple silicon</a></li> <li><a href="/wiki/Mali_(GPU)" class="mw-redirect" title="Mali (GPU)">Mali</a></li> <li><a href="/wiki/PowerVR" title="PowerVR">PowerVR</a></li> <li><a href="/wiki/VideoCore" title="VideoCore">VideoCore</a></li> <li><a href="/wiki/Vivante_Corporation" title="Vivante Corporation">Vivante</a></li> <li><a href="/wiki/Imageon" title="Imageon">Imageon</a></li> <li><a href="/wiki/Intel_2700G" title="Intel 2700G">Intel 2700G</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Architecture</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Compute_kernel" title="Compute kernel">Compute kernel</a></li> <li><a href="/wiki/Semiconductor_device_fabrication" title="Semiconductor device fabrication">Fabrication</a> <ul><li><a href="/wiki/CMOS" title="CMOS">CMOS</a></li> <li><a href="/wiki/FinFET" class="mw-redirect" title="FinFET">FinFET</a></li> <li><a href="/wiki/MOSFET" title="MOSFET">MOSFET</a></li></ul></li> <li><a href="/wiki/Graphics_pipeline" title="Graphics pipeline">Graphics pipeline</a> <ul><li><a href="/wiki/Geometry_pipelines" title="Geometry pipelines">Geometry</a></li> <li><a href="/wiki/Vertex_pipeline" title="Vertex pipeline">Vertex</a></li></ul></li> <li><a href="/wiki/High-dynamic-range_rendering" title="High-dynamic-range rendering">HDR rendering</a></li> <li><a href="/wiki/Multiply%E2%80%93accumulate_operation" title="Multiply–accumulate operation">MAC</a></li> <li><a href="/wiki/Rasterisation" title="Rasterisation">Rasterisation</a> <ul><li><a href="/wiki/Shading" title="Shading">Shading</a></li></ul></li> <li><a href="/wiki/Ray-tracing_hardware" title="Ray-tracing hardware">Ray-tracing</a></li> <li><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> <ul><li><a href="/wiki/Single_instruction,_multiple_threads" title="Single instruction, multiple threads">SIMT</a></li></ul></li> <li><a href="/wiki/Tessellation_(computer_graphics)" title="Tessellation (computer graphics)">Tessellation</a></li> <li><a href="/wiki/Transform,_clipping,_and_lighting" title="Transform, clipping, and lighting">T&L</a></li> <li><a href="/wiki/Tiled_rendering" title="Tiled rendering">Tiled rendering</a></li> <li><a href="/wiki/Unified_shader_model" title="Unified shader model">Unified shader model</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Blitter" title="Blitter">Blitter</a></li> <li><a href="/wiki/Geometry_processing" title="Geometry processing">Geometry processor</a></li> <li><a href="/wiki/Input%E2%80%93output_memory_management_unit" title="Input–output memory management unit">Input–output memory management unit</a></li> <li><a href="/wiki/Render_output_unit" title="Render output unit">Render output unit</a></li> <li><a href="/wiki/Shader" title="Shader">Shader unit</a></li> <li><a href="/wiki/Stream_processing" title="Stream processing">Stream processor</a></li> <li><a href="/wiki/Tensor" title="Tensor">Tensor unit</a></li> <li><a href="/wiki/Texture_mapping_unit" title="Texture mapping unit">Texture mapping unit</a></li> <li><a href="/wiki/Video_display_controller" title="Video display controller">Video display controller</a></li> <li><a href="/wiki/Video_processing_unit" class="mw-redirect" title="Video processing unit">Video processing unit</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Memory</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Direct_memory_access" title="Direct memory access">DMA</a></li> <li><a href="/wiki/Framebuffer" title="Framebuffer">Framebuffer</a></li> <li><a href="/wiki/SGRAM" class="mw-redirect" title="SGRAM">SGRAM</a> <ul><li><a href="/wiki/GDDR_SDRAM" title="GDDR SDRAM">GDDR</a></li> <li><a href="/wiki/GDDR2" class="mw-redirect" title="GDDR2">GDDR2</a></li> <li><a href="/wiki/GDDR3" class="mw-redirect" title="GDDR3">GDDR3</a></li> <li><a href="/wiki/GDDR4" class="mw-redirect" title="GDDR4">GDDR4</a></li> <li><a href="/wiki/GDDR5" class="mw-redirect" title="GDDR5">GDDR5</a></li> <li><a href="/wiki/GDDR6" class="mw-redirect" title="GDDR6">GDDR6</a></li> <li><a href="/wiki/GDDR7" class="mw-redirect" title="GDDR7">GDDR7</a></li></ul></li> <li><a href="/wiki/High_Bandwidth_Memory" title="High Bandwidth Memory">HBM</a> <ul><li><a href="/wiki/HBM2" class="mw-redirect" title="HBM2">HBM2</a></li> <li><a href="/wiki/HBM2E" class="mw-redirect" title="HBM2E">HBM2E</a></li> <li><a href="/wiki/HBM3" class="mw-redirect" title="HBM3">HBM3</a></li> <li><a href="/wiki/HBM-PIM" class="mw-redirect" title="HBM-PIM">HBM-PIM</a></li> <li><a href="/wiki/HBM3E" class="mw-redirect" title="HBM3E">HBM3E</a></li></ul></li> <li><a href="/wiki/Memory_bandwidth" title="Memory bandwidth">Memory bandwidth</a></li> <li><a href="/wiki/Memory_controller" title="Memory controller">Memory controller</a></li> <li><a href="/wiki/Shared_graphics_memory" title="Shared graphics memory">Shared graphics memory</a></li> <li><a href="/wiki/Texture_memory" title="Texture memory">Texture memory</a></li> <li><a href="/wiki/Video_RAM_(dual-ported_DRAM)" class="mw-redirect" title="Video RAM (dual-ported DRAM)">VRAM</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Form factor</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Semiconductor_intellectual_property_core" title="Semiconductor intellectual property core">IP core</a></li> <li><a href="/wiki/Video_card" class="mw-redirect" title="Video card">Discrete graphics</a> <ul><li><a href="/wiki/GPU_cluster" title="GPU cluster">Clustering</a></li> <li><a href="/wiki/GPU_switching" title="GPU switching">Switching</a></li></ul></li> <li><a href="/wiki/External_GPU" class="mw-redirect" title="External GPU">External graphics</a></li> <li><a href="/wiki/Integrated_graphics" class="mw-redirect" title="Integrated graphics">Integrated graphics</a></li> <li><a href="/wiki/System_on_a_chip" title="System on a chip">System on a chip</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Performance</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Clock_rate" title="Clock rate">Clock rate</a></li> <li><a href="/wiki/Computer_display_standard" class="mw-redirect" title="Computer display standard">Display resolution</a></li> <li><a href="/wiki/Fillrate" title="Fillrate">Fillrate</a> <ul><li><a href="/wiki/Gigapixel_image" title="Gigapixel image">Pixel/s</a></li> <li><a href="/wiki/Texel_(graphics)" title="Texel (graphics)">Texel/s</a></li></ul></li> <li><a href="/wiki/FLOPS" class="mw-redirect" title="FLOPS">FLOP/s</a></li> <li><a href="/wiki/Frame_rate" title="Frame rate">Frame rate</a></li> <li><a href="/wiki/Performance_per_watt" title="Performance per watt">Performance per watt</a></li> <li><a href="/wiki/Transistor_count" title="Transistor count">Transistor count</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Misc</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/2D_computer_graphics" title="2D computer graphics">2D</a> <ul><li><a href="/wiki/Scrolling" title="Scrolling">Scrolling</a></li> <li><a href="/wiki/Sprite_(computer_graphics)" title="Sprite (computer graphics)">Sprite</a></li> <li><a href="/wiki/Tile-based_video_game" title="Tile-based video game">Tile</a></li></ul></li> <li><a href="/wiki/3D_computer_graphics" title="3D computer graphics">3D</a> <ul><li><a href="/wiki/Global_illumination" title="Global illumination">GI</a></li> <li><a href="/wiki/Texture_mapping" title="Texture mapping">Texture</a></li></ul></li> <li><a href="/wiki/Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li> <li><a href="/wiki/General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li> <li><a href="/wiki/Graphics_library" title="Graphics library">Graphics library</a></li> <li><a href="/wiki/Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li> <li><a href="/wiki/Digital_image_processing" title="Digital image processing">Image processing</a> <ul><li><a href="/wiki/Image_compression" title="Image compression">Compression</a></li></ul></li> <li><a href="/wiki/Parallel_computing" title="Parallel computing">Parallel computing</a></li> <li><a href="/wiki/Vector_processor" title="Vector processor">Vector processor</a></li> <li><a href="/wiki/Video_coding_format" title="Video coding format">Video coding</a> <ul><li><a href="/wiki/Video_codec" title="Video codec">Codec</a></li></ul></li> <li><a href="/wiki/Very_long_instruction_word" title="Very long instruction word">VLIW</a></li></ul> </div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"></div><div role="navigation" class="navbox" aria-labelledby="Intel65" style="padding:3px"><table class="nowraplinks hlist mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Intel" title="Template:Intel"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel" title="Template talk:Intel"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel" title="Special:EditPage/Template:Intel"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Intel65" style="font-size:114%;margin:0 4em"><a href="/wiki/Intel" title="Intel">Intel</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Subsidiaries</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><i><a href="/wiki/3Dlabs" title="3Dlabs">3Dlabs</a></i></li> <li><a href="/wiki/Altera" title="Altera">Altera</a></li> <li><i><a href="/wiki/Intel_Security" class="mw-redirect" title="Intel Security">Intel Security</a></i></li> <li><a href="/wiki/Mobileye" title="Mobileye">Mobileye</a></li> <li><a href="/wiki/Recon_Instruments" title="Recon Instruments">Recon Instruments</a></li> <li><a href="/wiki/Virtutech" title="Virtutech">Virtutech</a></li> <li><a href="/wiki/Wind_River_Systems" title="Wind River Systems">Wind River Systems</a></li> <li><a href="/wiki/Xircom" title="Xircom">Xircom</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Joint venture</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">4Group Holdings (50% owned by <a href="/wiki/Vantiva" title="Vantiva">Vantiva</a>)</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Products</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/3D_XPoint" title="3D XPoint">3D XPoint</a></li> <li><a href="/wiki/Accounts_%26_SSO" title="Accounts & SSO">Accounts & SSO</a></li> <li><a href="/wiki/Amplify_Tablet" title="Amplify Tablet">Amplify Tablet</a></li> <li><a href="/wiki/Advanced_Programmable_Interrupt_Controller" title="Advanced Programmable Interrupt Controller">Advanced Programmable Interrupt Controller</a></li> <li><a href="/wiki/Cache_Acceleration_Software" title="Cache Acceleration Software">Cache Acceleration Software</a></li> <li><a href="/wiki/Client_Initiated_Remote_Access" title="Client Initiated Remote Access">Client Initiated Remote Access</a></li> <li><a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface</a></li> <li><a href="/wiki/Flexible_Display_Interface" title="Flexible Display Interface">Flexible Display Interface</a></li> <li><a href="/wiki/Hella_Zippy" title="Hella Zippy">Hella Zippy</a></li> <li><a href="/wiki/Intel_1103" title="Intel 1103">Intel 1103</a></li> <li><a href="/wiki/Intel_AZ210" title="Intel AZ210">Intel AZ210</a></li> <li><a href="/wiki/Intel_Clear_Video" title="Intel Clear Video">Intel Clear Video</a></li> <li><a href="/wiki/Intel_Display_Power_Saving_Technology" title="Intel Display Power Saving Technology">Intel Display Power Saving Technology</a></li> <li><a href="/wiki/Intel_Modular_Server_System" title="Intel Modular Server System">Intel Modular Server System</a></li> <li><a href="/wiki/Intel_Quick_Sync_Video" title="Intel Quick Sync Video">Intel Quick Sync Video</a></li> <li><a href="/wiki/Intel_Reader" title="Intel Reader">Intel Reader</a></li> <li><a href="/wiki/Intel_system_development_kit" title="Intel system development kit">Intel system development kit</a></li> <li><a href="/wiki/Intel_Upgrade_Service" title="Intel Upgrade Service">Intel Upgrade Service</a></li> <li><a href="/wiki/Intel740" title="Intel740">Intel740</a></li> <li><a href="/wiki/InTru3D" title="InTru3D">InTru3D</a></li> <li><a href="/wiki/IXP1200" title="IXP1200">IXP1200</a></li> <li><a href="/wiki/OFono" title="OFono">OFono</a></li> <li><a href="/wiki/Omni-Path" title="Omni-Path">Omni-Path</a></li> <li><a href="/wiki/Performance_acceleration_technology" title="Performance acceleration technology">Performance acceleration technology</a></li> <li><a href="/wiki/Shooting_Star_(drone)" title="Shooting Star (drone)">Shooting Star</a></li> <li><a href="/wiki/List_of_Intel_SSDs" title="List of Intel SSDs">SSDs</a> (<a href="/wiki/X25-M" title="X25-M">X25-M</a>)</li> <li><a href="/wiki/Stable_Image_Platform_Program" title="Stable Image Platform Program">Stable Image Platform Program</a></li> <li><a href="/wiki/Virtual_8086_mode" title="Virtual 8086 mode">Virtual 8086 mode</a></li> <li><a href="/wiki/WiDi" title="WiDi">WiDi</a></li> <li><a href="/wiki/X86" title="X86">x86</a></li></ul> </div><table class="nowraplinks mw-collapsible autocollapse navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Intel_processors" title="Template:Intel processors"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel_processors" title="Template talk:Intel processors"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_processors" title="Special:EditPage/Template:Intel processors"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Intel_processors144" style="font-size:114%;margin:0 4em"><a href="/wiki/List_of_Intel_processors" title="List of Intel processors">Intel processors</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/List_of_Intel_processors" title="List of Intel processors">Processors</a> <ul><li><a href="/wiki/List_of_Intel_Atom_processors" title="List of Intel Atom processors">Atom</a></li> <li><a href="/wiki/List_of_Intel_Celeron_processors" title="List of Intel Celeron processors">Celeron</a></li> <li><a href="/wiki/List_of_Intel_Pentium_processors" title="List of Intel Pentium processors">Pentium</a> <ul><li><a href="/wiki/List_of_Intel_Pentium_Pro_processors" title="List of Intel Pentium Pro processors">Pro</a></li> <li><a href="/wiki/List_of_Intel_Pentium_II_processors" title="List of Intel Pentium II processors">II</a></li> <li><a href="/wiki/List_of_Intel_Pentium_III_processors" title="List of Intel Pentium III processors">III</a></li> <li><a href="/wiki/List_of_Intel_Pentium_4_processors" title="List of Intel Pentium 4 processors">4</a></li> <li><a href="/wiki/List_of_Intel_Pentium_D_processors" title="List of Intel Pentium D processors">D</a></li> <li><a href="/wiki/List_of_Intel_Pentium_M_processors" title="List of Intel Pentium M processors">M</a></li></ul></li> <li><a href="/wiki/List_of_Intel_Core_processors" title="List of Intel Core processors">Core</a> <ul><li><a href="/wiki/List_of_Intel_Core_2_processors" class="mw-redirect" title="List of Intel Core 2 processors">2</a></li> <li><a href="/wiki/List_of_Intel_Core_i3_processors" class="mw-redirect" title="List of Intel Core i3 processors">i3</a></li> <li><a href="/wiki/List_of_Intel_Core_i5_processors" class="mw-redirect" title="List of Intel Core i5 processors">i5</a></li> <li><a href="/wiki/List_of_Intel_Core_i7_processors" class="mw-redirect" title="List of Intel Core i7 processors">i7</a></li> <li><a href="/wiki/List_of_Intel_Core_i9_processors" class="mw-redirect" title="List of Intel Core i9 processors">i9</a></li> <li><a href="/wiki/List_of_Intel_Core_M_processors" class="mw-redirect" title="List of Intel Core M processors">M</a></li></ul></li> <li><a href="/wiki/List_of_Intel_Xeon_processors" title="List of Intel Xeon processors">Xeon</a></li> <li><a href="/wiki/Intel_Quark#List_of_Intel_Quark_processors" title="Intel Quark">Quark</a></li> <li><a href="/wiki/List_of_Intel_Itanium_processors" title="List of Intel Itanium processors">Itanium</a></li></ul></li> <li><a href="/wiki/List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_Intel_chipsets" title="List of Intel chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/P5_(microarchitecture)" class="mw-redirect" title="P5 (microarchitecture)">P5</a></li> <li><a href="/wiki/P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a> <ul><li><a href="/wiki/Pentium_M" title="Pentium M">P6 variant (Pentium M)</a></li> <li><a href="/wiki/Yonah_(microprocessor)" title="Yonah (microprocessor)">P6 variant (Enhanced Pentium M)</a></li></ul></li> <li><a href="/wiki/NetBurst" title="NetBurst">NetBurst</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Core_(microarchitecture)" title="Intel Core (microarchitecture)">Core</a> <ul><li><a href="/wiki/Penryn_(microarchitecture)" title="Penryn (microarchitecture)">Penryn</a></li></ul></li> <li><a href="/wiki/Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a> <ul><li><a href="/wiki/Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a></li></ul></li> <li><a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a> <ul><li><a href="/wiki/Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a></li></ul></li> <li><a href="/wiki/Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a> <ul><li><a href="/wiki/Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a></li></ul></li> <li><a href="/wiki/Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a> <ul><li><a href="/wiki/Cannon_Lake_(microprocessor)" title="Cannon Lake (microprocessor)">Cannon Lake</a></li></ul></li> <li><a href="/wiki/Sunny_Cove_(microarchitecture)" title="Sunny Cove (microarchitecture)">Sunny Cove</a> <ul><li><a href="/wiki/Cypress_Cove_(microarchitecture)" class="mw-redirect" title="Cypress Cove (microarchitecture)">Cypress Cove</a></li></ul></li> <li><a href="/wiki/Willow_Cove" title="Willow Cove">Willow Cove</a></li> <li><a href="/wiki/Golden_Cove" title="Golden Cove">Golden Cove</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86" title="X86">x86</a> <a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">ULV</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell</a> <ul><li><a href="/wiki/Saltwell_(microarchitecture)" class="mw-redirect" title="Saltwell (microarchitecture)">Saltwell</a></li> <li><a href="/wiki/Silvermont" title="Silvermont">Silvermont</a></li></ul></li> <li><a href="/wiki/Goldmont" title="Goldmont">Goldmont</a> <ul><li><a href="/wiki/Goldmont_Plus" title="Goldmont Plus">Goldmont Plus</a></li></ul></li> <li><a href="/wiki/Tremont_(microarchitecture)" title="Tremont (microarchitecture)">Tremont</a> <ul><li><a href="/wiki/Gracemont_(microarchitecture)" title="Gracemont (microarchitecture)">Gracemont</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)40" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a> <ul><li><a href="/wiki/Intel_Core#10th_generation" title="Intel Core">10th gen</a></li> <li><a href="/wiki/Intel_Core#11th_generation" title="Intel Core">11th gen</a></li> <li><a href="/wiki/Intel_Core#12th_generation" title="Intel Core">12th gen</a></li> <li><a href="/wiki/Intel_Core#13th_generation" title="Intel Core">13th gen</a></li> <li><a href="/wiki/Intel_Core#14th_generation" title="Intel Core">14th gen</a></li></ul></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Binary-coded_decimal" title="Binary-coded decimal">BCD</a> oriented (<a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_4004" title="Intel 4004">4004</a> (1971)</li> <li><a href="/wiki/Intel_4040" title="Intel 4040">4040</a> (1974)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">pre-x86 (<a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_8008" title="Intel 8008">8008</a> (1972)</li> <li><a href="/wiki/Intel_8080" title="Intel 8080">8080</a> (1974)</li> <li><a href="/wiki/Intel_8085" title="Intel 8085">8085</a> (1977)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Early <a href="/wiki/X86" title="X86">x86</a> (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_8086" title="Intel 8086">8086</a> (1978)</li> <li><a href="/wiki/Intel_8088" title="Intel 8088">8088</a> (1979)</li> <li><a href="/wiki/Intel_80186" title="Intel 80186">80186</a> (1982)</li> <li><a href="/wiki/Intel_80188" class="mw-redirect" title="Intel 80188">80188</a> (1982)</li> <li><a href="/wiki/Intel_80286" title="Intel 80286">80286</a> (1982)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X87" title="X87">x87</a> (external <a href="/wiki/Floating-point_unit" title="Floating-point unit">FPUs</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <dl><dt>8/16-bit databus</dt> <dd><a href="/wiki/Intel_8087" title="Intel 8087">8087</a> (1980)</dd> <dt>16-bit databus</dt> <dd><a href="/wiki/Intel_80C187" class="mw-redirect" title="Intel 80C187">80C187</a></dd> <dd><a href="/wiki/Intel_80287" class="mw-redirect" title="Intel 80287">80287</a></dd> <dd><a href="/wiki/Intel_80387SX" title="Intel 80387SX">80387SX</a></dd> <dt>32-bit databus</dt> <dd><a href="/wiki/Intel_80387" class="mw-redirect" title="Intel 80387">80387DX</a></dd> <dd><a href="/wiki/Intel_80487" class="mw-redirect" title="Intel 80487">80487</a></dd></dl> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/I386" title="I386">i386</a> <ul><li><a href="/wiki/Intel_80386SX" class="mw-redirect" title="Intel 80386SX">SX</a></li> <li><a href="/wiki/Intel_80376" title="Intel 80376">376</a></li> <li><a href="/wiki/Intel_80386EX" title="Intel 80386EX">EX</a></li></ul></li> <li><a href="/wiki/I486" title="I486">i486</a> <ul><li><a href="/wiki/I486SX" title="I486SX">SX</a></li> <li><a href="/wiki/Intel_DX2" title="Intel DX2">DX2</a></li> <li><a href="/wiki/Intel_DX4" title="Intel DX4">DX4</a></li> <li><a href="/wiki/I486SL" title="I486SL">SL</a></li> <li><a href="/wiki/RapidCAD" title="RapidCAD">RapidCAD</a></li> <li><a href="/wiki/I486_OverDrive" title="I486 OverDrive">OverDrive</a></li></ul></li> <li><a href="/wiki/Stealey" title="Stealey">A100/A110</a></li> <li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> <ul><li><a href="/wiki/List_of_Intel_Atom_processors#CE_SoCs" title="List of Intel Atom processors">CE</a></li> <li><a href="/wiki/Atom_(system_on_a_chip)" title="Atom (system on a chip)">SoC</a></li></ul></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a> (1998) <ul><li><a href="/wiki/Celeron#P6-based_Mobile_Celerons" title="Celeron">M</a></li> <li><a href="/wiki/Celeron#Prescott-256" title="Celeron">D</a> (2004)</li></ul></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a> <ul><li><a href="/wiki/Pentium_(original)" title="Pentium (original)">Original i586</a></li> <li><a href="/wiki/Pentium_OverDrive" title="Pentium OverDrive">OverDrive</a></li> <li><a href="/wiki/Pentium_Pro" title="Pentium Pro">Pro</a></li> <li><a href="/wiki/Pentium_II" title="Pentium II">II</a></li> <li><a href="/wiki/Pentium_III" title="Pentium III">III</a></li> <li><a href="/wiki/Pentium_4" title="Pentium 4">4</a></li> <li><a href="/wiki/Pentium_M" title="Pentium M">M</a></li> <li><a href="/wiki/Pentium_Dual-Core" title="Pentium Dual-Core">Dual-Core</a></li></ul></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a> <ul><li><a href="/wiki/List_of_Intel_P6-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel P6-based Xeon microprocessors">P6-based</a></li> <li><a href="/wiki/List_of_Intel_NetBurst-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel NetBurst-based Xeon microprocessors">NetBurst-based</a></li> <li><a href="/wiki/List_of_Intel_Core-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel Core-based Xeon microprocessors">Core-based</a></li></ul></li> <li><a href="/wiki/Intel_Quark" title="Intel Quark">Quark</a></li> <li><a href="/wiki/Tolapai" title="Tolapai">Tolapai</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> <ul><li><a href="/wiki/Atom_(system_on_chip)" class="mw-redirect" title="Atom (system on chip)">SoC</a></li> <li><a href="/wiki/List_of_Intel_Atom_processors#CE_SoCs" title="List of Intel Atom processors">CE</a></li></ul></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a> <ul><li><a href="/wiki/Celeron#Prescott-256" title="Celeron">D</a></li> <li><a href="/wiki/Celeron#Celeron_Dual-Core" title="Celeron">Dual-Core</a></li></ul></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a> <ul><li><a href="/wiki/Pentium_4#Prescott_2M_(Extreme_Edition)" title="Pentium 4">4</a></li> <li><a href="/wiki/Pentium_D" title="Pentium D">D</a></li> <li><a href="/wiki/Pentium_D#Smithfield_XE" title="Pentium D">Extreme Edition</a></li> <li><a href="/wiki/Pentium_Dual-Core" title="Pentium Dual-Core">Dual-Core</a></li></ul></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a> <ul><li><a href="/wiki/Intel_Core_2" title="Intel Core 2">2</a></li> <li><a href="/wiki/Intel_Core#1st_generation" title="Intel Core">1st gen</a></li> <li><a href="/wiki/Intel_Core#2nd_generation" title="Intel Core">2nd gen</a></li> <li><a href="/wiki/Intel_Core#3rd_generation" title="Intel Core">3rd gen</a></li> <li><a href="/wiki/Intel_Core#4th_generation" title="Intel Core">4th gen</a></li> <li><a href="/wiki/Intel_Core#5th_generation" title="Intel Core">5th gen</a></li> <li><a href="/wiki/Intel_Core#6th_generation" title="Intel Core">6th gen</a></li> <li><a href="/wiki/Intel_Core#7th_generation" title="Intel Core">7th gen</a></li> <li><a href="/wiki/Intel_Core#8th_generation" title="Intel Core">8th gen</a></li> <li><a href="/wiki/Intel_Core#9th_generation" title="Intel Core">9th gen</a></li> <li><a href="/wiki/Intel_Core#10th_generation" title="Intel Core">10th gen</a></li> <li><a href="/wiki/Intel_Core#11th_generation" title="Intel Core">11th gen</a></li> <li><a href="/wiki/List_of_Intel_Core_M_processors" class="mw-redirect" title="List of Intel Core M processors">M</a></li></ul></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a> <ul><li><a href="/wiki/List_of_Intel_Xeon_processors_(Nehalem-based)" title="List of Intel Xeon processors (Nehalem-based)">Nehalem-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Sandy_Bridge-based)" title="List of Intel Xeon processors (Sandy Bridge-based)">Sandy Bridge-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Ivy_Bridge-based)" title="List of Intel Xeon processors (Ivy Bridge-based)">Ivy Bridge-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Haswell-based)" title="List of Intel Xeon processors (Haswell-based)">Haswell-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Broadwell-based)" title="List of Intel Xeon processors (Broadwell-based)">Broadwell-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Skylake-based)" title="List of Intel Xeon processors (Skylake-based)">Skylake-based</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <dl><dt><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></dt> <dd><a href="/wiki/Intel_iAPX_432" title="Intel iAPX 432">iAPX 432</a></dd> <dt><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></dt> <dd><a href="/wiki/Itanium" title="Itanium">Itanium</a></dd> <dt><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></dt> <dd><a href="/wiki/Intel_i860" title="Intel i860">i860</a></dd> <dd><a href="/wiki/Intel_i960" title="Intel i960">i960</a></dd> <dd><a href="/wiki/StrongARM" title="StrongARM">StrongARM</a></dd> <dd><a href="/wiki/XScale" title="XScale">XScale</a></dd></dl> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li> <li><a href="/wiki/Process%E2%80%93architecture%E2%80%93optimization_model" title="Process–architecture–optimization model">Process–architecture–optimization model</a></li> <li><a href="/wiki/List_of_Intel_graphics_processing_units" title="List of Intel graphics processing units">Intel GPUs</a> <ul><li><a href="/wiki/Intel_GMA" title="Intel GMA">GMA</a></li> <li><a href="/wiki/Intel_Graphics_Technology" title="Intel Graphics Technology">Intel HD, UHD, and Iris Graphics</a></li> <li><a href="/wiki/Intel_Xe" title="Intel Xe">Xe</a></li> <li><a class="mw-selflink selflink">Arc</a></li></ul></li> <li><a href="/wiki/Platform_Controller_Hub" title="Platform Controller Hub">PCHs</a></li> <li><a href="/wiki/System_Controller_Hub" title="System Controller Hub">SCHs</a></li> <li><a href="/wiki/I/O_Controller_Hub" title="I/O Controller Hub">ICHs</a></li> <li><a href="/wiki/PCI_IDE_ISA_Xcelerator" class="mw-redirect" title="PCI IDE ISA Xcelerator">PIIXs</a></li> <li><a href="/wiki/Stratix" title="Stratix">Stratix</a></li> <li><a href="/wiki/List_of_Intel_codenames" title="List of Intel codenames">Codenames</a></li> <li><a href="/wiki/Larrabee_(microarchitecture)" title="Larrabee (microarchitecture)">Larrabee</a></li></ul> </div></td></tr></tbody></table><div> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Litigation</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Advanced_Micro_Devices,_Inc._v._Intel_Corp." title="Advanced Micro Devices, Inc. v. Intel Corp.">Advanced Micro Devices, Inc. v. Intel Corp.</a></li> <li><a href="/wiki/High-Tech_Employee_Antitrust_Litigation" title="High-Tech Employee Antitrust Litigation">High-Tech Employee Antitrust Litigation</a></li> <li><a href="/wiki/Intel_Corp._v._Advanced_Micro_Devices,_Inc." title="Intel Corp. v. Advanced Micro Devices, Inc.">Intel Corp. v. Advanced Micro Devices, Inc.</a></li> <li><a href="/wiki/Intel_Corp._v._Hamidi" title="Intel Corp. v. Hamidi">Intel Corp. v. Hamidi</a></li> <li><a href="/wiki/Intel_Corporation_Inc._v_CPM_United_Kingdom_Ltd" class="mw-redirect" title="Intel Corporation Inc. v CPM United Kingdom Ltd">Intel Corporation Inc. v CPM United Kingdom Ltd</a></li> <li><a href="/wiki/Silvaco_Data_Systems_v._Intel_Corp." title="Silvaco Data Systems v. Intel Corp.">Silvaco Data Systems v. Intel Corp.</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">People</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Founders</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Gordon_Moore" title="Gordon Moore">Gordon Moore</a></li> <li><a href="/wiki/Robert_Noyce" title="Robert Noyce">Robert Noyce</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">CEOs</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li>Robert Noyce</li> <li>Gordon Moore</li> <li><a href="/wiki/Andrew_Grove" title="Andrew Grove">Andrew Grove</a></li> <li><a href="/wiki/Craig_Barrett_(chief_executive)" title="Craig Barrett (chief executive)">Craig Barrett</a></li> <li><a href="/wiki/Paul_Otellini" title="Paul Otellini">Paul Otellini</a></li> <li><a href="/wiki/Brian_Krzanich" title="Brian Krzanich">Brian Krzanich</a></li> <li><a href="/wiki/Bob_Swan" title="Bob Swan">Bob Swan</a></li> <li><a href="/wiki/Pat_Gelsinger" title="Pat Gelsinger">Pat Gelsinger</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Foundation_Achievement_Award" title="Intel Foundation Achievement Award">Intel Foundation Achievement Award</a></li> <li><a href="/wiki/Mac_transition_to_Intel_processors" title="Mac transition to Intel processors">Mac transition to Intel processors</a></li> <li><a href="/wiki/Intel_Architecture_Labs" title="Intel Architecture Labs">Intel Architecture Labs</a></li> <li><a href="/wiki/ASCI_Red" title="ASCI Red">ASCI Red</a></li> <li><a href="/wiki/BiiN" title="BiiN">BiiN</a></li> <li><a href="/wiki/Classmate_PC" title="Classmate PC">Classmate PC</a></li> <li><a href="/wiki/Convera_Corporation" title="Convera Corporation">Convera Corporation</a></li> <li><a href="/wiki/Copy_Exactly!" title="Copy Exactly!">Copy Exactly!</a></li> <li><a href="/wiki/Intel_Developer_Forum" title="Intel Developer Forum">Intel Developer Forum</a></li> <li><a href="/wiki/Dynamic_video_memory_technology" title="Dynamic video memory technology">Dynamic video memory technology</a></li> <li><a href="/wiki/Intel_Extreme_Masters" title="Intel Extreme Masters">Intel Extreme Masters</a></li> <li><a href="/wiki/List_of_Intel_microprocessors" class="mw-redirect" title="List of Intel microprocessors">List of Intel microprocessors</a></li> <li><a href="/wiki/List_of_Intel_graphics_processing_units_(2013_or_earlier)" class="mw-redirect" title="List of Intel graphics processing units (2013 or earlier)">List of Intel graphics processing units (2013 or earlier)</a></li> <li><a href="/wiki/I/O_Acceleration_Technology" title="I/O Acceleration Technology">I/O Acceleration Technology</a></li> <li><a href="/wiki/IA-32_Execution_Layer" title="IA-32 Execution Layer">IA-32 Execution Layer</a></li> <li><a href="/wiki/IM_Flash_Technologies" title="IM Flash Technologies">IM Flash Technologies</a></li> <li><i><a href="/wiki/The_Innovators_(book)" title="The Innovators (book)">The Innovators</a></i></li> <li><a href="/wiki/Inside_Films" title="Inside Films">Inside Films</a> <ul><li><i><a href="/wiki/Inside_(2011_film)" title="Inside (2011 film)">Inside</a></i></li> <li><i><a href="/wiki/The_Beauty_Inside_(web_series)" title="The Beauty Inside (web series)">The Beauty Inside</a></i></li> <li><i><a href="/wiki/The_Power_Inside" title="The Power Inside">The Power Inside</a></i></li></ul></li> <li><a href="/wiki/Intel_ADX" title="Intel ADX">Intel ADX</a></li> <li><a href="/wiki/Intel_Capital" title="Intel Capital">Intel Capital</a></li> <li><a href="/wiki/Intel_Cluster_Ready" title="Intel Cluster Ready">Intel Cluster Ready</a></li> <li><a href="/wiki/Intel_Compute_Stick" title="Intel Compute Stick">Intel Compute Stick</a></li> <li><a href="/wiki/Intel_Ireland" title="Intel Ireland">Intel Ireland</a></li> <li><a href="/wiki/Intel_Mobile_Communications" title="Intel Mobile Communications">Intel Mobile Communications</a></li> <li><a href="/wiki/Intel_Outstanding_Researcher_Award" title="Intel Outstanding Researcher Award">Intel Outstanding Researcher Award</a></li> <li><a href="/wiki/Intel_SHA_extensions" title="Intel SHA extensions">Intel SHA extensions</a></li> <li><a href="/wiki/Intel_Teach" title="Intel Teach">Intel Teach</a></li> <li><a href="/wiki/List_of_semiconductor_fabrication_plants" title="List of semiconductor fabrication plants">List of semiconductor fabrication plants</a></li> <li><a href="/wiki/List_of_Intel_manufacturing_sites" title="List of Intel manufacturing sites">List of Intel manufacturing sites</a></li> <li><a href="/wiki/List_of_mergers_and_acquisitions_by_Intel" title="List of mergers and acquisitions by Intel">List of mergers and acquisitions by Intel</a></li> <li><a href="/wiki/Intel_Museum" title="Intel Museum">Intel Museum</a></li> <li><a href="/wiki/OnCue" class="mw-redirect" title="OnCue">OnCue</a></li> <li><a href="/wiki/Intel_PRO/Wireless" title="Intel PRO/Wireless">Intel PRO/Wireless</a></li> <li><a href="/wiki/Intel_International_Science_and_Engineering_Fair" class="mw-redirect" title="Intel International Science and Engineering Fair">Intel International Science and Engineering Fair</a></li> <li><a href="/wiki/Regeneron_Science_Talent_Search" title="Regeneron Science Talent Search">Regeneron Science Talent Search</a></li> <li><a href="/wiki/Simple_Firmware_Interface" title="Simple Firmware Interface">Simple Firmware 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