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searchaux" style="display:none">Final stage of semiconductor device fabrication</div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">This article is about the final stage in the manufacturing process of integrated circuits. For an article about the physical enclosure that surrounds integrated circuits, see <a href="/wiki/Semiconductor_package" title="Semiconductor package">Semiconductor package</a>.</div> <p class="mw-empty-elt"> </p> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:DIP_package_sideview.PNG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/64/DIP_package_sideview.PNG/220px-DIP_package_sideview.PNG" decoding="async" width="220" height="132" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/64/DIP_package_sideview.PNG/330px-DIP_package_sideview.PNG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/64/DIP_package_sideview.PNG/440px-DIP_package_sideview.PNG 2x" data-file-width="1000" data-file-height="600" /></a><figcaption>Cross section of a <a href="/wiki/Dual_in-line_package" title="Dual in-line package">dual in-line package</a>. This type of package houses a small <a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">semiconducting die</a>, with microscopic wires attaching the die to the <a href="/wiki/Lead_frame" title="Lead frame">lead frames</a>, allowing for electrical connections to be made to a <a href="/wiki/Printed_circuit_board" title="Printed circuit board">PCB</a>.</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:DIP_zagotovka.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/33/DIP_zagotovka.jpg/220px-DIP_zagotovka.jpg" decoding="async" width="220" height="113" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/33/DIP_zagotovka.jpg/330px-DIP_zagotovka.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/33/DIP_zagotovka.jpg/440px-DIP_zagotovka.jpg 2x" data-file-width="2191" data-file-height="1126" /></a><figcaption>Dual in-line (DIP) integrated circuit metal lead frame tape with contacts</figcaption></figure> <p><b>Integrated circuit packaging</b> is the final stage of <a href="/wiki/Fabrication_(semiconductor)" class="mw-redirect" title="Fabrication (semiconductor)">semiconductor device fabrication</a>, in which the <a href="/wiki/Die_(integrated_circuit)" title="Die (integrated circuit)">die</a> is encapsulated in a supporting case that prevents physical damage and corrosion. The case, known as a "<a href="/wiki/Semiconductor_package" title="Semiconductor package">package</a>", supports the electrical contacts which connect the device to a circuit board. </p><p>The packaging stage is followed by testing of the integrated circuit. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Design_considerations">Design considerations</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=1" title="Edit section: Design considerations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:TSSOP_RQFP_SO_SSOP_QFN.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/38/TSSOP_RQFP_SO_SSOP_QFN.jpg/220px-TSSOP_RQFP_SO_SSOP_QFN.jpg" decoding="async" width="220" height="165" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/38/TSSOP_RQFP_SO_SSOP_QFN.jpg/330px-TSSOP_RQFP_SO_SSOP_QFN.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/38/TSSOP_RQFP_SO_SSOP_QFN.jpg/440px-TSSOP_RQFP_SO_SSOP_QFN.jpg 2x" data-file-width="1800" data-file-height="1350" /></a><figcaption>Various IC packages (left to right): TSSOP-32, TQFP-100, SO-20, SO-14, SSOP-28, SSOP-16, SO-8, QFN-28</figcaption></figure> <div class="mw-heading mw-heading3"><h3 id="Electrical">Electrical</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=2" title="Edit section: Electrical"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The current-carrying traces that run out of the die, through the package, and into the <a href="/wiki/Printed_circuit_board" title="Printed circuit board">printed circuit board</a> (PCB) have very different electrical properties compared to on-chip signals. They require special design techniques and need much more electric power than signals confined to the chip itself. Therefore, it is important that the materials used as electrical contacts exhibit characteristics like low resistance, low capacitance and low inductance.<sup id="cite_ref-:02_1-0" class="reference"><a href="#cite_note-:02-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> Both the structure and materials must prioritize signal transmission properties, while minimizing any <a href="/wiki/Parasitic_element_(electrical_networks)" class="mw-redirect" title="Parasitic element (electrical networks)">parasitic elements</a> that could negatively affect the signal. </p><p>Controlling these characteristics is becoming increasingly important as the rest of technology begins to speed up. Packaging delays have the potential to make up almost half of a high-performance computer's delay, and this bottleneck on speed is expected to increase.<sup id="cite_ref-:02_1-1" class="reference"><a href="#cite_note-:02-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Mechanical_and_thermal">Mechanical and thermal</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=3" title="Edit section: Mechanical and thermal"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The <a href="/wiki/Integrated_circuit" title="Integrated circuit">integrated circuit</a> package must resist physical breakage, keep out moisture, and also provide effective heat dissipation from the chip. Moreover, for <a href="/wiki/RF" class="mw-redirect" title="RF">RF</a> applications, the package is commonly required to shield <a href="/wiki/Electromagnetic_interference" title="Electromagnetic interference">electromagnetic interference</a>, that may either degrade the circuit performance or adversely affect neighboring circuits. Finally, the package must permit interconnecting the chip to a <a href="/wiki/Printed_circuit_board" title="Printed circuit board">PCB</a>.<sup id="cite_ref-:02_1-2" class="reference"><a href="#cite_note-:02-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> The materials of the package are either plastic (<a href="/wiki/Thermosetting_polymer" title="Thermosetting polymer">thermoset</a> or <a href="/wiki/Thermoplastic" title="Thermoplastic">thermoplastic</a>), metal (commonly <a href="/wiki/Kovar" title="Kovar">Kovar</a>) or ceramic. A common <a href="/wiki/Plastic" title="Plastic">plastic</a> used for this is <a href="/wiki/Epoxy" title="Epoxy">epoxy</a>-<a href="/wiki/Cresol" title="Cresol">cresol</a>-<a href="/wiki/Novolak" title="Novolak">novolak</a> (ECN).<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> All three material types offer usable mechanical strength, moisture and heat resistance. Nevertheless, for higher-end devices, metallic and ceramic packages are commonly preferred due to their higher strength (which also supports higher pin-count designs), heat dissipation, <a href="/wiki/Hermetic_seal" title="Hermetic seal">hermetic performance</a>, or other reasons. Generally, ceramic packages are more expensive than similar plastic packages.<sup id="cite_ref-:1_3-0" class="reference"><a href="#cite_note-:1-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> </p><p>Some packages have <a href="/wiki/Fin_(extended_surface)" title="Fin (extended surface)">metallic fins</a> to enhance heat transfer, but these take up space. Larger packages also allow for more interconnecting pins.<sup id="cite_ref-:02_1-3" class="reference"><a href="#cite_note-:02-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Economic">Economic</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=4" title="Edit section: Economic"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Cost is a factor in selection of integrated circuit packaging. Typically, an inexpensive plastic package can dissipate heat up to 2W, which is sufficient for many simple applications, though a similar ceramic package can dissipate up to 50W in the same scenario.<sup id="cite_ref-:02_1-4" class="reference"><a href="#cite_note-:02-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> As the chips inside the package get smaller and faster, they also tend to get hotter. As the subsequent need for more effective heat dissipation increases, the cost of packaging rises along with it. Generally, the smaller and more complex the package needs to be, the more expensive it is to manufacture.<sup id="cite_ref-:1_3-1" class="reference"><a href="#cite_note-:1-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> Wire bonding can be used instead of techniques such as flip-chip to reduce costs.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="History">History</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=5" title="Edit section: History"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Laptop_Acrobat_Model_NBD_486C,_Type_DXh2_-_California_Micro_Devices_CMD_9324_on_motherboard-9749.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/9/98/Laptop_Acrobat_Model_NBD_486C%2C_Type_DXh2_-_California_Micro_Devices_CMD_9324_on_motherboard-9749.jpg/220px-Laptop_Acrobat_Model_NBD_486C%2C_Type_DXh2_-_California_Micro_Devices_CMD_9324_on_motherboard-9749.jpg" decoding="async" width="220" height="165" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/9/98/Laptop_Acrobat_Model_NBD_486C%2C_Type_DXh2_-_California_Micro_Devices_CMD_9324_on_motherboard-9749.jpg/330px-Laptop_Acrobat_Model_NBD_486C%2C_Type_DXh2_-_California_Micro_Devices_CMD_9324_on_motherboard-9749.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/9/98/Laptop_Acrobat_Model_NBD_486C%2C_Type_DXh2_-_California_Micro_Devices_CMD_9324_on_motherboard-9749.jpg/440px-Laptop_Acrobat_Model_NBD_486C%2C_Type_DXh2_-_California_Micro_Devices_CMD_9324_on_motherboard-9749.jpg 2x" data-file-width="2420" data-file-height="1815" /></a><figcaption>Small-outline integrated circuit. This package has 16 "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 inches.</figcaption></figure> <p>Early integrated circuits were packaged in <a href="/wiki/Flatpack_(electronics)" title="Flatpack (electronics)">ceramic flat packs</a>, which the military used for many years for their reliability and small size. The other type of packaging used in the 1970s, called the ICP (Integrated Circuit Package), was a ceramic package (sometimes round as the transistor package), with the leads on one side, co-axially with the package axis. </p><p> Commercial circuit packaging quickly moved to the <a href="/wiki/Dual_in-line_package" title="Dual in-line package">dual in-line package</a> (DIP), first in ceramic and later in plastic.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> In the 1980s <a href="/wiki/VLSI" class="mw-redirect" title="VLSI">VLSI</a> pin counts exceeded the practical limit for DIP packaging, leading to <a href="/wiki/Pin_grid_array" title="Pin grid array">pin grid array</a> (PGA) and <a href="/wiki/Leadless_chip_carrier" class="mw-redirect" title="Leadless chip carrier">leadless chip carrier</a> (LCC) packages.<sup id="cite_ref-:2_6-0" class="reference"><a href="#cite_note-:2-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> <a href="/wiki/Surface_mount" class="mw-redirect" title="Surface mount">Surface mount</a> packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gull-wing or J-lead, as exemplified by <a href="/wiki/Small-outline_integrated_circuit" class="mw-redirect" title="Small-outline integrated circuit">small-outline integrated circuit</a>—a carrier which occupies an area about 30–50% less than an equivalent <a href="/wiki/Dual_in-line_package" title="Dual in-line package">DIP</a>, with a typical thickness that is 70% less.<sup id="cite_ref-:2_6-1" class="reference"><a href="#cite_note-:2-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup></p><figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:RUS-IC.JPG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/7/7e/RUS-IC.JPG/220px-RUS-IC.JPG" decoding="async" width="220" height="168" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/7/7e/RUS-IC.JPG/330px-RUS-IC.JPG 1.5x, //upload.wikimedia.org/wikipedia/commons/7/7e/RUS-IC.JPG 2x" data-file-width="403" data-file-height="307" /></a><figcaption>Early USSR-made integrated circuit. The tiny block of semiconducting material (the "die"), is enclosed inside the round, metallic case (the "package").</figcaption></figure><p>The next big innovation was the <i>area array package</i>, which places the interconnection <a href="/wiki/Terminal_(electronics)" title="Terminal (electronics)">terminals</a> throughout the surface area of the package, providing a greater number of connections than previous package types where only the outer perimeter is used. The first area array package was a ceramic <a href="/wiki/Pin_grid_array" title="Pin grid array">pin grid array</a> package.<sup id="cite_ref-:02_1-5" class="reference"><a href="#cite_note-:02-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> Not long after, the plastic <a href="/wiki/Ball_grid_array" title="Ball grid array">ball grid array</a> (BGA), another type of area array package, became one of the most commonly used packaging techniques.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> </p><p>In the late 1990s, <a href="/wiki/PQFP" class="mw-redirect" title="PQFP">plastic quad flat pack</a> (PQFP) and <a href="/wiki/Thin_small-outline_package" class="mw-redirect" title="Thin small-outline package">thin small-outline packages</a> (TSOP) replaced PGA packages as the most common for high pin count devices,<sup id="cite_ref-:02_1-6" class="reference"><a href="#cite_note-:02-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> though PGA packages are still often used for <a href="/wiki/Microprocessor" title="Microprocessor">microprocessors</a>. However, industry leaders <a href="/wiki/Intel" title="Intel">Intel</a> and <a href="/wiki/AMD" title="AMD">AMD</a> transitioned in the 2000s from PGA packages to <a href="/wiki/Land_grid_array" title="Land grid array">land grid array</a> (LGA) packages.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> </p><p><a href="/wiki/Ball_grid_array" title="Ball grid array">Ball grid array</a> (BGA) packages have existed since the 1970s, but evolved into flip-chip ball grid array (FCBGA) packages in the 1990s. FCBGA packages allow for much higher pin count than any existing package types. In an FCBGA package, the die is mounted upside-down (flipped) and connects to the <a href="/wiki/Package_ball" class="mw-redirect" title="Package ball">package balls</a> via a substrate that is similar to a printed-circuit board rather than by wires. FCBGA packages allow an array of input-output signals (called Area-I/O) to be distributed over the entire die rather than being confined to the die periphery.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> Ceramic subtrates for BGA were replaced with organic substrates to reduce costs and use existing PCB manufacturing techniques to produce more packages at a time by using larger PCB panels during manufacturing.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> </p><p>Traces out of the die, through the package, and into the <a href="/wiki/Printed_circuit_board" title="Printed circuit board">printed circuit board</a> have very different electrical properties, compared to on-chip signals. They require special design techniques and need much more electric power than signals confined to the chip itself. </p><p>Recent developments consist of stacking multiple dies in single package called SiP, for <i><a href="/wiki/System_In_Package" class="mw-redirect" title="System In Package">System In Package</a></i>, or <a href="/wiki/Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">three-dimensional integrated circuit</a>. Combining multiple dies on a small substrate, often ceramic, is called an MCM, or <a href="/wiki/Multi-Chip_Module" class="mw-redirect" title="Multi-Chip Module">Multi-Chip Module</a>. The boundary between a big MCM and a small printed circuit board is sometimes blurry.<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Common_package_types">Common package types</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=6" title="Edit section: Common package types"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1237032888/mw-parser-output/.tmulti">.mw-parser-output .tmulti .multiimageinner{display:flex;flex-direction:column}.mw-parser-output .tmulti .trow{display:flex;flex-direction:row;clear:left;flex-wrap:wrap;width:100%;box-sizing:border-box}.mw-parser-output .tmulti .tsingle{margin:1px;float:left}.mw-parser-output .tmulti .theader{clear:both;font-weight:bold;text-align:center;align-self:center;background-color:transparent;width:100%}.mw-parser-output .tmulti .thumbcaption{background-color:transparent}.mw-parser-output .tmulti .text-align-left{text-align:left}.mw-parser-output .tmulti .text-align-right{text-align:right}.mw-parser-output .tmulti .text-align-center{text-align:center}@media all and (max-width:720px){.mw-parser-output .tmulti .thumbinner{width:100%!important;box-sizing:border-box;max-width:none!important;align-items:center}.mw-parser-output .tmulti .trow{justify-content:center}.mw-parser-output .tmulti .tsingle{float:none!important;max-width:100%!important;box-sizing:border-box;text-align:center}.mw-parser-output .tmulti .tsingle .thumbcaption{text-align:left}.mw-parser-output .tmulti .trow>.thumbcaption{text-align:center}}@media screen{html.skin-theme-clientpref-night .mw-parser-output .tmulti .multiimageinner img{background-color:white}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .tmulti .multiimageinner img{background-color:white}}</style><div class="thumb tmulti tright"><div class="thumbinner multiimageinner" style="width:408px;max-width:408px"><div class="trow"><div class="tsingle" style="width:202px;max-width:202px"><div class="thumbimage"><span typeof="mw:File"><a href="/wiki/File:Vectra-xa-scsicard-xray_hg.jpg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/Vectra-xa-scsicard-xray_hg.jpg/200px-Vectra-xa-scsicard-xray_hg.jpg" decoding="async" width="200" height="85" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/83/Vectra-xa-scsicard-xray_hg.jpg/300px-Vectra-xa-scsicard-xray_hg.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/83/Vectra-xa-scsicard-xray_hg.jpg/400px-Vectra-xa-scsicard-xray_hg.jpg 2x" data-file-width="2602" data-file-height="1112" /></a></span></div></div><div class="tsingle" style="width:202px;max-width:202px"><div class="thumbimage"><span typeof="mw:File"><a href="/wiki/File:Vectra-xa-scsicard_hg.jpg" class="mw-file-description"><img alt="" src="//upload.wikimedia.org/wikipedia/commons/thumb/b/b4/Vectra-xa-scsicard_hg.jpg/200px-Vectra-xa-scsicard_hg.jpg" decoding="async" width="200" height="84" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/b4/Vectra-xa-scsicard_hg.jpg/300px-Vectra-xa-scsicard_hg.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/b/b4/Vectra-xa-scsicard_hg.jpg/400px-Vectra-xa-scsicard_hg.jpg 2x" data-file-width="4431" data-file-height="1857" /></a></span></div></div></div><div class="trow" style="display:flex"><div class="thumbcaption">Left is <a href="/wiki/X-ray" title="X-ray">X-ray</a> of right <a href="/wiki/Printed_circuit_board" title="Printed circuit board">PCB</a>, showing metal lead frames inside IC packages</div></div></div></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236090951"><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="/wiki/List_of_electronic_component_packaging_types" title="List of electronic component packaging types">List of electronic component packaging types</a></div> <ul><li><a href="/wiki/Through-hole_technology" title="Through-hole technology">Through-hole technology</a></li> <li><a href="/wiki/Surface-mount_technology" title="Surface-mount technology">Surface-mount technology</a></li> <li><a href="/wiki/Chip_carrier" title="Chip carrier">Chip carrier</a></li> <li><a href="/wiki/Pin_grid_array" title="Pin grid array">Pin grid array</a></li> <li><a href="/wiki/Quad_Flat_Package" class="mw-redirect" title="Quad Flat Package">Flat package</a></li> <li><a href="/wiki/Small_Outline_Integrated_Circuit" class="mw-redirect" title="Small Outline Integrated Circuit">Small Outline Integrated Circuit</a></li> <li><a href="/wiki/Chip-scale_package" title="Chip-scale package">Chip-scale package</a></li> <li><a href="/wiki/Ball_grid_array" title="Ball grid array">Ball grid array</a></li> <li><a href="/wiki/List_of_electronic_component_packaging_types" title="List of electronic component packaging types">Transistor, diode, small pin count IC packages</a></li> <li><a href="/wiki/Multi-chip_module" title="Multi-chip module">Multi-chip packages</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Operations">Operations</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=7" title="Edit section: Operations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>For traditional ICs, after <a href="/wiki/Wafer_dicing" class="mw-redirect" title="Wafer dicing">wafer dicing</a>, the die is picked from the diced wafer using a vacuum tip or suction cup<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> and undergoes <i>die attachment</i> which is the step during which a die is mounted and fixed to the <a href="/wiki/Chip_carrier" title="Chip carrier">package</a> or support structure (header).<sup id="cite_ref-Turner762_14-0" class="reference"><a href="#cite_note-Turner762-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> In high-powered applications, the die is usually <a href="/wiki/Eutectic" class="mw-redirect" title="Eutectic">eutectic</a> bonded onto the package, using e.g. gold-tin or gold-silicon <a href="/wiki/Solder" title="Solder">solder</a> (for good <a href="/wiki/Heat_conduction" class="mw-redirect" title="Heat conduction">heat conduction</a>). For low-cost, low-powered applications, the die is often glued directly onto a substrate (such as a <a href="/wiki/Printed_wiring_board" class="mw-redirect" title="Printed wiring board">printed wiring board</a>) using an <a href="/wiki/Epoxy" title="Epoxy">epoxy</a> <a href="/wiki/Adhesive" title="Adhesive">adhesive</a>. Alternatively dies can be attached using solder. These techniques are usually used when the die will be wire bonded; dies with <a href="/wiki/Flip_chip" title="Flip chip">flip chip</a> technology do not use these attachment techniques.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> </p><p>IC bonding is also known as die bonding, die attach, and die mount.<sup id="cite_ref-Oricus_Semicon_Solutions_2021_z292_17-0" class="reference"><a href="#cite_note-Oricus_Semicon_Solutions_2021_z292-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> </p><p>The following operations are performed at the packaging stage, as broken down into bonding, encapsulation, and wafer bonding steps. Note that this list is not all-inclusive and not all of these operations are performed for every package, as the process is highly dependent on the <a href="/wiki/List_of_electronic_component_packaging_types" title="List of electronic component packaging types">package type</a>. </p> <ul><li><a href="/w/index.php?title=IC_bonding&action=edit&redlink=1" class="new" title="IC bonding (page does not exist)">IC bonding</a> <ul><li><a href="/wiki/Wire_bonding" title="Wire bonding">Wire bonding</a></li> <li><a href="/wiki/Thermosonic_Bonding" class="mw-redirect" title="Thermosonic Bonding">Thermosonic Bonding</a></li> <li><a href="/w/index.php?title=Down_bonding&action=edit&redlink=1" class="new" title="Down bonding (page does not exist)">Down bonding</a></li> <li><a href="/wiki/Tape_automated_bonding" class="mw-redirect" title="Tape automated bonding">Tape automated bonding</a></li> <li><a href="/wiki/Flip_chip" title="Flip chip">Flip chip</a></li> <li><a href="/wiki/Quilt_packaging" title="Quilt packaging">Quilt packaging</a></li> <li><a href="/w/index.php?title=Film_attaching&action=edit&redlink=1" class="new" title="Film attaching (page does not exist)">Film attaching</a></li> <li><a href="/w/index.php?title=Spacer_attaching&action=edit&redlink=1" class="new" title="Spacer attaching (page does not exist)">Spacer attaching</a></li> <li><a href="/w/index.php?title=Sintering_die_attach&action=edit&redlink=1" class="new" title="Sintering die attach (page does not exist)">Sintering die attach</a></li></ul></li> <li>IC encapsulation <ul><li><a href="/wiki/Curing_(chemistry)" title="Curing (chemistry)">Baking</a></li> <li><a href="/wiki/Plating" title="Plating">Plating</a></li> <li><a href="/wiki/Lasermarking" class="mw-redirect" title="Lasermarking">Lasermarking</a></li> <li><a href="/w/index.php?title=Trim_and_form&action=edit&redlink=1" class="new" title="Trim and form (page does not exist)">Trim and form</a></li></ul></li> <li><a href="/wiki/Wafer_bonding" title="Wafer bonding">Wafer bonding</a></li></ul> <p>Sintering die attach is a process that involves placing the semiconductor die onto the substrate and then subjecting it to high temperature and pressure in a controlled environment.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=8" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/Advanced_packaging_(semiconductors)" title="Advanced packaging (semiconductors)">Advanced packaging (semiconductors)</a></li> <li><a href="/wiki/List_of_electronic_component_packaging_types" title="List of electronic component packaging types">List of electronic component packaging types</a></li> <li><a href="/wiki/List_of_electronics_package_dimensions" class="mw-redirect" title="List of electronics package dimensions">List of electronics package dimensions</a></li> <li><a href="/wiki/Gold%E2%80%93aluminium_intermetallic" title="Gold–aluminium intermetallic">Gold–aluminium intermetallic</a> "purple plague"</li> <li><a href="/wiki/Co-fired_ceramic" title="Co-fired ceramic">Co-fired ceramic</a></li> <li><a href="/wiki/B-staging" title="B-staging">B-staging</a></li> <li><a href="/wiki/Potting_(electronics)" title="Potting (electronics)">Potting (electronics)</a></li> <li><a href="/wiki/Quilt_packaging" title="Quilt packaging">Quilt packaging</a></li> <li><a href="/wiki/Electronic_packaging" title="Electronic packaging">Electronic packaging</a></li> <li><a href="/wiki/Decapping" title="Decapping">Decapping</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Integrated_circuit_packaging&action=edit&section=9" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-:02-1"><span class="mw-cite-backlink">^ <a href="#cite_ref-:02_1-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:02_1-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-:02_1-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-:02_1-3"><sup><i><b>d</b></i></sup></a> <a href="#cite_ref-:02_1-4"><sup><i><b>e</b></i></sup></a> <a href="#cite_ref-:02_1-5"><sup><i><b>f</b></i></sup></a> <a href="#cite_ref-:02_1-6"><sup><i><b>g</b></i></sup></a></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFRabaey2007" class="citation book cs1">Rabaey, Jan (2007). <span class="id-lock-registration" title="Free registration required"><a rel="nofollow" class="external text" href="https://archive.org/details/agilesoftwaredev00robe"><i>Digital Integrated Circuits</i></a></span> (2nd ed.). Prentice Hall, Inc. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0130909961" title="Special:BookSources/978-0130909961"><bdi>978-0130909961</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Digital+Integrated+Circuits&rft.edition=2nd&rft.pub=Prentice+Hall%2C+Inc.&rft.date=2007&rft.isbn=978-0130909961&rft.aulast=Rabaey&rft.aufirst=Jan&rft_id=https%3A%2F%2Farchive.org%2Fdetails%2Fagilesoftwaredev00robe&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFArdebiliPecht2009" class="citation book cs1">Ardebili, Haleh; Pecht, Michael G. (2009). <a rel="nofollow" class="external text" href="https://www.researchgate.net/publication/285397294">"Plastic Encapsulant Materials"</a>. <i>Encapsulation Technologies for Electronic Applications</i>. pp. 47–127. <a href="/wiki/Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1016%2FB978-0-8155-1576-0.50006-1">10.1016/B978-0-8155-1576-0.50006-1</a>. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/9780815515760" title="Special:BookSources/9780815515760"><bdi>9780815515760</bdi></a>. <a href="/wiki/S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:138753417">138753417</a> – via <a href="/wiki/ResearchGate" title="ResearchGate">ResearchGate</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=bookitem&rft.atitle=Plastic+Encapsulant+Materials&rft.btitle=Encapsulation+Technologies+for+Electronic+Applications&rft.pages=47-127&rft.date=2009&rft_id=https%3A%2F%2Fapi.semanticscholar.org%2FCorpusID%3A138753417%23id-name%3DS2CID&rft_id=info%3Adoi%2F10.1016%2FB978-0-8155-1576-0.50006-1&rft.isbn=9780815515760&rft.aulast=Ardebili&rft.aufirst=Haleh&rft.au=Pecht%2C+Michael+G.&rft_id=https%3A%2F%2Fwww.researchgate.net%2Fpublication%2F285397294&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-:1-3"><span class="mw-cite-backlink">^ <a href="#cite_ref-:1_3-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:1_3-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFGreig2007" class="citation book cs1">Greig, William (2007). <i>Integrated Circuit Packaging, Assembly and Interconnections</i>. Springer Science & Business Media. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/9780387339139" title="Special:BookSources/9780387339139"><bdi>9780387339139</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Integrated+Circuit+Packaging%2C+Assembly+and+Interconnections&rft.pub=Springer+Science+%26+Business+Media&rft.date=2007&rft.isbn=9780387339139&rft.aulast=Greig&rft.aufirst=William&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://sst.semiconductor-digest.com/2005/07/wire-bond-vs-flip-chip-packaging/">"Wire Bond Vs. Flip Chip Packaging | Semiconductor Digest"</a>. 10 December 2016.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Wire+Bond+Vs.+Flip+Chip+Packaging+%26%23124%3B+Semiconductor+Digest&rft.date=2016-12-10&rft_id=https%3A%2F%2Fsst.semiconductor-digest.com%2F2005%2F07%2Fwire-bond-vs-flip-chip-packaging%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFDummer1978" class="citation book cs1">Dummer, G.W.A. (1978). <i>Electronic Inventions and Discoveries (2nd ed)</i>. Pergamon Press. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-08-022730-9" title="Special:BookSources/0-08-022730-9"><bdi>0-08-022730-9</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Electronic+Inventions+and+Discoveries+%282nd+ed%29.&rft.pub=Pergamon+Press&rft.date=1978&rft.isbn=0-08-022730-9&rft.aulast=Dummer&rft.aufirst=G.W.A.&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-:2-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-:2_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:2_6-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBaker2010" class="citation book cs1">Baker, R. Jacob (2010). <i>CMOS: Circuit Design, Layout, and Simulation, Third Edition</i>. Wiley-IEEE. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-470-88132-3" title="Special:BookSources/978-0-470-88132-3"><bdi>978-0-470-88132-3</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=CMOS%3A+Circuit+Design%2C+Layout%2C+and+Simulation%2C+Third+Edition&rft.pub=Wiley-IEEE&rft.date=2010&rft.isbn=978-0-470-88132-3&rft.aulast=Baker&rft.aufirst=R.+Jacob&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFKen_Gilleo2003" class="citation book cs1">Ken Gilleo (2003). <i>Area array packaging processes for BGA, Flip Chip, and CSP</i>. <a href="/wiki/McGraw-Hill_Professional" class="mw-redirect" title="McGraw-Hill Professional">McGraw-Hill Professional</a>. p. 251. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-07-142829-1" title="Special:BookSources/0-07-142829-1"><bdi>0-07-142829-1</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Area+array+packaging+processes+for+BGA%2C+Flip+Chip%2C+and+CSP&rft.pages=251&rft.pub=McGraw-Hill+Professional&rft.date=2003&rft.isbn=0-07-142829-1&rft.au=Ken+Gilleo&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.intel.com/content/dam/www/public/us/en/documents/guides/lga-socket-and-package-technology-training-guide.pdf">"Land Grid Array (LGA) Socket and Package Technology"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i><span class="reference-accessdate">. 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Archived from the original on January 30, 2009<span class="reference-accessdate">. Retrieved <span class="nowrap">2016-04-07</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Flipchips%3A+Tutorial+%231&rft.date=2009-01-30&rft.aulast=Riley&rft.aufirst=George&rft_id=http%3A%2F%2Fflipchips.com%2Ftutorial01.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span><span class="cs1-maint citation-comment"><code class="cs1-code">{{<a href="/wiki/Template:Cite_web" title="Template:Cite web">cite web</a>}}</code>: CS1 maint: unfit URL (<a href="/wiki/Category:CS1_maint:_unfit_URL" title="Category:CS1 maint: unfit URL">link</a>)</span></span> </li> <li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://books.google.com/books?id=tyJZ3eZQy7UC&dq=hdi+pcb+ajinomoto&pg=PA243"><i>Materials for Advanced Packaging</i></a>. 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Retrieved July 31, 2015</span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text">Die Attachment, Fluid Dispensing catalog from SPT small precision tools</span> </li> <li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.eetimes.com/die-bonding-techniques-and-methods/">"Die bonding techniques and methods"</a>. 9 July 2012.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Die+bonding+techniques+and+methods&rft.date=2012-07-09&rft_id=https%3A%2F%2Fwww.eetimes.com%2Fdie-bonding-techniques-and-methods%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-Turner762-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-Turner762_14-0">^</a></b></span> <span class="reference-text">L. W. Turner (ed), <i>Electronics Engineers Reference Book</i>, Newnes-Butterworth, 1976, <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/0-408-00168-2" title="Special:BookSources/0-408-00168-2">0-408-00168-2</a>, pages 11-34 through 11-37</span> </li> <li id="cite_note-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-15">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.eetimes.com/die-bonding-techniques-and-methods/">"Die bonding techniques and methods"</a>. 9 July 2012.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Die+bonding+techniques+and+methods&rft.date=2012-07-09&rft_id=https%3A%2F%2Fwww.eetimes.com%2Fdie-bonding-techniques-and-methods%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-16"><span class="mw-cite-backlink"><b><a href="#cite_ref-16">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLau1994" class="citation book cs1">Lau, John H. (30 June 1994). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=xpanL96_yBQC&q=die+attach+adhesive&pg=PA388"><i>Chip on Board: Technology for Multichip Modules</i></a>. Springer. <a href="/wiki/ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <a href="/wiki/Special:BookSources/978-0-442-01441-4" title="Special:BookSources/978-0-442-01441-4"><bdi>978-0-442-01441-4</bdi></a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Chip+on+Board%3A+Technology+for+Multichip+Modules&rft.pub=Springer&rft.date=1994-06-30&rft.isbn=978-0-442-01441-4&rft.aulast=Lau&rft.aufirst=John+H.&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DxpanL96_yBQC%26q%3Ddie%2Battach%2Badhesive%26pg%3DPA388&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-Oricus_Semicon_Solutions_2021_z292-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-Oricus_Semicon_Solutions_2021_z292_17-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://oricus-semicon.com/what-is-the-die-attach-process/">"What is the Die Attach process?"</a>. <i>Oricus Semicon Solutions</i>. 2021-11-01<span class="reference-accessdate">. Retrieved <span class="nowrap">2024-04-22</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Oricus+Semicon+Solutions&rft.atitle=What+is+the+Die+Attach+process%3F&rft.date=2021-11-01&rft_id=https%3A%2F%2Foricus-semicon.com%2Fwhat-is-the-die-attach-process%2F&rfr_id=info%3Asid%2Fen.wikipedia.org%3AIntegrated+circuit+packaging" class="Z3988"></span></span> </li> <li id="cite_note-18"><span class="mw-cite-backlink"><b><a href="#cite_ref-18">^</a></b></span> <span class="reference-text">Buttay, Cyril, et al. <a rel="nofollow" class="external text" href="https://hal.science/file/index/docid/672619/filename/article.pdf">"Die attach of power devices using silver sintering-bonding process optimization and characterization."</a> HiTEN 2011. 2011.</span> </li> </ol></div></div> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist 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.hlist td ol,.mw-parser-output .navbox .hlist td ul,.mw-parser-output .navbox td.hlist dl,.mw-parser-output .navbox td.hlist ol,.mw-parser-output .navbox td.hlist ul{padding:0.125em 0}.mw-parser-output .navbox .navbar{display:block;font-size:100%}.mw-parser-output .navbox-title .navbar{float:left;text-align:left;margin-right:0.5em}body.skin--responsive .mw-parser-output .navbox-image img{max-width:none!important}@media print{body.ns-0 .mw-parser-output .navbox{display:none!important}}</style></div><div role="navigation" class="navbox" aria-labelledby="Semiconductor_packages" style="wide;padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><style data-mw-deduplicate="TemplateStyles:r1239400231">.mw-parser-output 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abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Semiconductor_packages" title="Template:Semiconductor packages"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Semiconductor_packages" title="Template talk:Semiconductor packages"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Semiconductor_packages" title="Special:EditPage/Template:Semiconductor packages"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Semiconductor_packages" style="font-size:114%;margin:0 4em"><a href="/wiki/Semiconductor_package" title="Semiconductor package">Semiconductor packages</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;">Single <a href="/wiki/Diode" title="Diode">diode</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/w/index.php?title=DO-201&action=edit&redlink=1" class="new" title="DO-201 (page does not exist)">DO-201</a> (DO-27)</li> <li><a href="/wiki/DO-204" title="DO-204">DO-204</a> (DO-7 / DO-26 / DO-35 / DO-41)</li> <li><a href="/wiki/Metal_electrode_leadless_face" title="Metal electrode leadless face">DO-213</a> (MELF / SOD-80 / LL34)</li> <li><a href="/wiki/DO-214" title="DO-214">DO-214</a> (SMA / SMB / SMC)</li> <li><a href="/wiki/Small_Outline_Diode" title="Small Outline Diode">SOD</a> (SOD-123 / SOD-323 / SOD-523 / SOD-923)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;"><a href="/wiki/Semiconductor_device" title="Semiconductor device">3...5-pin</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Small-outline_transistor" title="Small-outline transistor">SOT / TSOT</a></li> <li><a href="/wiki/TO-3" title="TO-3">TO-3</a> (TH / Panel)</li> <li><a href="/wiki/TO-5" title="TO-5">TO-5</a> (TH)</li> <li><a href="/wiki/TO-8" title="TO-8">TO-8</a> (TH)</li> <li><a href="/wiki/TO-18" title="TO-18">TO-18</a> (TH)</li> <li><a href="/wiki/TO-39" class="mw-redirect" title="TO-39">TO-39</a> (TH)</li> <li><a href="/wiki/TO-66" title="TO-66">TO-66</a> (TH / Panel)</li> <li><a href="/wiki/TO-92" title="TO-92">TO-92</a> (TH)</li> <li><a href="/wiki/TO-126" title="TO-126">TO-126</a> (TH / Panel)</li> <li><a href="/w/index.php?title=TO-202&action=edit&redlink=1" class="new" title="TO-202 (page does not exist)">TO-202</a> (TH / Panel)</li> <li><a href="/wiki/TO-220" title="TO-220">TO-220</a> (TH / Panel)</li> <li><a href="/w/index.php?title=TO-247&action=edit&redlink=1" class="new" title="TO-247 (page does not exist)">TO-247</a> (TH / Panel)</li> <li><a href="/w/index.php?title=TO-251&action=edit&redlink=1" class="new" title="TO-251 (page does not exist)">TO-251</a> (IPAK) (SMT)</li> <li><a href="/wiki/TO-252" title="TO-252">TO-252</a> (DPAK) (SMT)</li> <li><a href="/w/index.php?title=TO-262&action=edit&redlink=1" class="new" title="TO-262 (page does not exist)">TO-262</a> (I2PAK) (SMT)</li> <li><a href="/wiki/TO-263" title="TO-263">TO-263</a> (D2PAK) (SMT)</li> <li><a href="/w/index.php?title=TO-268&action=edit&redlink=1" class="new" title="TO-268 (page does not exist)">TO-268</a> (D3PAK) (SMT)</li> <li><a href="/w/index.php?title=TO-273&action=edit&redlink=1" class="new" title="TO-273 (page does not exist)">TO-273</a> (Super-220) (SMT)</li> <li><a href="/w/index.php?title=TO-274&action=edit&redlink=1" class="new" title="TO-274 (page does not exist)">TO-274</a> (Super-247) (SMT)</li> <li><a href="/w/index.php?title=TO-277&action=edit&redlink=1" class="new" title="TO-277 (page does not exist)">TO-277</a> (SMPC, SM-7) (SMT)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;">Single row</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Single_in-line_package" class="mw-redirect" title="Single in-line package">SIP / SIL</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;">Dual row</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Quad_Flat_No-leads_package" class="mw-redirect" title="Quad Flat No-leads package">DFN</a></li> <li><a href="/wiki/Dual_in-line_package" title="Dual in-line package">DIP / DIL</a></li> <li><a href="/wiki/Flatpack_(electronics)" title="Flatpack (electronics)">Flat Pack</a></li> <li><a href="/wiki/Mini_Small_Outline_Package" title="Mini Small Outline Package">MSOP</a></li> <li><a href="/wiki/Small_Outline_Integrated_Circuit" class="mw-redirect" title="Small Outline Integrated Circuit">SO / SOIC</a></li> <li><a href="/wiki/Small_Outline_Integrated_Circuit#SOP" class="mw-redirect" title="Small Outline Integrated Circuit">SOP / SSOP</a></li> <li><a href="/wiki/Thin_small_outline_package" title="Thin small outline package">TSOP / HTSOP</a></li> <li><a href="/wiki/Thin_shrink_small_outline_package" title="Thin shrink small outline package">TSSOP / HTSSOP</a></li> <li><a href="/wiki/Zig-zag_in-line_package" title="Zig-zag in-line package">ZIP</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;">Quad row</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li>LCC</li> <li><a href="/wiki/Quad_in-line_package" title="Quad in-line package">QIP / QIL</a></li> <li><a href="/wiki/Plastic_leaded_chip_carrier" class="mw-redirect" title="Plastic leaded chip carrier">PLCC</a></li> <li><a href="/wiki/Quad_Flat_No-leads_package" class="mw-redirect" title="Quad Flat No-leads package">QFN</a></li> <li><a href="/wiki/Quad_Flat_Package" class="mw-redirect" title="Quad Flat Package">QFP</a></li> <li>QUIP / QUIL</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;">Grid array</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Ball_grid_array" title="Ball grid array">BGA</a></li> <li><a href="/wiki/Embedded_Wafer_Level_Ball_Grid_Array" class="mw-redirect" title="Embedded Wafer Level Ball Grid Array">eWLB</a></li> <li><a href="/wiki/Land_grid_array" title="Land grid array">LGA</a></li> <li><a href="/wiki/Pin_grid_array" title="Pin grid array">PGA</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;"><a href="/wiki/Wafer_(electronics)" title="Wafer (electronics)">Wafer</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li>COB</li> <li>COF</li> <li>COG</li> <li><a href="/wiki/Chip-scale_package" title="Chip-scale package">CSP</a></li> <li><a href="/wiki/Flip_chip" title="Flip chip">Flip Chip</a></li> <li><a href="/wiki/Package_on_package" class="mw-redirect" title="Package on package">PoP</a></li> <li><a href="/wiki/Quilt_packaging" title="Quilt packaging">QP</a></li> <li><a href="/wiki/Universal_Integrated_Circuit_Card" class="mw-redirect" title="Universal Integrated Circuit Card">UICC</a></li> <li><a href="/wiki/Wafer-level_packaging" title="Wafer-level packaging">WL-CSP / WLP</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:left;">Related topics</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Electronic_packaging" title="Electronic packaging">Electronic packaging</a></li> <li><a class="mw-selflink selflink">Integrated circuit packaging</a></li> <li><a href="/wiki/List_of_electronic_component_packaging_types" title="List of electronic component packaging types">List of electronic component packaging types</a></li> <li><a href="/wiki/Printed_circuit_board" title="Printed circuit board">Printed circuit board</a></li> <li><a href="/wiki/Surface-mount_technology" title="Surface-mount technology">Surface-mount technology</a></li> <li><a href="/wiki/Through-hole_technology" title="Through-hole technology">Through-hole technology</a></li></ul> </div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>It is relatively common to find packages that contain other components than their designated ones, such as diodes or <a href="/wiki/Voltage_regulator" title="Voltage regulator">voltage regulators</a> in transistor packages, etc.</div></td></tr></tbody></table></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=Integrated_circuit_packaging&oldid=1253438081">https://en.wikipedia.org/w/index.php?title=Integrated_circuit_packaging&oldid=1253438081</a>"</div></div> <div id="catlinks" class="catlinks" data-mw="interface"><div id="mw-normal-catlinks" class="mw-normal-catlinks"><a href="/wiki/Help:Category" title="Help:Category">Categories</a>: <ul><li><a href="/wiki/Category:Semiconductor_device_fabrication" title="Category:Semiconductor device fabrication">Semiconductor device fabrication</a></li><li><a href="/wiki/Category:Chip_carriers" title="Category:Chip carriers">Chip carriers</a></li><li><a href="/wiki/Category:Packaging_(microfabrication)" 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