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Besides a regular paper track, the conference will also hold a special industrial papers track and a fresh ideas workshop. Top rated ASYNC 2020 papers will be invited to a special issue on Self-Timed Computing in Royal Society Philosophical Transactions. REGULAR PAPERS: Authors are invited to submit papers on any aspect of asynchronous design, ranging from design, synthesis, and test, to asynchronous applications in system-level integration and emerging computing technologies. Topics of interest include: Mixed-timed circuits, GALS systems, networks-on-chips, multi-chip interconnects, and 3D integration; Elastic and latency-tolerant synchronous design; Asynchronous pipelines, architectures, CPUs, and memories; Asynchronous logic in ultra-low power and power-constrained systems, energy harvesting and mixed-signal/analog design; Asynchrony in emerging technologies, such as bio, nano, and quantum computing; CAD tools for asynchronous design, synthesis, analysis, and optimization; Formal methods for verification and performance/power analysis; Test, security, fault tolerance, and radiation-hard design; Asynchronous variability-tolerant, resilient design and design for manufacturing; Asynchronous design for neural networks and machine learning applications; Circuit designs, case studies, comparisons, and applications. Hardware implementations of asynchronous models and algorithms, asynchronous techniques in clocked designs, and elastic and latency-tolerant synchronous design Submissions must report original scientific work, in 6-8 pages IEEE double-column conference format, with author information concealed. Authors who feel that extra pages are absolutely required to obtain top quality of their article may contact the Program Chairs. Accepted papers will be published in the IEEE digital library IEEEXplore and symposium proceedings. INDUSTRIAL PAPERS: ASYNC 2020 will include a special industrial workshop with papers from industry on the state-of-the-art application of asynchronous designs to both existing and emerging technologies. We solicit 1- to 2-page submissions, using IEEE double-column conference format. These papers will go through a separate light-weight review process. Accepted papers will be published in the IEEE digital library IEEEXplore and symposium proceedings. The submission deadline will be Feb 14, 2020 . FRESH IDEAS AND EMERGING HOT TOPICS WORKSHOP: ASYNC 2020 will accommodate a special workshop to present “fresh ideas” in asynchronous design, that are not yet ready for publication as well as “emerging hot topics” to describe emerging areas of interest for asynchronous designs. We solicit 1-to-2-page submissions for the workshop, which will go through a separate light-weight review process. Accepted submissions will be handed out at the workshop. The submission deadline will be Feb 27, 2020.</pre><div class="alert alert-warning"> Last updated by <a href="/researcher/1">Dou Sun</a> in 2020-02-15</div> </div> </div>  <div class="portlet" id="yw2"> <div class="portlet-decoration"> <div class="portlet-title"><i class="icon icon-th"></i> Related Conferences</div> </div> <div class="portlet-content"> <div class="hidden-phone"> <div id="yw3" class="grid-view"> <table class="table table-hover table-striped table-bordered table-condensed"> <thead> <tr> <th id="yw3_c0">CCF</th><th id="yw3_c1">CORE</th><th id="yw3_c2">QUALIS</th><th id="yw3_c3">Short</th><th id="yw3_c4">Full Name</th><th id="yw3_c5">Submission</th><th id="yw3_c6">Notification</th><th id="yw3_c7">Conference</th></tr> </thead> <tbody> <tr class="odd"> <td></td><td></td><td><span class="badge badge-warning">b1</span></td><td>ICECS</td><td><a href="/conference/114">International Conference on Electronics, Circuits and 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