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class="vector-toc-numb">2</span> <span>History</span> </div> </a> <button aria-controls="toc-History-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle History subsection</span> </button> <ul id="toc-History-sublist" class="vector-toc-list"> <li id="toc-Later_use" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Later_use"> <div class="vector-toc-text"> <span class="vector-toc-numb">2.1</span> <span>Later use</span> </div> </a> <ul id="toc-Later_use-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Versions" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Versions"> <div class="vector-toc-text"> <span class="vector-toc-numb">3</span> <span>Versions</span> </div> </a> <button aria-controls="toc-Versions-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Versions subsection</span> </button> <ul id="toc-Versions-sublist" class="vector-toc-list"> <li id="toc-Official_extensions" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Official_extensions"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1</span> <span>Official extensions</span> </div> </a> <ul id="toc-Official_extensions-sublist" class="vector-toc-list"> <li id="toc-AGP_Pro" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#AGP_Pro"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.1</span> <span>AGP Pro</span> </div> </a> <ul id="toc-AGP_Pro-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-64-bit_AGP" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#64-bit_AGP"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1.2</span> <span>64-bit AGP</span> </div> </a> <ul id="toc-64-bit_AGP-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Unofficial_variations" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Unofficial_variations"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2</span> <span>Unofficial variations</span> </div> </a> <ul id="toc-Unofficial_variations-sublist" class="vector-toc-list"> <li id="toc-Internal_AGP_interface" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#Internal_AGP_interface"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2.1</span> <span>Internal AGP interface</span> </div> </a> <ul id="toc-Internal_AGP_interface-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-PCI-based_AGP_ports" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#PCI-based_AGP_ports"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2.2</span> <span>PCI-based AGP ports</span> </div> </a> <ul id="toc-PCI-based_AGP_ports-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-PCIe_based_AGP_ports" class="vector-toc-list-item vector-toc-level-3"> <a class="vector-toc-link" href="#PCIe_based_AGP_ports"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2.3</span> <span>PCIe based AGP ports</span> </div> </a> <ul id="toc-PCIe_based_AGP_ports-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </li> <li id="toc-Compatibility" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Compatibility"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Compatibility</span> </div> </a> <ul id="toc-Compatibility-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Power_consumption" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Power_consumption"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Power consumption</span> </div> </a> <ul id="toc-Power_consumption-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Protocol" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Protocol"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>Protocol</span> </div> </a> <button aria-controls="toc-Protocol-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Protocol subsection</span> </button> <ul id="toc-Protocol-sublist" class="vector-toc-list"> <li id="toc-AGP_command_codes" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#AGP_command_codes"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.1</span> <span>AGP command codes</span> </div> </a> <ul id="toc-AGP_command_codes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-In-band_AGP_requests_using_PIPE#" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#In-band_AGP_requests_using_PIPE#"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.2</span> <span>In-band AGP requests using PIPE#</span> </div> </a> <ul id="toc-In-band_AGP_requests_using_PIPE#-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Side-band_AGP_requests_using_SBA[7:0]" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Side-band_AGP_requests_using_SBA[7:0]"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.3</span> <span>Side-band AGP requests using SBA[7:0]</span> </div> </a> <ul id="toc-Side-band_AGP_requests_using_SBA[7:0]-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-AGP_responses" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#AGP_responses"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.4</span> <span>AGP responses</span> </div> </a> <ul id="toc-AGP_responses-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Connector_pinout" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Connector_pinout"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>Connector pinout</span> </div> </a> <ul id="toc-Connector_pinout-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Notes" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Notes"> <div class="vector-toc-text"> <span class="vector-toc-numb">9</span> <span>Notes</span> </div> </a> <ul id="toc-Notes-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">10</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">11</span> <span>External links</span> </div> </a> <ul id="toc-External_links-sublist" class="vector-toc-list"> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--icon-only " aria-hidden="true" ><span class="vector-icon mw-ui-icon-listBullet mw-ui-icon-wikimedia-listBullet"></span> <span class="vector-dropdown-label-text">Toggle the table of contents</span> </label> <div class="vector-dropdown-content"> <div id="vector-page-titlebar-toc-unpinned-container" class="vector-unpinned-container"> </div> </div> </div> </nav> <h1 id="firstHeading" class="firstHeading mw-first-heading"><span class="mw-page-title-main">Accelerated Graphics Port</span></h1> <div id="p-lang-btn" class="vector-dropdown mw-portlet mw-portlet-lang" > <input type="checkbox" id="p-lang-btn-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-p-lang-btn" class="vector-dropdown-checkbox mw-interlanguage-selector" aria-label="Go to an article in another language. Available in 43 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-43" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">43 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D9%85%D9%86%D9%81%D8%B0_%D8%A7%D9%84%D8%B1%D8%B3%D9%88%D9%85%D9%8A%D8%A7%D8%AA_%D8%A7%D9%84%D9%85%D8%B3%D8%B1%D8%B9" title="منفذ الرسوميات المسرع – Arabic" lang="ar" hreflang="ar" data-title="منفذ الرسوميات المسرع" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-bg mw-list-item"><a href="https://bg.wikipedia.org/wiki/AGP" title="AGP – Bulgarian" lang="bg" hreflang="bg" data-title="AGP" data-language-autonym="Български" data-language-local-name="Bulgarian" class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-bs mw-list-item"><a href="https://bs.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Bosnian" lang="bs" hreflang="bs" data-title="Accelerated Graphics Port" data-language-autonym="Bosanski" data-language-local-name="Bosnian" class="interlanguage-link-target"><span>Bosanski</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Catalan" lang="ca" hreflang="ca" data-title="Accelerated Graphics Port" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/AGP" title="AGP – Czech" lang="cs" hreflang="cs" data-title="AGP" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – German" lang="de" hreflang="de" data-title="Accelerated Graphics Port" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/Kiirendatud_graafikaport" title="Kiirendatud graafikaport – Estonian" lang="et" hreflang="et" data-title="Kiirendatud graafikaport" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-el mw-list-item"><a href="https://el.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Greek" lang="el" hreflang="el" data-title="Accelerated Graphics Port" data-language-autonym="Ελληνικά" data-language-local-name="Greek" class="interlanguage-link-target"><span>Ελληνικά</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Spanish" lang="es" hreflang="es" data-title="Accelerated Graphics Port" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-eo mw-list-item"><a href="https://eo.wikipedia.org/wiki/AGP" title="AGP – Esperanto" lang="eo" hreflang="eo" data-title="AGP" data-language-autonym="Esperanto" data-language-local-name="Esperanto" class="interlanguage-link-target"><span>Esperanto</span></a></li><li class="interlanguage-link interwiki-eu mw-list-item"><a href="https://eu.wikipedia.org/wiki/AGP" title="AGP – Basque" lang="eu" hreflang="eu" data-title="AGP" data-language-autonym="Euskara" data-language-local-name="Basque" class="interlanguage-link-target"><span>Euskara</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/%D8%A7%DB%8C%E2%80%8C%D8%AC%DB%8C%E2%80%8C%D9%BE%DB%8C" title="ای‌جی‌پی – Persian" lang="fa" hreflang="fa" data-title="ای‌جی‌پی" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Port_AGP" title="Port AGP – French" lang="fr" hreflang="fr" data-title="Port AGP" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-gl mw-list-item"><a href="https://gl.wikipedia.org/wiki/AGP" title="AGP – Galician" lang="gl" hreflang="gl" data-title="AGP" data-language-autonym="Galego" data-language-local-name="Galician" class="interlanguage-link-target"><span>Galego</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EA%B0%80%EC%86%8D_%EA%B7%B8%EB%9E%98%ED%94%BD_%ED%8F%AC%ED%8A%B8" title="가속 그래픽 포트 – Korean" lang="ko" hreflang="ko" data-title="가속 그래픽 포트" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-hr mw-list-item"><a href="https://hr.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Croatian" lang="hr" hreflang="hr" data-title="Accelerated Graphics Port" data-language-autonym="Hrvatski" data-language-local-name="Croatian" class="interlanguage-link-target"><span>Hrvatski</span></a></li><li class="interlanguage-link interwiki-id mw-list-item"><a href="https://id.wikipedia.org/wiki/Porta_grafik_terakselerasi" title="Porta grafik terakselerasi – Indonesian" lang="id" hreflang="id" data-title="Porta grafik terakselerasi" data-language-autonym="Bahasa Indonesia" data-language-local-name="Indonesian" class="interlanguage-link-target"><span>Bahasa Indonesia</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Italian" lang="it" hreflang="it" data-title="Accelerated Graphics Port" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-he mw-list-item"><a href="https://he.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Hebrew" lang="he" hreflang="he" data-title="Accelerated Graphics Port" data-language-autonym="עברית" data-language-local-name="Hebrew" class="interlanguage-link-target"><span>עברית</span></a></li><li class="interlanguage-link interwiki-jv mw-list-item"><a href="https://jv.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Javanese" lang="jv" hreflang="jv" data-title="Accelerated Graphics Port" data-language-autonym="Jawa" data-language-local-name="Javanese" class="interlanguage-link-target"><span>Jawa</span></a></li><li class="interlanguage-link interwiki-lv mw-list-item"><a href="https://lv.wikipedia.org/wiki/AGP" title="AGP – Latvian" lang="lv" hreflang="lv" data-title="AGP" data-language-autonym="Latviešu" data-language-local-name="Latvian" class="interlanguage-link-target"><span>Latviešu</span></a></li><li class="interlanguage-link interwiki-lt mw-list-item"><a href="https://lt.wikipedia.org/wiki/AGP_(jungtis)" title="AGP (jungtis) – Lithuanian" lang="lt" hreflang="lt" data-title="AGP (jungtis)" data-language-autonym="Lietuvių" data-language-local-name="Lithuanian" class="interlanguage-link-target"><span>Lietuvių</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/AGP" title="AGP – Hungarian" lang="hu" hreflang="hu" data-title="AGP" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Dutch" lang="nl" hreflang="nl" data-title="Accelerated Graphics Port" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Japanese" lang="ja" hreflang="ja" data-title="Accelerated Graphics Port" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/AGP" title="AGP – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="AGP" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-uz mw-list-item"><a href="https://uz.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Uzbek" lang="uz" hreflang="uz" data-title="Accelerated Graphics Port" data-language-autonym="Oʻzbekcha / ўзбекча" data-language-local-name="Uzbek" class="interlanguage-link-target"><span>Oʻzbekcha / ўзбекча</span></a></li><li class="interlanguage-link interwiki-pms mw-list-item"><a href="https://pms.wikipedia.org/wiki/AGP" title="AGP – Piedmontese" lang="pms" hreflang="pms" data-title="AGP" data-language-autonym="Piemontèis" data-language-local-name="Piedmontese" class="interlanguage-link-target"><span>Piemontèis</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Polish" lang="pl" hreflang="pl" data-title="Accelerated Graphics Port" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt badge-Q70893996 mw-list-item" title=""><a href="https://pt.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Portuguese" lang="pt" hreflang="pt" data-title="Accelerated Graphics Port" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ro mw-list-item"><a href="https://ro.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Romanian" lang="ro" hreflang="ro" data-title="Accelerated Graphics Port" data-language-autonym="Română" data-language-local-name="Romanian" class="interlanguage-link-target"><span>Română</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/AGP" title="AGP – Russian" lang="ru" hreflang="ru" data-title="AGP" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sq mw-list-item"><a href="https://sq.wikipedia.org/wiki/AGP" title="AGP – Albanian" lang="sq" hreflang="sq" data-title="AGP" data-language-autonym="Shqip" data-language-local-name="Albanian" class="interlanguage-link-target"><span>Shqip</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/Accelerated_Graphics_Port" title="Accelerated Graphics Port – Slovak" lang="sk" hreflang="sk" data-title="Accelerated Graphics Port" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-sl mw-list-item"><a href="https://sl.wikipedia.org/wiki/AGP" title="AGP – Slovenian" lang="sl" hreflang="sl" data-title="AGP" data-language-autonym="Slovenščina" data-language-local-name="Slovenian" class="interlanguage-link-target"><span>Slovenščina</span></a></li><li class="interlanguage-link interwiki-sr mw-list-item"><a href="https://sr.wikipedia.org/wiki/AGP" title="AGP – Serbian" lang="sr" hreflang="sr" data-title="AGP" data-language-autonym="Српски / srpski" data-language-local-name="Serbian" class="interlanguage-link-target"><span>Српски / srpski</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/AGP" title="AGP – Finnish" lang="fi" hreflang="fi" data-title="AGP" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Accelerated_graphics_port" title="Accelerated graphics port – Swedish" lang="sv" hreflang="sv" data-title="Accelerated graphics port" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-th mw-list-item"><a href="https://th.wikipedia.org/wiki/AGP" title="AGP – Thai" lang="th" hreflang="th" data-title="AGP" data-language-autonym="ไทย" data-language-local-name="Thai" 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Unsourced material may be challenged and removed.<br /><small><span class="plainlinks"><i>Find sources:</i> <a rel="nofollow" class="external text" href="https://www.google.com/search?as_eq=wikipedia&q=%22Accelerated+Graphics+Port%22">"Accelerated Graphics Port"</a> – <a rel="nofollow" class="external text" href="https://www.google.com/search?tbm=nws&q=%22Accelerated+Graphics+Port%22+-wikipedia&tbs=ar:1">news</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?&q=%22Accelerated+Graphics+Port%22&tbs=bkt:s&tbm=bks">newspapers</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?tbs=bks:1&q=%22Accelerated+Graphics+Port%22+-wikipedia">books</a> <b>·</b> <a rel="nofollow" class="external text" href="https://scholar.google.com/scholar?q=%22Accelerated+Graphics+Port%22">scholar</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.jstor.org/action/doBasicSearch?Query=%22Accelerated+Graphics+Port%22&acc=on&wc=on">JSTOR</a></span></small></span> <span class="date-container"><i>(<span class="date">December 2006</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title">AGP</caption><tbody><tr><td colspan="2" class="infobox-subheader">Accelerated Graphics Port <span class="mw-default-size" typeof="mw:File"><a href="/wiki/File:Accelerated_Graphics_Port_(logo).svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/4/4f/Accelerated_Graphics_Port_%28logo%29.svg/188px-Accelerated_Graphics_Port_%28logo%29.svg.png" decoding="async" width="188" height="98" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/4/4f/Accelerated_Graphics_Port_%28logo%29.svg/282px-Accelerated_Graphics_Port_%28logo%29.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/4/4f/Accelerated_Graphics_Port_%28logo%29.svg/376px-Accelerated_Graphics_Port_%28logo%29.svg.png 2x" data-file-width="188" data-file-height="98" /></a></span></td></tr><tr><td colspan="2" class="infobox-image"><span class="mw-default-size" typeof="mw:File/Frameless"><a href="/wiki/File:AGP,_PCI,_CNR_Sockets_in_PCChips_M925LR_Motherboard.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/0/06/AGP%2C_PCI%2C_CNR_Sockets_in_PCChips_M925LR_Motherboard.jpg/220px-AGP%2C_PCI%2C_CNR_Sockets_in_PCChips_M925LR_Motherboard.jpg" decoding="async" width="220" height="149" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/0/06/AGP%2C_PCI%2C_CNR_Sockets_in_PCChips_M925LR_Motherboard.jpg/330px-AGP%2C_PCI%2C_CNR_Sockets_in_PCChips_M925LR_Motherboard.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/0/06/AGP%2C_PCI%2C_CNR_Sockets_in_PCChips_M925LR_Motherboard.jpg/440px-AGP%2C_PCI%2C_CNR_Sockets_in_PCChips_M925LR_Motherboard.jpg 2x" data-file-width="3962" data-file-height="2677" /></a></span><div class="infobox-caption">Universal AGP slot (brown, top), 2 <a href="/wiki/Conventional_PCI" class="mw-redirect" title="Conventional PCI">PCI</a> 2.2 slots (white beige, middle), and <a href="/wiki/Communications_and_networking_riser" title="Communications and networking riser">CNR</a> slot (brown, bottom)</div></td></tr><tr><th scope="row" class="infobox-label">Year created</th><td class="infobox-data">1997<span class="noprint">; 27 years ago</span><span style="display:none"> (<span class="bday dtstart published updated">1997</span>)</span></td></tr><tr><th scope="row" class="infobox-label">Created by</th><td class="infobox-data"><a href="/wiki/Intel" title="Intel">Intel</a></td></tr><tr><th scope="row" class="infobox-label">Supersedes</th><td class="infobox-data"><a href="/wiki/Conventional_PCI" class="mw-redirect" title="Conventional PCI">PCI</a> for graphics</td></tr><tr><th scope="row" class="infobox-label">Superseded by</th><td class="infobox-data"><a href="/wiki/PCI_Express" title="PCI Express">PCI Express</a> (2004)</td></tr><tr><th scope="row" class="infobox-label">Width in bits</th><td class="infobox-data">32</td></tr><tr><th scope="row" class="infobox-label"><abbr title="Number">No.</abbr> of devices</th><td class="infobox-data">One device per slot</td></tr><tr><th scope="row" class="infobox-label">Speed</th><td class="infobox-data"><a href="/wiki/Half-duplex" class="mw-redirect" title="Half-duplex">Half-duplex</a><br />Up to 2133 <a href="/wiki/Megabyte" title="Megabyte">MB</a>/s</td></tr><tr><th scope="row" class="infobox-label">Style</th><td class="infobox-data"><a href="/wiki/Parallel_communication" title="Parallel communication">Parallel</a></td></tr></tbody></table> <p><b>Accelerated Graphics Port</b> (<b>AGP</b>) is a <a href="/wiki/Parallel_communication" title="Parallel communication">parallel</a> <a href="/wiki/Expansion_card" title="Expansion card">expansion card</a> standard, designed for attaching a <a href="/wiki/Video_card" class="mw-redirect" title="Video card">video card</a> to a <a href="/wiki/Computer" title="Computer">computer</a> system to assist in the acceleration of <a href="/wiki/3D_computer_graphics" title="3D computer graphics">3D computer graphics</a>. It was originally designed as a successor to <a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a>-type connections for video cards. Since 2004, AGP was progressively phased out in favor of <a href="/wiki/PCI_Express" title="PCI Express">PCI Express</a> (PCIe), which is <a href="/wiki/Serial_communication" title="Serial communication">serial</a>, as opposed to parallel; by mid-2008, PCI Express cards dominated the market and only a few AGP models were available,<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> with GPU manufacturers and add-in board partners eventually dropping support for the interface in favor of PCI Express. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Advantages_over_PCI"><span class="anchor" id="APERTURE"></span>Advantages over PCI</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=1" title="Edit section: Advantages over PCI"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>AGP is a superset of the PCI standard, designed to overcome PCI's limitations in serving the requirements of the era's high-performance graphics cards.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> </p><p>The primary advantage of AGP is that it doesn't share the PCI <a href="/wiki/Bus_(computing)" title="Bus (computing)">bus</a>, providing a dedicated, <a href="/wiki/Point-to-point_(telecommunications)" title="Point-to-point (telecommunications)">point-to-point</a> pathway between the expansion slot(s) and the motherboard chipset. The direct connection also allows higher clock speeds. </p><p>The second major change is the use of split <a href="/wiki/Peripheral_Component_Interconnect#PCI_bus_transactions" title="Peripheral Component Interconnect">transactions</a>, wherein the address and data phases are separated. The card may send many address phases, so the host can process them in order, avoiding any long delays caused by the bus being idle during read operations. </p><p>Third, PCI bus handshaking is simplified. Unlike PCI bus transactions, whose length is negotiated on a cycle-by-cycle basis using the FRAME# and STOP# signals, AGP transfers are always a multiple of 8 bytes long, with the total length included in the request. Further, rather than using the IRDY# and TRDY# signals for each word, data is transferred in blocks of 4 clock cycles (32 words at AGP 8× speed), and pauses are allowed only between blocks. </p><p>Finally, AGP allows (mandatory only in AGP 3.0) <i>sideband addressing</i>, meaning that the <a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">address</a> and data buses are separated, so the address phase does not use the main address/data (AD) lines at all. This is done by adding an extra 8-bit "SideBand Address" <a href="/wiki/Computer_bus" class="mw-redirect" title="Computer bus">bus</a>, over which the graphics controller can issue new AGP requests while other AGP data is flowing over the main 32 address/data (AD) lines. This results in improved overall AGP data throughput. </p><p>This great improvement in memory read performance makes it practical for an AGP card to read <a href="/wiki/Texture_mapping" title="Texture mapping">textures</a> directly from system RAM, while a PCI graphics card must copy it from system RAM to the card's <a href="/wiki/Video_memory" class="mw-redirect" title="Video memory">video memory</a>. System memory is made available using the <a href="/wiki/Graphics_address_remapping_table" title="Graphics address remapping table">graphics address remapping table</a> (GART), which apportions main memory as needed for texture storage.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> The maximum amount of system memory available to AGP is defined as the <i>AGP <a href="/wiki/Aperture_(computer_memory)" title="Aperture (computer memory)">aperture</a></i>. </p> <div class="mw-heading mw-heading2"><h2 id="History">History</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=2" title="Edit section: History"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:AGP-Video-Card.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/62/AGP-Video-Card.jpg/220px-AGP-Video-Card.jpg" decoding="async" width="220" height="148" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/62/AGP-Video-Card.jpg/330px-AGP-Video-Card.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/62/AGP-Video-Card.jpg/440px-AGP-Video-Card.jpg 2x" data-file-width="2847" data-file-height="1920" /></a><figcaption>An AGP card</figcaption></figure> <p>The AGP slot first appeared on <a href="/wiki/X86" title="X86">x86</a>-compatible system boards based on <a href="/wiki/Socket_7" title="Socket 7">Socket 7</a> Intel <a href="/wiki/P5_(microarchitecture)" class="mw-redirect" title="P5 (microarchitecture)">P5</a> <a href="/wiki/Pentium" title="Pentium">Pentium</a> and <a href="/wiki/Slot_1" title="Slot 1">Slot 1</a> <a href="/wiki/P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a> <a href="/wiki/Pentium_II" title="Pentium II">Pentium II</a> processors. Intel introduced AGP support with the i<a href="/wiki/440LX" class="mw-redirect" title="440LX">440LX</a> Slot 1 chipset on August 26, 1997, and a flood of products followed from all the major system board vendors.<sup id="cite_ref-Intel440LXdata_4-0" class="reference"><a href="#cite_note-Intel440LXdata-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </p><p>The first Socket 7 chipsets to support AGP were the <a href="/wiki/VIA_Technologies" title="VIA Technologies">VIA</a> <a href="/wiki/Apollo_VP3" title="Apollo VP3">Apollo VP3</a>, <a href="/wiki/Silicon_Integrated_Systems" title="Silicon Integrated Systems">SiS</a> 5591/5592, and the <a href="/wiki/Acer_Laboratories_Incorporated" class="mw-redirect" title="Acer Laboratories Incorporated">ALI</a> Aladdin V. Intel never released an AGP-equipped Socket 7 chipset. <a href="/wiki/First_International_Computer" title="First International Computer">FIC</a> demonstrated the first Socket 7 AGP system board in November 1997 as the <i>FIC PA-2012</i> based on the VIA Apollo VP3 chipset, followed very quickly by the <i>EPoX P55-VP3</i> also based on the VIA VP3 chipset which was first to market.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> </p><p>Early video chipsets featuring AGP support included the <a href="/wiki/Rendition_(company)" class="mw-redirect" title="Rendition (company)">Rendition</a> Vérité V2200, <a href="/wiki/3dfx" title="3dfx">3dfx</a> <a href="/wiki/3dfx#Voodoo_Banshee" title="3dfx">Voodoo Banshee</a>, <a href="/wiki/Nvidia" title="Nvidia">Nvidia</a> <a href="/wiki/RIVA_128" title="RIVA 128">RIVA 128</a>, <a href="/wiki/3Dlabs" title="3Dlabs">3Dlabs</a> PERMEDIA 2, <a href="/wiki/Intel740" title="Intel740">Intel i740</a>, <a href="/wiki/ATI_Rage" title="ATI Rage">ATI Rage series</a>, <a href="/wiki/Matrox" title="Matrox">Matrox</a> Millennium II, and <a href="/wiki/S3_ViRGE" title="S3 ViRGE">S3 ViRGE GX/2</a>. Some early AGP boards used graphics processors built around PCI and were simply bridged to AGP. This resulted in the cards benefiting little from the new bus, with the only improvement used being the 66 MHz bus clock, with its resulting doubled bandwidth over PCI, and bus exclusivity. Intel's i740 was explicitly designed to exploit the new AGP feature set; in fact it was designed to texture only from AGP memory, making PCI versions of the board difficult to implement (local board RAM had to emulate AGP memory.) </p><p>Microsoft first introduced AGP support into <i><a href="/wiki/Windows_95" title="Windows 95">Windows 95</a> OEM Service Release 2</i> (OSR2 version 1111 or 950B) via the <i>USB SUPPLEMENT to OSR2</i> patch.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> After applying the patch the Windows 95 system became <i>Windows 95 version 4.00.950 B</i>. The first Windows NT-based operating system to receive AGP support was <a href="/wiki/Windows_NT_4.0" title="Windows NT 4.0">Windows NT 4.0</a> with <a href="/wiki/Service_Pack" class="mw-redirect" title="Service Pack">Service Pack</a> 3, introduced in 1997. <a href="/wiki/Linux" title="Linux">Linux</a> support for AGP enhanced fast data transfers was first added in 1999 with the implementation of the AGPgart <a href="/wiki/Loadable_kernel_module" title="Loadable kernel module">kernel module</a>. </p> <div class="mw-heading mw-heading3"><h3 id="Later_use">Later use</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=3" title="Edit section: Later use"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>With the increasing adoption of PCIe, graphics cards manufacturers continued to produce AGP cards as the standard became obsolete. As GPUs began to be designed to connect to PCIe, an additional PCIe-to-AGP bridge-chip was required to create an AGP-compatible graphics card. The inclusion of a bridge, and the need for a separate AGP card design, incurred additional board costs. </p><p>The GeForce 6600 and ATI Radeon X800 XL, released during 2004–2005, were the first bridged cards.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> In 2009 AGP cards from Nvidia had a ceiling of the <a href="/wiki/GeForce_7_series" title="GeForce 7 series">GeForce 7 series</a>. In 2011 <a href="/wiki/DirectX" title="DirectX">DirectX</a> 10-capable AGP cards from AMD vendors (Club 3D, HIS, Sapphire, Jaton, Visiontek, Diamond, etc.) included the <a href="/wiki/Radeon_R600" class="mw-redirect" title="Radeon R600">Radeon HD 2400, 3450, 3650</a>, 3850, <a href="/wiki/Radeon_R700" class="mw-redirect" title="Radeon R700">4350, 4650, and 4670</a>. The HD 5000 AGP series mentioned in the AMD Catalyst software was never available. There were many problems with the AMD Catalyst 11.2 - 11.6 AGP hotfix drivers under Windows 7 with the HD 4000 series AGP video cards;<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> use of 10.12 or 11.1 AGP hotfix drivers is a possible workaround. Several of the vendors listed above make available past versions of the AGP drivers. </p><p>By 2010, no new motherboard chipsets supported AGP and few new motherboards had AGP slots, however some continued to be produced with older AGP-supporting chipsets. </p><p>In 2016, Windows 10 version 1607 dropped support for AGP.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Reliable_sources" title="Wikipedia:Reliable sources"><span title="The material near this tag may rely on an unreliable source. (November 2022)">unreliable source?</span></a></i>]</sup> Possible future removal of support for AGP from open-source Linux kernel drivers was considered in 2020.<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup><sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Manual_of_Style/Dates_and_numbers#Chronological_items" title="Wikipedia:Manual of Style/Dates and numbers"><span title="The date of the event predicted near this tag has passed. (January 2024)">needs update</span></a></i>]</sup> </p> <div class="mw-heading mw-heading2"><h2 id="Versions">Versions</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=4" title="Edit section: Versions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable floatright" style="text-align: left; margin-left: 1.5em;"> <caption>AGP and <a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a>: <a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> buses operating at 66 and 33 <a href="/wiki/Megahertz" class="mw-redirect" title="Megahertz">MHz</a> respectively </caption> <tbody><tr> <th>Specification</th> <th>Voltage</th> <th>Clock</th> <th>Speed</th> <th>Transfers/<br />clock</th> <th>Rate (MB/s) </th></tr> <tr> <td>PCI</td> <td>3.3/5 V</td> <td>33 MHz</td> <td><span style="visibility:hidden;color:transparent;">0</span>—</td> <td><span style="visibility:hidden;color:transparent;">000</span>1</td> <td><span style="visibility:hidden;color:transparent;">0</span>133 </td></tr> <tr> <td>PCI 2.1</td> <td>3.3/5 V</td> <td>33/66 MHz</td> <td><span style="visibility:hidden;color:transparent;">0</span>—</td> <td><span style="visibility:hidden;color:transparent;">000</span>1</td> <td><span style="visibility:hidden;color:transparent;">0</span>133/266 </td></tr> <tr> <td>AGP 1.0</td> <td>3.3 V</td> <td>66 MHz</td> <td><span style="visibility:hidden;color:transparent;">0</span>1×</td> <td><span style="visibility:hidden;color:transparent;">000</span>1</td> <td><span style="visibility:hidden;color:transparent;">0</span>266 </td></tr> <tr> <td>AGP 1.0</td> <td>3.3 V</td> <td>66 MHz</td> <td><span style="visibility:hidden;color:transparent;">0</span>2×</td> <td><span style="visibility:hidden;color:transparent;">000</span>2</td> <td><span style="visibility:hidden;color:transparent;">0</span>533 </td></tr> <tr> <td>AGP 2.0</td> <td>1.5 V</td> <td>66 MHz</td> <td><span style="visibility:hidden;color:transparent;">0</span>4×</td> <td><span style="visibility:hidden;color:transparent;">000</span>4</td> <td>1066 </td></tr> <tr> <td>AGP 3.0</td> <td>0.8 V</td> <td>66 MHz</td> <td><span style="visibility:hidden;color:transparent;">0</span>8×</td> <td><span style="visibility:hidden;color:transparent;">000</span>8</td> <td>2133 </td></tr> <tr> <td>AGP 3.5<sup>*</sup></td> <td>0.8 V</td> <td>66 MHz</td> <td><span style="visibility:hidden;color:transparent;">0</span>8×</td> <td><span style="visibility:hidden;color:transparent;">000</span>8</td> <td>2133<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> </td></tr></tbody></table> <p>Intel released "AGP specification 1.0" in 1997.<sup id="cite_ref-agp10_13-0" class="reference"><a href="#cite_note-agp10-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> It specified 3.3 V signals and 1× and 2× speeds.<sup id="cite_ref-Intel440LXdata_4-1" class="reference"><a href="#cite_note-Intel440LXdata-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> Specification 2.0 documented 1.5 V signaling, which could be used at 1×, 2× and the additional 4× speed<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-agp20_15-0" class="reference"><a href="#cite_note-agp20-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> and 3.0 added 0.8 V signaling, which could be operated at 4× and 8× speeds.<sup id="cite_ref-agp30_16-0" class="reference"><a href="#cite_note-agp30-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> (1× and 2× speeds are physically possible, but were not specified.) </p><p>Available versions are listed in the adjacent table. </p><p>AGP version 3.5 is only publicly mentioned by Microsoft under <i>Universal Accelerated Graphics Port (UAGP)</i>, which specifies mandatory supports of extra registers once marked optional under AGP 3.0. Upgraded registers include PCISTS, CAPPTR, NCAPID, AGPSTAT, AGPCMD, NISTAT, NICMD. New required registers include APBASELO, APBASEHI, AGPCTRL, APSIZE, NEPG, GARTLO, GARTHI. </p><p>There are various physical interfaces (connectors); see the <a href="#Compatibility">Compatibility</a> section. </p> <div class="mw-heading mw-heading3"><h3 id="Official_extensions">Official extensions</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=5" title="Edit section: Official extensions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:NVIDIA_GeForce4_Ti_4600_Mac.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/7/7c/NVIDIA_GeForce4_Ti_4600_Mac.jpg/220px-NVIDIA_GeForce4_Ti_4600_Mac.jpg" decoding="async" width="220" height="131" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/7/7c/NVIDIA_GeForce4_Ti_4600_Mac.jpg/330px-NVIDIA_GeForce4_Ti_4600_Mac.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/7/7c/NVIDIA_GeForce4_Ti_4600_Mac.jpg/440px-NVIDIA_GeForce4_Ti_4600_Mac.jpg 2x" data-file-width="2048" data-file-height="1216" /></a><figcaption>AGP graphics card (Apple <a href="/wiki/Macintosh" class="mw-redirect" title="Macintosh">Macintosh</a>)</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Quadro_ELSA_GLoria_II_Pro.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/82/Quadro_ELSA_GLoria_II_Pro.jpg/220px-Quadro_ELSA_GLoria_II_Pro.jpg" decoding="async" width="220" height="131" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/82/Quadro_ELSA_GLoria_II_Pro.jpg/330px-Quadro_ELSA_GLoria_II_Pro.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/82/Quadro_ELSA_GLoria_II_Pro.jpg/440px-Quadro_ELSA_GLoria_II_Pro.jpg 2x" data-file-width="2048" data-file-height="1216" /></a><figcaption>AGP Pro graphics card</figcaption></figure> <div class="mw-heading mw-heading4"><h4 id="AGP_Pro">AGP Pro</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=6" title="Edit section: AGP Pro"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>An official extension for cards that required more electrical power, with a longer slot with additional pins for that purpose. AGP Pro cards were usually workstation-class cards used to accelerate professional <a href="/wiki/Computer-aided_design" title="Computer-aided design">computer-aided design</a> applications employed in the fields of architecture, machining, engineering, simulations, and similar fields.<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading4"><h4 id="64-bit_AGP">64-bit AGP</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=7" title="Edit section: 64-bit AGP"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A <a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a> channel was once proposed as an optional standard for AGP 3.0 in draft documents,<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> but it was dropped in the final version of the standard. </p><p>The standard allows 64-bit transfer for AGP8× reads, writes, and fast writes; 32-bit transfer for PCI operations. </p> <div class="mw-heading mw-heading3"><h3 id="Unofficial_variations">Unofficial variations</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=8" title="Edit section: Unofficial variations"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>A number of non-standard variations of the AGP interface have been produced by manufacturers. </p> <div class="mw-heading mw-heading4"><h4 id="Internal_AGP_interface">Internal AGP interface</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=9" title="Edit section: Internal AGP interface"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <dl><dt>Ultra-AGP, Ultra-AGPII</dt> <dd>It is an internal AGP interface standard used by <a href="/wiki/Silicon_Integrated_Systems" title="Silicon Integrated Systems">SiS</a> for the north bridge controllers with integrated graphics. The original version supports same bandwidth as AGP 8×, while Ultra-AGPII has maximum 3.2 GB/s bandwidth.</dd></dl> <div class="mw-heading mw-heading4"><h4 id="PCI-based_AGP_ports">PCI-based AGP ports</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=10" title="Edit section: PCI-based AGP ports"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <dl><dt>AGP Express</dt> <dd>Not a true AGP interface, but allows an AGP card to be connected over the legacy <a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI bus</a> on a <a href="/wiki/PCI_Express" title="PCI Express">PCI Express</a> motherboard. It is a technology used on motherboards made by <a href="/wiki/Elitegroup_Computer_Systems" title="Elitegroup Computer Systems">ECS</a>, intended to allow an existing AGP card to be used in a new motherboard instead of requiring a PCIe card to be obtained (since the introduction of PCIe graphics cards few motherboards provide AGP slots). An "AGP Express" slot is basically a PCI slot (with twice the electrical power) with an AGP connector. It offers backward compatibility with AGP cards, but provides incomplete support<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> (some AGP cards do not work with AGP Express) and reduced performance—the card is forced to use the shared PCI bus at its lower bandwidth, rather than having exclusive use of the faster AGP.</dd> <dt>AGI</dt> <dd>The ASRock Graphics Interface (AGI) is a proprietary variant of the Accelerated Graphics Port (AGP) standard. Its purpose is to provide AGP-support for ASRock motherboards that use chipsets lacking native AGP support. However, it is not fully compatible with AGP, and several video card chipsets are known not to be supported.</dd> <dt>AGX</dt> <dd>The <a href="/wiki/EPoX" title="EPoX">EPoX</a> Advanced Graphics eXtended (AGX) is another proprietary AGP variant with the same advantages and disadvantages as AGI. User manuals recommend not using AGP 8× ATI cards with AGX slots.</dd> <dt>XGP</dt> <dd>The <a href="/wiki/Biostar" title="Biostar">Biostar</a> Xtreme Graphics Port is another AGP variant, also with the same advantages and disadvantages as AGI and AGX.</dd></dl> <div class="mw-heading mw-heading4"><h4 id="PCIe_based_AGP_ports">PCIe based AGP ports</h4><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=11" title="Edit section: PCIe based AGP ports"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <dl><dt>AGR</dt> <dd>The <a href="/wiki/Advanced_Graphics_Riser" title="Advanced Graphics Riser">Advanced Graphics Riser</a> is a variation of the AGP port used in some PCIe motherboards made by <a href="/wiki/Micro-Star_International" title="Micro-Star International">MSI</a> to offer limited backward compatibility with AGP. It is, effectively, a modified PCIe slot allowing for performance comparable to an AGP 4×/8× slot,<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> but does not support all AGP cards; the manufacturer published a list of some cards and chipsets that work with the modified slot.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup></dd></dl> <div class="mw-heading mw-heading2"><h2 id="Compatibility">Compatibility</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=12" title="Edit section: Compatibility"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:AGP_%26_AGP_Pro_Keying.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/8c/AGP_%26_AGP_Pro_Keying.svg/300px-AGP_%26_AGP_Pro_Keying.svg.png" decoding="async" width="300" height="424" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/8c/AGP_%26_AGP_Pro_Keying.svg/450px-AGP_%26_AGP_Pro_Keying.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/8c/AGP_%26_AGP_Pro_Keying.svg/600px-AGP_%26_AGP_Pro_Keying.svg.png 2x" data-file-width="744" data-file-height="1052" /></a><figcaption>Compatibility, AGP Keys on card (top), on slot (bottom)</figcaption></figure> <p>AGP cards are <a href="/wiki/Backward_compatibility" title="Backward compatibility">backward</a> and <a href="/wiki/Forward_compatibility" title="Forward compatibility">forward compatible</a> within limits. 1.5 V-only keyed cards will not go into 3.3 V slots and vice versa, though "Universal" cards exist which will fit into either type of slot. There are also unkeyed "Universal" slots that will accept either type of card. When an AGP Universal card is plugged-into an AGP Universal slot, only the 1.5 V portion of the card is used. Some cards, like Nvidia's <a href="/wiki/GeForce_6" class="mw-redirect" title="GeForce 6">GeForce 6</a> series (except the 6200) or ATI's <a href="/wiki/Radeon_X800" class="mw-redirect" title="Radeon X800">Radeon X800</a> series, only have keys for 1.5 V to prevent them from being installed in older mainboards without 1.5 V support. Some of the last modern cards with 3.3 V support were: </p> <ul><li>the Nvidia <a href="/wiki/GeForce_FX" class="mw-redirect" title="GeForce FX">GeForce FX</a> series (FX 5200, FX 5500, FX 5700, some FX 5800, FX 5900 and some FX 5950)</li> <li>certain GeForce 6 series and 7 series (few cards were made with 3.3v support except for 6200 where 3.3v support was common)</li> <li>some GeForce 6200/6600/6800 and GeForce 7300/7600/7800/7900/7950 cards (really uncommon compared to their AGP 1.5v only versions)</li> <li>the ATI <a href="/wiki/Radeon_R300" class="mw-redirect" title="Radeon R300">Radeon 9500/9700/9800 (R300/R350)</a> (but not 9600/9800 (R360/RV360)).</li></ul> <p>AGP Pro cards will not fit into standard slots, but standard AGP cards will work in a Pro slot. Motherboards equipped with a Universal AGP Pro slot will accept a 1.5 V or 3.3 V card in either the AGP Pro or standard AGP configuration, a Universal AGP card, or a Universal AGP Pro card. </p><p>Some cards incorrectly have dual notches, and some motherboards incorrectly have fully open slots, allowing a card to be plugged into a slot that does not support the correct signaling voltage, which may damage card or motherboard. Some incorrectly designed older 3.3 V cards have the 1.5 V key. </p><p>There are some proprietary systems incompatible with standard AGP; for example, <a href="/wiki/Apple_Computer" class="mw-redirect" title="Apple Computer">Apple</a> <a href="/wiki/Power_Macintosh" title="Power Macintosh">Power Macintosh</a> computers with the <a href="/wiki/Apple_Display_Connector" title="Apple Display Connector">Apple Display Connector</a> (ADC) have an extra connector which delivers power to the attached display. Some cards designed to work with a specific <a href="/wiki/CPU_design" class="mw-redirect" title="CPU design">CPU architecture</a> (e.g., PC, Apple) may not work with others due to <a href="/wiki/Firmware" title="Firmware">firmware</a> issues. </p><p>Mark Allen of Playtools.com made the following comments regarding Practical AGP Compatibility for AGP 3.0 and AGP 2.0:<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> </p> <style data-mw-deduplicate="TemplateStyles:r1244412712">.mw-parser-output .templatequote{overflow:hidden;margin:1em 0;padding:0 32px}.mw-parser-output .templatequotecite{line-height:1.5em;text-align:left;margin-top:0}@media(min-width:500px){.mw-parser-output .templatequotecite{padding-left:1.6em}}</style><blockquote class="templatequote"><p>... nobody makes AGP 3.0 cards, and nobody makes AGP 3.0 motherboards. At least not any manufacturers I can find. Every single video card I could find which claimed to be an AGP 3.0 card was actually a universal 1.5V AGP 3.0 card. And every motherboard which claimed to be an AGP 3.0 motherboard turned out to be a universal 1.5V AGP 3.0 motherboard. It makes sense, if you think about it, because if anyone actually shipped a consumer-oriented product which supported only 0.8 volts, they would end up with lots of confused customers and a support nightmare. In the consumer market, you'd have to be crazy to ship a 0.8 volt only product.</p></blockquote> <div class="mw-heading mw-heading2"><h2 id="Power_consumption">Power consumption</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=13" title="Edit section: Power consumption"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444"><table class="box-Expand_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span">This section <b>needs expansion</b>. You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=">adding to it</a>. <span class="date-container"><i>(<span class="date">October 2011</span>)</i></span></div></td></tr></tbody></table> <table class="wikitable floatright" style="text-align: center; margin-left: 1.5em;"> <caption>AGP power provisioning </caption> <tbody><tr> <th>Slot Type</th> <th>3.3 <a href="/wiki/Volt" title="Volt">V</a></th> <th>5 V</th> <th>12 V</th> <th>3.3 V Aux</th> <th>1.5 V</th> <th>3.3 V<sup id="cite_ref-conn-part_23-0" class="reference"><a href="#cite_note-conn-part-23"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th>12 V<sup id="cite_ref-conn-part_23-1" class="reference"><a href="#cite_note-conn-part-23"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup></th> <th>Total power </th></tr> <tr> <td>AGP</td> <td>6 <a href="/wiki/Ampere" title="Ampere">A</a></td> <td>2 A</td> <td>1 A</td> <td>0.375 mA</td> <td>2 A</td> <td>-</td> <td>-</td> <td>48.25 W<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup> </td></tr> <tr> <td>AGP Pro110</td> <td></td> <td></td> <td></td> <td></td> <td></td> <td>7.6 A</td> <td>9.2 A</td> <td>50 to 110 W </td></tr> <tr> <td>AGP Pro50</td> <td></td> <td></td> <td></td> <td></td> <td></td> <td>7.6 A</td> <td>4.17 A</td> <td>25 to 50 W </td></tr></tbody></table> <p>Actual power supplied by an AGP slot depends upon the card used. The maximum <a href="/wiki/Electric_current" title="Electric current">current</a> drawn from the various rails is given in the specifications for the various versions. For example, if maximum current is drawn from all supplies and all voltages are at their specified upper limits,<sup id="cite_ref-agp30_16-1" class="reference"><a href="#cite_note-agp30-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page / location: 95">: 95 </span></sup> an AGP 3.0 slot can supply up to 48.25 <a href="/wiki/Watt" title="Watt">watts</a>; this figure can be used to specify a power supply conservatively, but in practice a card is unlikely ever to draw more than 40 W from the slot, with many using less. AGP Pro provides additional power up to 110 W. Many AGP cards had additional power connectors to supply them with more power than the slot could provide. </p> <div style="clear:both;" class=""></div> <div class="mw-heading mw-heading2"><h2 id="Protocol">Protocol</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=14" title="Edit section: Protocol"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>An AGP bus is a superset of a 66 MHz <a href="/wiki/Conventional_PCI" class="mw-redirect" title="Conventional PCI">conventional PCI</a> bus and, immediately after reset, follows the same protocol. The card must act as a PCI target, and optionally may act as a PCI master. (AGP 2.0 added a "fast writes" extension which allows PCI writes from the motherboard to the card to transfer data at higher speed.) </p><p>After the card is initialized using PCI transactions, AGP transactions are permitted. For these, the card is always the AGP master and the motherboard is always the AGP target. The card queues multiple requests which correspond to the PCI address phase, and the motherboard schedules the corresponding data phases later. An important part of initialization is telling the card the maximum number of outstanding AGP requests which may be queued at a given time. </p><p>AGP requests are similar to PCI memory read and write requests, but use a different encoding on command lines C/BE[3:0] and are always 8-byte <a href="/wiki/Data_structure_alignment" title="Data structure alignment">aligned</a>; their starting address and length are always multiples of 8 bytes (64 bits). The three low-order bits of the address are used instead to communicate the length of the request. </p><p>Whenever the PCI GNT# signal is asserted, granting the bus to the card, three additional status bits ST[2:0] indicate the type of transfer to be performed next. If the bits are <code>0xx</code>, a previously queued AGP transaction's data is to be transferred; if the three bits are <code>111</code>, the card may begin a PCI transaction or (if sideband addressing is not in use) queue a request in-band using PIPE#. </p> <div class="mw-heading mw-heading3"><h3 id="AGP_command_codes">AGP command codes</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=15" title="Edit section: AGP command codes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Like PCI, each AGP transaction begins with an address phase, communicating an address and 4-bit command code. The possible commands are different from PCI, however: </p> <dl><dt>000p</dt> <dd>Read</dd> <dd>Read 8×(AD[2:0]+1) = 8, 16, 24, ..., 64 bytes. The least significant bit p is 0 for low-priority, 1 for high.</dd> <dt>001x</dt> <dd>(reserved):</dd> <dt>010p</dt> <dd>Write</dd> <dd>Write 8×(AD[2:0]+1) = 8–64 bytes.</dd> <dt>011x</dt> <dd>(reserved):</dd> <dt>100p</dt> <dd>Long read</dd> <dd>Read 32×(AD[2:0]+1) = 32, 64, 96, ..., 256 bytes. This is the same as a read request, but the length is multiplied by four.</dd> <dt>1010</dt> <dd>Flush</dd> <dd>Force previously written data to memory, for synchronization. This acts as a low-priority read, taking a queue slot and returning 8 bytes of random data to indicate completion. The address and length supplied with this command are ignored.</dd> <dt>1011</dt> <dd>(reserved):</dd> <dt>1100</dt> <dd>Fence</dd> <dd>This acts as a <a href="/wiki/Memory_fence" class="mw-redirect" title="Memory fence">memory fence</a>, requiring that all earlier AGP requests complete before any following requests. Ordinarily, for increased performance, AGP uses a very weak <a href="/wiki/Consistency_model" title="Consistency model">consistency model</a>, and allows a later write to pass an earlier read. (E.g. after sending "write 1, write 2, read, write 3, write 4" requests, all to the same address, the read may return any value from 2 to 4. Only returning 1 is forbidden, as writes must complete before following reads.) This operation does not require any queue slots.</dd> <dt>1101</dt> <dd>Dual address cycle</dd> <dd>When making a request to an address above 2<sup>32</sup>, this is used to indicate that a second address cycle will follow with additional address bits. This operates like a regular PCI dual address cycle; it is accompanied by the low-order 32 bits of the address (and the length), and the following cycle includes the high 32 address bits and the desired command. The two cycles make one request, and take only one slot in the request queue. This request code is not used with side-band addressing.</dd> <dt>111x</dt> <dd>(reserved):</dd></dl> <p>AGP 3.0 dropped high-priority requests and the long read commands, as they were little used. It also mandated side-band addressing, thus dropping the dual address cycle, leaving only four request types: low-priority read (0000), low-priority write (0100), flush (1010) and fence (1100). </p> <div class="mw-heading mw-heading3"><h3 id="In-band_AGP_requests_using_PIPE#"><span id="In-band_AGP_requests_using_PIPE.23"></span>In-band AGP requests using PIPE#</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=16" title="Edit section: In-band AGP requests using PIPE#"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>To queue a request in-band, the card must request the bus using the standard PCI REQ# signal, and receive GNT# plus bus status ST[2:0] equal to <code>111</code>. Then, instead of asserting FRAME# to begin a PCI transaction, the card asserts the PIPE# signal while driving the AGP command, address, and length on the C/BE[3:0], AD[31:3] and AD[2:0] lines, respectively. (If the address is 64 bits, a dual address cycle similar to PCI is used.) For every cycle that PIPE# is asserted, the card sends another request without waiting for acknowledgement from the motherboard, up to the configured maximum queue depth. The last cycle is marked by deasserting REQ#, and PIPE# is deasserted on the following idle cycle. </p> <div class="mw-heading mw-heading3"><h3 id="Side-band_AGP_requests_using_SBA[7:0]"><span id="Side-band_AGP_requests_using_SBA.5B7:0.5D"></span>Side-band AGP requests using SBA[7:0]</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=17" title="Edit section: Side-band AGP requests using SBA[7:0]"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>If side-band addressing is supported and configured, the PIPE# signal is not used. (And the signal is re-used for another purpose in the AGP 3.0 protocol, which requires side-band addressing.) Instead, requests are broken into 16-bit pieces which are sent as two bytes across the SBA bus. There is no need for the card to ask permission from the motherboard; a new request may be sent at any time as long as the number of outstanding requests is within the configured maximum queue depth. The possible values are: </p> <dl><dt><code>0aaa aaaa aaaa alll</code></dt> <dd>Queue a request with the given low-order address bits A[14:3] and length 8×(L[2:0]+1). The command and high-order bits are as previously specified. Any number of requests may be queued by sending only this pattern, as long as the command and higher address bits remain the same.</dd> <dt><code>10cc ccra aaaa aaaa</code></dt> <dd>Use command C[3:0] and address bits A[23:15] for future requests. (Bit R is reserved.) This does not queue a request, but sets values that will be used in all future queued requests.</dd> <dt><code>110r aaaa aaaa aaaa</code></dt> <dd>Use address bits A[35:24] for future requests.</dd> <dt><code>1110 aaaa aaaa aaaa</code></dt> <dd>Use address bits A[47:36] for future requests.</dd> <dt><code>1111 0xxx</code>, <code>1111 10xx</code>, <code>1111 110x</code></dt> <dd><i>Reserved, do not use.</i></dd> <dt><code>1111 1110</code></dt> <dd>Synchronization pattern used when starting the SBA bus after an idle period.<sup id="cite_ref-agp10_13-1" class="reference"><a href="#cite_note-agp10-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page: 68">: 68 </span></sup><sup id="cite_ref-agp20_15-1" class="reference"><a href="#cite_note-agp20-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page: 163">: 163 </span></sup></dd> <dt><code>1111 1111</code></dt> <dd><a href="/wiki/No_operation" class="mw-redirect" title="No operation">No operation</a>; no request. At AGP 1× speed, this may be sent as a single byte and a following 16-bit side-band request started one cycle later. At AGP 2× and higher speeds, all side-band requests, including this NOP, are 16 bits long.</dd></dl> <p>Sideband address bytes are sent at the same rate as data transfers, up to 8× the 66 MHz basic bus clock. Sideband addressing has the advantage that it mostly eliminates the need for turnaround cycles on the AD bus between transfers, in the usual case when read operations greatly outnumber writes. </p> <div class="mw-heading mw-heading3"><h3 id="AGP_responses">AGP responses</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=18" title="Edit section: AGP responses"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>While asserting GNT#, the motherboard may instead indicate via the ST bits that a data phase for a queued request will be performed next. There are four queues: two priorities (low- and high-priority) for each of reads and writes, and each is processed in order. Obviously, the motherboard will attempt to complete high-priority requests first, but there is no limit on the number of low-priority responses which may be delivered while the high-priority request is processed. </p><p>For each cycle when the GNT# is asserted and the status bits have the value <code>00p</code>, a read response of the indicated priority is scheduled to be returned. At the next available opportunity (typically the next clock cycle), the motherboard will assert TRDY# (target ready) and begin transferring the response to the oldest request in the indicated read queue. (Other PCI bus signals like FRAME#, DEVSEL# and IRDY# remain deasserted.) Up to four clock cycles worth of data (16 bytes at AGP 1× or 128 bytes at AGP 8×) are transferred without waiting for acknowledgement from the card. If the response is longer than that, both the card and motherboard must indicate their ability to continue on the third cycle by asserting IRDY# (initiator ready) and TRDY#, respectively. If either one does not, <a href="/wiki/Wait_state" title="Wait state">wait states</a> will be inserted until two cycles after they both do. (The value of IRDY# and TRDY# at other times is irrelevant and they are usually deasserted.) </p><p>The C/BE# byte enable lines may be ignored during read responses, but are held asserted (all bytes valid) by the motherboard. </p><p>The card may also assert the RBF# (read buffer full) signal to indicate that it is temporarily unable to receive more low-priority read responses. The motherboard will refrain from scheduling any more low-priority read responses. The card must still be able to receive the end of the current response, and the first four-cycle block of the following one if scheduled, plus any high-priority responses it has requested. </p><p>For each cycle when GNT# is asserted and the status bits have the value <code>01p</code>, write data is scheduled to be sent across the bus. At the next available opportunity (typically the next clock cycle), the card will assert IRDY# (initiator ready) and begin transferring the data portion of the oldest request in the indicated write queue. If the data is longer than four clock cycles, the motherboard will indicate its ability to continue by asserting TRDY# on the third cycle. Unlike reads, there is no provision for the card to delay the write; if it didn't have the data ready to send, it shouldn't have queued the request. </p><p>The C/BE# lines <i>are</i> used with write data, and may be used by the card to select which bytes should be written to memory. </p><p>The multiplier in AGP 2×, 4× and 8× indicates the number of data transfers across the bus during each 66 MHz clock cycle. Such transfers use <a href="/wiki/Source_synchronous" class="mw-redirect" title="Source synchronous">source synchronous</a> clocking with a "strobe" signal (AD_STB[0], AD_STB[1], and SB_STB) generated by the data source. AGP 4× adds complementary strobe signals. </p><p>Because AGP transactions may be as short as two transfers, at AGP 4× and 8× speeds it is possible for a request to complete in the middle of a clock cycle. In such a case, the cycle is padded with dummy data transfers (with the C/BE# byte enable lines held deasserted). </p> <div class="mw-heading mw-heading2"><h2 id="Connector_pinout">Connector pinout</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=19" title="Edit section: Connector pinout"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The AGP connector contains almost all PCI signals, plus several additions. The connector has 66 contacts on each side, although 4 are removed for each keying notch. Pin 1 is closest to the I/O bracket, and the B and A sides are as in the table, looking down at the motherboard connector. </p><p>Contacts are spaced at 1 mm intervals, however they are arranged in two staggered vertical rows so that there is 2 mm space between pins in each row. Odd-numbered A-side contacts, and even-numbered B-side contacts are in the lower row (1.0 to 3.5 mm from the card edge). The others are in the upper row (3.7 to 6.0 mm from the card edge). </p> <table class="wikitable" style="text-align:center"> <caption>Accelerated Graphics Port connector pinout<sup id="cite_ref-agp10_13-2" class="reference"><a href="#cite_note-agp10-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page / location: 95">: 95 </span></sup><sup id="cite_ref-agp20_15-2" class="reference"><a href="#cite_note-agp20-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page / location: 231–3">: 231–3 </span></sup><sup id="cite_ref-agp30_16-2" class="reference"><a href="#cite_note-agp30-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page / location: 50">: 50 </span></sup> </caption> <tbody><tr> <th>Pin</th> <th>Side B</th> <th colspan="2">Side A</th> <th>Comments </th></tr> <tr> <th>1 </th> <td style="background:#f69">OVERCNT#</td> <td style="background:silver" colspan="2">+12 V</td> <td align="left">USB port overcurrent warning </td></tr> <tr> <th>2 </th> <td style="background:silver">+5 V</td> <td style="background:#f69" colspan="2">TYPEDET#</td> <td align="left">Pulled low by card to indicate 1.5 V (AGP 2.0 4x) ability </td></tr> <tr> <th>3 </th> <td style="background:silver">+5 V</td> <td style="background:#f69" colspan="2">GC_DET#</td> <td align="left">Pulled low by card to indicate 0.8 V (AGP 3.0 8x) ability </td></tr> <tr> <th>4 </th> <td style="background:#9f9">USB+</td> <td style="background:#9f9" colspan="2">USB−</td> <td align="left">USB pins for pass through to monitor </td></tr> <tr> <th>5 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground</td> <td align="left"> </td></tr> <tr> <th>6 </th> <td style="background:#fc6">INTB#</td> <td style="background:#fc6" colspan="2">INTA#</td> <td align="left">Interrupt lines (open-drain) </td></tr> <tr> <th>7 </th> <td style="background:#66f">CLK</td> <td style="background:#66f" colspan="2">RST#</td> <td align="left">66 MHz clock, Bus reset </td></tr> <tr> <th>8 </th> <td style="background:#f69">REQ#</td> <td style="background:#66f" colspan="2">GNT#</td> <td align="left">Bus request from card, and grant from motherboard </td></tr> <tr> <th>9 </th> <td style="background:silver">+3.3 V</td> <td style="background:silver" colspan="2">+3.3 V</td> <td align="left"> </td></tr> <tr> <th>10 </th> <td style="background:#66f">ST[0]</td> <td style="background:#66f" colspan="2">ST[1]</td> <td align="left">AGP status (valid while GNT# low) </td></tr> <tr> <th>11 </th> <td style="background:#66f">ST[2]</td> <td style="background:#66f" colspan="2">MB_DET#</td> <td align="left">Pulled low by motherboard to indicate 0.8 V (AGP 3.0 8x) ability </td></tr> <tr> <th>12 </th> <td style="background:#f69">RBF#</td> <td style="background:#f69">PIPE#</td> <td style="background:#9f9">DBI_HI</td> <td align="left">Read buffer full, Pipeline request, Data bus inversion[31:16] </td></tr> <tr> <th>13 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground</td> <td align="left"> </td></tr> <tr> <th>14 </th> <td style="background:#9f9">DBI_LO</td> <td style="background:#f69" colspan="2">WBF#</td> <td align="left">Data bus inversion [15:0], Write buffer full </td></tr> <tr> <th>15 </th> <td style="background:#f69">SBA[0]</td> <td style="background:#f69" colspan="2">SBA[1]</td> <td rowspan="7" align="left">Sideband address bus </td></tr> <tr> <th>16 </th> <td style="background:silver">+3.3 V</td> <td style="background:silver" colspan="2">+3.3 V </td></tr> <tr> <th>17 </th> <td style="background:#f69">SBA[2]</td> <td style="background:#f69" colspan="2">SBA[3] </td></tr> <tr> <th>18 </th> <td style="background:#f69">SB_STB</td> <td style="background:#f69" colspan="2">SB_STB# </td></tr> <tr> <th>19 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground </td></tr> <tr> <th>20 </th> <td style="background:#f69">SBA[4]</td> <td style="background:#f69" colspan="2">SBA[5] </td></tr> <tr> <th>21 </th> <td style="background:#f69">SBA[6]</td> <td style="background:#f69" colspan="2">SBA[7] </td></tr> <tr> <th>22 </th> <td style="background:#ff9">Reserved</td> <td style="background:#ff9" colspan="2">Reserved</td> <td rowspan="4" align="left">Key notch for 3.3 V AGP cards </td></tr> <tr> <th>23 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground </td></tr> <tr> <th>24 </th> <td style="background:silver">+3.3 V aux</td> <td style="background:#ff9" colspan="2">Reserved </td></tr> <tr> <th>25 </th> <td style="background:silver">+3.3 V</td> <td style="background:silver" colspan="2">+3.3 V </td></tr> <tr> <th>26 </th> <td style="background:#9f9">AD[31]</td> <td style="background:#9f9" colspan="2">AD[30]</td> <td rowspan="14" align="left">Address/data bus (upper half) </td></tr> <tr> <th>27 </th> <td style="background:#9f9">AD[29]</td> <td style="background:#9f9" colspan="2">AD[28] </td></tr> <tr> <th>28 </th> <td style="background:silver">+3.3 V</td> <td style="background:silver" colspan="2">+3.3 V </td></tr> <tr> <th>29 </th> <td style="background:#9f9">AD[27]</td> <td style="background:#9f9" colspan="2">AD[26] </td></tr> <tr> <th>30 </th> <td style="background:#9f9">AD[25]</td> <td style="background:#9f9" colspan="2">AD[24] </td></tr> <tr> <th>31 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground </td></tr> <tr> <th>32 </th> <td style="background:#9f9">AD_STB[1]</td> <td style="background:#9f9" colspan="2">AD_STB[1]# </td></tr> <tr> <th>33 </th> <td style="background:#9f9">AD[23]</td> <td style="background:#f9f" colspan="2">C/BE[3]# </td></tr> <tr> <th>34 </th> <td style="background:silver">Vddq</td> <td style="background:silver" colspan="2">Vddq </td></tr> <tr> <th>35 </th> <td style="background:#9f9">AD[21]</td> <td style="background:#9f9" colspan="2">AD[22] </td></tr> <tr> <th>36 </th> <td style="background:#9f9">AD[19]</td> <td style="background:#9f9" colspan="2">AD[20] </td></tr> <tr> <th>37 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground </td></tr> <tr> <th>38 </th> <td style="background:#9f9">AD[17]</td> <td style="background:#9f9" colspan="2">AD[18] </td></tr> <tr> <th>39 </th> <td style="background:#f9f">C/BE[2]#</td> <td style="background:#9f9" colspan="2">AD[16] </td></tr> <tr> <th>40 </th> <td style="background:silver">Vddq</td> <td style="background:silver" colspan="2">Vddq</td> <td align="left">3.3 or 1.5 V </td></tr> <tr> <th>41 </th> <td style="background:#f9f">IRDY#</td> <td style="background:#f9f" colspan="2">FRAME#</td> <td align="left">Initiator ready, Transfer in progress </td></tr> <tr> <th>42 </th> <td style="background:silver">+3.3 V aux</td> <td style="background:#ff9" colspan="2">Reserved</td> <td rowspan="4" align="left">Key notch for 1.5 V AGP cards </td></tr> <tr> <th>43 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground </td></tr> <tr> <th>44 </th> <td style="background:#ff9">Reserved</td> <td style="background:#ff9" colspan="2">Reserved </td></tr> <tr> <th>45 </th> <td style="background:silver">+3.3 V</td> <td style="background:silver" colspan="2">+3.3 V </td></tr> <tr> <th>46 </th> <td style="background:#99f">DEVSEL#</td> <td style="background:#99f" colspan="2">TRDY#</td> <td align="left">Target selected, Target ready </td></tr> <tr> <th>47 </th> <td style="background:silver">Vddq</td> <td style="background:#99f" colspan="2">STOP#</td> <td align="left">Target requests halt </td></tr> <tr> <th>48 </th> <td style="background:#f69">PERR#</td> <td style="background:#fc6" colspan="2">PME#</td> <td align="left">Parity error, Power management event (optional) </td></tr> <tr> <th>49 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground</td> <td align="left"> </td></tr> <tr> <th>50 </th> <td style="background:#fc6">SERR#</td> <td style="background:#9f9" colspan="2">PAR</td> <td align="left">System error, Even parity for (1x) PCI transactions only </td></tr> <tr> <th>51 </th> <td style="background:#f9f">C/BE[1]#</td> <td style="background:#9f9" colspan="2">AD[15]</td> <td rowspan="15" align="left">Address/data bus (lower half) </td></tr> <tr> <th>52 </th> <td style="background:silver">Vddq</td> <td style="background:silver" colspan="2">Vddq </td></tr> <tr> <th>53 </th> <td style="background:#9f9">AD[14]</td> <td style="background:#9f9" colspan="2">AD[13] </td></tr> <tr> <th>54 </th> <td style="background:#9f9">AD[12]</td> <td style="background:#9f9" colspan="2">AD[11] </td></tr> <tr> <th>55 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground </td></tr> <tr> <th>56 </th> <td style="background:#9f9">AD[10]</td> <td style="background:#9f9" colspan="2">AD[9] </td></tr> <tr> <th>57 </th> <td style="background:#9f9">AD[8]</td> <td style="background:#f9f" colspan="2">C/BE[0]# </td></tr> <tr> <th>58 </th> <td style="background:silver">Vddq</td> <td style="background:silver" colspan="2">Vddq </td></tr> <tr> <th>59 </th> <td style="background:#9f9">AD_STB[0]</td> <td style="background:#9f9" colspan="2">AD_STB[0]# </td></tr> <tr> <th>60 </th> <td style="background:#9f9">AD[7]</td> <td style="background:#9f9" colspan="2">AD[6] </td></tr> <tr> <th>61 </th> <td style="background:#999">Ground</td> <td style="background:#999" colspan="2">Ground </td></tr> <tr> <th>62 </th> <td style="background:#9f9">AD[5]</td> <td style="background:#9f9" colspan="2">AD[4] </td></tr> <tr> <th>63 </th> <td style="background:#9f9">AD[3]</td> <td style="background:#9f9" colspan="2">AD[2] </td></tr> <tr> <th>64 </th> <td style="background:silver">Vddq</td> <td style="background:silver" colspan="2">Vddq </td></tr> <tr> <th>65 </th> <td style="background:#9f9">AD[1]</td> <td style="background:#9f9" colspan="2">AD[0] </td></tr> <tr> <th>66 </th> <td style="background:#66f">Vregcg</td> <td style="background:#f69" colspan="2">Vrefgc</td> <td align="left">I/O reference voltages </td></tr></tbody></table> <table class="wikitable"> <caption>Legend </caption> <tbody><tr> <th style="background:#999">Ground pin </th> <td>Zero volt reference </td></tr> <tr> <th style="background:silver">Power pin </th> <td>Supplies power to the AGP card </td></tr> <tr> <th style="background:#f69">Output pin </th> <td>Driven by the AGP card, received by the motherboard </td></tr> <tr> <th style="background:#f9f">Initiator output </th> <td>Driven by the master/initiator, received by the target </td></tr> <tr> <th style="background:#9f9">I/O signal </th> <td>May be driven by initiator or target, depending on operation </td></tr> <tr> <th style="background:#99f">Target output </th> <td>Driven by the target, received by the initiator/master </td></tr> <tr> <th style="background:#66f">Input </th> <td>Driven by the motherboard, received by the AGP card </td></tr> <tr> <th style="background:#fc6"><a href="/wiki/Open_drain" class="mw-redirect" title="Open drain">Open drain</a> </th> <td>May be pulled low and/or sensed by card or motherboard </td></tr> <tr> <th style="background:#ff9">Reserved </th> <td>Not presently used, do not connect </td></tr></tbody></table> <p>PCI signals omitted are: </p> <ul><li>The −12 V supply</li> <li>The third and fourth interrupt requests (INTC#, INTD#)</li> <li>The <a href="/wiki/JTAG" title="JTAG">JTAG</a> pins (TRST#, TCK, TMS, TDI, TDO)</li> <li>The <a href="/wiki/SMBus" class="mw-redirect" title="SMBus">SMBus</a> pins (SMBCLK, SMBDAT)</li> <li>The IDSEL pin; an AGP card connects AD[16] to IDSEL internally</li> <li>The 64-bit extension (REQ64#, ACK64#) and 66 MHz (M66EN) pins</li> <li>The LOCK# pin for locked transaction support</li></ul> <p>Signals added are: </p> <ul><li>Data strobes AD_STB[1:0] (and AD_STB[1:0]# in AGP 2.0)</li> <li>The sideband address bus SBA[7:0] and SB_STB (and SB_STB# in AGP 2.0)</li> <li>The ST[2:0] status signals</li> <li>USB+ and USB− (and OVERCNT# in AGP 2.0)</li> <li>The PIPE# signal (removed in AGP 3.0 for 0.8 V signaling)</li> <li>The RBF# signal</li> <li>The TYPEDET#, Vregcg and Vreggc pins (AGP 2.0 for 1.5V signaling)</li> <li>The DBI_HI and DBI_LO signals (AGP 3.0 for 0.8 V signaling only)</li> <li>The GC_DET# and MB_DET# pins (AGP 3.0 for 0.8V signaling)</li> <li>The WBF# signal (AGP 3.0 fast write extension)</li></ul> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=20" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/List_of_device_bandwidths" class="mw-redirect" title="List of device bandwidths">List of device bandwidths</a></li> <li><a href="/wiki/Serial_Digital_Video_Out" title="Serial Digital Video Out">Serial Digital Video Out</a> for ADD DVI adapter cards</li> <li><a href="/wiki/AGP_Inline_Memory_Module" title="AGP Inline Memory Module">AGP Inline Memory Module</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=21" title="Edit section: Notes"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist reflist-lower-alpha"> <div class="mw-references-wrap"><ol class="references"> <li id="cite_note-conn-part-23"><span class="mw-cite-backlink">^ <a href="#cite_ref-conn-part_23-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-conn-part_23-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text">From the extended part of the AGP connector.</span> </li> <li id="cite_note-24"><span class="mw-cite-backlink"><b><a href="#cite_ref-24">^</a></b></span> <span class="reference-text">The AGP Pro specifications imply a maximum of 25 W.</span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=22" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239543626"><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output 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Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AGP+almost+at+the+end%2C+Softpedia&rft.date=2008-06-05&rft_id=http%3A%2F%2Fnews.softpedia.com%2Fnews%2FAGP-Almost-at-the-End-of-the-Road-87316.shtml&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBy2024" class="citation web cs1">By (2024-03-03). <a rel="nofollow" class="external text" href="https://hackaday.com/2024/03/03/a-better-use-for-the-agp-slot-decades-later/">"A Better Use For The AGP Slot, Decades Later"</a>. <i>Hackaday</i><span class="reference-accessdate">. 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Archived from <a rel="nofollow" class="external text" href="http://www.sysopt.com/features/mboard/article.php/3549951">the original</a> on 9 May 2012<span class="reference-accessdate">. Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=What+is+AGP%3F&rft_id=http%3A%2F%2Fwww.sysopt.com%2Ffeatures%2Fmboard%2Farticle.php%2F3549951&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-Intel440LXdata-4"><span class="mw-cite-backlink">^ <a href="#cite_ref-Intel440LXdata_4-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Intel440LXdata_4-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.intel.com/design/chipsets/datashts/290564.htm">"Intel 440LX AGPset"</a><span class="reference-accessdate">. Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Intel+440LX+AGPset&rft_id=http%3A%2F%2Fwww.intel.com%2Fdesign%2Fchipsets%2Fdatashts%2F290564.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFLal_Shimpi,_Anand1997" class="citation web cs1">Lal Shimpi, Anand (August 1, 1997). <a rel="nofollow" class="external text" href="http://www.anandtech.com/showdoc.aspx?i=155&p=1">"Chipset Guide"</a>. AnandTech<span class="reference-accessdate">. Retrieved <span class="nowrap">2015-03-03</span></span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Chipset+Guide&rft.pub=AnandTech&rft.date=1997-08-01&rft.au=Lal+Shimpi%2C+Anand&rft_id=http%3A%2F%2Fwww.anandtech.com%2Fshowdoc.aspx%3Fi%3D155%26p%3D1&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.computerhope.com/issues/ch000145.htm">"Which version of Windows 95 supports AGP?"</a><span class="reference-accessdate">. Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Which+version+of+Windows+95+supports+AGP%3F&rft_id=http%3A%2F%2Fwww.computerhope.com%2Fissues%2Fch000145.htm&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text">Gasior, Geoff. <a rel="nofollow" class="external text" href="http://techreport.com/articles.x/7624">Nvidia's GeForce 6600 GT AGP graphics card: Bridging backwards</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20071011020529/http://techreport.com/articles.x/7624">Archived</a> 2007-10-11 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>, Tech Report, November 16, 2004.</span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text">Gasior, Geoff. <a rel="nofollow" class="external text" href="http://techreport.com/articles.x/8344">ATI's new AGP Radeons: A bridge is born</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20071024110508/http://techreport.com/articles.x/8344">Archived</a> 2007-10-24 at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a>, Tech Report, May 20, 2005.</span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20111007084211/http://forums.amd.com/game/messageview.cfm?catid=279&threadid=152471&highlight_key=y&keyword1=agp">"AMD community forums"</a>. Archived from <a rel="nofollow" class="external text" href="http://forums.amd.com/game/messageview.cfm?catid=279&threadid=152471&highlight_key=y&keyword1=agp">the original</a> on 7 October 2011<span class="reference-accessdate">. Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AMD+community+forums&rft_id=http%3A%2F%2Fforums.amd.com%2Fgame%2Fmessageview.cfm%3Fcatid%3D279%26threadid%3D152471%26highlight_key%3Dy%26keyword1%3Dagp&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://answers.microsoft.com/en-us/windows/forum/windows_10-security-winpc/agp-support-in-windows-10-anniversary-update-1607/bfcdf4ba-2c94-4ede-90a8-0bf587f27332?auth=1">"AGP support in Windows 10 Anniversary Update (1607)"</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AGP+support+in+Windows+10+Anniversary+Update+%281607%29&rft_id=https%3A%2F%2Fanswers.microsoft.com%2Fen-us%2Fwindows%2Fforum%2Fwindows_10-security-winpc%2Fagp-support-in-windows-10-anniversary-update-1607%2Fbfcdf4ba-2c94-4ede-90a8-0bf587f27332%3Fauth%3D1&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMichael_Larabel2020" class="citation web cs1">Michael Larabel (11 May 2020). <a rel="nofollow" class="external text" href="https://www.phoronix.com/scan.php?page=news_item&px=AGP-Radeon-Nouveau-Drop-RFC">"AGP Graphics Card Support Proposed For Removal From Linux Radeon/NVIDIA Drivers"</a>. <i>Phoronix</i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Phoronix&rft.atitle=AGP+Graphics+Card+Support+Proposed+For+Removal+From+Linux+Radeon%2FNVIDIA+Drivers&rft.date=2020-05-11&rft.au=Michael+Larabel&rft_id=https%3A%2F%2Fwww.phoronix.com%2Fscan.php%3Fpage%3Dnews_item%26px%3DAGP-Radeon-Nouveau-Drop-RFC&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="https://books.google.com/books?id=9cLFf_1PBnkC&dq=agp+2133&pg=PT268"><i>Upgrading and Repairing Servers</i></a>. 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Archived from <a rel="nofollow" class="external text" href="http://www.smartcomputing.com/editorial/article.asp?article=articles/archive/g0801/35x01/04g01.asp">the original</a> on 15 November 2007<span class="reference-accessdate">. Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AGP+4%C3%97%3A+Faster+Data+Transfer+%26+Better-Quality+Images&rft_id=http%3A%2F%2Fwww.smartcomputing.com%2Feditorial%2Farticle.asp%3Farticle%3Darticles%2Farchive%2Fg0801%2F35x01%2F04g01.asp&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-agp20-15"><span class="mw-cite-backlink">^ <a href="#cite_ref-agp20_15-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-agp20_15-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-agp20_15-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFIntel1998" class="citation cs2">Intel (May 4, 1998), <a rel="nofollow" class="external text" href="https://web.archive.org/web/20141231081259/http://www.motherboards.org/files/techspecs/agp20.pdf"><i>Accelerated Graphics Port Interface Specification Revision 2.0</i></a> <span class="cs1-format">(PDF)</span>, archived from <a rel="nofollow" class="external text" href="http://www.motherboards.org/files/techspecs/agp20.pdf">the original</a> <span class="cs1-format">(PDF)</span> on December 31, 2014<span class="reference-accessdate">, retrieved <span class="nowrap">2014-09-15</span></span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Accelerated+Graphics+Port+Interface+Specification+Revision+2.0&rft.date=1998-05-04&rft.au=Intel&rft_id=http%3A%2F%2Fwww.motherboards.org%2Ffiles%2Ftechspecs%2Fagp20.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-agp30-16"><span class="mw-cite-backlink">^ <a href="#cite_ref-agp30_16-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-agp30_16-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-agp30_16-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFIntel2002" class="citation cs2">Intel (September 2002), <a rel="nofollow" class="external text" href="http://download.intel.com/support/motherboards/desktop/sb/agp30.pdf"><i>AGP V3.0 Interface Specification</i></a> <span class="cs1-format">(PDF)</span>, <a rel="nofollow" class="external text" href="https://ghostarchive.org/archive/20221009/http://download.intel.com/support/motherboards/desktop/sb/agp30.pdf">archived</a> <span class="cs1-format">(PDF)</span> from the original on 2022-10-09<span class="reference-accessdate">, retrieved <span class="nowrap">2011-10-09</span></span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=AGP+V3.0+Interface+Specification&rft.date=2002-09&rft.au=Intel&rft_id=http%3A%2F%2Fdownload.intel.com%2Fsupport%2Fmotherboards%2Fdesktop%2Fsb%2Fagp30.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-17">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.motherboards.org/files/techspecs/apro_r11a.pdf">"AGP Pro 1.1a specification"</a> <span class="cs1-format">(PDF)</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=AGP+Pro+1.1a+specification&rft_id=http%3A%2F%2Fwww.motherboards.org%2Ffiles%2Ftechspecs%2Fapro_r11a.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-18"><span class="mw-cite-backlink"><b><a href="#cite_ref-18">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20010613041316/http://www.intel.com/technology/agp/downloads/agp8x_v091R_042401.pdf">"Draft AGP8× Interface Specification Rev. 0.91R"</a> <span class="cs1-format">(PDF)</span>. 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Archived from <a rel="nofollow" class="external text" href="http://www.ecs.com.tw/ECSWeb/Support/agp.aspx?MenuID=0&LanID=0">the original</a> on 16 December 2005<span class="reference-accessdate">. Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=ECS+Web+Site&rft_id=http%3A%2F%2Fwww.ecs.com.tw%2FECSWeb%2FSupport%2Fagp.aspx%3FMenuID%3D0%26LanID%3D0&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-20"><span class="mw-cite-backlink"><b><a href="#cite_ref-20">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20141110101536/http://www.pcstats.com/articleview.cfm?articleid=1806&page=2">"MSI K8N Neo3-F Motherboard Review—What's an AGR video slot?"</a>. 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Archived from <a rel="nofollow" class="external text" href="http://www.msi.com.tw/html/products/mainboard/agr/7135agr.pdf">the original</a> <span class="cs1-format">(PDF)</span> on March 8, 2007<span class="reference-accessdate">. Retrieved <span class="nowrap">15 September</span> 2014</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=List+of+cards+and+chipsets+that+work+with+the+MSI+AGR+port&rft_id=http%3A%2F%2Fwww.msi.com.tw%2Fhtml%2Fproducts%2Fmainboard%2Fagr%2F7135agr.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> <li id="cite_note-22"><span class="mw-cite-backlink"><b><a href="#cite_ref-22">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFAllen2006" class="citation web cs1">Allen, Mark (2006). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20160622083724/http://www.playtool.com/pages/agpcompat/agp.html">"AGP compatibility for sticklers"</a>. <i>Video card information</i>. PlayTool.com. Archived from <a rel="nofollow" class="external text" href="http://www.playtool.com/pages/agpcompat/agp.html">the original</a> on 22 June 2016.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Video+card+information&rft.atitle=AGP+compatibility+for+sticklers&rft.date=2006&rft.aulast=Allen&rft.aufirst=Mark&rft_id=http%3A%2F%2Fwww.playtool.com%2Fpages%2Fagpcompat%2Fagp.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3AAccelerated+Graphics+Port" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Accelerated_Graphics_Port&action=edit&section=23" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1235681985">.mw-parser-output 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//upload.wikimedia.org/wikipedia/en/thumb/4/4a/Commons-logo.svg/59px-Commons-logo.svg.png 2x" data-file-width="1024" data-file-height="1376" /></span></span></div> <div class="side-box-text plainlist">Wikimedia Commons has media related to <span style="font-weight: bold; font-style: italic;"><a href="https://commons.wikimedia.org/wiki/Category:AGP" class="extiw" title="commons:Category:AGP">AGP</a></span>.</div></div> </div> <ul><li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20061010060709/http://www.agpforum.org/">Archived AGP Implementors Forum</a></li> <li>AGP specifications: <a rel="nofollow" class="external text" href="https://web.archive.org/web/20150503042109/http://www.playtool.com/pages/agpcompat/agp10.pdf">1.0</a>, <a rel="nofollow" class="external text" href="https://web.archive.org/web/20080920213138/http://www.motherboards.org/files/techspecs/agp20.pdf">2.0</a>, <a rel="nofollow" class="external text" href="https://web.archive.org/web/20170620060750/https://download.intel.com/support/motherboards/desktop/sb/agp30.pdf">3.0</a>, <a rel="nofollow" class="external text" href="https://web.archive.org/web/20021003222339/http://www.agpforum.org/downloads/apro_r10.pdf">Pro 1.0</a>, <a rel="nofollow" class="external text" href="https://web.archive.org/web/20021003222339/http://www.agpforum.org/downloads/apro_r11a.pdf">Pro 1.1a</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20100330154952/http://www.playtool.com/pages/agpcompat/newagp.html">AGP Compatibility For Sticklers</a></li> <li><a rel="nofollow" class="external text" href="http://pinouts.ru/Slots/agp_pinout.shtml">AGP pinout</a></li> <li><a rel="nofollow" class="external text" href="http://www.motherboards.org/articles/tech-planations/920_4.html">AGP expansion slots</a></li> <li><a rel="nofollow" class="external text" href="http://www.playtool.com/pages/agpcompat/agp.html">AGP compatibility</a> (with pictures)</li> <li><a rel="nofollow" class="external text" href="http://www.microsoft.com/whdc/archive/uagp.mspx">Universal Accelerated Graphics Port (UAGP)</a></li> <li><a rel="nofollow" class="external text" href="http://computer.howstuffworks.com/agp.htm">How Stuff Works - AGP</a></li> <li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20050804000048/http://www.ocfaq.com/article.php/overclocking/vidcard/43">A discussion from 2003 of what AGP aperture is, how it works, and how much memory should be allocated to it.</a></li></ul> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output .hlist.inline ol,.mw-parser-output .hlist.inline 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<ul><li><a href="/wiki/System_bus" title="System bus">System bus</a></li> <li><a href="/wiki/Front-side_bus" title="Front-side bus">Front-side bus</a></li> <li><a href="/wiki/Back-side_bus" title="Back-side bus">Back-side bus</a></li> <li><a href="/wiki/Daisy_chain_(electrical_engineering)" title="Daisy chain (electrical engineering)">Daisy chain</a></li> <li><a href="/wiki/Control_bus" title="Control bus">Control bus</a></li> <li><a href="/wiki/Address_bus" class="mw-redirect" title="Address bus">Address bus</a></li> <li><a href="/wiki/Bus_contention" title="Bus contention">Bus contention</a></li> <li><a href="/wiki/Bus_mastering" title="Bus mastering">Bus mastering</a></li> <li><a href="/wiki/Network_on_a_chip" title="Network on a chip">Network on a chip</a></li> <li><a href="/wiki/Plug_and_play" title="Plug and play">Plug and play</a></li> <li><a href="/wiki/List_of_interface_bit_rates#Computer_buses" title="List of interface bit rates">List of bus bandwidths</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Standards</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/SS-50_bus" title="SS-50 bus">SS-50 bus</a></li> <li><a href="/wiki/S-100_bus" title="S-100 bus">S-100 bus</a></li> <li><a href="/wiki/Multibus" title="Multibus">Multibus</a></li> <li><a href="/wiki/Unibus" title="Unibus">Unibus</a></li> <li><a href="/wiki/VAXBI_bus" title="VAXBI bus">VAXBI</a></li> <li><a href="/wiki/MBus_(SPARC)" title="MBus (SPARC)">MBus</a></li> <li><a href="/wiki/STD_Bus" title="STD Bus">STD Bus</a></li> <li><a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a></li> <li><a href="/wiki/Q-Bus" title="Q-Bus">Q-Bus</a></li> <li><a href="/wiki/Europe_Card_Bus" title="Europe Card Bus">Europe Card Bus</a></li> <li><a href="/wiki/Industry_Standard_Architecture" title="Industry Standard Architecture">ISA</a></li> <li><a href="/wiki/STEbus" title="STEbus">STEbus</a></li> <li><a href="/wiki/Amiga_Zorro_II" title="Amiga Zorro II">Zorro II</a></li> <li><a href="/wiki/Amiga_Zorro_III" title="Amiga Zorro III">Zorro III</a></li> <li><a href="/wiki/Computer_Automated_Measurement_and_Control" title="Computer Automated Measurement and Control">CAMAC</a></li> <li><a href="/wiki/FASTBUS" title="FASTBUS">FASTBUS</a></li> <li><a href="/wiki/Low_Pin_Count" title="Low Pin Count">LPC</a></li> <li><a href="/wiki/HP_Precision_Bus" title="HP Precision Bus">HP Precision Bus</a></li> <li><a href="/wiki/Extended_Industry_Standard_Architecture" title="Extended Industry Standard Architecture">EISA</a></li> <li><a href="/wiki/VMEbus" title="VMEbus">VME</a></li> <li><a href="/wiki/VME_eXtensions_for_Instrumentation" title="VME eXtensions for Instrumentation">VXI</a></li> <li><a href="/wiki/VXS" title="VXS">VXS</a></li> <li><a href="/wiki/VPX" title="VPX">VPX</a></li> <li><a href="/wiki/NuBus" title="NuBus">NuBus</a></li> <li><a href="/wiki/TURBOchannel" title="TURBOchannel">TURBOchannel</a></li> <li><a href="/wiki/Micro_Channel_architecture" title="Micro Channel architecture">MCA</a></li> <li><a href="/wiki/SBus" title="SBus">SBus</a></li> <li><a href="/wiki/VESA_Local_Bus" title="VESA Local Bus">VLB</a></li> <li><a href="/wiki/GSC_bus" title="GSC bus">HP GSC bus</a></li> <li><a href="/wiki/InfiniBand" title="InfiniBand">InfiniBand</a></li> <li><a href="/wiki/Ethernet" title="Ethernet">Ethernet</a></li> <li><a href="/wiki/Ultra_Port_Architecture" title="Ultra Port Architecture">UPA</a></li> <li><a href="/wiki/Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a></li> <li><a href="/wiki/PCI-X" title="PCI-X">PCI Extended (PCI-X)</a></li> <li><a href="/wiki/PCI_eXtensions_for_Instrumentation" title="PCI eXtensions for Instrumentation">PXI</a></li> <li><a href="/wiki/PCI_Express" title="PCI Express">PCI Express (PCIe)</a></li> <li><a class="mw-selflink selflink">AGP</a></li> <li><a href="/wiki/Compute_Express_Link" title="Compute Express Link">Compute Express Link (CXL)</a></li> <li><a href="/wiki/Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface (DMI)</a></li> <li><a href="/wiki/RapidIO" title="RapidIO">RapidIO</a></li> <li><a href="/wiki/Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">Intel QuickPath Interconnect</a></li> <li><a href="/wiki/NVLink" title="NVLink">NVLink</a></li> <li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> <ul><li><a href="/wiki/Infinity_Fabric" class="mw-redirect" title="Infinity Fabric">Infinity Fabric</a></li></ul></li> <li><a href="/wiki/Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Intel Ultra Path Interconnect</a></li> <li><a href="/wiki/Coherent_Accelerator_Processor_Interface" title="Coherent Accelerator Processor Interface">Coherent Accelerator Processor Interface (CAPI)</a></li> <li><a href="/wiki/SpaceWire" title="SpaceWire">SpaceWire</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Storage</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ST-506/ST-412" title="ST-506/ST-412">ST-506</a></li> <li><a href="/wiki/Enhanced_Small_Disk_Interface" title="Enhanced Small Disk Interface">ESDI</a></li> <li><a href="/wiki/Intelligent_Peripheral_Interface" title="Intelligent Peripheral Interface">IPI</a></li> <li><a href="/wiki/Storage_Module_Device" title="Storage Module Device">SMD</a></li> <li><a href="/wiki/Parallel_ATA" title="Parallel ATA">Parallel ATA (PATA)</a></li> <li><a href="/wiki/Bus_and_Tag" title="Bus and Tag">Bus and Tag</a></li> <li><a href="/wiki/Digital_Storage_Systems_Interconnect" title="Digital Storage Systems Interconnect">DSSI</a></li> <li><a href="/wiki/HIPPI" title="HIPPI">HIPPI</a></li> <li><a href="/wiki/SATA" title="SATA">Serial ATA (SATA)</a></li> <li><a href="/wiki/SCSI" title="SCSI">SCSI</a> <ul><li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel</a></li> <li><a href="/wiki/Serial_Attached_SCSI" title="Serial Attached SCSI">SAS</a></li></ul></li> <li><a href="/wiki/ESCON" title="ESCON">ESCON</a></li> <li><a href="/wiki/Fibre_Channel" title="Fibre Channel">Fibre Channel</a></li> <li><a href="/wiki/Serial_Storage_Architecture" title="Serial Storage Architecture">SSA</a></li> <li><a href="/wiki/SATA_Express" title="SATA Express">SATAe</a></li> <li>PCI Express (via <a href="/wiki/Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">AHCI</a> or <a href="/wiki/NVM_Express" title="NVM Express">NVMe</a> logical device interface)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Peripheral</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Apple_Desktop_Bus" title="Apple Desktop Bus">Apple Desktop Bus</a></li> <li><a href="/wiki/Atari_SIO" title="Atari SIO">Atari SIO</a></li> <li><a href="/wiki/Digital_Control_Bus" title="Digital Control Bus">DCB</a></li> <li><a href="/wiki/Commodore_bus" title="Commodore bus">Commodore bus</a></li> <li><a href="/wiki/HP-IL" title="HP-IL">HP-IL</a></li> <li><a href="/wiki/HIL_bus" title="HIL bus">HIL</a></li> <li><a href="/wiki/MIDI" title="MIDI">MIDI</a></li> <li><a href="/wiki/RS-232" title="RS-232">RS-232</a></li> <li><a href="/wiki/RS-422" title="RS-422">RS-422</a></li> <li><a href="/wiki/RS-423" title="RS-423">RS-423</a></li> <li><a href="/wiki/RS-485" title="RS-485">RS-485</a></li> <li><a href="/wiki/Lightning_(connector)" title="Lightning (connector)">Lightning</a></li> <li><a href="/wiki/DMX512#DMX512-A" title="DMX512">DMX512-A</a></li> <li><a href="/wiki/IEEE-488" class="mw-redirect" title="IEEE-488">IEEE-488 (GPIB)</a></li> <li><a href="/wiki/IEEE_1284" title="IEEE 1284">IEEE-1284 (parallel port)</a></li> <li><a href="/wiki/IEEE_1394" title="IEEE 1394">IEEE-1394 (FireWire)</a></li> <li><a href="/wiki/UNI/O" title="UNI/O">UNI/O</a></li> <li><a href="/wiki/1-Wire" title="1-Wire">1-Wire</a></li> <li><a href="/wiki/I%C2%B2C" title="I²C">I²C</a> (<a href="/wiki/ACCESS.bus" title="ACCESS.bus">ACCESS.bus</a>, <a href="/wiki/Power_Management_Bus" title="Power Management Bus">PMBus</a>, <a href="/wiki/System_Management_Bus" title="System Management Bus">SMBus</a>)</li> <li><a href="/wiki/I3C_(bus)" title="I3C (bus)">I3C</a></li> <li><a href="/wiki/Serial_Peripheral_Interface" title="Serial Peripheral Interface">SPI</a></li> <li><a href="/wiki/IEC_61030" title="IEC 61030">D²B</a></li> <li><a href="/wiki/Parallel_SCSI" title="Parallel SCSI">Parallel SCSI</a></li> <li><a href="/wiki/Profibus" title="Profibus">Profibus</a></li> <li><a href="/wiki/USB" title="USB">USB</a></li> <li><a href="/wiki/Camera_Link" title="Camera Link">Camera Link</a></li> <li><a href="/wiki/PCI_Express#PCI_Express_External_Cabling" title="PCI Express">External PCIe</a></li> <li><a href="/wiki/Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Audio</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/ADAT_Lightpipe" title="ADAT Lightpipe">ADAT Lightpipe</a></li> <li><a href="/wiki/AES3" title="AES3">AES3</a></li> <li><a href="/wiki/Intel_High_Definition_Audio" title="Intel High Definition Audio">Intel HD Audio</a></li> <li><a href="/wiki/I%C2%B2S" title="I²S">I²S</a></li> <li><a href="/wiki/MADI" title="MADI">MADI</a></li> <li><a href="/wiki/McASP" title="McASP">McASP</a></li> <li><a href="/wiki/S/PDIF" title="S/PDIF">S/PDIF</a></li> <li><a href="/wiki/TOSLINK" title="TOSLINK">TOSLINK</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Portable</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/PC_Card" title="PC Card">PC Card</a></li> <li><a href="/wiki/ExpressCard" title="ExpressCard">ExpressCard</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Embedded</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Multidrop_bus" title="Multidrop bus">Multidrop bus</a></li> <li><a href="/wiki/CoreConnect" title="CoreConnect">CoreConnect</a></li> <li><a href="/wiki/Advanced_Microcontroller_Bus_Architecture" title="Advanced Microcontroller Bus Architecture">AMBA</a> (<a href="/wiki/Advanced_eXtensible_Interface" title="Advanced eXtensible Interface">AXI</a>)</li> <li><a href="/wiki/Wishbone_(computer_bus)" title="Wishbone (computer bus)">Wishbone</a></li> <li><a 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